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authorJens Axboe <axboe@kernel.dk>2018-01-19 14:28:13 -0500
committerJens Axboe <axboe@kernel.dk>2018-01-19 14:28:13 -0500
commit9b9c63f71bddf3dc897aaaa46c0593abc3e09932 (patch)
tree7312574330c4612a04978c958b40981642760bbd
parentb889bf66d001a46a95deef18ddbe6db84645ed24 (diff)
parent88de4598bca84e27b261685c06fff816b8d932a1 (diff)
Merge branch 'nvme-4.16' of git://git.infradead.org/nvme into for-4.16/block
Pull NVMe fixes for 4.16 from Christoph. * 'nvme-4.16' of git://git.infradead.org/nvme: nvme-pci: clean up SMBSZ bit definitions nvme-pci: clean up CMB initialization nvme-fc: correct hang in nvme_ns_remove() nvme-fc: fix rogue admin cmds stalling teardown nvmet: release a ns reference in nvmet_req_uninit if needed nvme-fabrics: fix memory leak when parsing host ID option nvme: fix comment typos in nvme_create_io_queues nvme: host delete_work and reset_work on separate workqueues nvme-pci: allocate device queues storage space at probe nvme-pci: serialize pci resets
-rw-r--r--drivers/nvme/host/core.c47
-rw-r--r--drivers/nvme/host/fabrics.c4
-rw-r--r--drivers/nvme/host/fc.c6
-rw-r--r--drivers/nvme/host/nvme.h3
-rw-r--r--drivers/nvme/host/pci.c133
-rw-r--r--drivers/nvme/host/rdma.c2
-rw-r--r--drivers/nvme/target/core.c3
-rw-r--r--drivers/nvme/target/loop.c2
-rw-r--r--include/linux/nvme.h22
9 files changed, 132 insertions, 90 deletions
diff --git a/drivers/nvme/host/core.c b/drivers/nvme/host/core.c
index 2fe15351ac4e..fde6fd2e7eef 100644
--- a/drivers/nvme/host/core.c
+++ b/drivers/nvme/host/core.c
@@ -65,9 +65,26 @@ static bool streams;
65module_param(streams, bool, 0644); 65module_param(streams, bool, 0644);
66MODULE_PARM_DESC(streams, "turn on support for Streams write directives"); 66MODULE_PARM_DESC(streams, "turn on support for Streams write directives");
67 67
68/*
69 * nvme_wq - hosts nvme related works that are not reset or delete
70 * nvme_reset_wq - hosts nvme reset works
71 * nvme_delete_wq - hosts nvme delete works
72 *
73 * nvme_wq will host works such are scan, aen handling, fw activation,
74 * keep-alive error recovery, periodic reconnects etc. nvme_reset_wq
75 * runs reset works which also flush works hosted on nvme_wq for
76 * serialization purposes. nvme_delete_wq host controller deletion
77 * works which flush reset works for serialization.
78 */
68struct workqueue_struct *nvme_wq; 79struct workqueue_struct *nvme_wq;
69EXPORT_SYMBOL_GPL(nvme_wq); 80EXPORT_SYMBOL_GPL(nvme_wq);
70 81
82struct workqueue_struct *nvme_reset_wq;
83EXPORT_SYMBOL_GPL(nvme_reset_wq);
84
85struct workqueue_struct *nvme_delete_wq;
86EXPORT_SYMBOL_GPL(nvme_delete_wq);
87
71static DEFINE_IDA(nvme_subsystems_ida); 88static DEFINE_IDA(nvme_subsystems_ida);
72static LIST_HEAD(nvme_subsystems); 89static LIST_HEAD(nvme_subsystems);
73static DEFINE_MUTEX(nvme_subsystems_lock); 90static DEFINE_MUTEX(nvme_subsystems_lock);
@@ -89,13 +106,13 @@ int nvme_reset_ctrl(struct nvme_ctrl *ctrl)
89{ 106{
90 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING)) 107 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING))
91 return -EBUSY; 108 return -EBUSY;
92 if (!queue_work(nvme_wq, &ctrl->reset_work)) 109 if (!queue_work(nvme_reset_wq, &ctrl->reset_work))
93 return -EBUSY; 110 return -EBUSY;
94 return 0; 111 return 0;
95} 112}
96EXPORT_SYMBOL_GPL(nvme_reset_ctrl); 113EXPORT_SYMBOL_GPL(nvme_reset_ctrl);
97 114
98static int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl) 115int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl)
99{ 116{
100 int ret; 117 int ret;
101 118
@@ -104,6 +121,7 @@ static int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl)
104 flush_work(&ctrl->reset_work); 121 flush_work(&ctrl->reset_work);
105 return ret; 122 return ret;
106} 123}
124EXPORT_SYMBOL_GPL(nvme_reset_ctrl_sync);
107 125
108static void nvme_delete_ctrl_work(struct work_struct *work) 126static void nvme_delete_ctrl_work(struct work_struct *work)
109{ 127{
@@ -122,7 +140,7 @@ int nvme_delete_ctrl(struct nvme_ctrl *ctrl)
122{ 140{
123 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING)) 141 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING))
124 return -EBUSY; 142 return -EBUSY;
125 if (!queue_work(nvme_wq, &ctrl->delete_work)) 143 if (!queue_work(nvme_delete_wq, &ctrl->delete_work))
126 return -EBUSY; 144 return -EBUSY;
127 return 0; 145 return 0;
128} 146}
@@ -3525,16 +3543,26 @@ EXPORT_SYMBOL_GPL(nvme_reinit_tagset);
3525 3543
3526int __init nvme_core_init(void) 3544int __init nvme_core_init(void)
3527{ 3545{
3528 int result; 3546 int result = -ENOMEM;
3529 3547
3530 nvme_wq = alloc_workqueue("nvme-wq", 3548 nvme_wq = alloc_workqueue("nvme-wq",
3531 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0); 3549 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0);
3532 if (!nvme_wq) 3550 if (!nvme_wq)
3533 return -ENOMEM; 3551 goto out;
3552
3553 nvme_reset_wq = alloc_workqueue("nvme-reset-wq",
3554 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0);
3555 if (!nvme_reset_wq)
3556 goto destroy_wq;
3557
3558 nvme_delete_wq = alloc_workqueue("nvme-delete-wq",
3559 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0);
3560 if (!nvme_delete_wq)
3561 goto destroy_reset_wq;
3534 3562
3535 result = alloc_chrdev_region(&nvme_chr_devt, 0, NVME_MINORS, "nvme"); 3563 result = alloc_chrdev_region(&nvme_chr_devt, 0, NVME_MINORS, "nvme");
3536 if (result < 0) 3564 if (result < 0)
3537 goto destroy_wq; 3565 goto destroy_delete_wq;
3538 3566
3539 nvme_class = class_create(THIS_MODULE, "nvme"); 3567 nvme_class = class_create(THIS_MODULE, "nvme");
3540 if (IS_ERR(nvme_class)) { 3568 if (IS_ERR(nvme_class)) {
@@ -3553,8 +3581,13 @@ destroy_class:
3553 class_destroy(nvme_class); 3581 class_destroy(nvme_class);
3554unregister_chrdev: 3582unregister_chrdev:
3555 unregister_chrdev_region(nvme_chr_devt, NVME_MINORS); 3583 unregister_chrdev_region(nvme_chr_devt, NVME_MINORS);
3584destroy_delete_wq:
3585 destroy_workqueue(nvme_delete_wq);
3586destroy_reset_wq:
3587 destroy_workqueue(nvme_reset_wq);
3556destroy_wq: 3588destroy_wq:
3557 destroy_workqueue(nvme_wq); 3589 destroy_workqueue(nvme_wq);
3590out:
3558 return result; 3591 return result;
3559} 3592}
3560 3593
@@ -3564,6 +3597,8 @@ void nvme_core_exit(void)
3564 class_destroy(nvme_subsys_class); 3597 class_destroy(nvme_subsys_class);
3565 class_destroy(nvme_class); 3598 class_destroy(nvme_class);
3566 unregister_chrdev_region(nvme_chr_devt, NVME_MINORS); 3599 unregister_chrdev_region(nvme_chr_devt, NVME_MINORS);
3600 destroy_workqueue(nvme_delete_wq);
3601 destroy_workqueue(nvme_reset_wq);
3567 destroy_workqueue(nvme_wq); 3602 destroy_workqueue(nvme_wq);
3568} 3603}
3569 3604
diff --git a/drivers/nvme/host/fabrics.c b/drivers/nvme/host/fabrics.c
index 2f68befd31bf..eb46967bb0d5 100644
--- a/drivers/nvme/host/fabrics.c
+++ b/drivers/nvme/host/fabrics.c
@@ -738,7 +738,9 @@ static int nvmf_parse_options(struct nvmf_ctrl_options *opts,
738 ret = -ENOMEM; 738 ret = -ENOMEM;
739 goto out; 739 goto out;
740 } 740 }
741 if (uuid_parse(p, &hostid)) { 741 ret = uuid_parse(p, &hostid);
742 kfree(p);
743 if (ret) {
742 pr_err("Invalid hostid %s\n", p); 744 pr_err("Invalid hostid %s\n", p);
743 ret = -EINVAL; 745 ret = -EINVAL;
744 goto out; 746 goto out;
diff --git a/drivers/nvme/host/fc.c b/drivers/nvme/host/fc.c
index 2a7a9a75105d..b76ba4629e02 100644
--- a/drivers/nvme/host/fc.c
+++ b/drivers/nvme/host/fc.c
@@ -2921,6 +2921,9 @@ nvme_fc_delete_association(struct nvme_fc_ctrl *ctrl)
2921 __nvme_fc_delete_hw_queue(ctrl, &ctrl->queues[0], 0); 2921 __nvme_fc_delete_hw_queue(ctrl, &ctrl->queues[0], 0);
2922 nvme_fc_free_queue(&ctrl->queues[0]); 2922 nvme_fc_free_queue(&ctrl->queues[0]);
2923 2923
2924 /* re-enable the admin_q so anything new can fast fail */
2925 blk_mq_unquiesce_queue(ctrl->ctrl.admin_q);
2926
2924 nvme_fc_ctlr_inactive_on_rport(ctrl); 2927 nvme_fc_ctlr_inactive_on_rport(ctrl);
2925} 2928}
2926 2929
@@ -2935,6 +2938,9 @@ nvme_fc_delete_ctrl(struct nvme_ctrl *nctrl)
2935 * waiting for io to terminate 2938 * waiting for io to terminate
2936 */ 2939 */
2937 nvme_fc_delete_association(ctrl); 2940 nvme_fc_delete_association(ctrl);
2941
2942 /* resume the io queues so that things will fast fail */
2943 nvme_start_queues(nctrl);
2938} 2944}
2939 2945
2940static void 2946static void
diff --git a/drivers/nvme/host/nvme.h b/drivers/nvme/host/nvme.h
index 4112fb6ce80d..8e7fc1b041b7 100644
--- a/drivers/nvme/host/nvme.h
+++ b/drivers/nvme/host/nvme.h
@@ -32,6 +32,8 @@ extern unsigned int admin_timeout;
32#define NVME_KATO_GRACE 10 32#define NVME_KATO_GRACE 10
33 33
34extern struct workqueue_struct *nvme_wq; 34extern struct workqueue_struct *nvme_wq;
35extern struct workqueue_struct *nvme_reset_wq;
36extern struct workqueue_struct *nvme_delete_wq;
35 37
36enum { 38enum {
37 NVME_NS_LBA = 0, 39 NVME_NS_LBA = 0,
@@ -394,6 +396,7 @@ int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count);
394void nvme_start_keep_alive(struct nvme_ctrl *ctrl); 396void nvme_start_keep_alive(struct nvme_ctrl *ctrl);
395void nvme_stop_keep_alive(struct nvme_ctrl *ctrl); 397void nvme_stop_keep_alive(struct nvme_ctrl *ctrl);
396int nvme_reset_ctrl(struct nvme_ctrl *ctrl); 398int nvme_reset_ctrl(struct nvme_ctrl *ctrl);
399int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl);
397int nvme_delete_ctrl(struct nvme_ctrl *ctrl); 400int nvme_delete_ctrl(struct nvme_ctrl *ctrl);
398int nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl); 401int nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl);
399 402
diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c
index 62119078c2bf..a2ffb557b616 100644
--- a/drivers/nvme/host/pci.c
+++ b/drivers/nvme/host/pci.c
@@ -75,7 +75,7 @@ static void nvme_dev_disable(struct nvme_dev *dev, bool shutdown);
75 * Represents an NVM Express device. Each nvme_dev is a PCI function. 75 * Represents an NVM Express device. Each nvme_dev is a PCI function.
76 */ 76 */
77struct nvme_dev { 77struct nvme_dev {
78 struct nvme_queue **queues; 78 struct nvme_queue *queues;
79 struct blk_mq_tag_set tagset; 79 struct blk_mq_tag_set tagset;
80 struct blk_mq_tag_set admin_tagset; 80 struct blk_mq_tag_set admin_tagset;
81 u32 __iomem *dbs; 81 u32 __iomem *dbs;
@@ -365,7 +365,7 @@ static int nvme_admin_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
365 unsigned int hctx_idx) 365 unsigned int hctx_idx)
366{ 366{
367 struct nvme_dev *dev = data; 367 struct nvme_dev *dev = data;
368 struct nvme_queue *nvmeq = dev->queues[0]; 368 struct nvme_queue *nvmeq = &dev->queues[0];
369 369
370 WARN_ON(hctx_idx != 0); 370 WARN_ON(hctx_idx != 0);
371 WARN_ON(dev->admin_tagset.tags[0] != hctx->tags); 371 WARN_ON(dev->admin_tagset.tags[0] != hctx->tags);
@@ -387,7 +387,7 @@ static int nvme_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
387 unsigned int hctx_idx) 387 unsigned int hctx_idx)
388{ 388{
389 struct nvme_dev *dev = data; 389 struct nvme_dev *dev = data;
390 struct nvme_queue *nvmeq = dev->queues[hctx_idx + 1]; 390 struct nvme_queue *nvmeq = &dev->queues[hctx_idx + 1];
391 391
392 if (!nvmeq->tags) 392 if (!nvmeq->tags)
393 nvmeq->tags = &dev->tagset.tags[hctx_idx]; 393 nvmeq->tags = &dev->tagset.tags[hctx_idx];
@@ -403,7 +403,7 @@ static int nvme_init_request(struct blk_mq_tag_set *set, struct request *req,
403 struct nvme_dev *dev = set->driver_data; 403 struct nvme_dev *dev = set->driver_data;
404 struct nvme_iod *iod = blk_mq_rq_to_pdu(req); 404 struct nvme_iod *iod = blk_mq_rq_to_pdu(req);
405 int queue_idx = (set == &dev->tagset) ? hctx_idx + 1 : 0; 405 int queue_idx = (set == &dev->tagset) ? hctx_idx + 1 : 0;
406 struct nvme_queue *nvmeq = dev->queues[queue_idx]; 406 struct nvme_queue *nvmeq = &dev->queues[queue_idx];
407 407
408 BUG_ON(!nvmeq); 408 BUG_ON(!nvmeq);
409 iod->nvmeq = nvmeq; 409 iod->nvmeq = nvmeq;
@@ -1046,7 +1046,7 @@ static int nvme_poll(struct blk_mq_hw_ctx *hctx, unsigned int tag)
1046static void nvme_pci_submit_async_event(struct nvme_ctrl *ctrl) 1046static void nvme_pci_submit_async_event(struct nvme_ctrl *ctrl)
1047{ 1047{
1048 struct nvme_dev *dev = to_nvme_dev(ctrl); 1048 struct nvme_dev *dev = to_nvme_dev(ctrl);
1049 struct nvme_queue *nvmeq = dev->queues[0]; 1049 struct nvme_queue *nvmeq = &dev->queues[0];
1050 struct nvme_command c; 1050 struct nvme_command c;
1051 1051
1052 memset(&c, 0, sizeof(c)); 1052 memset(&c, 0, sizeof(c));
@@ -1282,7 +1282,6 @@ static void nvme_free_queue(struct nvme_queue *nvmeq)
1282 if (nvmeq->sq_cmds) 1282 if (nvmeq->sq_cmds)
1283 dma_free_coherent(nvmeq->q_dmadev, SQ_SIZE(nvmeq->q_depth), 1283 dma_free_coherent(nvmeq->q_dmadev, SQ_SIZE(nvmeq->q_depth),
1284 nvmeq->sq_cmds, nvmeq->sq_dma_addr); 1284 nvmeq->sq_cmds, nvmeq->sq_dma_addr);
1285 kfree(nvmeq);
1286} 1285}
1287 1286
1288static void nvme_free_queues(struct nvme_dev *dev, int lowest) 1287static void nvme_free_queues(struct nvme_dev *dev, int lowest)
@@ -1290,10 +1289,8 @@ static void nvme_free_queues(struct nvme_dev *dev, int lowest)
1290 int i; 1289 int i;
1291 1290
1292 for (i = dev->ctrl.queue_count - 1; i >= lowest; i--) { 1291 for (i = dev->ctrl.queue_count - 1; i >= lowest; i--) {
1293 struct nvme_queue *nvmeq = dev->queues[i];
1294 dev->ctrl.queue_count--; 1292 dev->ctrl.queue_count--;
1295 dev->queues[i] = NULL; 1293 nvme_free_queue(&dev->queues[i]);
1296 nvme_free_queue(nvmeq);
1297 } 1294 }
1298} 1295}
1299 1296
@@ -1325,10 +1322,8 @@ static int nvme_suspend_queue(struct nvme_queue *nvmeq)
1325 1322
1326static void nvme_disable_admin_queue(struct nvme_dev *dev, bool shutdown) 1323static void nvme_disable_admin_queue(struct nvme_dev *dev, bool shutdown)
1327{ 1324{
1328 struct nvme_queue *nvmeq = dev->queues[0]; 1325 struct nvme_queue *nvmeq = &dev->queues[0];
1329 1326
1330 if (!nvmeq)
1331 return;
1332 if (nvme_suspend_queue(nvmeq)) 1327 if (nvme_suspend_queue(nvmeq))
1333 return; 1328 return;
1334 1329
@@ -1369,7 +1364,7 @@ static int nvme_cmb_qdepth(struct nvme_dev *dev, int nr_io_queues,
1369static int nvme_alloc_sq_cmds(struct nvme_dev *dev, struct nvme_queue *nvmeq, 1364static int nvme_alloc_sq_cmds(struct nvme_dev *dev, struct nvme_queue *nvmeq,
1370 int qid, int depth) 1365 int qid, int depth)
1371{ 1366{
1372 if (qid && dev->cmb && use_cmb_sqes && NVME_CMB_SQS(dev->cmbsz)) { 1367 if (qid && dev->cmb && use_cmb_sqes && (dev->cmbsz & NVME_CMBSZ_SQS)) {
1373 unsigned offset = (qid - 1) * roundup(SQ_SIZE(depth), 1368 unsigned offset = (qid - 1) * roundup(SQ_SIZE(depth),
1374 dev->ctrl.page_size); 1369 dev->ctrl.page_size);
1375 nvmeq->sq_dma_addr = dev->cmb_bus_addr + offset; 1370 nvmeq->sq_dma_addr = dev->cmb_bus_addr + offset;
@@ -1384,13 +1379,10 @@ static int nvme_alloc_sq_cmds(struct nvme_dev *dev, struct nvme_queue *nvmeq,
1384 return 0; 1379 return 0;
1385} 1380}
1386 1381
1387static struct nvme_queue *nvme_alloc_queue(struct nvme_dev *dev, int qid, 1382static int nvme_alloc_queue(struct nvme_dev *dev, int qid,
1388 int depth, int node) 1383 int depth, int node)
1389{ 1384{
1390 struct nvme_queue *nvmeq = kzalloc_node(sizeof(*nvmeq), GFP_KERNEL, 1385 struct nvme_queue *nvmeq = &dev->queues[qid];
1391 node);
1392 if (!nvmeq)
1393 return NULL;
1394 1386
1395 nvmeq->cqes = dma_zalloc_coherent(dev->dev, CQ_SIZE(depth), 1387 nvmeq->cqes = dma_zalloc_coherent(dev->dev, CQ_SIZE(depth),
1396 &nvmeq->cq_dma_addr, GFP_KERNEL); 1388 &nvmeq->cq_dma_addr, GFP_KERNEL);
@@ -1409,17 +1401,15 @@ static struct nvme_queue *nvme_alloc_queue(struct nvme_dev *dev, int qid,
1409 nvmeq->q_depth = depth; 1401 nvmeq->q_depth = depth;
1410 nvmeq->qid = qid; 1402 nvmeq->qid = qid;
1411 nvmeq->cq_vector = -1; 1403 nvmeq->cq_vector = -1;
1412 dev->queues[qid] = nvmeq;
1413 dev->ctrl.queue_count++; 1404 dev->ctrl.queue_count++;
1414 1405
1415 return nvmeq; 1406 return 0;
1416 1407
1417 free_cqdma: 1408 free_cqdma:
1418 dma_free_coherent(dev->dev, CQ_SIZE(depth), (void *)nvmeq->cqes, 1409 dma_free_coherent(dev->dev, CQ_SIZE(depth), (void *)nvmeq->cqes,
1419 nvmeq->cq_dma_addr); 1410 nvmeq->cq_dma_addr);
1420 free_nvmeq: 1411 free_nvmeq:
1421 kfree(nvmeq); 1412 return -ENOMEM;
1422 return NULL;
1423} 1413}
1424 1414
1425static int queue_request_irq(struct nvme_queue *nvmeq) 1415static int queue_request_irq(struct nvme_queue *nvmeq)
@@ -1592,14 +1582,12 @@ static int nvme_pci_configure_admin_queue(struct nvme_dev *dev)
1592 if (result < 0) 1582 if (result < 0)
1593 return result; 1583 return result;
1594 1584
1595 nvmeq = dev->queues[0]; 1585 result = nvme_alloc_queue(dev, 0, NVME_AQ_DEPTH,
1596 if (!nvmeq) { 1586 dev_to_node(dev->dev));
1597 nvmeq = nvme_alloc_queue(dev, 0, NVME_AQ_DEPTH, 1587 if (result)
1598 dev_to_node(dev->dev)); 1588 return result;
1599 if (!nvmeq)
1600 return -ENOMEM;
1601 }
1602 1589
1590 nvmeq = &dev->queues[0];
1603 aqa = nvmeq->q_depth - 1; 1591 aqa = nvmeq->q_depth - 1;
1604 aqa |= aqa << 16; 1592 aqa |= aqa << 16;
1605 1593
@@ -1629,7 +1617,7 @@ static int nvme_create_io_queues(struct nvme_dev *dev)
1629 1617
1630 for (i = dev->ctrl.queue_count; i <= dev->max_qid; i++) { 1618 for (i = dev->ctrl.queue_count; i <= dev->max_qid; i++) {
1631 /* vector == qid - 1, match nvme_create_queue */ 1619 /* vector == qid - 1, match nvme_create_queue */
1632 if (!nvme_alloc_queue(dev, i, dev->q_depth, 1620 if (nvme_alloc_queue(dev, i, dev->q_depth,
1633 pci_irq_get_node(to_pci_dev(dev->dev), i - 1))) { 1621 pci_irq_get_node(to_pci_dev(dev->dev), i - 1))) {
1634 ret = -ENOMEM; 1622 ret = -ENOMEM;
1635 break; 1623 break;
@@ -1638,15 +1626,15 @@ static int nvme_create_io_queues(struct nvme_dev *dev)
1638 1626
1639 max = min(dev->max_qid, dev->ctrl.queue_count - 1); 1627 max = min(dev->max_qid, dev->ctrl.queue_count - 1);
1640 for (i = dev->online_queues; i <= max; i++) { 1628 for (i = dev->online_queues; i <= max; i++) {
1641 ret = nvme_create_queue(dev->queues[i], i); 1629 ret = nvme_create_queue(&dev->queues[i], i);
1642 if (ret) 1630 if (ret)
1643 break; 1631 break;
1644 } 1632 }
1645 1633
1646 /* 1634 /*
1647 * Ignore failing Create SQ/CQ commands, we can continue with less 1635 * Ignore failing Create SQ/CQ commands, we can continue with less
1648 * than the desired aount of queues, and even a controller without 1636 * than the desired amount of queues, and even a controller without
1649 * I/O queues an still be used to issue admin commands. This might 1637 * I/O queues can still be used to issue admin commands. This might
1650 * be useful to upgrade a buggy firmware for example. 1638 * be useful to upgrade a buggy firmware for example.
1651 */ 1639 */
1652 return ret >= 0 ? 0 : ret; 1640 return ret >= 0 ? 0 : ret;
@@ -1663,30 +1651,40 @@ static ssize_t nvme_cmb_show(struct device *dev,
1663} 1651}
1664static DEVICE_ATTR(cmb, S_IRUGO, nvme_cmb_show, NULL); 1652static DEVICE_ATTR(cmb, S_IRUGO, nvme_cmb_show, NULL);
1665 1653
1666static void __iomem *nvme_map_cmb(struct nvme_dev *dev) 1654static u64 nvme_cmb_size_unit(struct nvme_dev *dev)
1667{ 1655{
1668 u64 szu, size, offset; 1656 u8 szu = (dev->cmbsz >> NVME_CMBSZ_SZU_SHIFT) & NVME_CMBSZ_SZU_MASK;
1657
1658 return 1ULL << (12 + 4 * szu);
1659}
1660
1661static u32 nvme_cmb_size(struct nvme_dev *dev)
1662{
1663 return (dev->cmbsz >> NVME_CMBSZ_SZ_SHIFT) & NVME_CMBSZ_SZ_MASK;
1664}
1665
1666static void nvme_map_cmb(struct nvme_dev *dev)
1667{
1668 u64 size, offset;
1669 resource_size_t bar_size; 1669 resource_size_t bar_size;
1670 struct pci_dev *pdev = to_pci_dev(dev->dev); 1670 struct pci_dev *pdev = to_pci_dev(dev->dev);
1671 void __iomem *cmb;
1672 int bar; 1671 int bar;
1673 1672
1674 dev->cmbsz = readl(dev->bar + NVME_REG_CMBSZ); 1673 dev->cmbsz = readl(dev->bar + NVME_REG_CMBSZ);
1675 if (!(NVME_CMB_SZ(dev->cmbsz))) 1674 if (!dev->cmbsz)
1676 return NULL; 1675 return;
1677 dev->cmbloc = readl(dev->bar + NVME_REG_CMBLOC); 1676 dev->cmbloc = readl(dev->bar + NVME_REG_CMBLOC);
1678 1677
1679 if (!use_cmb_sqes) 1678 if (!use_cmb_sqes)
1680 return NULL; 1679 return;
1681 1680
1682 szu = (u64)1 << (12 + 4 * NVME_CMB_SZU(dev->cmbsz)); 1681 size = nvme_cmb_size_unit(dev) * nvme_cmb_size(dev);
1683 size = szu * NVME_CMB_SZ(dev->cmbsz); 1682 offset = nvme_cmb_size_unit(dev) * NVME_CMB_OFST(dev->cmbloc);
1684 offset = szu * NVME_CMB_OFST(dev->cmbloc);
1685 bar = NVME_CMB_BIR(dev->cmbloc); 1683 bar = NVME_CMB_BIR(dev->cmbloc);
1686 bar_size = pci_resource_len(pdev, bar); 1684 bar_size = pci_resource_len(pdev, bar);
1687 1685
1688 if (offset > bar_size) 1686 if (offset > bar_size)
1689 return NULL; 1687 return;
1690 1688
1691 /* 1689 /*
1692 * Controllers may support a CMB size larger than their BAR, 1690 * Controllers may support a CMB size larger than their BAR,
@@ -1696,13 +1694,16 @@ static void __iomem *nvme_map_cmb(struct nvme_dev *dev)
1696 if (size > bar_size - offset) 1694 if (size > bar_size - offset)
1697 size = bar_size - offset; 1695 size = bar_size - offset;
1698 1696
1699 cmb = ioremap_wc(pci_resource_start(pdev, bar) + offset, size); 1697 dev->cmb = ioremap_wc(pci_resource_start(pdev, bar) + offset, size);
1700 if (!cmb) 1698 if (!dev->cmb)
1701 return NULL; 1699 return;
1702
1703 dev->cmb_bus_addr = pci_bus_address(pdev, bar) + offset; 1700 dev->cmb_bus_addr = pci_bus_address(pdev, bar) + offset;
1704 dev->cmb_size = size; 1701 dev->cmb_size = size;
1705 return cmb; 1702
1703 if (sysfs_add_file_to_group(&dev->ctrl.device->kobj,
1704 &dev_attr_cmb.attr, NULL))
1705 dev_warn(dev->ctrl.device,
1706 "failed to add sysfs attribute for CMB\n");
1706} 1707}
1707 1708
1708static inline void nvme_release_cmb(struct nvme_dev *dev) 1709static inline void nvme_release_cmb(struct nvme_dev *dev)
@@ -1894,7 +1895,7 @@ static int nvme_setup_host_mem(struct nvme_dev *dev)
1894 1895
1895static int nvme_setup_io_queues(struct nvme_dev *dev) 1896static int nvme_setup_io_queues(struct nvme_dev *dev)
1896{ 1897{
1897 struct nvme_queue *adminq = dev->queues[0]; 1898 struct nvme_queue *adminq = &dev->queues[0];
1898 struct pci_dev *pdev = to_pci_dev(dev->dev); 1899 struct pci_dev *pdev = to_pci_dev(dev->dev);
1899 int result, nr_io_queues; 1900 int result, nr_io_queues;
1900 unsigned long size; 1901 unsigned long size;
@@ -1907,7 +1908,7 @@ static int nvme_setup_io_queues(struct nvme_dev *dev)
1907 if (nr_io_queues == 0) 1908 if (nr_io_queues == 0)
1908 return 0; 1909 return 0;
1909 1910
1910 if (dev->cmb && NVME_CMB_SQS(dev->cmbsz)) { 1911 if (dev->cmb && (dev->cmbsz & NVME_CMBSZ_SQS)) {
1911 result = nvme_cmb_qdepth(dev, nr_io_queues, 1912 result = nvme_cmb_qdepth(dev, nr_io_queues,
1912 sizeof(struct nvme_command)); 1913 sizeof(struct nvme_command));
1913 if (result > 0) 1914 if (result > 0)
@@ -2020,7 +2021,7 @@ static void nvme_disable_io_queues(struct nvme_dev *dev, int queues)
2020 retry: 2021 retry:
2021 timeout = ADMIN_TIMEOUT; 2022 timeout = ADMIN_TIMEOUT;
2022 for (; i > 0; i--, sent++) 2023 for (; i > 0; i--, sent++)
2023 if (nvme_delete_queue(dev->queues[i], opcode)) 2024 if (nvme_delete_queue(&dev->queues[i], opcode))
2024 break; 2025 break;
2025 2026
2026 while (sent--) { 2027 while (sent--) {
@@ -2127,22 +2128,7 @@ static int nvme_pci_enable(struct nvme_dev *dev)
2127 "set queue depth=%u\n", dev->q_depth); 2128 "set queue depth=%u\n", dev->q_depth);
2128 } 2129 }
2129 2130
2130 /* 2131 nvme_map_cmb(dev);
2131 * CMBs can currently only exist on >=1.2 PCIe devices. We only
2132 * populate sysfs if a CMB is implemented. Since nvme_dev_attrs_group
2133 * has no name we can pass NULL as final argument to
2134 * sysfs_add_file_to_group.
2135 */
2136
2137 if (readl(dev->bar + NVME_REG_VS) >= NVME_VS(1, 2, 0)) {
2138 dev->cmb = nvme_map_cmb(dev);
2139 if (dev->cmb) {
2140 if (sysfs_add_file_to_group(&dev->ctrl.device->kobj,
2141 &dev_attr_cmb.attr, NULL))
2142 dev_warn(dev->ctrl.device,
2143 "failed to add sysfs attribute for CMB\n");
2144 }
2145 }
2146 2132
2147 pci_enable_pcie_error_reporting(pdev); 2133 pci_enable_pcie_error_reporting(pdev);
2148 pci_save_state(pdev); 2134 pci_save_state(pdev);
@@ -2212,7 +2198,7 @@ static void nvme_dev_disable(struct nvme_dev *dev, bool shutdown)
2212 2198
2213 queues = dev->online_queues - 1; 2199 queues = dev->online_queues - 1;
2214 for (i = dev->ctrl.queue_count - 1; i > 0; i--) 2200 for (i = dev->ctrl.queue_count - 1; i > 0; i--)
2215 nvme_suspend_queue(dev->queues[i]); 2201 nvme_suspend_queue(&dev->queues[i]);
2216 2202
2217 if (dead) { 2203 if (dead) {
2218 /* A device might become IO incapable very soon during 2204 /* A device might become IO incapable very soon during
@@ -2220,7 +2206,7 @@ static void nvme_dev_disable(struct nvme_dev *dev, bool shutdown)
2220 * queue_count can be 0 here. 2206 * queue_count can be 0 here.
2221 */ 2207 */
2222 if (dev->ctrl.queue_count) 2208 if (dev->ctrl.queue_count)
2223 nvme_suspend_queue(dev->queues[0]); 2209 nvme_suspend_queue(&dev->queues[0]);
2224 } else { 2210 } else {
2225 nvme_disable_io_queues(dev, queues); 2211 nvme_disable_io_queues(dev, queues);
2226 nvme_disable_admin_queue(dev, shutdown); 2212 nvme_disable_admin_queue(dev, shutdown);
@@ -2482,8 +2468,9 @@ static int nvme_probe(struct pci_dev *pdev, const struct pci_device_id *id)
2482 dev = kzalloc_node(sizeof(*dev), GFP_KERNEL, node); 2468 dev = kzalloc_node(sizeof(*dev), GFP_KERNEL, node);
2483 if (!dev) 2469 if (!dev)
2484 return -ENOMEM; 2470 return -ENOMEM;
2485 dev->queues = kzalloc_node((num_possible_cpus() + 1) * sizeof(void *), 2471
2486 GFP_KERNEL, node); 2472 dev->queues = kcalloc_node(num_possible_cpus() + 1,
2473 sizeof(struct nvme_queue), GFP_KERNEL, node);
2487 if (!dev->queues) 2474 if (!dev->queues)
2488 goto free; 2475 goto free;
2489 2476
@@ -2537,7 +2524,7 @@ static void nvme_reset_prepare(struct pci_dev *pdev)
2537static void nvme_reset_done(struct pci_dev *pdev) 2524static void nvme_reset_done(struct pci_dev *pdev)
2538{ 2525{
2539 struct nvme_dev *dev = pci_get_drvdata(pdev); 2526 struct nvme_dev *dev = pci_get_drvdata(pdev);
2540 nvme_reset_ctrl(&dev->ctrl); 2527 nvme_reset_ctrl_sync(&dev->ctrl);
2541} 2528}
2542 2529
2543static void nvme_shutdown(struct pci_dev *pdev) 2530static void nvme_shutdown(struct pci_dev *pdev)
diff --git a/drivers/nvme/host/rdma.c b/drivers/nvme/host/rdma.c
index 75d6956eb380..38e183461d9d 100644
--- a/drivers/nvme/host/rdma.c
+++ b/drivers/nvme/host/rdma.c
@@ -2029,7 +2029,7 @@ static void nvme_rdma_remove_one(struct ib_device *ib_device, void *client_data)
2029 } 2029 }
2030 mutex_unlock(&nvme_rdma_ctrl_mutex); 2030 mutex_unlock(&nvme_rdma_ctrl_mutex);
2031 2031
2032 flush_workqueue(nvme_wq); 2032 flush_workqueue(nvme_delete_wq);
2033} 2033}
2034 2034
2035static struct ib_client nvme_rdma_ib_client = { 2035static struct ib_client nvme_rdma_ib_client = {
diff --git a/drivers/nvme/target/core.c b/drivers/nvme/target/core.c
index 7282ea8d3b96..0bd737117a80 100644
--- a/drivers/nvme/target/core.c
+++ b/drivers/nvme/target/core.c
@@ -512,6 +512,7 @@ bool nvmet_req_init(struct nvmet_req *req, struct nvmet_cq *cq,
512 req->sg_cnt = 0; 512 req->sg_cnt = 0;
513 req->transfer_len = 0; 513 req->transfer_len = 0;
514 req->rsp->status = 0; 514 req->rsp->status = 0;
515 req->ns = NULL;
515 516
516 /* no support for fused commands yet */ 517 /* no support for fused commands yet */
517 if (unlikely(flags & (NVME_CMD_FUSE_FIRST | NVME_CMD_FUSE_SECOND))) { 518 if (unlikely(flags & (NVME_CMD_FUSE_FIRST | NVME_CMD_FUSE_SECOND))) {
@@ -557,6 +558,8 @@ EXPORT_SYMBOL_GPL(nvmet_req_init);
557void nvmet_req_uninit(struct nvmet_req *req) 558void nvmet_req_uninit(struct nvmet_req *req)
558{ 559{
559 percpu_ref_put(&req->sq->ref); 560 percpu_ref_put(&req->sq->ref);
561 if (req->ns)
562 nvmet_put_namespace(req->ns);
560} 563}
561EXPORT_SYMBOL_GPL(nvmet_req_uninit); 564EXPORT_SYMBOL_GPL(nvmet_req_uninit);
562 565
diff --git a/drivers/nvme/target/loop.c b/drivers/nvme/target/loop.c
index fdfcc961029f..7991ec3a17db 100644
--- a/drivers/nvme/target/loop.c
+++ b/drivers/nvme/target/loop.c
@@ -717,7 +717,7 @@ static void __exit nvme_loop_cleanup_module(void)
717 nvme_delete_ctrl(&ctrl->ctrl); 717 nvme_delete_ctrl(&ctrl->ctrl);
718 mutex_unlock(&nvme_loop_ctrl_mutex); 718 mutex_unlock(&nvme_loop_ctrl_mutex);
719 719
720 flush_workqueue(nvme_wq); 720 flush_workqueue(nvme_delete_wq);
721} 721}
722 722
723module_init(nvme_loop_init_module); 723module_init(nvme_loop_init_module);
diff --git a/include/linux/nvme.h b/include/linux/nvme.h
index aea87f0d917b..4112e2bd747f 100644
--- a/include/linux/nvme.h
+++ b/include/linux/nvme.h
@@ -124,14 +124,20 @@ enum {
124 124
125#define NVME_CMB_BIR(cmbloc) ((cmbloc) & 0x7) 125#define NVME_CMB_BIR(cmbloc) ((cmbloc) & 0x7)
126#define NVME_CMB_OFST(cmbloc) (((cmbloc) >> 12) & 0xfffff) 126#define NVME_CMB_OFST(cmbloc) (((cmbloc) >> 12) & 0xfffff)
127#define NVME_CMB_SZ(cmbsz) (((cmbsz) >> 12) & 0xfffff) 127
128#define NVME_CMB_SZU(cmbsz) (((cmbsz) >> 8) & 0xf) 128enum {
129 129 NVME_CMBSZ_SQS = 1 << 0,
130#define NVME_CMB_WDS(cmbsz) ((cmbsz) & 0x10) 130 NVME_CMBSZ_CQS = 1 << 1,
131#define NVME_CMB_RDS(cmbsz) ((cmbsz) & 0x8) 131 NVME_CMBSZ_LISTS = 1 << 2,
132#define NVME_CMB_LISTS(cmbsz) ((cmbsz) & 0x4) 132 NVME_CMBSZ_RDS = 1 << 3,
133#define NVME_CMB_CQS(cmbsz) ((cmbsz) & 0x2) 133 NVME_CMBSZ_WDS = 1 << 4,
134#define NVME_CMB_SQS(cmbsz) ((cmbsz) & 0x1) 134
135 NVME_CMBSZ_SZ_SHIFT = 12,
136 NVME_CMBSZ_SZ_MASK = 0xfffff,
137
138 NVME_CMBSZ_SZU_SHIFT = 8,
139 NVME_CMBSZ_SZU_MASK = 0xf,
140};
135 141
136/* 142/*
137 * Submission and Completion Queue Entry Sizes for the NVM command set. 143 * Submission and Completion Queue Entry Sizes for the NVM command set.