aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorS Twiss <stwiss.opensource@diasemi.com>2015-07-01 09:11:32 -0400
committerLee Jones <lee.jones@linaro.org>2015-08-11 10:08:45 -0400
commit9b40b030c4ad685732dd3ad5b57249db52a74e71 (patch)
tree3bc1500244a3b05d67609a76ff15c773f3b8c4f0
parent78b7d84c8f6e49f68d7b63c4d67242d4c1bfbadd (diff)
mfd: da9062: Supply core driver
Add MFD core driver support for DA9062 Signed-off-by: Steve Twiss <stwiss.opensource@diasemi.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
Diffstat
-rw-r--r--drivers/mfd/Kconfig12
-rw-r--r--drivers/mfd/Makefile3
-rw-r--r--drivers/mfd/da9062-core.c512
-rw-r--r--include/linux/mfd/da9062/core.h50
-rw-r--r--include/linux/mfd/da9062/registers.h1108
5 files changed, 1684 insertions, 1 deletions
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 5f746ef84418..0b442230c716 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -186,6 +186,18 @@ config MFD_DA9055
186 This driver can be built as a module. If built as a module it will be 186 This driver can be built as a module. If built as a module it will be
187 called "da9055" 187 called "da9055"
188 188
189config MFD_DA9062
190 tristate "Dialog Semiconductor DA9062 PMIC Support"
191 select MFD_CORE
192 select REGMAP_I2C
193 select REGMAP_IRQ
194 depends on I2C=y
195 help
196 Say yes here for support for the Dialog Semiconductor DA9062 PMIC.
197 This includes the I2C driver and core APIs.
198 Additional drivers must be enabled in order to use the functionality
199 of the device.
200
189config MFD_DA9063 201config MFD_DA9063
190 bool "Dialog Semiconductor DA9063 PMIC Support" 202 bool "Dialog Semiconductor DA9063 PMIC Support"
191 select MFD_CORE 203 select MFD_CORE
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 530620aa2f70..a59e3fcc8626 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -113,10 +113,11 @@ obj-$(CONFIG_MFD_LP8788) += lp8788.o lp8788-irq.o
113 113
114da9055-objs := da9055-core.o da9055-i2c.o 114da9055-objs := da9055-core.o da9055-i2c.o
115obj-$(CONFIG_MFD_DA9055) += da9055.o 115obj-$(CONFIG_MFD_DA9055) += da9055.o
116 116obj-$(CONFIG_MFD_DA9062) += da9062-core.o
117da9063-objs := da9063-core.o da9063-irq.o da9063-i2c.o 117da9063-objs := da9063-core.o da9063-irq.o da9063-i2c.o
118obj-$(CONFIG_MFD_DA9063) += da9063.o 118obj-$(CONFIG_MFD_DA9063) += da9063.o
119obj-$(CONFIG_MFD_DA9150) += da9150-core.o 119obj-$(CONFIG_MFD_DA9150) += da9150-core.o
120
120obj-$(CONFIG_MFD_MAX14577) += max14577.o 121obj-$(CONFIG_MFD_MAX14577) += max14577.o
121obj-$(CONFIG_MFD_MAX77686) += max77686.o 122obj-$(CONFIG_MFD_MAX77686) += max77686.o
122obj-$(CONFIG_MFD_MAX77693) += max77693.o 123obj-$(CONFIG_MFD_MAX77693) += max77693.o
diff --git a/drivers/mfd/da9062-core.c b/drivers/mfd/da9062-core.c
new file mode 100644
index 000000000000..4cf06431f256
--- /dev/null
+++ b/drivers/mfd/da9062-core.c
@@ -0,0 +1,512 @@
1/*
2 * Core, IRQ and I2C device driver for DA9062 PMIC
3 * Copyright (C) 2015 Dialog Semiconductor Ltd.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#include <linux/kernel.h>
17#include <linux/module.h>
18#include <linux/init.h>
19#include <linux/device.h>
20#include <linux/interrupt.h>
21#include <linux/regmap.h>
22#include <linux/irq.h>
23#include <linux/mfd/core.h>
24#include <linux/i2c.h>
25#include <linux/mfd/da9062/core.h>
26#include <linux/mfd/da9062/registers.h>
27#include <linux/regulator/of_regulator.h>
28
29#define DA9062_REG_EVENT_A_OFFSET 0
30#define DA9062_REG_EVENT_B_OFFSET 1
31#define DA9062_REG_EVENT_C_OFFSET 2
32
33static struct regmap_irq da9062_irqs[] = {
34 /* EVENT A */
35 [DA9062_IRQ_ONKEY] = {
36 .reg_offset = DA9062_REG_EVENT_A_OFFSET,
37 .mask = DA9062AA_M_NONKEY_MASK,
38 },
39 [DA9062_IRQ_ALARM] = {
40 .reg_offset = DA9062_REG_EVENT_A_OFFSET,
41 .mask = DA9062AA_M_ALARM_MASK,
42 },
43 [DA9062_IRQ_TICK] = {
44 .reg_offset = DA9062_REG_EVENT_A_OFFSET,
45 .mask = DA9062AA_M_TICK_MASK,
46 },
47 [DA9062_IRQ_WDG_WARN] = {
48 .reg_offset = DA9062_REG_EVENT_A_OFFSET,
49 .mask = DA9062AA_M_WDG_WARN_MASK,
50 },
51 [DA9062_IRQ_SEQ_RDY] = {
52 .reg_offset = DA9062_REG_EVENT_A_OFFSET,
53 .mask = DA9062AA_M_SEQ_RDY_MASK,
54 },
55 /* EVENT B */
56 [DA9062_IRQ_TEMP] = {
57 .reg_offset = DA9062_REG_EVENT_B_OFFSET,
58 .mask = DA9062AA_M_TEMP_MASK,
59 },
60 [DA9062_IRQ_LDO_LIM] = {
61 .reg_offset = DA9062_REG_EVENT_B_OFFSET,
62 .mask = DA9062AA_M_LDO_LIM_MASK,
63 },
64 [DA9062_IRQ_DVC_RDY] = {
65 .reg_offset = DA9062_REG_EVENT_B_OFFSET,
66 .mask = DA9062AA_M_DVC_RDY_MASK,
67 },
68 [DA9062_IRQ_VDD_WARN] = {
69 .reg_offset = DA9062_REG_EVENT_B_OFFSET,
70 .mask = DA9062AA_M_VDD_WARN_MASK,
71 },
72 /* EVENT C */
73 [DA9062_IRQ_GPI0] = {
74 .reg_offset = DA9062_REG_EVENT_C_OFFSET,
75 .mask = DA9062AA_M_GPI0_MASK,
76 },
77 [DA9062_IRQ_GPI1] = {
78 .reg_offset = DA9062_REG_EVENT_C_OFFSET,
79 .mask = DA9062AA_M_GPI1_MASK,
80 },
81 [DA9062_IRQ_GPI2] = {
82 .reg_offset = DA9062_REG_EVENT_C_OFFSET,
83 .mask = DA9062AA_M_GPI2_MASK,
84 },
85 [DA9062_IRQ_GPI3] = {
86 .reg_offset = DA9062_REG_EVENT_C_OFFSET,
87 .mask = DA9062AA_M_GPI3_MASK,
88 },
89 [DA9062_IRQ_GPI4] = {
90 .reg_offset = DA9062_REG_EVENT_C_OFFSET,
91 .mask = DA9062AA_M_GPI4_MASK,
92 },
93};
94
95static struct regmap_irq_chip da9062_irq_chip = {
96 .name = "da9062-irq",
97 .irqs = da9062_irqs,
98 .num_irqs = DA9062_NUM_IRQ,
99 .num_regs = 3,
100 .status_base = DA9062AA_EVENT_A,
101 .mask_base = DA9062AA_IRQ_MASK_A,
102 .ack_base = DA9062AA_EVENT_A,
103};
104
105static struct resource da9062_core_resources[] = {
106 DEFINE_RES_NAMED(DA9062_IRQ_VDD_WARN, 1, "VDD_WARN", IORESOURCE_IRQ),
107};
108
109static struct resource da9062_regulators_resources[] = {
110 DEFINE_RES_NAMED(DA9062_IRQ_LDO_LIM, 1, "LDO_LIM", IORESOURCE_IRQ),
111};
112
113static struct resource da9062_thermal_resources[] = {
114 DEFINE_RES_NAMED(DA9062_IRQ_TEMP, 1, "THERMAL", IORESOURCE_IRQ),
115};
116
117static struct resource da9062_wdt_resources[] = {
118 DEFINE_RES_NAMED(DA9062_IRQ_WDG_WARN, 1, "WD_WARN", IORESOURCE_IRQ),
119};
120
121static const struct mfd_cell da9062_devs[] = {
122 {
123 .name = "da9062-core",
124 .num_resources = ARRAY_SIZE(da9062_core_resources),
125 .resources = da9062_core_resources,
126 },
127 {
128 .name = "da9062-regulators",
129 .num_resources = ARRAY_SIZE(da9062_regulators_resources),
130 .resources = da9062_regulators_resources,
131 },
132 {
133 .name = "da9062-watchdog",
134 .num_resources = ARRAY_SIZE(da9062_wdt_resources),
135 .resources = da9062_wdt_resources,
136 .of_compatible = "dlg,da9062-wdt",
137 },
138 {
139 .name = "da9062-thermal",
140 .num_resources = ARRAY_SIZE(da9062_thermal_resources),
141 .resources = da9062_thermal_resources,
142 .of_compatible = "dlg,da9062-thermal",
143 },
144};
145
146static int da9062_clear_fault_log(struct da9062 *chip)
147{
148 int ret;
149 int fault_log;
150
151 ret = regmap_read(chip->regmap, DA9062AA_FAULT_LOG, &fault_log);
152 if (ret < 0)
153 return ret;
154
155 if (fault_log) {
156 if (fault_log & DA9062AA_TWD_ERROR_MASK)
157 dev_dbg(chip->dev, "Fault log entry detected: TWD_ERROR\n");
158 if (fault_log & DA9062AA_POR_MASK)
159 dev_dbg(chip->dev, "Fault log entry detected: POR\n");
160 if (fault_log & DA9062AA_VDD_FAULT_MASK)
161 dev_dbg(chip->dev, "Fault log entry detected: VDD_FAULT\n");
162 if (fault_log & DA9062AA_VDD_START_MASK)
163 dev_dbg(chip->dev, "Fault log entry detected: VDD_START\n");
164 if (fault_log & DA9062AA_TEMP_CRIT_MASK)
165 dev_dbg(chip->dev, "Fault log entry detected: TEMP_CRIT\n");
166 if (fault_log & DA9062AA_KEY_RESET_MASK)
167 dev_dbg(chip->dev, "Fault log entry detected: KEY_RESET\n");
168 if (fault_log & DA9062AA_NSHUTDOWN_MASK)
169 dev_dbg(chip->dev, "Fault log entry detected: NSHUTDOWN\n");
170 if (fault_log & DA9062AA_WAIT_SHUT_MASK)
171 dev_dbg(chip->dev, "Fault log entry detected: WAIT_SHUT\n");
172
173 ret = regmap_write(chip->regmap, DA9062AA_FAULT_LOG,
174 fault_log);
175 }
176
177 return ret;
178}
179
180int get_device_type(struct da9062 *chip)
181{
182 int device_id, variant_id, variant_mrc;
183 int ret;
184
185 ret = regmap_read(chip->regmap, DA9062AA_DEVICE_ID, &device_id);
186 if (ret < 0) {
187 dev_err(chip->dev, "Cannot read chip ID.\n");
188 return -EIO;
189 }
190 if (device_id != DA9062_PMIC_DEVICE_ID) {
191 dev_err(chip->dev, "Invalid device ID: 0x%02x\n", device_id);
192 return -ENODEV;
193 }
194
195 ret = regmap_read(chip->regmap, DA9062AA_VARIANT_ID, &variant_id);
196 if (ret < 0) {
197 dev_err(chip->dev, "Cannot read chip variant id.\n");
198 return -EIO;
199 }
200
201 dev_info(chip->dev,
202 "Device detected (device-ID: 0x%02X, var-ID: 0x%02X)\n",
203 device_id, variant_id);
204
205 variant_mrc = (variant_id & DA9062AA_MRC_MASK) >> DA9062AA_MRC_SHIFT;
206
207 if (variant_mrc < DA9062_PMIC_VARIANT_MRC_AA) {
208 dev_err(chip->dev,
209 "Cannot support variant MRC: 0x%02X\n", variant_mrc);
210 return -ENODEV;
211 }
212
213 return ret;
214}
215
216static const struct regmap_range da9062_aa_readable_ranges[] = {
217 {
218 .range_min = DA9062AA_PAGE_CON,
219 .range_max = DA9062AA_STATUS_B,
220 }, {
221 .range_min = DA9062AA_STATUS_D,
222 .range_max = DA9062AA_EVENT_C,
223 }, {
224 .range_min = DA9062AA_IRQ_MASK_A,
225 .range_max = DA9062AA_IRQ_MASK_C,
226 }, {
227 .range_min = DA9062AA_CONTROL_A,
228 .range_max = DA9062AA_GPIO_4,
229 }, {
230 .range_min = DA9062AA_GPIO_WKUP_MODE,
231 .range_max = DA9062AA_BUCK4_CONT,
232 }, {
233 .range_min = DA9062AA_BUCK3_CONT,
234 .range_max = DA9062AA_BUCK3_CONT,
235 }, {
236 .range_min = DA9062AA_LDO1_CONT,
237 .range_max = DA9062AA_LDO4_CONT,
238 }, {
239 .range_min = DA9062AA_DVC_1,
240 .range_max = DA9062AA_DVC_1,
241 }, {
242 .range_min = DA9062AA_COUNT_S,
243 .range_max = DA9062AA_SECOND_D,
244 }, {
245 .range_min = DA9062AA_SEQ,
246 .range_max = DA9062AA_ID_4_3,
247 }, {
248 .range_min = DA9062AA_ID_12_11,
249 .range_max = DA9062AA_ID_16_15,
250 }, {
251 .range_min = DA9062AA_ID_22_21,
252 .range_max = DA9062AA_ID_32_31,
253 }, {
254 .range_min = DA9062AA_SEQ_A,
255 .range_max = DA9062AA_BUCK3_CFG,
256 }, {
257 .range_min = DA9062AA_VBUCK2_A,
258 .range_max = DA9062AA_VBUCK4_A,
259 }, {
260 .range_min = DA9062AA_VBUCK3_A,
261 .range_max = DA9062AA_VBUCK3_A,
262 }, {
263 .range_min = DA9062AA_VLDO1_A,
264 .range_max = DA9062AA_VLDO4_A,
265 }, {
266 .range_min = DA9062AA_VBUCK2_B,
267 .range_max = DA9062AA_VBUCK4_B,
268 }, {
269 .range_min = DA9062AA_VBUCK3_B,
270 .range_max = DA9062AA_VBUCK3_B,
271 }, {
272 .range_min = DA9062AA_VLDO1_B,
273 .range_max = DA9062AA_VLDO4_B,
274 }, {
275 .range_min = DA9062AA_BBAT_CONT,
276 .range_max = DA9062AA_BBAT_CONT,
277 }, {
278 .range_min = DA9062AA_INTERFACE,
279 .range_max = DA9062AA_CONFIG_E,
280 }, {
281 .range_min = DA9062AA_CONFIG_G,
282 .range_max = DA9062AA_CONFIG_K,
283 }, {
284 .range_min = DA9062AA_CONFIG_M,
285 .range_max = DA9062AA_CONFIG_M,
286 }, {
287 .range_min = DA9062AA_TRIM_CLDR,
288 .range_max = DA9062AA_GP_ID_19,
289 }, {
290 .range_min = DA9062AA_DEVICE_ID,
291 .range_max = DA9062AA_CONFIG_ID,
292 },
293};
294
295static const struct regmap_range da9062_aa_writeable_ranges[] = {
296 {
297 .range_min = DA9062AA_PAGE_CON,
298 .range_max = DA9062AA_PAGE_CON,
299 }, {
300 .range_min = DA9062AA_FAULT_LOG,
301 .range_max = DA9062AA_EVENT_C,
302 }, {
303 .range_min = DA9062AA_IRQ_MASK_A,
304 .range_max = DA9062AA_IRQ_MASK_C,
305 }, {
306 .range_min = DA9062AA_CONTROL_A,
307 .range_max = DA9062AA_GPIO_4,
308 }, {
309 .range_min = DA9062AA_GPIO_WKUP_MODE,
310 .range_max = DA9062AA_BUCK4_CONT,
311 }, {
312 .range_min = DA9062AA_BUCK3_CONT,
313 .range_max = DA9062AA_BUCK3_CONT,
314 }, {
315 .range_min = DA9062AA_LDO1_CONT,
316 .range_max = DA9062AA_LDO4_CONT,
317 }, {
318 .range_min = DA9062AA_DVC_1,
319 .range_max = DA9062AA_DVC_1,
320 }, {
321 .range_min = DA9062AA_COUNT_S,
322 .range_max = DA9062AA_ALARM_Y,
323 }, {
324 .range_min = DA9062AA_SEQ,
325 .range_max = DA9062AA_ID_4_3,
326 }, {
327 .range_min = DA9062AA_ID_12_11,
328 .range_max = DA9062AA_ID_16_15,
329 }, {
330 .range_min = DA9062AA_ID_22_21,
331 .range_max = DA9062AA_ID_32_31,
332 }, {
333 .range_min = DA9062AA_SEQ_A,
334 .range_max = DA9062AA_BUCK3_CFG,
335 }, {
336 .range_min = DA9062AA_VBUCK2_A,
337 .range_max = DA9062AA_VBUCK4_A,
338 }, {
339 .range_min = DA9062AA_VBUCK3_A,
340 .range_max = DA9062AA_VBUCK3_A,
341 }, {
342 .range_min = DA9062AA_VLDO1_A,
343 .range_max = DA9062AA_VLDO4_A,
344 }, {
345 .range_min = DA9062AA_VBUCK2_B,
346 .range_max = DA9062AA_VBUCK4_B,
347 }, {
348 .range_min = DA9062AA_VBUCK3_B,
349 .range_max = DA9062AA_VBUCK3_B,
350 }, {
351 .range_min = DA9062AA_VLDO1_B,
352 .range_max = DA9062AA_VLDO4_B,
353 }, {
354 .range_min = DA9062AA_BBAT_CONT,
355 .range_max = DA9062AA_BBAT_CONT,
356 }, {
357 .range_min = DA9062AA_GP_ID_0,
358 .range_max = DA9062AA_GP_ID_19,
359 },
360};
361
362static const struct regmap_range da9062_aa_volatile_ranges[] = {
363 {
364 .range_min = DA9062AA_PAGE_CON,
365 .range_max = DA9062AA_STATUS_B,
366 }, {
367 .range_min = DA9062AA_STATUS_D,
368 .range_max = DA9062AA_EVENT_C,
369 }, {
370 .range_min = DA9062AA_CONTROL_F,
371 .range_max = DA9062AA_CONTROL_F,
372 }, {
373 .range_min = DA9062AA_COUNT_S,
374 .range_max = DA9062AA_SECOND_D,
375 },
376};
377
378static const struct regmap_access_table da9062_aa_readable_table = {
379 .yes_ranges = da9062_aa_readable_ranges,
380 .n_yes_ranges = ARRAY_SIZE(da9062_aa_readable_ranges),
381};
382
383static const struct regmap_access_table da9062_aa_writeable_table = {
384 .yes_ranges = da9062_aa_writeable_ranges,
385 .n_yes_ranges = ARRAY_SIZE(da9062_aa_writeable_ranges),
386};
387
388static const struct regmap_access_table da9062_aa_volatile_table = {
389 .yes_ranges = da9062_aa_volatile_ranges,
390 .n_yes_ranges = ARRAY_SIZE(da9062_aa_volatile_ranges),
391};
392
393static const struct regmap_range_cfg da9062_range_cfg[] = {
394 {
395 .range_min = DA9062AA_PAGE_CON,
396 .range_max = DA9062AA_CONFIG_ID,
397 .selector_reg = DA9062AA_PAGE_CON,
398 .selector_mask = 1 << DA9062_I2C_PAGE_SEL_SHIFT,
399 .selector_shift = DA9062_I2C_PAGE_SEL_SHIFT,
400 .window_start = 0,
401 .window_len = 256,
402 }
403};
404
405static struct regmap_config da9062_regmap_config = {
406 .reg_bits = 8,
407 .val_bits = 8,
408 .ranges = da9062_range_cfg,
409 .num_ranges = ARRAY_SIZE(da9062_range_cfg),
410 .max_register = DA9062AA_CONFIG_ID,
411 .cache_type = REGCACHE_RBTREE,
412 .rd_table = &da9062_aa_readable_table,
413 .wr_table = &da9062_aa_writeable_table,
414 .volatile_table = &da9062_aa_volatile_table,
415};
416
417static int da9062_i2c_probe(struct i2c_client *i2c,
418 const struct i2c_device_id *id)
419{
420 struct da9062 *chip;
421 unsigned int irq_base;
422 int ret;
423
424 chip = devm_kzalloc(&i2c->dev, sizeof(*chip), GFP_KERNEL);
425 if (!chip)
426 return -ENOMEM;
427
428 i2c_set_clientdata(i2c, chip);
429 chip->dev = &i2c->dev;
430
431 if (!i2c->irq) {
432 dev_err(chip->dev, "No IRQ configured\n");
433 return -EINVAL;
434 }
435
436 chip->regmap = devm_regmap_init_i2c(i2c, &da9062_regmap_config);
437 if (IS_ERR(chip->regmap)) {
438 ret = PTR_ERR(chip->regmap);
439 dev_err(chip->dev, "Failed to allocate register map: %d\n",
440 ret);
441 return ret;
442 }
443
444 ret = da9062_clear_fault_log(chip);
445 if (ret < 0)
446 dev_warn(chip->dev, "Cannot clear fault log\n");
447
448 ret = get_device_type(chip);
449 if (ret)
450 return ret;
451
452 ret = regmap_add_irq_chip(chip->regmap, i2c->irq,
453 IRQF_TRIGGER_LOW | IRQF_ONESHOT | IRQF_SHARED,
454 -1, &da9062_irq_chip,
455 &chip->regmap_irq);
456 if (ret) {
457 dev_err(chip->dev, "Failed to request IRQ %d: %d\n",
458 i2c->irq, ret);
459 return ret;
460 }
461
462 irq_base = regmap_irq_chip_get_base(chip->regmap_irq);
463
464 ret = mfd_add_devices(chip->dev, PLATFORM_DEVID_NONE, da9062_devs,
465 ARRAY_SIZE(da9062_devs), NULL, irq_base,
466 NULL);
467 if (ret) {
468 dev_err(chip->dev, "Cannot register child devices\n");
469 regmap_del_irq_chip(i2c->irq, chip->regmap_irq);
470 return ret;
471 }
472
473 return ret;
474}
475
476static int da9062_i2c_remove(struct i2c_client *i2c)
477{
478 struct da9062 *chip = i2c_get_clientdata(i2c);
479
480 mfd_remove_devices(chip->dev);
481 regmap_del_irq_chip(i2c->irq, chip->regmap_irq);
482
483 return 0;
484}
485
486static const struct i2c_device_id da9062_i2c_id[] = {
487 { "da9062", 0 },
488 { },
489};
490MODULE_DEVICE_TABLE(i2c, da9062_i2c_id);
491
492static const struct of_device_id da9062_dt_ids[] = {
493 { .compatible = "dlg,da9062", },
494 { }
495};
496MODULE_DEVICE_TABLE(of, da9062_dt_ids);
497
498static struct i2c_driver da9062_i2c_driver = {
499 .driver = {
500 .name = "da9062",
501 .of_match_table = of_match_ptr(da9062_dt_ids),
502 },
503 .probe = da9062_i2c_probe,
504 .remove = da9062_i2c_remove,
505 .id_table = da9062_i2c_id,
506};
507
508module_i2c_driver(da9062_i2c_driver);
509
510MODULE_DESCRIPTION("Core device driver for Dialog DA9062");
511MODULE_AUTHOR("Steve Twiss <stwiss.opensource@diasemi.com>");
512MODULE_LICENSE("GPL");
diff --git a/include/linux/mfd/da9062/core.h b/include/linux/mfd/da9062/core.h
new file mode 100644
index 000000000000..376ba84366a0
--- /dev/null
+++ b/include/linux/mfd/da9062/core.h
@@ -0,0 +1,50 @@
1/*
2 * Copyright (C) 2015 Dialog Semiconductor Ltd.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 */
14
15#ifndef __MFD_DA9062_CORE_H__
16#define __MFD_DA9062_CORE_H__
17
18#include <linux/interrupt.h>
19#include <linux/mfd/da9062/registers.h>
20
21/* Interrupts */
22enum da9062_irqs {
23 /* IRQ A */
24 DA9062_IRQ_ONKEY,
25 DA9062_IRQ_ALARM,
26 DA9062_IRQ_TICK,
27 DA9062_IRQ_WDG_WARN,
28 DA9062_IRQ_SEQ_RDY,
29 /* IRQ B*/
30 DA9062_IRQ_TEMP,
31 DA9062_IRQ_LDO_LIM,
32 DA9062_IRQ_DVC_RDY,
33 DA9062_IRQ_VDD_WARN,
34 /* IRQ C */
35 DA9062_IRQ_GPI0,
36 DA9062_IRQ_GPI1,
37 DA9062_IRQ_GPI2,
38 DA9062_IRQ_GPI3,
39 DA9062_IRQ_GPI4,
40
41 DA9062_NUM_IRQ,
42};
43
44struct da9062 {
45 struct device *dev;
46 struct regmap *regmap;
47 struct regmap_irq_chip_data *regmap_irq;
48};
49
50#endif /* __MFD_DA9062_CORE_H__ */
diff --git a/include/linux/mfd/da9062/registers.h b/include/linux/mfd/da9062/registers.h
new file mode 100644
index 000000000000..97790d1b02c5
--- /dev/null
+++ b/include/linux/mfd/da9062/registers.h
@@ -0,0 +1,1108 @@
1/*
2 * registers.h - REGISTERS H for DA9062
3 * Copyright (C) 2015 Dialog Semiconductor Ltd.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#ifndef __DA9062_H__
17#define __DA9062_H__
18
19#define DA9062_PMIC_DEVICE_ID 0x62
20#define DA9062_PMIC_VARIANT_MRC_AA 0x01
21
22#define DA9062_I2C_PAGE_SEL_SHIFT 1
23
24/*
25 * Registers
26 */
27
28#define DA9062AA_PAGE_CON 0x000
29#define DA9062AA_STATUS_A 0x001
30#define DA9062AA_STATUS_B 0x002
31#define DA9062AA_STATUS_D 0x004
32#define DA9062AA_FAULT_LOG 0x005
33#define DA9062AA_EVENT_A 0x006
34#define DA9062AA_EVENT_B 0x007
35#define DA9062AA_EVENT_C 0x008
36#define DA9062AA_IRQ_MASK_A 0x00A
37#define DA9062AA_IRQ_MASK_B 0x00B
38#define DA9062AA_IRQ_MASK_C 0x00C
39#define DA9062AA_CONTROL_A 0x00E
40#define DA9062AA_CONTROL_B 0x00F
41#define DA9062AA_CONTROL_C 0x010
42#define DA9062AA_CONTROL_D 0x011
43#define DA9062AA_CONTROL_E 0x012
44#define DA9062AA_CONTROL_F 0x013
45#define DA9062AA_PD_DIS 0x014
46#define DA9062AA_GPIO_0_1 0x015
47#define DA9062AA_GPIO_2_3 0x016
48#define DA9062AA_GPIO_4 0x017
49#define DA9062AA_GPIO_WKUP_MODE 0x01C
50#define DA9062AA_GPIO_MODE0_4 0x01D
51#define DA9062AA_GPIO_OUT0_2 0x01E
52#define DA9062AA_GPIO_OUT3_4 0x01F
53#define DA9062AA_BUCK2_CONT 0x020
54#define DA9062AA_BUCK1_CONT 0x021
55#define DA9062AA_BUCK4_CONT 0x022
56#define DA9062AA_BUCK3_CONT 0x024
57#define DA9062AA_LDO1_CONT 0x026
58#define DA9062AA_LDO2_CONT 0x027
59#define DA9062AA_LDO3_CONT 0x028
60#define DA9062AA_LDO4_CONT 0x029
61#define DA9062AA_DVC_1 0x032
62#define DA9062AA_COUNT_S 0x040
63#define DA9062AA_COUNT_MI 0x041
64#define DA9062AA_COUNT_H 0x042
65#define DA9062AA_COUNT_D 0x043
66#define DA9062AA_COUNT_MO 0x044
67#define DA9062AA_COUNT_Y 0x045
68#define DA9062AA_ALARM_S 0x046
69#define DA9062AA_ALARM_MI 0x047
70#define DA9062AA_ALARM_H 0x048
71#define DA9062AA_ALARM_D 0x049
72#define DA9062AA_ALARM_MO 0x04A
73#define DA9062AA_ALARM_Y 0x04B
74#define DA9062AA_SECOND_A 0x04C
75#define DA9062AA_SECOND_B 0x04D
76#define DA9062AA_SECOND_C 0x04E
77#define DA9062AA_SECOND_D 0x04F
78#define DA9062AA_SEQ 0x081
79#define DA9062AA_SEQ_TIMER 0x082
80#define DA9062AA_ID_2_1 0x083
81#define DA9062AA_ID_4_3 0x084
82#define DA9062AA_ID_12_11 0x088
83#define DA9062AA_ID_14_13 0x089
84#define DA9062AA_ID_16_15 0x08A
85#define DA9062AA_ID_22_21 0x08D
86#define DA9062AA_ID_24_23 0x08E
87#define DA9062AA_ID_26_25 0x08F
88#define DA9062AA_ID_28_27 0x090
89#define DA9062AA_ID_30_29 0x091
90#define DA9062AA_ID_32_31 0x092
91#define DA9062AA_SEQ_A 0x095
92#define DA9062AA_SEQ_B 0x096
93#define DA9062AA_WAIT 0x097
94#define DA9062AA_EN_32K 0x098
95#define DA9062AA_RESET 0x099
96#define DA9062AA_BUCK_ILIM_A 0x09A
97#define DA9062AA_BUCK_ILIM_B 0x09B
98#define DA9062AA_BUCK_ILIM_C 0x09C
99#define DA9062AA_BUCK2_CFG 0x09D
100#define DA9062AA_BUCK1_CFG 0x09E
101#define DA9062AA_BUCK4_CFG 0x09F
102#define DA9062AA_BUCK3_CFG 0x0A0
103#define DA9062AA_VBUCK2_A 0x0A3
104#define DA9062AA_VBUCK1_A 0x0A4
105#define DA9062AA_VBUCK4_A 0x0A5
106#define DA9062AA_VBUCK3_A 0x0A7
107#define DA9062AA_VLDO1_A 0x0A9
108#define DA9062AA_VLDO2_A 0x0AA
109#define DA9062AA_VLDO3_A 0x0AB
110#define DA9062AA_VLDO4_A 0x0AC
111#define DA9062AA_VBUCK2_B 0x0B4
112#define DA9062AA_VBUCK1_B 0x0B5
113#define DA9062AA_VBUCK4_B 0x0B6
114#define DA9062AA_VBUCK3_B 0x0B8
115#define DA9062AA_VLDO1_B 0x0BA
116#define DA9062AA_VLDO2_B 0x0BB
117#define DA9062AA_VLDO3_B 0x0BC
118#define DA9062AA_VLDO4_B 0x0BD
119#define DA9062AA_BBAT_CONT 0x0C5
120#define DA9062AA_INTERFACE 0x105
121#define DA9062AA_CONFIG_A 0x106
122#define DA9062AA_CONFIG_B 0x107
123#define DA9062AA_CONFIG_C 0x108
124#define DA9062AA_CONFIG_D 0x109
125#define DA9062AA_CONFIG_E 0x10A
126#define DA9062AA_CONFIG_G 0x10C
127#define DA9062AA_CONFIG_H 0x10D
128#define DA9062AA_CONFIG_I 0x10E
129#define DA9062AA_CONFIG_J 0x10F
130#define DA9062AA_CONFIG_K 0x110
131#define DA9062AA_CONFIG_M 0x112
132#define DA9062AA_TRIM_CLDR 0x120
133#define DA9062AA_GP_ID_0 0x121
134#define DA9062AA_GP_ID_1 0x122
135#define DA9062AA_GP_ID_2 0x123
136#define DA9062AA_GP_ID_3 0x124
137#define DA9062AA_GP_ID_4 0x125
138#define DA9062AA_GP_ID_5 0x126
139#define DA9062AA_GP_ID_6 0x127
140#define DA9062AA_GP_ID_7 0x128
141#define DA9062AA_GP_ID_8 0x129
142#define DA9062AA_GP_ID_9 0x12A
143#define DA9062AA_GP_ID_10 0x12B
144#define DA9062AA_GP_ID_11 0x12C
145#define DA9062AA_GP_ID_12 0x12D
146#define DA9062AA_GP_ID_13 0x12E
147#define DA9062AA_GP_ID_14 0x12F
148#define DA9062AA_GP_ID_15 0x130
149#define DA9062AA_GP_ID_16 0x131
150#define DA9062AA_GP_ID_17 0x132
151#define DA9062AA_GP_ID_18 0x133
152#define DA9062AA_GP_ID_19 0x134
153#define DA9062AA_DEVICE_ID 0x181
154#define DA9062AA_VARIANT_ID 0x182
155#define DA9062AA_CUSTOMER_ID 0x183
156#define DA9062AA_CONFIG_ID 0x184
157
158/*
159 * Bit fields
160 */
161
162/* DA9062AA_PAGE_CON = 0x000 */
163#define DA9062AA_PAGE_SHIFT 0
164#define DA9062AA_PAGE_MASK 0x3f
165#define DA9062AA_WRITE_MODE_SHIFT 6
166#define DA9062AA_WRITE_MODE_MASK BIT(6)
167#define DA9062AA_REVERT_SHIFT 7
168#define DA9062AA_REVERT_MASK BIT(7)
169
170/* DA9062AA_STATUS_A = 0x001 */
171#define DA9062AA_NONKEY_SHIFT 0
172#define DA9062AA_NONKEY_MASK 0x01
173#define DA9062AA_DVC_BUSY_SHIFT 2
174#define DA9062AA_DVC_BUSY_MASK BIT(2)
175
176/* DA9062AA_STATUS_B = 0x002 */
177#define DA9062AA_GPI0_SHIFT 0
178#define DA9062AA_GPI0_MASK 0x01
179#define DA9062AA_GPI1_SHIFT 1
180#define DA9062AA_GPI1_MASK BIT(1)
181#define DA9062AA_GPI2_SHIFT 2
182#define DA9062AA_GPI2_MASK BIT(2)
183#define DA9062AA_GPI3_SHIFT 3
184#define DA9062AA_GPI3_MASK BIT(3)
185#define DA9062AA_GPI4_SHIFT 4
186#define DA9062AA_GPI4_MASK BIT(4)
187
188/* DA9062AA_STATUS_D = 0x004 */
189#define DA9062AA_LDO1_ILIM_SHIFT 0
190#define DA9062AA_LDO1_ILIM_MASK 0x01
191#define DA9062AA_LDO2_ILIM_SHIFT 1
192#define DA9062AA_LDO2_ILIM_MASK BIT(1)
193#define DA9062AA_LDO3_ILIM_SHIFT 2
194#define DA9062AA_LDO3_ILIM_MASK BIT(2)
195#define DA9062AA_LDO4_ILIM_SHIFT 3
196#define DA9062AA_LDO4_ILIM_MASK BIT(3)
197
198/* DA9062AA_FAULT_LOG = 0x005 */
199#define DA9062AA_TWD_ERROR_SHIFT 0
200#define DA9062AA_TWD_ERROR_MASK 0x01
201#define DA9062AA_POR_SHIFT 1
202#define DA9062AA_POR_MASK BIT(1)
203#define DA9062AA_VDD_FAULT_SHIFT 2
204#define DA9062AA_VDD_FAULT_MASK BIT(2)
205#define DA9062AA_VDD_START_SHIFT 3
206#define DA9062AA_VDD_START_MASK BIT(3)
207#define DA9062AA_TEMP_CRIT_SHIFT 4
208#define DA9062AA_TEMP_CRIT_MASK BIT(4)
209#define DA9062AA_KEY_RESET_SHIFT 5
210#define DA9062AA_KEY_RESET_MASK BIT(5)
211#define DA9062AA_NSHUTDOWN_SHIFT 6
212#define DA9062AA_NSHUTDOWN_MASK BIT(6)
213#define DA9062AA_WAIT_SHUT_SHIFT 7
214#define DA9062AA_WAIT_SHUT_MASK BIT(7)
215
216/* DA9062AA_EVENT_A = 0x006 */
217#define DA9062AA_E_NONKEY_SHIFT 0
218#define DA9062AA_E_NONKEY_MASK 0x01
219#define DA9062AA_E_ALARM_SHIFT 1
220#define DA9062AA_E_ALARM_MASK BIT(1)
221#define DA9062AA_E_TICK_SHIFT 2
222#define DA9062AA_E_TICK_MASK BIT(2)
223#define DA9062AA_E_WDG_WARN_SHIFT 3
224#define DA9062AA_E_WDG_WARN_MASK BIT(3)
225#define DA9062AA_E_SEQ_RDY_SHIFT 4
226#define DA9062AA_E_SEQ_RDY_MASK BIT(4)
227#define DA9062AA_EVENTS_B_SHIFT 5
228#define DA9062AA_EVENTS_B_MASK BIT(5)
229#define DA9062AA_EVENTS_C_SHIFT 6
230#define DA9062AA_EVENTS_C_MASK BIT(6)
231
232/* DA9062AA_EVENT_B = 0x007 */
233#define DA9062AA_E_TEMP_SHIFT 1
234#define DA9062AA_E_TEMP_MASK BIT(1)
235#define DA9062AA_E_LDO_LIM_SHIFT 3
236#define DA9062AA_E_LDO_LIM_MASK BIT(3)
237#define DA9062AA_E_DVC_RDY_SHIFT 5
238#define DA9062AA_E_DVC_RDY_MASK BIT(5)
239#define DA9062AA_E_VDD_WARN_SHIFT 7
240#define DA9062AA_E_VDD_WARN_MASK BIT(7)
241
242/* DA9062AA_EVENT_C = 0x008 */
243#define DA9062AA_E_GPI0_SHIFT 0
244#define DA9062AA_E_GPI0_MASK 0x01
245#define DA9062AA_E_GPI1_SHIFT 1
246#define DA9062AA_E_GPI1_MASK BIT(1)
247#define DA9062AA_E_GPI2_SHIFT 2
248#define DA9062AA_E_GPI2_MASK BIT(2)
249#define DA9062AA_E_GPI3_SHIFT 3
250#define DA9062AA_E_GPI3_MASK BIT(3)
251#define DA9062AA_E_GPI4_SHIFT 4
252#define DA9062AA_E_GPI4_MASK BIT(4)
253
254/* DA9062AA_IRQ_MASK_A = 0x00A */
255#define DA9062AA_M_NONKEY_SHIFT 0
256#define DA9062AA_M_NONKEY_MASK 0x01
257#define DA9062AA_M_ALARM_SHIFT 1
258#define DA9062AA_M_ALARM_MASK BIT(1)
259#define DA9062AA_M_TICK_SHIFT 2
260#define DA9062AA_M_TICK_MASK BIT(2)
261#define DA9062AA_M_WDG_WARN_SHIFT 3
262#define DA9062AA_M_WDG_WARN_MASK BIT(3)
263#define DA9062AA_M_SEQ_RDY_SHIFT 4
264#define DA9062AA_M_SEQ_RDY_MASK BIT(4)
265
266/* DA9062AA_IRQ_MASK_B = 0x00B */
267#define DA9062AA_M_TEMP_SHIFT 1
268#define DA9062AA_M_TEMP_MASK BIT(1)
269#define DA9062AA_M_LDO_LIM_SHIFT 3
270#define DA9062AA_M_LDO_LIM_MASK BIT(3)
271#define DA9062AA_M_DVC_RDY_SHIFT 5
272#define DA9062AA_M_DVC_RDY_MASK BIT(5)
273#define DA9062AA_M_VDD_WARN_SHIFT 7
274#define DA9062AA_M_VDD_WARN_MASK BIT(7)
275
276/* DA9062AA_IRQ_MASK_C = 0x00C */
277#define DA9062AA_M_GPI0_SHIFT 0
278#define DA9062AA_M_GPI0_MASK 0x01
279#define DA9062AA_M_GPI1_SHIFT 1
280#define DA9062AA_M_GPI1_MASK BIT(1)
281#define DA9062AA_M_GPI2_SHIFT 2
282#define DA9062AA_M_GPI2_MASK BIT(2)
283#define DA9062AA_M_GPI3_SHIFT 3
284#define DA9062AA_M_GPI3_MASK BIT(3)
285#define DA9062AA_M_GPI4_SHIFT 4
286#define DA9062AA_M_GPI4_MASK BIT(4)
287
288/* DA9062AA_CONTROL_A = 0x00E */
289#define DA9062AA_SYSTEM_EN_SHIFT 0
290#define DA9062AA_SYSTEM_EN_MASK 0x01
291#define DA9062AA_POWER_EN_SHIFT 1
292#define DA9062AA_POWER_EN_MASK BIT(1)
293#define DA9062AA_POWER1_EN_SHIFT 2
294#define DA9062AA_POWER1_EN_MASK BIT(2)
295#define DA9062AA_STANDBY_SHIFT 3
296#define DA9062AA_STANDBY_MASK BIT(3)
297#define DA9062AA_M_SYSTEM_EN_SHIFT 4
298#define DA9062AA_M_SYSTEM_EN_MASK BIT(4)
299#define DA9062AA_M_POWER_EN_SHIFT 5
300#define DA9062AA_M_POWER_EN_MASK BIT(5)
301#define DA9062AA_M_POWER1_EN_SHIFT 6
302#define DA9062AA_M_POWER1_EN_MASK BIT(6)
303
304/* DA9062AA_CONTROL_B = 0x00F */
305#define DA9062AA_WATCHDOG_PD_SHIFT 1
306#define DA9062AA_WATCHDOG_PD_MASK BIT(1)
307#define DA9062AA_FREEZE_EN_SHIFT 2
308#define DA9062AA_FREEZE_EN_MASK BIT(2)
309#define DA9062AA_NRES_MODE_SHIFT 3
310#define DA9062AA_NRES_MODE_MASK BIT(3)
311#define DA9062AA_NONKEY_LOCK_SHIFT 4
312#define DA9062AA_NONKEY_LOCK_MASK BIT(4)
313#define DA9062AA_NFREEZE_SHIFT 5
314#define DA9062AA_NFREEZE_MASK (0x03 << 5)
315#define DA9062AA_BUCK_SLOWSTART_SHIFT 7
316#define DA9062AA_BUCK_SLOWSTART_MASK BIT(7)
317
318/* DA9062AA_CONTROL_C = 0x010 */
319#define DA9062AA_DEBOUNCING_SHIFT 0
320#define DA9062AA_DEBOUNCING_MASK 0x07
321#define DA9062AA_AUTO_BOOT_SHIFT 3
322#define DA9062AA_AUTO_BOOT_MASK BIT(3)
323#define DA9062AA_OTPREAD_EN_SHIFT 4
324#define DA9062AA_OTPREAD_EN_MASK BIT(4)
325#define DA9062AA_SLEW_RATE_SHIFT 5
326#define DA9062AA_SLEW_RATE_MASK (0x03 << 5)
327#define DA9062AA_DEF_SUPPLY_SHIFT 7
328#define DA9062AA_DEF_SUPPLY_MASK BIT(7)
329
330/* DA9062AA_CONTROL_D = 0x011 */
331#define DA9062AA_TWDSCALE_SHIFT 0
332#define DA9062AA_TWDSCALE_MASK 0x07
333
334/* DA9062AA_CONTROL_E = 0x012 */
335#define DA9062AA_RTC_MODE_PD_SHIFT 0
336#define DA9062AA_RTC_MODE_PD_MASK 0x01
337#define DA9062AA_RTC_MODE_SD_SHIFT 1
338#define DA9062AA_RTC_MODE_SD_MASK BIT(1)
339#define DA9062AA_RTC_EN_SHIFT 2
340#define DA9062AA_RTC_EN_MASK BIT(2)
341#define DA9062AA_V_LOCK_SHIFT 7
342#define DA9062AA_V_LOCK_MASK BIT(7)
343
344/* DA9062AA_CONTROL_F = 0x013 */
345#define DA9062AA_WATCHDOG_SHIFT 0
346#define DA9062AA_WATCHDOG_MASK 0x01
347#define DA9062AA_SHUTDOWN_SHIFT 1
348#define DA9062AA_SHUTDOWN_MASK BIT(1)
349#define DA9062AA_WAKE_UP_SHIFT 2
350#define DA9062AA_WAKE_UP_MASK BIT(2)
351
352/* DA9062AA_PD_DIS = 0x014 */
353#define DA9062AA_GPI_DIS_SHIFT 0
354#define DA9062AA_GPI_DIS_MASK 0x01
355#define DA9062AA_PMIF_DIS_SHIFT 2
356#define DA9062AA_PMIF_DIS_MASK BIT(2)
357#define DA9062AA_CLDR_PAUSE_SHIFT 4
358#define DA9062AA_CLDR_PAUSE_MASK BIT(4)
359#define DA9062AA_BBAT_DIS_SHIFT 5
360#define DA9062AA_BBAT_DIS_MASK BIT(5)
361#define DA9062AA_OUT32K_PAUSE_SHIFT 6
362#define DA9062AA_OUT32K_PAUSE_MASK BIT(6)
363#define DA9062AA_PMCONT_DIS_SHIFT 7
364#define DA9062AA_PMCONT_DIS_MASK BIT(7)
365
366/* DA9062AA_GPIO_0_1 = 0x015 */
367#define DA9062AA_GPIO0_PIN_SHIFT 0
368#define DA9062AA_GPIO0_PIN_MASK 0x03
369#define DA9062AA_GPIO0_TYPE_SHIFT 2
370#define DA9062AA_GPIO0_TYPE_MASK BIT(2)
371#define DA9062AA_GPIO0_WEN_SHIFT 3
372#define DA9062AA_GPIO0_WEN_MASK BIT(3)
373#define DA9062AA_GPIO1_PIN_SHIFT 4
374#define DA9062AA_GPIO1_PIN_MASK (0x03 << 4)
375#define DA9062AA_GPIO1_TYPE_SHIFT 6
376#define DA9062AA_GPIO1_TYPE_MASK BIT(6)
377#define DA9062AA_GPIO1_WEN_SHIFT 7
378#define DA9062AA_GPIO1_WEN_MASK BIT(7)
379
380/* DA9062AA_GPIO_2_3 = 0x016 */
381#define DA9062AA_GPIO2_PIN_SHIFT 0
382#define DA9062AA_GPIO2_PIN_MASK 0x03
383#define DA9062AA_GPIO2_TYPE_SHIFT 2
384#define DA9062AA_GPIO2_TYPE_MASK BIT(2)
385#define DA9062AA_GPIO2_WEN_SHIFT 3
386#define DA9062AA_GPIO2_WEN_MASK BIT(3)
387#define DA9062AA_GPIO3_PIN_SHIFT 4
388#define DA9062AA_GPIO3_PIN_MASK (0x03 << 4)
389#define DA9062AA_GPIO3_TYPE_SHIFT 6
390#define DA9062AA_GPIO3_TYPE_MASK BIT(6)
391#define DA9062AA_GPIO3_WEN_SHIFT 7
392#define DA9062AA_GPIO3_WEN_MASK BIT(7)
393
394/* DA9062AA_GPIO_4 = 0x017 */
395#define DA9062AA_GPIO4_PIN_SHIFT 0
396#define DA9062AA_GPIO4_PIN_MASK 0x03
397#define DA9062AA_GPIO4_TYPE_SHIFT 2
398#define DA9062AA_GPIO4_TYPE_MASK BIT(2)
399#define DA9062AA_GPIO4_WEN_SHIFT 3
400#define DA9062AA_GPIO4_WEN_MASK BIT(3)
401
402/* DA9062AA_GPIO_WKUP_MODE = 0x01C */
403#define DA9062AA_GPIO0_WKUP_MODE_SHIFT 0
404#define DA9062AA_GPIO0_WKUP_MODE_MASK 0x01
405#define DA9062AA_GPIO1_WKUP_MODE_SHIFT 1
406#define DA9062AA_GPIO1_WKUP_MODE_MASK BIT(1)
407#define DA9062AA_GPIO2_WKUP_MODE_SHIFT 2
408#define DA9062AA_GPIO2_WKUP_MODE_MASK BIT(2)
409#define DA9062AA_GPIO3_WKUP_MODE_SHIFT 3
410#define DA9062AA_GPIO3_WKUP_MODE_MASK BIT(3)
411#define DA9062AA_GPIO4_WKUP_MODE_SHIFT 4
412#define DA9062AA_GPIO4_WKUP_MODE_MASK BIT(4)
413
414/* DA9062AA_GPIO_MODE0_4 = 0x01D */
415#define DA9062AA_GPIO0_MODE_SHIFT 0
416#define DA9062AA_GPIO0_MODE_MASK 0x01
417#define DA9062AA_GPIO1_MODE_SHIFT 1
418#define DA9062AA_GPIO1_MODE_MASK BIT(1)
419#define DA9062AA_GPIO2_MODE_SHIFT 2
420#define DA9062AA_GPIO2_MODE_MASK BIT(2)
421#define DA9062AA_GPIO3_MODE_SHIFT 3
422#define DA9062AA_GPIO3_MODE_MASK BIT(3)
423#define DA9062AA_GPIO4_MODE_SHIFT 4
424#define DA9062AA_GPIO4_MODE_MASK BIT(4)
425
426/* DA9062AA_GPIO_OUT0_2 = 0x01E */
427#define DA9062AA_GPIO0_OUT_SHIFT 0
428#define DA9062AA_GPIO0_OUT_MASK 0x07
429#define DA9062AA_GPIO1_OUT_SHIFT 3
430#define DA9062AA_GPIO1_OUT_MASK (0x07 << 3)
431#define DA9062AA_GPIO2_OUT_SHIFT 6
432#define DA9062AA_GPIO2_OUT_MASK (0x03 << 6)
433
434/* DA9062AA_GPIO_OUT3_4 = 0x01F */
435#define DA9062AA_GPIO3_OUT_SHIFT 0
436#define DA9062AA_GPIO3_OUT_MASK 0x07
437#define DA9062AA_GPIO4_OUT_SHIFT 3
438#define DA9062AA_GPIO4_OUT_MASK (0x03 << 3)
439
440/* DA9062AA_BUCK2_CONT = 0x020 */
441#define DA9062AA_BUCK2_EN_SHIFT 0
442#define DA9062AA_BUCK2_EN_MASK 0x01
443#define DA9062AA_BUCK2_GPI_SHIFT 1
444#define DA9062AA_BUCK2_GPI_MASK (0x03 << 1)
445#define DA9062AA_BUCK2_CONF_SHIFT 3
446#define DA9062AA_BUCK2_CONF_MASK BIT(3)
447#define DA9062AA_VBUCK2_GPI_SHIFT 5
448#define DA9062AA_VBUCK2_GPI_MASK (0x03 << 5)
449
450/* DA9062AA_BUCK1_CONT = 0x021 */
451#define DA9062AA_BUCK1_EN_SHIFT 0
452#define DA9062AA_BUCK1_EN_MASK 0x01
453#define DA9062AA_BUCK1_GPI_SHIFT 1
454#define DA9062AA_BUCK1_GPI_MASK (0x03 << 1)
455#define DA9062AA_BUCK1_CONF_SHIFT 3
456#define DA9062AA_BUCK1_CONF_MASK BIT(3)
457#define DA9062AA_VBUCK1_GPI_SHIFT 5
458#define DA9062AA_VBUCK1_GPI_MASK (0x03 << 5)
459
460/* DA9062AA_BUCK4_CONT = 0x022 */
461#define DA9062AA_BUCK4_EN_SHIFT 0
462#define DA9062AA_BUCK4_EN_MASK 0x01
463#define DA9062AA_BUCK4_GPI_SHIFT 1
464#define DA9062AA_BUCK4_GPI_MASK (0x03 << 1)
465#define DA9062AA_BUCK4_CONF_SHIFT 3
466#define DA9062AA_BUCK4_CONF_MASK BIT(3)
467#define DA9062AA_VBUCK4_GPI_SHIFT 5
468#define DA9062AA_VBUCK4_GPI_MASK (0x03 << 5)
469
470/* DA9062AA_BUCK3_CONT = 0x024 */
471#define DA9062AA_BUCK3_EN_SHIFT 0
472#define DA9062AA_BUCK3_EN_MASK 0x01
473#define DA9062AA_BUCK3_GPI_SHIFT 1
474#define DA9062AA_BUCK3_GPI_MASK (0x03 << 1)
475#define DA9062AA_BUCK3_CONF_SHIFT 3
476#define DA9062AA_BUCK3_CONF_MASK BIT(3)
477#define DA9062AA_VBUCK3_GPI_SHIFT 5
478#define DA9062AA_VBUCK3_GPI_MASK (0x03 << 5)
479
480/* DA9062AA_LDO1_CONT = 0x026 */
481#define DA9062AA_LDO1_EN_SHIFT 0
482#define DA9062AA_LDO1_EN_MASK 0x01
483#define DA9062AA_LDO1_GPI_SHIFT 1
484#define DA9062AA_LDO1_GPI_MASK (0x03 << 1)
485#define DA9062AA_LDO1_PD_DIS_SHIFT 3
486#define DA9062AA_LDO1_PD_DIS_MASK BIT(3)
487#define DA9062AA_VLDO1_GPI_SHIFT 5
488#define DA9062AA_VLDO1_GPI_MASK (0x03 << 5)
489#define DA9062AA_LDO1_CONF_SHIFT 7
490#define DA9062AA_LDO1_CONF_MASK BIT(7)
491
492/* DA9062AA_LDO2_CONT = 0x027 */
493#define DA9062AA_LDO2_EN_SHIFT 0
494#define DA9062AA_LDO2_EN_MASK 0x01
495#define DA9062AA_LDO2_GPI_SHIFT 1
496#define DA9062AA_LDO2_GPI_MASK (0x03 << 1)
497#define DA9062AA_LDO2_PD_DIS_SHIFT 3
498#define DA9062AA_LDO2_PD_DIS_MASK BIT(3)
499#define DA9062AA_VLDO2_GPI_SHIFT 5
500#define DA9062AA_VLDO2_GPI_MASK (0x03 << 5)
501#define DA9062AA_LDO2_CONF_SHIFT 7
502#define DA9062AA_LDO2_CONF_MASK BIT(7)
503
504/* DA9062AA_LDO3_CONT = 0x028 */
505#define DA9062AA_LDO3_EN_SHIFT 0
506#define DA9062AA_LDO3_EN_MASK 0x01
507#define DA9062AA_LDO3_GPI_SHIFT 1
508#define DA9062AA_LDO3_GPI_MASK (0x03 << 1)
509#define DA9062AA_LDO3_PD_DIS_SHIFT 3
510#define DA9062AA_LDO3_PD_DIS_MASK BIT(3)
511#define DA9062AA_VLDO3_GPI_SHIFT 5
512#define DA9062AA_VLDO3_GPI_MASK (0x03 << 5)
513#define DA9062AA_LDO3_CONF_SHIFT 7
514#define DA9062AA_LDO3_CONF_MASK BIT(7)
515
516/* DA9062AA_LDO4_CONT = 0x029 */
517#define DA9062AA_LDO4_EN_SHIFT 0
518#define DA9062AA_LDO4_EN_MASK 0x01
519#define DA9062AA_LDO4_GPI_SHIFT 1
520#define DA9062AA_LDO4_GPI_MASK (0x03 << 1)
521#define DA9062AA_LDO4_PD_DIS_SHIFT 3
522#define DA9062AA_LDO4_PD_DIS_MASK BIT(3)
523#define DA9062AA_VLDO4_GPI_SHIFT 5
524#define DA9062AA_VLDO4_GPI_MASK (0x03 << 5)
525#define DA9062AA_LDO4_CONF_SHIFT 7
526#define DA9062AA_LDO4_CONF_MASK BIT(7)
527
528/* DA9062AA_DVC_1 = 0x032 */
529#define DA9062AA_VBUCK1_SEL_SHIFT 0
530#define DA9062AA_VBUCK1_SEL_MASK 0x01
531#define DA9062AA_VBUCK2_SEL_SHIFT 1
532#define DA9062AA_VBUCK2_SEL_MASK BIT(1)
533#define DA9062AA_VBUCK4_SEL_SHIFT 2
534#define DA9062AA_VBUCK4_SEL_MASK BIT(2)
535#define DA9062AA_VBUCK3_SEL_SHIFT 3
536#define DA9062AA_VBUCK3_SEL_MASK BIT(3)
537#define DA9062AA_VLDO1_SEL_SHIFT 4
538#define DA9062AA_VLDO1_SEL_MASK BIT(4)
539#define DA9062AA_VLDO2_SEL_SHIFT 5
540#define DA9062AA_VLDO2_SEL_MASK BIT(5)
541#define DA9062AA_VLDO3_SEL_SHIFT 6
542#define DA9062AA_VLDO3_SEL_MASK BIT(6)
543#define DA9062AA_VLDO4_SEL_SHIFT 7
544#define DA9062AA_VLDO4_SEL_MASK BIT(7)
545
546/* DA9062AA_COUNT_S = 0x040 */
547#define DA9062AA_COUNT_SEC_SHIFT 0
548#define DA9062AA_COUNT_SEC_MASK 0x3f
549#define DA9062AA_RTC_READ_SHIFT 7
550#define DA9062AA_RTC_READ_MASK BIT(7)
551
552/* DA9062AA_COUNT_MI = 0x041 */
553#define DA9062AA_COUNT_MIN_SHIFT 0
554#define DA9062AA_COUNT_MIN_MASK 0x3f
555
556/* DA9062AA_COUNT_H = 0x042 */
557#define DA9062AA_COUNT_HOUR_SHIFT 0
558#define DA9062AA_COUNT_HOUR_MASK 0x1f
559
560/* DA9062AA_COUNT_D = 0x043 */
561#define DA9062AA_COUNT_DAY_SHIFT 0
562#define DA9062AA_COUNT_DAY_MASK 0x1f
563
564/* DA9062AA_COUNT_MO = 0x044 */
565#define DA9062AA_COUNT_MONTH_SHIFT 0
566#define DA9062AA_COUNT_MONTH_MASK 0x0f
567
568/* DA9062AA_COUNT_Y = 0x045 */
569#define DA9062AA_COUNT_YEAR_SHIFT 0
570#define DA9062AA_COUNT_YEAR_MASK 0x3f
571#define DA9062AA_MONITOR_SHIFT 6
572#define DA9062AA_MONITOR_MASK BIT(6)
573
574/* DA9062AA_ALARM_S = 0x046 */
575#define DA9062AA_ALARM_SEC_SHIFT 0
576#define DA9062AA_ALARM_SEC_MASK 0x3f
577#define DA9062AA_ALARM_STATUS_SHIFT 6
578#define DA9062AA_ALARM_STATUS_MASK (0x03 << 6)
579
580/* DA9062AA_ALARM_MI = 0x047 */
581#define DA9062AA_ALARM_MIN_SHIFT 0
582#define DA9062AA_ALARM_MIN_MASK 0x3f
583
584/* DA9062AA_ALARM_H = 0x048 */
585#define DA9062AA_ALARM_HOUR_SHIFT 0
586#define DA9062AA_ALARM_HOUR_MASK 0x1f
587
588/* DA9062AA_ALARM_D = 0x049 */
589#define DA9062AA_ALARM_DAY_SHIFT 0
590#define DA9062AA_ALARM_DAY_MASK 0x1f
591
592/* DA9062AA_ALARM_MO = 0x04A */
593#define DA9062AA_ALARM_MONTH_SHIFT 0
594#define DA9062AA_ALARM_MONTH_MASK 0x0f
595#define DA9062AA_TICK_TYPE_SHIFT 4
596#define DA9062AA_TICK_TYPE_MASK BIT(4)
597#define DA9062AA_TICK_WAKE_SHIFT 5
598#define DA9062AA_TICK_WAKE_MASK BIT(5)
599
600/* DA9062AA_ALARM_Y = 0x04B */
601#define DA9062AA_ALARM_YEAR_SHIFT 0
602#define DA9062AA_ALARM_YEAR_MASK 0x3f
603#define DA9062AA_ALARM_ON_SHIFT 6
604#define DA9062AA_ALARM_ON_MASK BIT(6)
605#define DA9062AA_TICK_ON_SHIFT 7
606#define DA9062AA_TICK_ON_MASK BIT(7)
607
608/* DA9062AA_SECOND_A = 0x04C */
609#define DA9062AA_SECONDS_A_SHIFT 0
610#define DA9062AA_SECONDS_A_MASK 0xff
611
612/* DA9062AA_SECOND_B = 0x04D */
613#define DA9062AA_SECONDS_B_SHIFT 0
614#define DA9062AA_SECONDS_B_MASK 0xff
615
616/* DA9062AA_SECOND_C = 0x04E */
617#define DA9062AA_SECONDS_C_SHIFT 0
618#define DA9062AA_SECONDS_C_MASK 0xff
619
620/* DA9062AA_SECOND_D = 0x04F */
621#define DA9062AA_SECONDS_D_SHIFT 0
622#define DA9062AA_SECONDS_D_MASK 0xff
623
624/* DA9062AA_SEQ = 0x081 */
625#define DA9062AA_SEQ_POINTER_SHIFT 0
626#define DA9062AA_SEQ_POINTER_MASK 0x0f
627#define DA9062AA_NXT_SEQ_START_SHIFT 4
628#define DA9062AA_NXT_SEQ_START_MASK (0x0f << 4)
629
630/* DA9062AA_SEQ_TIMER = 0x082 */
631#define DA9062AA_SEQ_TIME_SHIFT 0
632#define DA9062AA_SEQ_TIME_MASK 0x0f
633#define DA9062AA_SEQ_DUMMY_SHIFT 4
634#define DA9062AA_SEQ_DUMMY_MASK (0x0f << 4)
635
636/* DA9062AA_ID_2_1 = 0x083 */
637#define DA9062AA_LDO1_STEP_SHIFT 0
638#define DA9062AA_LDO1_STEP_MASK 0x0f
639#define DA9062AA_LDO2_STEP_SHIFT 4
640#define DA9062AA_LDO2_STEP_MASK (0x0f << 4)
641
642/* DA9062AA_ID_4_3 = 0x084 */
643#define DA9062AA_LDO3_STEP_SHIFT 0
644#define DA9062AA_LDO3_STEP_MASK 0x0f
645#define DA9062AA_LDO4_STEP_SHIFT 4
646#define DA9062AA_LDO4_STEP_MASK (0x0f << 4)
647
648/* DA9062AA_ID_12_11 = 0x088 */
649#define DA9062AA_PD_DIS_STEP_SHIFT 4
650#define DA9062AA_PD_DIS_STEP_MASK (0x0f << 4)
651
652/* DA9062AA_ID_14_13 = 0x089 */
653#define DA9062AA_BUCK1_STEP_SHIFT 0
654#define DA9062AA_BUCK1_STEP_MASK 0x0f
655#define DA9062AA_BUCK2_STEP_SHIFT 4
656#define DA9062AA_BUCK2_STEP_MASK (0x0f << 4)
657
658/* DA9062AA_ID_16_15 = 0x08A */
659#define DA9062AA_BUCK4_STEP_SHIFT 0
660#define DA9062AA_BUCK4_STEP_MASK 0x0f
661#define DA9062AA_BUCK3_STEP_SHIFT 4
662#define DA9062AA_BUCK3_STEP_MASK (0x0f << 4)
663
664/* DA9062AA_ID_22_21 = 0x08D */
665#define DA9062AA_GP_RISE1_STEP_SHIFT 0
666#define DA9062AA_GP_RISE1_STEP_MASK 0x0f
667#define DA9062AA_GP_FALL1_STEP_SHIFT 4
668#define DA9062AA_GP_FALL1_STEP_MASK (0x0f << 4)
669
670/* DA9062AA_ID_24_23 = 0x08E */
671#define DA9062AA_GP_RISE2_STEP_SHIFT 0
672#define DA9062AA_GP_RISE2_STEP_MASK 0x0f
673#define DA9062AA_GP_FALL2_STEP_SHIFT 4
674#define DA9062AA_GP_FALL2_STEP_MASK (0x0f << 4)
675
676/* DA9062AA_ID_26_25 = 0x08F */
677#define DA9062AA_GP_RISE3_STEP_SHIFT 0
678#define DA9062AA_GP_RISE3_STEP_MASK 0x0f
679#define DA9062AA_GP_FALL3_STEP_SHIFT 4
680#define DA9062AA_GP_FALL3_STEP_MASK (0x0f << 4)
681
682/* DA9062AA_ID_28_27 = 0x090 */
683#define DA9062AA_GP_RISE4_STEP_SHIFT 0
684#define DA9062AA_GP_RISE4_STEP_MASK 0x0f
685#define DA9062AA_GP_FALL4_STEP_SHIFT 4
686#define DA9062AA_GP_FALL4_STEP_MASK (0x0f << 4)
687
688/* DA9062AA_ID_30_29 = 0x091 */
689#define DA9062AA_GP_RISE5_STEP_SHIFT 0
690#define DA9062AA_GP_RISE5_STEP_MASK 0x0f
691#define DA9062AA_GP_FALL5_STEP_SHIFT 4
692#define DA9062AA_GP_FALL5_STEP_MASK (0x0f << 4)
693
694/* DA9062AA_ID_32_31 = 0x092 */
695#define DA9062AA_WAIT_STEP_SHIFT 0
696#define DA9062AA_WAIT_STEP_MASK 0x0f
697#define DA9062AA_EN32K_STEP_SHIFT 4
698#define DA9062AA_EN32K_STEP_MASK (0x0f << 4)
699
700/* DA9062AA_SEQ_A = 0x095 */
701#define DA9062AA_SYSTEM_END_SHIFT 0
702#define DA9062AA_SYSTEM_END_MASK 0x0f
703#define DA9062AA_POWER_END_SHIFT 4
704#define DA9062AA_POWER_END_MASK (0x0f << 4)
705
706/* DA9062AA_SEQ_B = 0x096 */
707#define DA9062AA_MAX_COUNT_SHIFT 0
708#define DA9062AA_MAX_COUNT_MASK 0x0f
709#define DA9062AA_PART_DOWN_SHIFT 4
710#define DA9062AA_PART_DOWN_MASK (0x0f << 4)
711
712/* DA9062AA_WAIT = 0x097 */
713#define DA9062AA_WAIT_TIME_SHIFT 0
714#define DA9062AA_WAIT_TIME_MASK 0x0f
715#define DA9062AA_WAIT_MODE_SHIFT 4
716#define DA9062AA_WAIT_MODE_MASK BIT(4)
717#define DA9062AA_TIME_OUT_SHIFT 5
718#define DA9062AA_TIME_OUT_MASK BIT(5)
719#define DA9062AA_WAIT_DIR_SHIFT 6
720#define DA9062AA_WAIT_DIR_MASK (0x03 << 6)
721
722/* DA9062AA_EN_32K = 0x098 */
723#define DA9062AA_STABILISATION_TIME_SHIFT 0
724#define DA9062AA_STABILISATION_TIME_MASK 0x07
725#define DA9062AA_CRYSTAL_SHIFT 3
726#define DA9062AA_CRYSTAL_MASK BIT(3)
727#define DA9062AA_DELAY_MODE_SHIFT 4
728#define DA9062AA_DELAY_MODE_MASK BIT(4)
729#define DA9062AA_OUT_CLOCK_SHIFT 5
730#define DA9062AA_OUT_CLOCK_MASK BIT(5)
731#define DA9062AA_RTC_CLOCK_SHIFT 6
732#define DA9062AA_RTC_CLOCK_MASK BIT(6)
733#define DA9062AA_EN_32KOUT_SHIFT 7
734#define DA9062AA_EN_32KOUT_MASK BIT(7)
735
736/* DA9062AA_RESET = 0x099 */
737#define DA9062AA_RESET_TIMER_SHIFT 0
738#define DA9062AA_RESET_TIMER_MASK 0x3f
739#define DA9062AA_RESET_EVENT_SHIFT 6
740#define DA9062AA_RESET_EVENT_MASK (0x03 << 6)
741
742/* DA9062AA_BUCK_ILIM_A = 0x09A */
743#define DA9062AA_BUCK3_ILIM_SHIFT 0
744#define DA9062AA_BUCK3_ILIM_MASK 0x0f
745
746/* DA9062AA_BUCK_ILIM_B = 0x09B */
747#define DA9062AA_BUCK4_ILIM_SHIFT 0
748#define DA9062AA_BUCK4_ILIM_MASK 0x0f
749
750/* DA9062AA_BUCK_ILIM_C = 0x09C */
751#define DA9062AA_BUCK1_ILIM_SHIFT 0
752#define DA9062AA_BUCK1_ILIM_MASK 0x0f
753#define DA9062AA_BUCK2_ILIM_SHIFT 4
754#define DA9062AA_BUCK2_ILIM_MASK (0x0f << 4)
755
756/* DA9062AA_BUCK2_CFG = 0x09D */
757#define DA9062AA_BUCK2_PD_DIS_SHIFT 5
758#define DA9062AA_BUCK2_PD_DIS_MASK BIT(5)
759#define DA9062AA_BUCK2_MODE_SHIFT 6
760#define DA9062AA_BUCK2_MODE_MASK (0x03 << 6)
761
762/* DA9062AA_BUCK1_CFG = 0x09E */
763#define DA9062AA_BUCK1_PD_DIS_SHIFT 5
764#define DA9062AA_BUCK1_PD_DIS_MASK BIT(5)
765#define DA9062AA_BUCK1_MODE_SHIFT 6
766#define DA9062AA_BUCK1_MODE_MASK (0x03 << 6)
767
768/* DA9062AA_BUCK4_CFG = 0x09F */
769#define DA9062AA_BUCK4_VTTR_EN_SHIFT 3
770#define DA9062AA_BUCK4_VTTR_EN_MASK BIT(3)
771#define DA9062AA_BUCK4_VTT_EN_SHIFT 4
772#define DA9062AA_BUCK4_VTT_EN_MASK BIT(4)
773#define DA9062AA_BUCK4_PD_DIS_SHIFT 5
774#define DA9062AA_BUCK4_PD_DIS_MASK BIT(5)
775#define DA9062AA_BUCK4_MODE_SHIFT 6
776#define DA9062AA_BUCK4_MODE_MASK (0x03 << 6)
777
778/* DA9062AA_BUCK3_CFG = 0x0A0 */
779#define DA9062AA_BUCK3_PD_DIS_SHIFT 5
780#define DA9062AA_BUCK3_PD_DIS_MASK BIT(5)
781#define DA9062AA_BUCK3_MODE_SHIFT 6
782#define DA9062AA_BUCK3_MODE_MASK (0x03 << 6)
783
784/* DA9062AA_VBUCK2_A = 0x0A3 */
785#define DA9062AA_VBUCK2_A_SHIFT 0
786#define DA9062AA_VBUCK2_A_MASK 0x7f
787#define DA9062AA_BUCK2_SL_A_SHIFT 7
788#define DA9062AA_BUCK2_SL_A_MASK BIT(7)
789
790/* DA9062AA_VBUCK1_A = 0x0A4 */
791#define DA9062AA_VBUCK1_A_SHIFT 0
792#define DA9062AA_VBUCK1_A_MASK 0x7f
793#define DA9062AA_BUCK1_SL_A_SHIFT 7
794#define DA9062AA_BUCK1_SL_A_MASK BIT(7)
795
796/* DA9062AA_VBUCK4_A = 0x0A5 */
797#define DA9062AA_VBUCK4_A_SHIFT 0
798#define DA9062AA_VBUCK4_A_MASK 0x7f
799#define DA9062AA_BUCK4_SL_A_SHIFT 7
800#define DA9062AA_BUCK4_SL_A_MASK BIT(7)
801
802/* DA9062AA_VBUCK3_A = 0x0A7 */
803#define DA9062AA_VBUCK3_A_SHIFT 0
804#define DA9062AA_VBUCK3_A_MASK 0x7f
805#define DA9062AA_BUCK3_SL_A_SHIFT 7
806#define DA9062AA_BUCK3_SL_A_MASK BIT(7)
807
808/* DA9062AA_VLDO1_A = 0x0A9 */
809#define DA9062AA_VLDO1_A_SHIFT 0
810#define DA9062AA_VLDO1_A_MASK 0x3f
811#define DA9062AA_LDO1_SL_A_SHIFT 7
812#define DA9062AA_LDO1_SL_A_MASK BIT(7)
813
814/* DA9062AA_VLDO2_A = 0x0AA */
815#define DA9062AA_VLDO2_A_SHIFT 0
816#define DA9062AA_VLDO2_A_MASK 0x3f
817#define DA9062AA_LDO2_SL_A_SHIFT 7
818#define DA9062AA_LDO2_SL_A_MASK BIT(7)
819
820/* DA9062AA_VLDO3_A = 0x0AB */
821#define DA9062AA_VLDO3_A_SHIFT 0
822#define DA9062AA_VLDO3_A_MASK 0x3f
823#define DA9062AA_LDO3_SL_A_SHIFT 7
824#define DA9062AA_LDO3_SL_A_MASK BIT(7)
825
826/* DA9062AA_VLDO4_A = 0x0AC */
827#define DA9062AA_VLDO4_A_SHIFT 0
828#define DA9062AA_VLDO4_A_MASK 0x3f
829#define DA9062AA_LDO4_SL_A_SHIFT 7
830#define DA9062AA_LDO4_SL_A_MASK BIT(7)
831
832/* DA9062AA_VBUCK2_B = 0x0B4 */
833#define DA9062AA_VBUCK2_B_SHIFT 0
834#define DA9062AA_VBUCK2_B_MASK 0x7f
835#define DA9062AA_BUCK2_SL_B_SHIFT 7
836#define DA9062AA_BUCK2_SL_B_MASK BIT(7)
837
838/* DA9062AA_VBUCK1_B = 0x0B5 */
839#define DA9062AA_VBUCK1_B_SHIFT 0
840#define DA9062AA_VBUCK1_B_MASK 0x7f
841#define DA9062AA_BUCK1_SL_B_SHIFT 7
842#define DA9062AA_BUCK1_SL_B_MASK BIT(7)
843
844/* DA9062AA_VBUCK4_B = 0x0B6 */
845#define DA9062AA_VBUCK4_B_SHIFT 0
846#define DA9062AA_VBUCK4_B_MASK 0x7f
847#define DA9062AA_BUCK4_SL_B_SHIFT 7
848#define DA9062AA_BUCK4_SL_B_MASK BIT(7)
849
850/* DA9062AA_VBUCK3_B = 0x0B8 */
851#define DA9062AA_VBUCK3_B_SHIFT 0
852#define DA9062AA_VBUCK3_B_MASK 0x7f
853#define DA9062AA_BUCK3_SL_B_SHIFT 7
854#define DA9062AA_BUCK3_SL_B_MASK BIT(7)
855
856/* DA9062AA_VLDO1_B = 0x0BA */
857#define DA9062AA_VLDO1_B_SHIFT 0
858#define DA9062AA_VLDO1_B_MASK 0x3f
859#define DA9062AA_LDO1_SL_B_SHIFT 7
860#define DA9062AA_LDO1_SL_B_MASK BIT(7)
861
862/* DA9062AA_VLDO2_B = 0x0BB */
863#define DA9062AA_VLDO2_B_SHIFT 0
864#define DA9062AA_VLDO2_B_MASK 0x3f
865#define DA9062AA_LDO2_SL_B_SHIFT 7
866#define DA9062AA_LDO2_SL_B_MASK BIT(7)
867
868/* DA9062AA_VLDO3_B = 0x0BC */
869#define DA9062AA_VLDO3_B_SHIFT 0
870#define DA9062AA_VLDO3_B_MASK 0x3f
871#define DA9062AA_LDO3_SL_B_SHIFT 7
872#define DA9062AA_LDO3_SL_B_MASK BIT(7)
873
874/* DA9062AA_VLDO4_B = 0x0BD */
875#define DA9062AA_VLDO4_B_SHIFT 0
876#define DA9062AA_VLDO4_B_MASK 0x3f
877#define DA9062AA_LDO4_SL_B_SHIFT 7
878#define DA9062AA_LDO4_SL_B_MASK BIT(7)
879
880/* DA9062AA_BBAT_CONT = 0x0C5 */
881#define DA9062AA_BCHG_VSET_SHIFT 0
882#define DA9062AA_BCHG_VSET_MASK 0x0f
883#define DA9062AA_BCHG_ISET_SHIFT 4
884#define DA9062AA_BCHG_ISET_MASK (0x0f << 4)
885
886/* DA9062AA_INTERFACE = 0x105 */
887#define DA9062AA_IF_BASE_ADDR_SHIFT 4
888#define DA9062AA_IF_BASE_ADDR_MASK (0x0f << 4)
889
890/* DA9062AA_CONFIG_A = 0x106 */
891#define DA9062AA_PM_I_V_SHIFT 0
892#define DA9062AA_PM_I_V_MASK 0x01
893#define DA9062AA_PM_O_TYPE_SHIFT 2
894#define DA9062AA_PM_O_TYPE_MASK BIT(2)
895#define DA9062AA_IRQ_TYPE_SHIFT 3
896#define DA9062AA_IRQ_TYPE_MASK BIT(3)
897#define DA9062AA_PM_IF_V_SHIFT 4
898#define DA9062AA_PM_IF_V_MASK BIT(4)
899#define DA9062AA_PM_IF_FMP_SHIFT 5
900#define DA9062AA_PM_IF_FMP_MASK BIT(5)
901#define DA9062AA_PM_IF_HSM_SHIFT 6
902#define DA9062AA_PM_IF_HSM_MASK BIT(6)
903
904/* DA9062AA_CONFIG_B = 0x107 */
905#define DA9062AA_VDD_FAULT_ADJ_SHIFT 0
906#define DA9062AA_VDD_FAULT_ADJ_MASK 0x0f
907#define DA9062AA_VDD_HYST_ADJ_SHIFT 4
908#define DA9062AA_VDD_HYST_ADJ_MASK (0x07 << 4)
909
910/* DA9062AA_CONFIG_C = 0x108 */
911#define DA9062AA_BUCK_ACTV_DISCHRG_SHIFT 2
912#define DA9062AA_BUCK_ACTV_DISCHRG_MASK BIT(2)
913#define DA9062AA_BUCK1_CLK_INV_SHIFT 3
914#define DA9062AA_BUCK1_CLK_INV_MASK BIT(3)
915#define DA9062AA_BUCK4_CLK_INV_SHIFT 4
916#define DA9062AA_BUCK4_CLK_INV_MASK BIT(4)
917#define DA9062AA_BUCK3_CLK_INV_SHIFT 6
918#define DA9062AA_BUCK3_CLK_INV_MASK BIT(6)
919
920/* DA9062AA_CONFIG_D = 0x109 */
921#define DA9062AA_GPI_V_SHIFT 0
922#define DA9062AA_GPI_V_MASK 0x01
923#define DA9062AA_NIRQ_MODE_SHIFT 1
924#define DA9062AA_NIRQ_MODE_MASK BIT(1)
925#define DA9062AA_SYSTEM_EN_RD_SHIFT 2
926#define DA9062AA_SYSTEM_EN_RD_MASK BIT(2)
927#define DA9062AA_FORCE_RESET_SHIFT 5
928#define DA9062AA_FORCE_RESET_MASK BIT(5)
929
930/* DA9062AA_CONFIG_E = 0x10A */
931#define DA9062AA_BUCK1_AUTO_SHIFT 0
932#define DA9062AA_BUCK1_AUTO_MASK 0x01
933#define DA9062AA_BUCK2_AUTO_SHIFT 1
934#define DA9062AA_BUCK2_AUTO_MASK BIT(1)
935#define DA9062AA_BUCK4_AUTO_SHIFT 2
936#define DA9062AA_BUCK4_AUTO_MASK BIT(2)
937#define DA9062AA_BUCK3_AUTO_SHIFT 4
938#define DA9062AA_BUCK3_AUTO_MASK BIT(4)
939
940/* DA9062AA_CONFIG_G = 0x10C */
941#define DA9062AA_LDO1_AUTO_SHIFT 0
942#define DA9062AA_LDO1_AUTO_MASK 0x01
943#define DA9062AA_LDO2_AUTO_SHIFT 1
944#define DA9062AA_LDO2_AUTO_MASK BIT(1)
945#define DA9062AA_LDO3_AUTO_SHIFT 2
946#define DA9062AA_LDO3_AUTO_MASK BIT(2)
947#define DA9062AA_LDO4_AUTO_SHIFT 3
948#define DA9062AA_LDO4_AUTO_MASK BIT(3)
949
950/* DA9062AA_CONFIG_H = 0x10D */
951#define DA9062AA_BUCK1_2_MERGE_SHIFT 3
952#define DA9062AA_BUCK1_2_MERGE_MASK BIT(3)
953#define DA9062AA_BUCK2_OD_SHIFT 5
954#define DA9062AA_BUCK2_OD_MASK BIT(5)
955#define DA9062AA_BUCK1_OD_SHIFT 6
956#define DA9062AA_BUCK1_OD_MASK BIT(6)
957
958/* DA9062AA_CONFIG_I = 0x10E */
959#define DA9062AA_NONKEY_PIN_SHIFT 0
960#define DA9062AA_NONKEY_PIN_MASK 0x03
961#define DA9062AA_nONKEY_SD_SHIFT 2
962#define DA9062AA_nONKEY_SD_MASK BIT(2)
963#define DA9062AA_WATCHDOG_SD_SHIFT 3
964#define DA9062AA_WATCHDOG_SD_MASK BIT(3)
965#define DA9062AA_KEY_SD_MODE_SHIFT 4
966#define DA9062AA_KEY_SD_MODE_MASK BIT(4)
967#define DA9062AA_HOST_SD_MODE_SHIFT 5
968#define DA9062AA_HOST_SD_MODE_MASK BIT(5)
969#define DA9062AA_INT_SD_MODE_SHIFT 6
970#define DA9062AA_INT_SD_MODE_MASK BIT(6)
971#define DA9062AA_LDO_SD_SHIFT 7
972#define DA9062AA_LDO_SD_MASK BIT(7)
973
974/* DA9062AA_CONFIG_J = 0x10F */
975#define DA9062AA_KEY_DELAY_SHIFT 0
976#define DA9062AA_KEY_DELAY_MASK 0x03
977#define DA9062AA_SHUT_DELAY_SHIFT 2
978#define DA9062AA_SHUT_DELAY_MASK (0x03 << 2)
979#define DA9062AA_RESET_DURATION_SHIFT 4
980#define DA9062AA_RESET_DURATION_MASK (0x03 << 4)
981#define DA9062AA_TWOWIRE_TO_SHIFT 6
982#define DA9062AA_TWOWIRE_TO_MASK BIT(6)
983#define DA9062AA_IF_RESET_SHIFT 7
984#define DA9062AA_IF_RESET_MASK BIT(7)
985
986/* DA9062AA_CONFIG_K = 0x110 */
987#define DA9062AA_GPIO0_PUPD_SHIFT 0
988#define DA9062AA_GPIO0_PUPD_MASK 0x01
989#define DA9062AA_GPIO1_PUPD_SHIFT 1
990#define DA9062AA_GPIO1_PUPD_MASK BIT(1)
991#define DA9062AA_GPIO2_PUPD_SHIFT 2
992#define DA9062AA_GPIO2_PUPD_MASK BIT(2)
993#define DA9062AA_GPIO3_PUPD_SHIFT 3
994#define DA9062AA_GPIO3_PUPD_MASK BIT(3)
995#define DA9062AA_GPIO4_PUPD_SHIFT 4
996#define DA9062AA_GPIO4_PUPD_MASK BIT(4)
997
998/* DA9062AA_CONFIG_M = 0x112 */
999#define DA9062AA_NSHUTDOWN_PU_SHIFT 1
1000#define DA9062AA_NSHUTDOWN_PU_MASK BIT(1)
1001#define DA9062AA_WDG_MODE_SHIFT 3
1002#define DA9062AA_WDG_MODE_MASK BIT(3)
1003#define DA9062AA_OSC_FRQ_SHIFT 4
1004#define DA9062AA_OSC_FRQ_MASK (0x0f << 4)
1005
1006/* DA9062AA_TRIM_CLDR = 0x120 */
1007#define DA9062AA_TRIM_CLDR_SHIFT 0
1008#define DA9062AA_TRIM_CLDR_MASK 0xff
1009
1010/* DA9062AA_GP_ID_0 = 0x121 */
1011#define DA9062AA_GP_0_SHIFT 0
1012#define DA9062AA_GP_0_MASK 0xff
1013
1014/* DA9062AA_GP_ID_1 = 0x122 */
1015#define DA9062AA_GP_1_SHIFT 0
1016#define DA9062AA_GP_1_MASK 0xff
1017
1018/* DA9062AA_GP_ID_2 = 0x123 */
1019#define DA9062AA_GP_2_SHIFT 0
1020#define DA9062AA_GP_2_MASK 0xff
1021
1022/* DA9062AA_GP_ID_3 = 0x124 */
1023#define DA9062AA_GP_3_SHIFT 0
1024#define DA9062AA_GP_3_MASK 0xff
1025
1026/* DA9062AA_GP_ID_4 = 0x125 */
1027#define DA9062AA_GP_4_SHIFT 0
1028#define DA9062AA_GP_4_MASK 0xff
1029
1030/* DA9062AA_GP_ID_5 = 0x126 */
1031#define DA9062AA_GP_5_SHIFT 0
1032#define DA9062AA_GP_5_MASK 0xff
1033
1034/* DA9062AA_GP_ID_6 = 0x127 */
1035#define DA9062AA_GP_6_SHIFT 0
1036#define DA9062AA_GP_6_MASK 0xff
1037
1038/* DA9062AA_GP_ID_7 = 0x128 */
1039#define DA9062AA_GP_7_SHIFT 0
1040#define DA9062AA_GP_7_MASK 0xff
1041
1042/* DA9062AA_GP_ID_8 = 0x129 */
1043#define DA9062AA_GP_8_SHIFT 0
1044#define DA9062AA_GP_8_MASK 0xff
1045
1046/* DA9062AA_GP_ID_9 = 0x12A */
1047#define DA9062AA_GP_9_SHIFT 0
1048#define DA9062AA_GP_9_MASK 0xff
1049
1050/* DA9062AA_GP_ID_10 = 0x12B */
1051#define DA9062AA_GP_10_SHIFT 0
1052#define DA9062AA_GP_10_MASK 0xff
1053
1054/* DA9062AA_GP_ID_11 = 0x12C */
1055#define DA9062AA_GP_11_SHIFT 0
1056#define DA9062AA_GP_11_MASK 0xff
1057
1058/* DA9062AA_GP_ID_12 = 0x12D */
1059#define DA9062AA_GP_12_SHIFT 0
1060#define DA9062AA_GP_12_MASK 0xff
1061
1062/* DA9062AA_GP_ID_13 = 0x12E */
1063#define DA9062AA_GP_13_SHIFT 0
1064#define DA9062AA_GP_13_MASK 0xff
1065
1066/* DA9062AA_GP_ID_14 = 0x12F */
1067#define DA9062AA_GP_14_SHIFT 0
1068#define DA9062AA_GP_14_MASK 0xff
1069
1070/* DA9062AA_GP_ID_15 = 0x130 */
1071#define DA9062AA_GP_15_SHIFT 0
1072#define DA9062AA_GP_15_MASK 0xff
1073
1074/* DA9062AA_GP_ID_16 = 0x131 */
1075#define DA9062AA_GP_16_SHIFT 0
1076#define DA9062AA_GP_16_MASK 0xff
1077
1078/* DA9062AA_GP_ID_17 = 0x132 */
1079#define DA9062AA_GP_17_SHIFT 0
1080#define DA9062AA_GP_17_MASK 0xff
1081
1082/* DA9062AA_GP_ID_18 = 0x133 */
1083#define DA9062AA_GP_18_SHIFT 0
1084#define DA9062AA_GP_18_MASK 0xff
1085
1086/* DA9062AA_GP_ID_19 = 0x134 */
1087#define DA9062AA_GP_19_SHIFT 0
1088#define DA9062AA_GP_19_MASK 0xff
1089
1090/* DA9062AA_DEVICE_ID = 0x181 */
1091#define DA9062AA_DEV_ID_SHIFT 0
1092#define DA9062AA_DEV_ID_MASK 0xff
1093
1094/* DA9062AA_VARIANT_ID = 0x182 */
1095#define DA9062AA_VRC_SHIFT 0
1096#define DA9062AA_VRC_MASK 0x0f
1097#define DA9062AA_MRC_SHIFT 4
1098#define DA9062AA_MRC_MASK (0x0f << 4)
1099
1100/* DA9062AA_CUSTOMER_ID = 0x183 */
1101#define DA9062AA_CUST_ID_SHIFT 0
1102#define DA9062AA_CUST_ID_MASK 0xff
1103
1104/* DA9062AA_CONFIG_ID = 0x184 */
1105#define DA9062AA_CONFIG_REV_SHIFT 0
1106#define DA9062AA_CONFIG_REV_MASK 0xff
1107
1108#endif /* __DA9062_H__ */
generated by cgit v1.2.2 (git 2.25.0) at 2025-04-11 03:02:16 -0400