diff options
author | Heiko Stuebner <heiko@sntech.de> | 2017-03-01 16:00:41 -0500 |
---|---|---|
committer | Stephen Boyd <sboyd@codeaurora.org> | 2017-03-07 08:54:49 -0500 |
commit | 9b1b23f03abdd25ffde8bbfe5824b89bc0448c28 (patch) | |
tree | 8b4ace16d0b8be6827e26f0dd9e15195b32eb957 | |
parent | 253160a8ad06bcc1c1db16a58b1f06d5128f6c5e (diff) |
clk: rockchip: add "," to mux_pll_src_apll_dpll_gpll_usb480m_p on rk3036
The mux_pll_src_apll_dpll_gpll_usb480m_p parent list was missing a ","
between the 3rd and 4th parent names, making them fall together and thus
lookups fail. Fix that.
Fixes: 5190c08b2989 ("clk: rockchip: add clock controller for rk3036")
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
-rw-r--r-- | drivers/clk/rockchip/clk-rk3036.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/rockchip/clk-rk3036.c b/drivers/clk/rockchip/clk-rk3036.c index 924f560dcf80..dcde70f4c105 100644 --- a/drivers/clk/rockchip/clk-rk3036.c +++ b/drivers/clk/rockchip/clk-rk3036.c | |||
@@ -127,7 +127,7 @@ PNAME(mux_ddrphy_p) = { "dpll_ddr", "gpll_ddr" }; | |||
127 | PNAME(mux_pll_src_3plls_p) = { "apll", "dpll", "gpll" }; | 127 | PNAME(mux_pll_src_3plls_p) = { "apll", "dpll", "gpll" }; |
128 | PNAME(mux_timer_p) = { "xin24m", "pclk_peri_src" }; | 128 | PNAME(mux_timer_p) = { "xin24m", "pclk_peri_src" }; |
129 | 129 | ||
130 | PNAME(mux_pll_src_apll_dpll_gpll_usb480m_p) = { "apll", "dpll", "gpll" "usb480m" }; | 130 | PNAME(mux_pll_src_apll_dpll_gpll_usb480m_p) = { "apll", "dpll", "gpll", "usb480m" }; |
131 | 131 | ||
132 | PNAME(mux_mmc_src_p) = { "apll", "dpll", "gpll", "xin24m" }; | 132 | PNAME(mux_mmc_src_p) = { "apll", "dpll", "gpll", "xin24m" }; |
133 | PNAME(mux_i2s_pre_p) = { "i2s_src", "i2s_frac", "ext_i2s", "xin12m" }; | 133 | PNAME(mux_i2s_pre_p) = { "i2s_src", "i2s_frac", "ext_i2s", "xin12m" }; |