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authorKumar, Mahesh <mahesh1.kumar@intel.com>2016-04-06 11:26:39 -0400
committerJani Nikula <jani.nikula@intel.com>2016-04-18 05:35:48 -0400
commit9aec6a08f1163fb24c23f9036891e1d5bab3f1be (patch)
treec1ebff664bb13f50f74f6046c7cfcb6afe1476c5
parentc3b46c73264b03000d1e18b22f5caf63332547c9 (diff)
drm/i915/skl+: Use plane size for relative data rate calculation
Use plane size for relative data rate calculation. don't always use pipe source width & height. adjust height & width according to rotation. use plane size for watermark calculations also. v2: Address Matt's comments. Use intel_plane_state->visible to avoid divide-by-zero error. Where FB was present but not visible so causing total data rate to be zero, hence divide-by-zero. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93917 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94044 Cc: drm-intel-fixes@lists.freedesktop.org Signed-off-by: Kumar, Mahesh <mahesh1.kumar@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1459956399-1296-1-git-send-email-matthew.d.roper@intel.com (cherry picked from commit a280f7dd9f1a85eed242d0f62498bfc11520a1a3) Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-rw-r--r--drivers/gpu/drm/i915/intel_pm.c42
1 files changed, 28 insertions, 14 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 347d4df49a9b..8ed3cf34f82d 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -2876,25 +2876,28 @@ skl_plane_relative_data_rate(const struct intel_crtc_state *cstate,
2876 const struct drm_plane_state *pstate, 2876 const struct drm_plane_state *pstate,
2877 int y) 2877 int y)
2878{ 2878{
2879 struct intel_crtc *intel_crtc = to_intel_crtc(cstate->base.crtc); 2879 struct intel_plane_state *intel_pstate = to_intel_plane_state(pstate);
2880 struct drm_framebuffer *fb = pstate->fb; 2880 struct drm_framebuffer *fb = pstate->fb;
2881 uint32_t width = 0, height = 0;
2882
2883 width = drm_rect_width(&intel_pstate->src) >> 16;
2884 height = drm_rect_height(&intel_pstate->src) >> 16;
2885
2886 if (intel_rotation_90_or_270(pstate->rotation))
2887 swap(width, height);
2881 2888
2882 /* for planar format */ 2889 /* for planar format */
2883 if (fb->pixel_format == DRM_FORMAT_NV12) { 2890 if (fb->pixel_format == DRM_FORMAT_NV12) {
2884 if (y) /* y-plane data rate */ 2891 if (y) /* y-plane data rate */
2885 return intel_crtc->config->pipe_src_w * 2892 return width * height *
2886 intel_crtc->config->pipe_src_h *
2887 drm_format_plane_cpp(fb->pixel_format, 0); 2893 drm_format_plane_cpp(fb->pixel_format, 0);
2888 else /* uv-plane data rate */ 2894 else /* uv-plane data rate */
2889 return (intel_crtc->config->pipe_src_w/2) * 2895 return (width / 2) * (height / 2) *
2890 (intel_crtc->config->pipe_src_h/2) *
2891 drm_format_plane_cpp(fb->pixel_format, 1); 2896 drm_format_plane_cpp(fb->pixel_format, 1);
2892 } 2897 }
2893 2898
2894 /* for packed formats */ 2899 /* for packed formats */
2895 return intel_crtc->config->pipe_src_w * 2900 return width * height * drm_format_plane_cpp(fb->pixel_format, 0);
2896 intel_crtc->config->pipe_src_h *
2897 drm_format_plane_cpp(fb->pixel_format, 0);
2898} 2901}
2899 2902
2900/* 2903/*
@@ -2973,8 +2976,9 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
2973 struct drm_framebuffer *fb = plane->state->fb; 2976 struct drm_framebuffer *fb = plane->state->fb;
2974 int id = skl_wm_plane_id(intel_plane); 2977 int id = skl_wm_plane_id(intel_plane);
2975 2978
2976 if (fb == NULL) 2979 if (!to_intel_plane_state(plane->state)->visible)
2977 continue; 2980 continue;
2981
2978 if (plane->type == DRM_PLANE_TYPE_CURSOR) 2982 if (plane->type == DRM_PLANE_TYPE_CURSOR)
2979 continue; 2983 continue;
2980 2984
@@ -3000,7 +3004,7 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
3000 uint16_t plane_blocks, y_plane_blocks = 0; 3004 uint16_t plane_blocks, y_plane_blocks = 0;
3001 int id = skl_wm_plane_id(intel_plane); 3005 int id = skl_wm_plane_id(intel_plane);
3002 3006
3003 if (pstate->fb == NULL) 3007 if (!to_intel_plane_state(pstate)->visible)
3004 continue; 3008 continue;
3005 if (plane->type == DRM_PLANE_TYPE_CURSOR) 3009 if (plane->type == DRM_PLANE_TYPE_CURSOR)
3006 continue; 3010 continue;
@@ -3123,26 +3127,36 @@ static bool skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
3123{ 3127{
3124 struct drm_plane *plane = &intel_plane->base; 3128 struct drm_plane *plane = &intel_plane->base;
3125 struct drm_framebuffer *fb = plane->state->fb; 3129 struct drm_framebuffer *fb = plane->state->fb;
3130 struct intel_plane_state *intel_pstate =
3131 to_intel_plane_state(plane->state);
3126 uint32_t latency = dev_priv->wm.skl_latency[level]; 3132 uint32_t latency = dev_priv->wm.skl_latency[level];
3127 uint32_t method1, method2; 3133 uint32_t method1, method2;
3128 uint32_t plane_bytes_per_line, plane_blocks_per_line; 3134 uint32_t plane_bytes_per_line, plane_blocks_per_line;
3129 uint32_t res_blocks, res_lines; 3135 uint32_t res_blocks, res_lines;
3130 uint32_t selected_result; 3136 uint32_t selected_result;
3131 uint8_t cpp; 3137 uint8_t cpp;
3138 uint32_t width = 0, height = 0;
3132 3139
3133 if (latency == 0 || !cstate->base.active || !fb) 3140 if (latency == 0 || !cstate->base.active || !intel_pstate->visible)
3134 return false; 3141 return false;
3135 3142
3143 width = drm_rect_width(&intel_pstate->src) >> 16;
3144 height = drm_rect_height(&intel_pstate->src) >> 16;
3145
3146 if (intel_rotation_90_or_270(plane->state->rotation))
3147 swap(width, height);
3148
3136 cpp = drm_format_plane_cpp(fb->pixel_format, 0); 3149 cpp = drm_format_plane_cpp(fb->pixel_format, 0);
3137 method1 = skl_wm_method1(skl_pipe_pixel_rate(cstate), 3150 method1 = skl_wm_method1(skl_pipe_pixel_rate(cstate),
3138 cpp, latency); 3151 cpp, latency);
3139 method2 = skl_wm_method2(skl_pipe_pixel_rate(cstate), 3152 method2 = skl_wm_method2(skl_pipe_pixel_rate(cstate),
3140 cstate->base.adjusted_mode.crtc_htotal, 3153 cstate->base.adjusted_mode.crtc_htotal,
3141 cstate->pipe_src_w, 3154 width,
3142 cpp, fb->modifier[0], 3155 cpp,
3156 fb->modifier[0],
3143 latency); 3157 latency);
3144 3158
3145 plane_bytes_per_line = cstate->pipe_src_w * cpp; 3159 plane_bytes_per_line = width * cpp;
3146 plane_blocks_per_line = DIV_ROUND_UP(plane_bytes_per_line, 512); 3160 plane_blocks_per_line = DIV_ROUND_UP(plane_bytes_per_line, 512);
3147 3161
3148 if (fb->modifier[0] == I915_FORMAT_MOD_Y_TILED || 3162 if (fb->modifier[0] == I915_FORMAT_MOD_Y_TILED ||