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authorGregory CLEMENT <gregory.clement@free-electrons.com>2017-08-01 11:57:19 -0400
committerLinus Walleij <linus.walleij@linaro.org>2017-08-07 07:54:21 -0400
commit9ac6e7ccc11e795a6e3eecc1f59346a99e51cd07 (patch)
tree2bb805de390afe0b98aa4cb70fdf326872e60b47
parent2d80bd3f7eb69204cd5dec4fa7fe7e12cbfaed13 (diff)
pinctrl: armada-37xx: Fix the pin 23 on south bridge
Pin 23 on South bridge does not belong to the rgmii group. It belongs to a separate group which can have 3 functions. Due to this the fix also have to update the way the functions are managed. Until now each groups used NB_FUNCS(which was 2) functions. For the mpp23, 3 functions are available but it is the only group which needs it, so on the loop involving NB_FUNCS an extra test was added to handle only the functions added. The bug was visible with the merge of the commit 07d065abf93d "arm64: dts: marvell: armada-3720-db: Add vqmmc regulator for SD slot", the gpio regulator used the gpio 23, due to this the whole rgmii group was setup to gpio which broke the Ethernet support on the Armada 3720 DB board. Thanks to this patch, the UHS SD cards (which need the vqmmc) _and_ the Ethernet work again. Cc: stable@vger.kernel.org Fixes: 87466ccd9401 ("pinctrl: armada-37xx: Add pin controller support for Armada 37xx") Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-rw-r--r--drivers/pinctrl/mvebu/pinctrl-armada-37xx.c23
1 files changed, 17 insertions, 6 deletions
diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
index f024e25787fc..c95c76ecc3f7 100644
--- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
+++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
@@ -37,7 +37,7 @@
37#define IRQ_STATUS 0x10 37#define IRQ_STATUS 0x10
38#define IRQ_WKUP 0x18 38#define IRQ_WKUP 0x18
39 39
40#define NB_FUNCS 2 40#define NB_FUNCS 3
41#define GPIO_PER_REG 32 41#define GPIO_PER_REG 32
42 42
43/** 43/**
@@ -126,6 +126,16 @@ struct armada_37xx_pinctrl {
126 .funcs = {_func1, "gpio"} \ 126 .funcs = {_func1, "gpio"} \
127 } 127 }
128 128
129#define PIN_GRP_GPIO_3(_name, _start, _nr, _mask, _v1, _v2, _v3, _f1, _f2) \
130 { \
131 .name = _name, \
132 .start_pin = _start, \
133 .npins = _nr, \
134 .reg_mask = _mask, \
135 .val = {_v1, _v2, _v3}, \
136 .funcs = {_f1, _f2, "gpio"} \
137 }
138
129#define PIN_GRP_EXTRA(_name, _start, _nr, _mask, _v1, _v2, _start2, _nr2, \ 139#define PIN_GRP_EXTRA(_name, _start, _nr, _mask, _v1, _v2, _start2, _nr2, \
130 _f1, _f2) \ 140 _f1, _f2) \
131 { \ 141 { \
@@ -171,12 +181,13 @@ static struct armada_37xx_pin_group armada_37xx_sb_groups[] = {
171 PIN_GRP_GPIO("usb32_drvvbus0", 0, 1, BIT(0), "drvbus"), 181 PIN_GRP_GPIO("usb32_drvvbus0", 0, 1, BIT(0), "drvbus"),
172 PIN_GRP_GPIO("usb2_drvvbus1", 1, 1, BIT(1), "drvbus"), 182 PIN_GRP_GPIO("usb2_drvvbus1", 1, 1, BIT(1), "drvbus"),
173 PIN_GRP_GPIO("sdio_sb", 24, 6, BIT(2), "sdio"), 183 PIN_GRP_GPIO("sdio_sb", 24, 6, BIT(2), "sdio"),
174 PIN_GRP_EXTRA("rgmii", 6, 12, BIT(3), 0, BIT(3), 23, 1, "mii", "gpio"), 184 PIN_GRP_GPIO("rgmii", 6, 12, BIT(3), "mii"),
175 PIN_GRP_GPIO("pcie1", 3, 2, BIT(4), "pcie"), 185 PIN_GRP_GPIO("pcie1", 3, 2, BIT(4), "pcie"),
176 PIN_GRP_GPIO("ptp", 20, 3, BIT(5), "ptp"), 186 PIN_GRP_GPIO("ptp", 20, 3, BIT(5), "ptp"),
177 PIN_GRP("ptp_clk", 21, 1, BIT(6), "ptp", "mii"), 187 PIN_GRP("ptp_clk", 21, 1, BIT(6), "ptp", "mii"),
178 PIN_GRP("ptp_trig", 22, 1, BIT(7), "ptp", "mii"), 188 PIN_GRP("ptp_trig", 22, 1, BIT(7), "ptp", "mii"),
179 PIN_GRP("mii_col", 23, 1, BIT(8), "mii", "mii_err"), 189 PIN_GRP_GPIO_3("mii_col", 23, 1, BIT(8) | BIT(14), 0, BIT(8), BIT(14),
190 "mii", "mii_err"),
180}; 191};
181 192
182const struct armada_37xx_pin_data armada_37xx_pin_nb = { 193const struct armada_37xx_pin_data armada_37xx_pin_nb = {
@@ -208,7 +219,7 @@ static int armada_37xx_get_func_reg(struct armada_37xx_pin_group *grp,
208{ 219{
209 int f; 220 int f;
210 221
211 for (f = 0; f < NB_FUNCS; f++) 222 for (f = 0; (f < NB_FUNCS) && grp->funcs[f]; f++)
212 if (!strcmp(grp->funcs[f], func)) 223 if (!strcmp(grp->funcs[f], func))
213 return f; 224 return f;
214 225
@@ -795,7 +806,7 @@ static int armada_37xx_fill_group(struct armada_37xx_pinctrl *info)
795 for (j = 0; j < grp->extra_npins; j++) 806 for (j = 0; j < grp->extra_npins; j++)
796 grp->pins[i+j] = grp->extra_pin + j; 807 grp->pins[i+j] = grp->extra_pin + j;
797 808
798 for (f = 0; f < NB_FUNCS; f++) { 809 for (f = 0; (f < NB_FUNCS) && grp->funcs[f]; f++) {
799 int ret; 810 int ret;
800 /* check for unique functions and count groups */ 811 /* check for unique functions and count groups */
801 ret = armada_37xx_add_function(info->funcs, &funcsize, 812 ret = armada_37xx_add_function(info->funcs, &funcsize,
@@ -847,7 +858,7 @@ static int armada_37xx_fill_func(struct armada_37xx_pinctrl *info)
847 struct armada_37xx_pin_group *gp = &info->groups[g]; 858 struct armada_37xx_pin_group *gp = &info->groups[g];
848 int f; 859 int f;
849 860
850 for (f = 0; f < NB_FUNCS; f++) { 861 for (f = 0; (f < NB_FUNCS) && gp->funcs[f]; f++) {
851 if (strcmp(gp->funcs[f], name) == 0) { 862 if (strcmp(gp->funcs[f], name) == 0) {
852 *groups = gp->name; 863 *groups = gp->name;
853 groups++; 864 groups++;