diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2013-09-05 12:49:32 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2013-09-05 12:49:32 -0400 |
commit | 9ab073bc45b8b523cc39658925bb44bef35ca657 (patch) | |
tree | 37bfe5c5fd5ef0d296fe47c7ed2c227b198e8fdc | |
parent | eced5a0a5a8f7a3b07320e3b7d1d432e0f044735 (diff) | |
parent | 028cd86b794f4a7f09525587c8e9ab6b03a6fa0f (diff) |
Merge tag 'fbdev-3.12' of git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux
Pull fbdev changes from Tomi Valkeinen:
- Improvements to da8xx-fb to make it support v2 of the LCDC IP, used
eg in BeagleBone
- Himax HX8369 controller support
- Various small fixes and cleanups
* tag 'fbdev-3.12' of git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux: (42 commits)
video: da8xx-fb: fix the polarities of the hsync/vsync pulse
video: da8xx-fb: support lcdc v2 timing register expansion
video: da8xx-fb: fixing timing off by one errors
video: da8xx-fb fixing incorrect porch mappings
video: xilinxfb: replace devm_request_and_ioremap by devm_ioremap_resource
fbmem: move EXPORT_SYMBOL annotation next to symbol declarations
drivers: video: fbcmap: remove the redundency and incorrect checkings
video: mxsfb: simplify use of devm_ioremap_resource
Release efifb's colormap in efifb_destroy()
at91/avr32/atmel_lcdfb: prepare clk before calling enable
video: exynos: Ensure definitions match prototypes
OMAPDSS: fix WARN_ON in 'alpha_blending_enabled' sysfs file
OMAPDSS: HDMI: Fix possible NULL reference
video: da8xx-fb: adding am33xx as dependency
video: da8xx-fb: let compiler decide what to inline
video: da8xx-fb: make clock naming consistent
video: da8xx-fb: set upstream clock rate (if reqd)
video: da8xx-fb: reorganize panel detection
video: da8xx-fb: ensure non-null cfg in pdata
video: da8xx-fb: use devres
...
-rw-r--r-- | Documentation/devicetree/bindings/video/simple-framebuffer.txt | 1 | ||||
-rw-r--r-- | drivers/video/Kconfig | 15 | ||||
-rw-r--r-- | drivers/video/atmel_lcdfb.c | 8 | ||||
-rw-r--r-- | drivers/video/backlight/hx8357.c | 269 | ||||
-rw-r--r-- | drivers/video/backlight/lp855x_bl.c | 2 | ||||
-rw-r--r-- | drivers/video/da8xx-fb.c | 387 | ||||
-rw-r--r-- | drivers/video/efifb.c | 1 | ||||
-rw-r--r-- | drivers/video/exynos/exynos_mipi_dsi_lowlevel.c | 1 | ||||
-rw-r--r-- | drivers/video/fbcmap.c | 7 | ||||
-rw-r--r-- | drivers/video/fbmem.c | 29 | ||||
-rw-r--r-- | drivers/video/matrox/matroxfb_base.c | 3 | ||||
-rw-r--r-- | drivers/video/mxsfb.c | 15 | ||||
-rw-r--r-- | drivers/video/omap2/dss/hdmi.c | 5 | ||||
-rw-r--r-- | drivers/video/omap2/dss/manager-sysfs.c | 8 | ||||
-rw-r--r-- | drivers/video/omap2/dss/ti_hdmi_4xxx_ip.c | 42 | ||||
-rw-r--r-- | drivers/video/output.c | 20 | ||||
-rw-r--r-- | drivers/video/xilinxfb.c | 8 | ||||
-rw-r--r-- | include/linux/platform_data/simplefb.h | 1 | ||||
-rw-r--r-- | include/video/da8xx-fb.h | 5 |
19 files changed, 542 insertions, 285 deletions
diff --git a/Documentation/devicetree/bindings/video/simple-framebuffer.txt b/Documentation/devicetree/bindings/video/simple-framebuffer.txt index 3ea460583111..70c26f3a5b9a 100644 --- a/Documentation/devicetree/bindings/video/simple-framebuffer.txt +++ b/Documentation/devicetree/bindings/video/simple-framebuffer.txt | |||
@@ -12,6 +12,7 @@ Required properties: | |||
12 | - stride: The number of bytes in each line of the framebuffer. | 12 | - stride: The number of bytes in each line of the framebuffer. |
13 | - format: The format of the framebuffer surface. Valid values are: | 13 | - format: The format of the framebuffer surface. Valid values are: |
14 | - r5g6b5 (16-bit pixels, d[15:11]=r, d[10:5]=g, d[4:0]=b). | 14 | - r5g6b5 (16-bit pixels, d[15:11]=r, d[10:5]=g, d[4:0]=b). |
15 | - a8b8g8r8 (32-bit pixels, d[31:24]=a, d[23:16]=b, d[15:8]=g, d[7:0]=r). | ||
15 | 16 | ||
16 | Example: | 17 | Example: |
17 | 18 | ||
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index 34c3d960634d..84b685f7ab6e 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig | |||
@@ -2100,13 +2100,6 @@ config GPM1040A0_320X240 | |||
2100 | bool "Giantplus Technology GPM1040A0 320x240 Color TFT LCD" | 2100 | bool "Giantplus Technology GPM1040A0 320x240 Color TFT LCD" |
2101 | depends on FB_NUC900 | 2101 | depends on FB_NUC900 |
2102 | 2102 | ||
2103 | config FB_NUC900_DEBUG | ||
2104 | bool "NUC900 lcd debug messages" | ||
2105 | depends on FB_NUC900 | ||
2106 | help | ||
2107 | Turn on debugging messages. Note that you can set/unset at run time | ||
2108 | through sysfs | ||
2109 | |||
2110 | config FB_SM501 | 2103 | config FB_SM501 |
2111 | tristate "Silicon Motion SM501 framebuffer support" | 2104 | tristate "Silicon Motion SM501 framebuffer support" |
2112 | depends on FB && MFD_SM501 | 2105 | depends on FB && MFD_SM501 |
@@ -2228,15 +2221,17 @@ config FB_SH7760 | |||
2228 | panels <= 320 pixel horizontal resolution. | 2221 | panels <= 320 pixel horizontal resolution. |
2229 | 2222 | ||
2230 | config FB_DA8XX | 2223 | config FB_DA8XX |
2231 | tristate "DA8xx/OMAP-L1xx Framebuffer support" | 2224 | tristate "DA8xx/OMAP-L1xx/AM335x Framebuffer support" |
2232 | depends on FB && ARCH_DAVINCI_DA8XX | 2225 | depends on FB && (ARCH_DAVINCI_DA8XX || SOC_AM33XX) |
2233 | select FB_CFB_FILLRECT | 2226 | select FB_CFB_FILLRECT |
2234 | select FB_CFB_COPYAREA | 2227 | select FB_CFB_COPYAREA |
2235 | select FB_CFB_IMAGEBLIT | 2228 | select FB_CFB_IMAGEBLIT |
2236 | select FB_CFB_REV_PIXELS_IN_BYTE | 2229 | select FB_CFB_REV_PIXELS_IN_BYTE |
2230 | select FB_MODE_HELPERS | ||
2231 | select VIDEOMODE_HELPERS | ||
2237 | ---help--- | 2232 | ---help--- |
2238 | This is the frame buffer device driver for the TI LCD controller | 2233 | This is the frame buffer device driver for the TI LCD controller |
2239 | found on DA8xx/OMAP-L1xx SoCs. | 2234 | found on DA8xx/OMAP-L1xx/AM335x SoCs. |
2240 | If unsure, say N. | 2235 | If unsure, say N. |
2241 | 2236 | ||
2242 | config FB_VIRTUAL | 2237 | config FB_VIRTUAL |
diff --git a/drivers/video/atmel_lcdfb.c b/drivers/video/atmel_lcdfb.c index effdb373b8db..088511a58a26 100644 --- a/drivers/video/atmel_lcdfb.c +++ b/drivers/video/atmel_lcdfb.c | |||
@@ -902,14 +902,14 @@ static int __init atmel_lcdfb_init_fbinfo(struct atmel_lcdfb_info *sinfo) | |||
902 | 902 | ||
903 | static void atmel_lcdfb_start_clock(struct atmel_lcdfb_info *sinfo) | 903 | static void atmel_lcdfb_start_clock(struct atmel_lcdfb_info *sinfo) |
904 | { | 904 | { |
905 | clk_enable(sinfo->bus_clk); | 905 | clk_prepare_enable(sinfo->bus_clk); |
906 | clk_enable(sinfo->lcdc_clk); | 906 | clk_prepare_enable(sinfo->lcdc_clk); |
907 | } | 907 | } |
908 | 908 | ||
909 | static void atmel_lcdfb_stop_clock(struct atmel_lcdfb_info *sinfo) | 909 | static void atmel_lcdfb_stop_clock(struct atmel_lcdfb_info *sinfo) |
910 | { | 910 | { |
911 | clk_disable(sinfo->bus_clk); | 911 | clk_disable_unprepare(sinfo->bus_clk); |
912 | clk_disable(sinfo->lcdc_clk); | 912 | clk_disable_unprepare(sinfo->lcdc_clk); |
913 | } | 913 | } |
914 | 914 | ||
915 | 915 | ||
diff --git a/drivers/video/backlight/hx8357.c b/drivers/video/backlight/hx8357.c index a0482b567bfe..c7af8c45ab8a 100644 --- a/drivers/video/backlight/hx8357.c +++ b/drivers/video/backlight/hx8357.c | |||
@@ -71,11 +71,24 @@ | |||
71 | #define HX8357_SET_POWER_NORMAL 0xd2 | 71 | #define HX8357_SET_POWER_NORMAL 0xd2 |
72 | #define HX8357_SET_PANEL_RELATED 0xe9 | 72 | #define HX8357_SET_PANEL_RELATED 0xe9 |
73 | 73 | ||
74 | #define HX8369_SET_DISPLAY_BRIGHTNESS 0x51 | ||
75 | #define HX8369_WRITE_CABC_DISPLAY_VALUE 0x53 | ||
76 | #define HX8369_WRITE_CABC_BRIGHT_CTRL 0x55 | ||
77 | #define HX8369_WRITE_CABC_MIN_BRIGHTNESS 0x5e | ||
78 | #define HX8369_SET_POWER 0xb1 | ||
79 | #define HX8369_SET_DISPLAY_MODE 0xb2 | ||
80 | #define HX8369_SET_DISPLAY_WAVEFORM_CYC 0xb4 | ||
81 | #define HX8369_SET_VCOM 0xb6 | ||
82 | #define HX8369_SET_EXTENSION_COMMAND 0xb9 | ||
83 | #define HX8369_SET_GIP 0xd5 | ||
84 | #define HX8369_SET_GAMMA_CURVE_RELATED 0xe0 | ||
85 | |||
74 | struct hx8357_data { | 86 | struct hx8357_data { |
75 | unsigned im_pins[HX8357_NUM_IM_PINS]; | 87 | unsigned im_pins[HX8357_NUM_IM_PINS]; |
76 | unsigned reset; | 88 | unsigned reset; |
77 | struct spi_device *spi; | 89 | struct spi_device *spi; |
78 | int state; | 90 | int state; |
91 | bool use_im_pins; | ||
79 | }; | 92 | }; |
80 | 93 | ||
81 | static u8 hx8357_seq_power[] = { | 94 | static u8 hx8357_seq_power[] = { |
@@ -143,6 +156,61 @@ static u8 hx8357_seq_display_mode[] = { | |||
143 | HX8357_SET_DISPLAY_MODE_RGB_INTERFACE, | 156 | HX8357_SET_DISPLAY_MODE_RGB_INTERFACE, |
144 | }; | 157 | }; |
145 | 158 | ||
159 | static u8 hx8369_seq_write_CABC_min_brightness[] = { | ||
160 | HX8369_WRITE_CABC_MIN_BRIGHTNESS, 0x00, | ||
161 | }; | ||
162 | |||
163 | static u8 hx8369_seq_write_CABC_control[] = { | ||
164 | HX8369_WRITE_CABC_DISPLAY_VALUE, 0x24, | ||
165 | }; | ||
166 | |||
167 | static u8 hx8369_seq_set_display_brightness[] = { | ||
168 | HX8369_SET_DISPLAY_BRIGHTNESS, 0xFF, | ||
169 | }; | ||
170 | |||
171 | static u8 hx8369_seq_write_CABC_control_setting[] = { | ||
172 | HX8369_WRITE_CABC_BRIGHT_CTRL, 0x02, | ||
173 | }; | ||
174 | |||
175 | static u8 hx8369_seq_extension_command[] = { | ||
176 | HX8369_SET_EXTENSION_COMMAND, 0xff, 0x83, 0x69, | ||
177 | }; | ||
178 | |||
179 | static u8 hx8369_seq_display_related[] = { | ||
180 | HX8369_SET_DISPLAY_MODE, 0x00, 0x2b, 0x03, 0x03, 0x70, 0x00, | ||
181 | 0xff, 0x00, 0x00, 0x00, 0x00, 0x03, 0x03, 0x00, 0x01, | ||
182 | }; | ||
183 | |||
184 | static u8 hx8369_seq_panel_waveform_cycle[] = { | ||
185 | HX8369_SET_DISPLAY_WAVEFORM_CYC, 0x0a, 0x1d, 0x80, 0x06, 0x02, | ||
186 | }; | ||
187 | |||
188 | static u8 hx8369_seq_set_address_mode[] = { | ||
189 | HX8357_SET_ADDRESS_MODE, 0x00, | ||
190 | }; | ||
191 | |||
192 | static u8 hx8369_seq_vcom[] = { | ||
193 | HX8369_SET_VCOM, 0x3e, 0x3e, | ||
194 | }; | ||
195 | |||
196 | static u8 hx8369_seq_gip[] = { | ||
197 | HX8369_SET_GIP, 0x00, 0x01, 0x03, 0x25, 0x01, 0x02, 0x28, 0x70, | ||
198 | 0x11, 0x13, 0x00, 0x00, 0x40, 0x26, 0x51, 0x37, 0x00, 0x00, 0x71, | ||
199 | 0x35, 0x60, 0x24, 0x07, 0x0f, 0x04, 0x04, | ||
200 | }; | ||
201 | |||
202 | static u8 hx8369_seq_power[] = { | ||
203 | HX8369_SET_POWER, 0x01, 0x00, 0x34, 0x03, 0x00, 0x11, 0x11, 0x32, | ||
204 | 0x2f, 0x3f, 0x3f, 0x01, 0x3a, 0x01, 0xe6, 0xe6, 0xe6, 0xe6, 0xe6, | ||
205 | }; | ||
206 | |||
207 | static u8 hx8369_seq_gamma_curve_related[] = { | ||
208 | HX8369_SET_GAMMA_CURVE_RELATED, 0x00, 0x0d, 0x19, 0x2f, 0x3b, 0x3d, | ||
209 | 0x2e, 0x4a, 0x08, 0x0e, 0x0f, 0x14, 0x16, 0x14, 0x14, 0x14, 0x1e, | ||
210 | 0x00, 0x0d, 0x19, 0x2f, 0x3b, 0x3d, 0x2e, 0x4a, 0x08, 0x0e, 0x0f, | ||
211 | 0x14, 0x16, 0x14, 0x14, 0x14, 0x1e, | ||
212 | }; | ||
213 | |||
146 | static int hx8357_spi_write_then_read(struct lcd_device *lcdev, | 214 | static int hx8357_spi_write_then_read(struct lcd_device *lcdev, |
147 | u8 *txbuf, u16 txlen, | 215 | u8 *txbuf, u16 txlen, |
148 | u8 *rxbuf, u16 rxlen) | 216 | u8 *rxbuf, u16 rxlen) |
@@ -219,6 +287,10 @@ static int hx8357_enter_standby(struct lcd_device *lcdev) | |||
219 | if (ret < 0) | 287 | if (ret < 0) |
220 | return ret; | 288 | return ret; |
221 | 289 | ||
290 | /* | ||
291 | * The controller needs 120ms when entering in sleep mode before we can | ||
292 | * send the command to go off sleep mode | ||
293 | */ | ||
222 | msleep(120); | 294 | msleep(120); |
223 | 295 | ||
224 | return 0; | 296 | return 0; |
@@ -232,6 +304,10 @@ static int hx8357_exit_standby(struct lcd_device *lcdev) | |||
232 | if (ret < 0) | 304 | if (ret < 0) |
233 | return ret; | 305 | return ret; |
234 | 306 | ||
307 | /* | ||
308 | * The controller needs 120ms when exiting from sleep mode before we | ||
309 | * can send the command to enter in sleep mode | ||
310 | */ | ||
235 | msleep(120); | 311 | msleep(120); |
236 | 312 | ||
237 | ret = hx8357_spi_write_byte(lcdev, HX8357_SET_DISPLAY_ON); | 313 | ret = hx8357_spi_write_byte(lcdev, HX8357_SET_DISPLAY_ON); |
@@ -241,18 +317,9 @@ static int hx8357_exit_standby(struct lcd_device *lcdev) | |||
241 | return 0; | 317 | return 0; |
242 | } | 318 | } |
243 | 319 | ||
244 | static int hx8357_lcd_init(struct lcd_device *lcdev) | 320 | static void hx8357_lcd_reset(struct lcd_device *lcdev) |
245 | { | 321 | { |
246 | struct hx8357_data *lcd = lcd_get_data(lcdev); | 322 | struct hx8357_data *lcd = lcd_get_data(lcdev); |
247 | int ret; | ||
248 | |||
249 | /* | ||
250 | * Set the interface selection pins to SPI mode, with three | ||
251 | * wires | ||
252 | */ | ||
253 | gpio_set_value_cansleep(lcd->im_pins[0], 1); | ||
254 | gpio_set_value_cansleep(lcd->im_pins[1], 0); | ||
255 | gpio_set_value_cansleep(lcd->im_pins[2], 1); | ||
256 | 323 | ||
257 | /* Reset the screen */ | 324 | /* Reset the screen */ |
258 | gpio_set_value(lcd->reset, 1); | 325 | gpio_set_value(lcd->reset, 1); |
@@ -260,7 +327,25 @@ static int hx8357_lcd_init(struct lcd_device *lcdev) | |||
260 | gpio_set_value(lcd->reset, 0); | 327 | gpio_set_value(lcd->reset, 0); |
261 | usleep_range(10000, 12000); | 328 | usleep_range(10000, 12000); |
262 | gpio_set_value(lcd->reset, 1); | 329 | gpio_set_value(lcd->reset, 1); |
330 | |||
331 | /* The controller needs 120ms to recover from reset */ | ||
263 | msleep(120); | 332 | msleep(120); |
333 | } | ||
334 | |||
335 | static int hx8357_lcd_init(struct lcd_device *lcdev) | ||
336 | { | ||
337 | struct hx8357_data *lcd = lcd_get_data(lcdev); | ||
338 | int ret; | ||
339 | |||
340 | /* | ||
341 | * Set the interface selection pins to SPI mode, with three | ||
342 | * wires | ||
343 | */ | ||
344 | if (lcd->use_im_pins) { | ||
345 | gpio_set_value_cansleep(lcd->im_pins[0], 1); | ||
346 | gpio_set_value_cansleep(lcd->im_pins[1], 0); | ||
347 | gpio_set_value_cansleep(lcd->im_pins[2], 1); | ||
348 | } | ||
264 | 349 | ||
265 | ret = hx8357_spi_write_array(lcdev, hx8357_seq_power, | 350 | ret = hx8357_spi_write_array(lcdev, hx8357_seq_power, |
266 | ARRAY_SIZE(hx8357_seq_power)); | 351 | ARRAY_SIZE(hx8357_seq_power)); |
@@ -341,6 +426,9 @@ static int hx8357_lcd_init(struct lcd_device *lcdev) | |||
341 | if (ret < 0) | 426 | if (ret < 0) |
342 | return ret; | 427 | return ret; |
343 | 428 | ||
429 | /* | ||
430 | * The controller needs 120ms to fully recover from exiting sleep mode | ||
431 | */ | ||
344 | msleep(120); | 432 | msleep(120); |
345 | 433 | ||
346 | ret = hx8357_spi_write_byte(lcdev, HX8357_SET_DISPLAY_ON); | 434 | ret = hx8357_spi_write_byte(lcdev, HX8357_SET_DISPLAY_ON); |
@@ -356,6 +444,96 @@ static int hx8357_lcd_init(struct lcd_device *lcdev) | |||
356 | return 0; | 444 | return 0; |
357 | } | 445 | } |
358 | 446 | ||
447 | static int hx8369_lcd_init(struct lcd_device *lcdev) | ||
448 | { | ||
449 | int ret; | ||
450 | |||
451 | ret = hx8357_spi_write_array(lcdev, hx8369_seq_extension_command, | ||
452 | ARRAY_SIZE(hx8369_seq_extension_command)); | ||
453 | if (ret < 0) | ||
454 | return ret; | ||
455 | usleep_range(10000, 12000); | ||
456 | |||
457 | ret = hx8357_spi_write_array(lcdev, hx8369_seq_display_related, | ||
458 | ARRAY_SIZE(hx8369_seq_display_related)); | ||
459 | if (ret < 0) | ||
460 | return ret; | ||
461 | |||
462 | ret = hx8357_spi_write_array(lcdev, hx8369_seq_panel_waveform_cycle, | ||
463 | ARRAY_SIZE(hx8369_seq_panel_waveform_cycle)); | ||
464 | if (ret < 0) | ||
465 | return ret; | ||
466 | |||
467 | ret = hx8357_spi_write_array(lcdev, hx8369_seq_set_address_mode, | ||
468 | ARRAY_SIZE(hx8369_seq_set_address_mode)); | ||
469 | if (ret < 0) | ||
470 | return ret; | ||
471 | |||
472 | ret = hx8357_spi_write_array(lcdev, hx8369_seq_vcom, | ||
473 | ARRAY_SIZE(hx8369_seq_vcom)); | ||
474 | if (ret < 0) | ||
475 | return ret; | ||
476 | |||
477 | ret = hx8357_spi_write_array(lcdev, hx8369_seq_gip, | ||
478 | ARRAY_SIZE(hx8369_seq_gip)); | ||
479 | if (ret < 0) | ||
480 | return ret; | ||
481 | |||
482 | ret = hx8357_spi_write_array(lcdev, hx8369_seq_power, | ||
483 | ARRAY_SIZE(hx8369_seq_power)); | ||
484 | if (ret < 0) | ||
485 | return ret; | ||
486 | |||
487 | ret = hx8357_spi_write_byte(lcdev, HX8357_EXIT_SLEEP_MODE); | ||
488 | if (ret < 0) | ||
489 | return ret; | ||
490 | |||
491 | /* | ||
492 | * The controller needs 120ms to fully recover from exiting sleep mode | ||
493 | */ | ||
494 | msleep(120); | ||
495 | |||
496 | ret = hx8357_spi_write_array(lcdev, hx8369_seq_gamma_curve_related, | ||
497 | ARRAY_SIZE(hx8369_seq_gamma_curve_related)); | ||
498 | if (ret < 0) | ||
499 | return ret; | ||
500 | |||
501 | ret = hx8357_spi_write_byte(lcdev, HX8357_EXIT_SLEEP_MODE); | ||
502 | if (ret < 0) | ||
503 | return ret; | ||
504 | usleep_range(1000, 1200); | ||
505 | |||
506 | ret = hx8357_spi_write_array(lcdev, hx8369_seq_write_CABC_control, | ||
507 | ARRAY_SIZE(hx8369_seq_write_CABC_control)); | ||
508 | if (ret < 0) | ||
509 | return ret; | ||
510 | usleep_range(10000, 12000); | ||
511 | |||
512 | ret = hx8357_spi_write_array(lcdev, | ||
513 | hx8369_seq_write_CABC_control_setting, | ||
514 | ARRAY_SIZE(hx8369_seq_write_CABC_control_setting)); | ||
515 | if (ret < 0) | ||
516 | return ret; | ||
517 | |||
518 | ret = hx8357_spi_write_array(lcdev, | ||
519 | hx8369_seq_write_CABC_min_brightness, | ||
520 | ARRAY_SIZE(hx8369_seq_write_CABC_min_brightness)); | ||
521 | if (ret < 0) | ||
522 | return ret; | ||
523 | usleep_range(10000, 12000); | ||
524 | |||
525 | ret = hx8357_spi_write_array(lcdev, hx8369_seq_set_display_brightness, | ||
526 | ARRAY_SIZE(hx8369_seq_set_display_brightness)); | ||
527 | if (ret < 0) | ||
528 | return ret; | ||
529 | |||
530 | ret = hx8357_spi_write_byte(lcdev, HX8357_SET_DISPLAY_ON); | ||
531 | if (ret < 0) | ||
532 | return ret; | ||
533 | |||
534 | return 0; | ||
535 | } | ||
536 | |||
359 | #define POWER_IS_ON(pwr) ((pwr) <= FB_BLANK_NORMAL) | 537 | #define POWER_IS_ON(pwr) ((pwr) <= FB_BLANK_NORMAL) |
360 | 538 | ||
361 | static int hx8357_set_power(struct lcd_device *lcdev, int power) | 539 | static int hx8357_set_power(struct lcd_device *lcdev, int power) |
@@ -388,10 +566,24 @@ static struct lcd_ops hx8357_ops = { | |||
388 | .get_power = hx8357_get_power, | 566 | .get_power = hx8357_get_power, |
389 | }; | 567 | }; |
390 | 568 | ||
569 | static const struct of_device_id hx8357_dt_ids[] = { | ||
570 | { | ||
571 | .compatible = "himax,hx8357", | ||
572 | .data = hx8357_lcd_init, | ||
573 | }, | ||
574 | { | ||
575 | .compatible = "himax,hx8369", | ||
576 | .data = hx8369_lcd_init, | ||
577 | }, | ||
578 | {}, | ||
579 | }; | ||
580 | MODULE_DEVICE_TABLE(of, hx8357_dt_ids); | ||
581 | |||
391 | static int hx8357_probe(struct spi_device *spi) | 582 | static int hx8357_probe(struct spi_device *spi) |
392 | { | 583 | { |
393 | struct lcd_device *lcdev; | 584 | struct lcd_device *lcdev; |
394 | struct hx8357_data *lcd; | 585 | struct hx8357_data *lcd; |
586 | const struct of_device_id *match; | ||
395 | int i, ret; | 587 | int i, ret; |
396 | 588 | ||
397 | lcd = devm_kzalloc(&spi->dev, sizeof(*lcd), GFP_KERNEL); | 589 | lcd = devm_kzalloc(&spi->dev, sizeof(*lcd), GFP_KERNEL); |
@@ -408,6 +600,10 @@ static int hx8357_probe(struct spi_device *spi) | |||
408 | 600 | ||
409 | lcd->spi = spi; | 601 | lcd->spi = spi; |
410 | 602 | ||
603 | match = of_match_device(hx8357_dt_ids, &spi->dev); | ||
604 | if (!match || !match->data) | ||
605 | return -EINVAL; | ||
606 | |||
411 | lcd->reset = of_get_named_gpio(spi->dev.of_node, "gpios-reset", 0); | 607 | lcd->reset = of_get_named_gpio(spi->dev.of_node, "gpios-reset", 0); |
412 | if (!gpio_is_valid(lcd->reset)) { | 608 | if (!gpio_is_valid(lcd->reset)) { |
413 | dev_err(&spi->dev, "Missing dt property: gpios-reset\n"); | 609 | dev_err(&spi->dev, "Missing dt property: gpios-reset\n"); |
@@ -424,25 +620,32 @@ static int hx8357_probe(struct spi_device *spi) | |||
424 | return -EINVAL; | 620 | return -EINVAL; |
425 | } | 621 | } |
426 | 622 | ||
427 | for (i = 0; i < HX8357_NUM_IM_PINS; i++) { | 623 | if (of_find_property(spi->dev.of_node, "im-gpios", NULL)) { |
428 | lcd->im_pins[i] = of_get_named_gpio(spi->dev.of_node, | 624 | lcd->use_im_pins = 1; |
429 | "im-gpios", i); | 625 | |
430 | if (lcd->im_pins[i] == -EPROBE_DEFER) { | 626 | for (i = 0; i < HX8357_NUM_IM_PINS; i++) { |
431 | dev_info(&spi->dev, "GPIO requested is not here yet, deferring the probe\n"); | 627 | lcd->im_pins[i] = of_get_named_gpio(spi->dev.of_node, |
432 | return -EPROBE_DEFER; | 628 | "im-gpios", i); |
433 | } | 629 | if (lcd->im_pins[i] == -EPROBE_DEFER) { |
434 | if (!gpio_is_valid(lcd->im_pins[i])) { | 630 | dev_info(&spi->dev, "GPIO requested is not here yet, deferring the probe\n"); |
435 | dev_err(&spi->dev, "Missing dt property: im-gpios\n"); | 631 | return -EPROBE_DEFER; |
436 | return -EINVAL; | 632 | } |
437 | } | 633 | if (!gpio_is_valid(lcd->im_pins[i])) { |
438 | 634 | dev_err(&spi->dev, "Missing dt property: im-gpios\n"); | |
439 | ret = devm_gpio_request_one(&spi->dev, lcd->im_pins[i], | 635 | return -EINVAL; |
440 | GPIOF_OUT_INIT_LOW, "im_pins"); | 636 | } |
441 | if (ret) { | 637 | |
442 | dev_err(&spi->dev, "failed to request gpio %d: %d\n", | 638 | ret = devm_gpio_request_one(&spi->dev, lcd->im_pins[i], |
443 | lcd->im_pins[i], ret); | 639 | GPIOF_OUT_INIT_LOW, |
444 | return -EINVAL; | 640 | "im_pins"); |
641 | if (ret) { | ||
642 | dev_err(&spi->dev, "failed to request gpio %d: %d\n", | ||
643 | lcd->im_pins[i], ret); | ||
644 | return -EINVAL; | ||
645 | } | ||
445 | } | 646 | } |
647 | } else { | ||
648 | lcd->use_im_pins = 0; | ||
446 | } | 649 | } |
447 | 650 | ||
448 | lcdev = lcd_device_register("mxsfb", &spi->dev, lcd, &hx8357_ops); | 651 | lcdev = lcd_device_register("mxsfb", &spi->dev, lcd, &hx8357_ops); |
@@ -452,7 +655,9 @@ static int hx8357_probe(struct spi_device *spi) | |||
452 | } | 655 | } |
453 | spi_set_drvdata(spi, lcdev); | 656 | spi_set_drvdata(spi, lcdev); |
454 | 657 | ||
455 | ret = hx8357_lcd_init(lcdev); | 658 | hx8357_lcd_reset(lcdev); |
659 | |||
660 | ret = ((int (*)(struct lcd_device *))match->data)(lcdev); | ||
456 | if (ret) { | 661 | if (ret) { |
457 | dev_err(&spi->dev, "Couldn't initialize panel\n"); | 662 | dev_err(&spi->dev, "Couldn't initialize panel\n"); |
458 | goto init_error; | 663 | goto init_error; |
@@ -475,12 +680,6 @@ static int hx8357_remove(struct spi_device *spi) | |||
475 | return 0; | 680 | return 0; |
476 | } | 681 | } |
477 | 682 | ||
478 | static const struct of_device_id hx8357_dt_ids[] = { | ||
479 | { .compatible = "himax,hx8357" }, | ||
480 | {}, | ||
481 | }; | ||
482 | MODULE_DEVICE_TABLE(of, hx8357_dt_ids); | ||
483 | |||
484 | static struct spi_driver hx8357_driver = { | 683 | static struct spi_driver hx8357_driver = { |
485 | .probe = hx8357_probe, | 684 | .probe = hx8357_probe, |
486 | .remove = hx8357_remove, | 685 | .remove = hx8357_remove, |
diff --git a/drivers/video/backlight/lp855x_bl.c b/drivers/video/backlight/lp855x_bl.c index a0e1e02bdc2e..c0b41f13bd4a 100644 --- a/drivers/video/backlight/lp855x_bl.c +++ b/drivers/video/backlight/lp855x_bl.c | |||
@@ -246,7 +246,7 @@ static int lp855x_bl_update_status(struct backlight_device *bl) | |||
246 | { | 246 | { |
247 | struct lp855x *lp = bl_get_data(bl); | 247 | struct lp855x *lp = bl_get_data(bl); |
248 | 248 | ||
249 | if (bl->props.state & BL_CORE_SUSPENDED) | 249 | if (bl->props.state & (BL_CORE_SUSPENDED | BL_CORE_FBBLANK)) |
250 | bl->props.brightness = 0; | 250 | bl->props.brightness = 0; |
251 | 251 | ||
252 | if (lp->mode == PWM_BASED) { | 252 | if (lp->mode == PWM_BASED) { |
diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c index 0810939936f4..e030e17a83f2 100644 --- a/drivers/video/da8xx-fb.c +++ b/drivers/video/da8xx-fb.c | |||
@@ -131,29 +131,28 @@ | |||
131 | 131 | ||
132 | #define WSI_TIMEOUT 50 | 132 | #define WSI_TIMEOUT 50 |
133 | #define PALETTE_SIZE 256 | 133 | #define PALETTE_SIZE 256 |
134 | #define LEFT_MARGIN 64 | 134 | |
135 | #define RIGHT_MARGIN 64 | 135 | #define CLK_MIN_DIV 2 |
136 | #define UPPER_MARGIN 32 | 136 | #define CLK_MAX_DIV 255 |
137 | #define LOWER_MARGIN 32 | ||
138 | 137 | ||
139 | static void __iomem *da8xx_fb_reg_base; | 138 | static void __iomem *da8xx_fb_reg_base; |
140 | static struct resource *lcdc_regs; | ||
141 | static unsigned int lcd_revision; | 139 | static unsigned int lcd_revision; |
142 | static irq_handler_t lcdc_irq_handler; | 140 | static irq_handler_t lcdc_irq_handler; |
143 | static wait_queue_head_t frame_done_wq; | 141 | static wait_queue_head_t frame_done_wq; |
144 | static int frame_done_flag; | 142 | static int frame_done_flag; |
145 | 143 | ||
146 | static inline unsigned int lcdc_read(unsigned int addr) | 144 | static unsigned int lcdc_read(unsigned int addr) |
147 | { | 145 | { |
148 | return (unsigned int)__raw_readl(da8xx_fb_reg_base + (addr)); | 146 | return (unsigned int)__raw_readl(da8xx_fb_reg_base + (addr)); |
149 | } | 147 | } |
150 | 148 | ||
151 | static inline void lcdc_write(unsigned int val, unsigned int addr) | 149 | static void lcdc_write(unsigned int val, unsigned int addr) |
152 | { | 150 | { |
153 | __raw_writel(val, da8xx_fb_reg_base + (addr)); | 151 | __raw_writel(val, da8xx_fb_reg_base + (addr)); |
154 | } | 152 | } |
155 | 153 | ||
156 | struct da8xx_fb_par { | 154 | struct da8xx_fb_par { |
155 | struct device *dev; | ||
157 | resource_size_t p_palette_base; | 156 | resource_size_t p_palette_base; |
158 | unsigned char *v_palette_base; | 157 | unsigned char *v_palette_base; |
159 | dma_addr_t vram_phys; | 158 | dma_addr_t vram_phys; |
@@ -164,7 +163,6 @@ struct da8xx_fb_par { | |||
164 | struct clk *lcdc_clk; | 163 | struct clk *lcdc_clk; |
165 | int irq; | 164 | int irq; |
166 | unsigned int palette_sz; | 165 | unsigned int palette_sz; |
167 | unsigned int pxl_clk; | ||
168 | int blank; | 166 | int blank; |
169 | wait_queue_head_t vsync_wait; | 167 | wait_queue_head_t vsync_wait; |
170 | int vsync_flag; | 168 | int vsync_flag; |
@@ -178,29 +176,15 @@ struct da8xx_fb_par { | |||
178 | unsigned int which_dma_channel_done; | 176 | unsigned int which_dma_channel_done; |
179 | #ifdef CONFIG_CPU_FREQ | 177 | #ifdef CONFIG_CPU_FREQ |
180 | struct notifier_block freq_transition; | 178 | struct notifier_block freq_transition; |
181 | unsigned int lcd_fck_rate; | ||
182 | #endif | 179 | #endif |
180 | unsigned int lcdc_clk_rate; | ||
183 | void (*panel_power_ctrl)(int); | 181 | void (*panel_power_ctrl)(int); |
184 | u32 pseudo_palette[16]; | 182 | u32 pseudo_palette[16]; |
183 | struct fb_videomode mode; | ||
184 | struct lcd_ctrl_config cfg; | ||
185 | }; | 185 | }; |
186 | 186 | ||
187 | /* Variable Screen Information */ | 187 | static struct fb_var_screeninfo da8xx_fb_var; |
188 | static struct fb_var_screeninfo da8xx_fb_var = { | ||
189 | .xoffset = 0, | ||
190 | .yoffset = 0, | ||
191 | .transp = {0, 0, 0}, | ||
192 | .nonstd = 0, | ||
193 | .activate = 0, | ||
194 | .height = -1, | ||
195 | .width = -1, | ||
196 | .accel_flags = 0, | ||
197 | .left_margin = LEFT_MARGIN, | ||
198 | .right_margin = RIGHT_MARGIN, | ||
199 | .upper_margin = UPPER_MARGIN, | ||
200 | .lower_margin = LOWER_MARGIN, | ||
201 | .sync = 0, | ||
202 | .vmode = FB_VMODE_NONINTERLACED | ||
203 | }; | ||
204 | 188 | ||
205 | static struct fb_fix_screeninfo da8xx_fb_fix = { | 189 | static struct fb_fix_screeninfo da8xx_fb_fix = { |
206 | .id = "DA8xx FB Drv", | 190 | .id = "DA8xx FB Drv", |
@@ -219,7 +203,7 @@ static struct fb_videomode known_lcd_panels[] = { | |||
219 | .name = "Sharp_LCD035Q3DG01", | 203 | .name = "Sharp_LCD035Q3DG01", |
220 | .xres = 320, | 204 | .xres = 320, |
221 | .yres = 240, | 205 | .yres = 240, |
222 | .pixclock = 4608000, | 206 | .pixclock = KHZ2PICOS(4607), |
223 | .left_margin = 6, | 207 | .left_margin = 6, |
224 | .right_margin = 8, | 208 | .right_margin = 8, |
225 | .upper_margin = 2, | 209 | .upper_margin = 2, |
@@ -234,7 +218,7 @@ static struct fb_videomode known_lcd_panels[] = { | |||
234 | .name = "Sharp_LK043T1DG01", | 218 | .name = "Sharp_LK043T1DG01", |
235 | .xres = 480, | 219 | .xres = 480, |
236 | .yres = 272, | 220 | .yres = 272, |
237 | .pixclock = 7833600, | 221 | .pixclock = KHZ2PICOS(7833), |
238 | .left_margin = 2, | 222 | .left_margin = 2, |
239 | .right_margin = 2, | 223 | .right_margin = 2, |
240 | .upper_margin = 2, | 224 | .upper_margin = 2, |
@@ -249,7 +233,7 @@ static struct fb_videomode known_lcd_panels[] = { | |||
249 | .name = "SP10Q010", | 233 | .name = "SP10Q010", |
250 | .xres = 320, | 234 | .xres = 320, |
251 | .yres = 240, | 235 | .yres = 240, |
252 | .pixclock = 7833600, | 236 | .pixclock = KHZ2PICOS(7833), |
253 | .left_margin = 10, | 237 | .left_margin = 10, |
254 | .right_margin = 10, | 238 | .right_margin = 10, |
255 | .upper_margin = 10, | 239 | .upper_margin = 10, |
@@ -261,8 +245,13 @@ static struct fb_videomode known_lcd_panels[] = { | |||
261 | }, | 245 | }, |
262 | }; | 246 | }; |
263 | 247 | ||
248 | static bool da8xx_fb_is_raster_enabled(void) | ||
249 | { | ||
250 | return !!(lcdc_read(LCD_RASTER_CTRL_REG) & LCD_RASTER_ENABLE); | ||
251 | } | ||
252 | |||
264 | /* Enable the Raster Engine of the LCD Controller */ | 253 | /* Enable the Raster Engine of the LCD Controller */ |
265 | static inline void lcd_enable_raster(void) | 254 | static void lcd_enable_raster(void) |
266 | { | 255 | { |
267 | u32 reg; | 256 | u32 reg; |
268 | 257 | ||
@@ -284,7 +273,7 @@ static inline void lcd_enable_raster(void) | |||
284 | } | 273 | } |
285 | 274 | ||
286 | /* Disable the Raster Engine of the LCD Controller */ | 275 | /* Disable the Raster Engine of the LCD Controller */ |
287 | static inline void lcd_disable_raster(bool wait_for_frame_done) | 276 | static void lcd_disable_raster(enum da8xx_frame_complete wait_for_frame_done) |
288 | { | 277 | { |
289 | u32 reg; | 278 | u32 reg; |
290 | int ret; | 279 | int ret; |
@@ -296,7 +285,8 @@ static inline void lcd_disable_raster(bool wait_for_frame_done) | |||
296 | /* return if already disabled */ | 285 | /* return if already disabled */ |
297 | return; | 286 | return; |
298 | 287 | ||
299 | if ((wait_for_frame_done == true) && (lcd_revision == LCD_VERSION_2)) { | 288 | if ((wait_for_frame_done == DA8XX_FRAME_WAIT) && |
289 | (lcd_revision == LCD_VERSION_2)) { | ||
300 | frame_done_flag = 0; | 290 | frame_done_flag = 0; |
301 | ret = wait_event_interruptible_timeout(frame_done_wq, | 291 | ret = wait_event_interruptible_timeout(frame_done_wq, |
302 | frame_done_flag != 0, | 292 | frame_done_flag != 0, |
@@ -331,7 +321,7 @@ static void lcd_blit(int load_mode, struct da8xx_fb_par *par) | |||
331 | reg_int = lcdc_read(LCD_INT_ENABLE_SET_REG) | | 321 | reg_int = lcdc_read(LCD_INT_ENABLE_SET_REG) | |
332 | LCD_V2_END_OF_FRAME0_INT_ENA | | 322 | LCD_V2_END_OF_FRAME0_INT_ENA | |
333 | LCD_V2_END_OF_FRAME1_INT_ENA | | 323 | LCD_V2_END_OF_FRAME1_INT_ENA | |
334 | LCD_FRAME_DONE; | 324 | LCD_FRAME_DONE | LCD_SYNC_LOST; |
335 | lcdc_write(reg_int, LCD_INT_ENABLE_SET_REG); | 325 | lcdc_write(reg_int, LCD_INT_ENABLE_SET_REG); |
336 | } | 326 | } |
337 | reg_dma |= LCD_DUAL_FRAME_BUFFER_ENABLE; | 327 | reg_dma |= LCD_DUAL_FRAME_BUFFER_ENABLE; |
@@ -417,10 +407,25 @@ static void lcd_cfg_horizontal_sync(int back_porch, int pulse_width, | |||
417 | u32 reg; | 407 | u32 reg; |
418 | 408 | ||
419 | reg = lcdc_read(LCD_RASTER_TIMING_0_REG) & 0xf; | 409 | reg = lcdc_read(LCD_RASTER_TIMING_0_REG) & 0xf; |
420 | reg |= ((back_porch & 0xff) << 24) | 410 | reg |= (((back_porch-1) & 0xff) << 24) |
421 | | ((front_porch & 0xff) << 16) | 411 | | (((front_porch-1) & 0xff) << 16) |
422 | | ((pulse_width & 0x3f) << 10); | 412 | | (((pulse_width-1) & 0x3f) << 10); |
423 | lcdc_write(reg, LCD_RASTER_TIMING_0_REG); | 413 | lcdc_write(reg, LCD_RASTER_TIMING_0_REG); |
414 | |||
415 | /* | ||
416 | * LCDC Version 2 adds some extra bits that increase the allowable | ||
417 | * size of the horizontal timing registers. | ||
418 | * remember that the registers use 0 to represent 1 so all values | ||
419 | * that get set into register need to be decremented by 1 | ||
420 | */ | ||
421 | if (lcd_revision == LCD_VERSION_2) { | ||
422 | /* Mask off the bits we want to change */ | ||
423 | reg = lcdc_read(LCD_RASTER_TIMING_2_REG) & ~0x780000ff; | ||
424 | reg |= ((front_porch-1) & 0x300) >> 8; | ||
425 | reg |= ((back_porch-1) & 0x300) >> 4; | ||
426 | reg |= ((pulse_width-1) & 0x3c0) << 21; | ||
427 | lcdc_write(reg, LCD_RASTER_TIMING_2_REG); | ||
428 | } | ||
424 | } | 429 | } |
425 | 430 | ||
426 | static void lcd_cfg_vertical_sync(int back_porch, int pulse_width, | 431 | static void lcd_cfg_vertical_sync(int back_porch, int pulse_width, |
@@ -431,7 +436,7 @@ static void lcd_cfg_vertical_sync(int back_porch, int pulse_width, | |||
431 | reg = lcdc_read(LCD_RASTER_TIMING_1_REG) & 0x3ff; | 436 | reg = lcdc_read(LCD_RASTER_TIMING_1_REG) & 0x3ff; |
432 | reg |= ((back_porch & 0xff) << 24) | 437 | reg |= ((back_porch & 0xff) << 24) |
433 | | ((front_porch & 0xff) << 16) | 438 | | ((front_porch & 0xff) << 16) |
434 | | ((pulse_width & 0x3f) << 10); | 439 | | (((pulse_width-1) & 0x3f) << 10); |
435 | lcdc_write(reg, LCD_RASTER_TIMING_1_REG); | 440 | lcdc_write(reg, LCD_RASTER_TIMING_1_REG); |
436 | } | 441 | } |
437 | 442 | ||
@@ -488,12 +493,12 @@ static int lcd_cfg_display(const struct lcd_ctrl_config *cfg, | |||
488 | else | 493 | else |
489 | reg &= ~LCD_SYNC_EDGE; | 494 | reg &= ~LCD_SYNC_EDGE; |
490 | 495 | ||
491 | if (panel->sync & FB_SYNC_HOR_HIGH_ACT) | 496 | if ((panel->sync & FB_SYNC_HOR_HIGH_ACT) == 0) |
492 | reg |= LCD_INVERT_LINE_CLOCK; | 497 | reg |= LCD_INVERT_LINE_CLOCK; |
493 | else | 498 | else |
494 | reg &= ~LCD_INVERT_LINE_CLOCK; | 499 | reg &= ~LCD_INVERT_LINE_CLOCK; |
495 | 500 | ||
496 | if (panel->sync & FB_SYNC_VERT_HIGH_ACT) | 501 | if ((panel->sync & FB_SYNC_VERT_HIGH_ACT) == 0) |
497 | reg |= LCD_INVERT_FRAME_CLOCK; | 502 | reg |= LCD_INVERT_FRAME_CLOCK; |
498 | else | 503 | else |
499 | reg &= ~LCD_INVERT_FRAME_CLOCK; | 504 | reg &= ~LCD_INVERT_FRAME_CLOCK; |
@@ -565,10 +570,11 @@ static int lcd_cfg_frame_buffer(struct da8xx_fb_par *par, u32 width, u32 height, | |||
565 | break; | 570 | break; |
566 | case 24: | 571 | case 24: |
567 | reg |= LCD_V2_TFT_24BPP_MODE; | 572 | reg |= LCD_V2_TFT_24BPP_MODE; |
573 | break; | ||
568 | case 32: | 574 | case 32: |
575 | reg |= LCD_V2_TFT_24BPP_MODE; | ||
569 | reg |= LCD_V2_TFT_24BPP_UNPACK; | 576 | reg |= LCD_V2_TFT_24BPP_UNPACK; |
570 | break; | 577 | break; |
571 | |||
572 | case 8: | 578 | case 8: |
573 | par->palette_sz = 256 * 2; | 579 | par->palette_sz = 256 * 2; |
574 | break; | 580 | break; |
@@ -681,11 +687,8 @@ static int fb_setcolreg(unsigned regno, unsigned red, unsigned green, | |||
681 | } | 687 | } |
682 | #undef CNVT_TOHW | 688 | #undef CNVT_TOHW |
683 | 689 | ||
684 | static void lcd_reset(struct da8xx_fb_par *par) | 690 | static void da8xx_fb_lcd_reset(void) |
685 | { | 691 | { |
686 | /* Disable the Raster if previously Enabled */ | ||
687 | lcd_disable_raster(false); | ||
688 | |||
689 | /* DMA has to be disabled */ | 692 | /* DMA has to be disabled */ |
690 | lcdc_write(0, LCD_DMA_CTRL_REG); | 693 | lcdc_write(0, LCD_DMA_CTRL_REG); |
691 | lcdc_write(0, LCD_RASTER_CTRL_REG); | 694 | lcdc_write(0, LCD_RASTER_CTRL_REG); |
@@ -698,21 +701,76 @@ static void lcd_reset(struct da8xx_fb_par *par) | |||
698 | } | 701 | } |
699 | } | 702 | } |
700 | 703 | ||
701 | static void lcd_calc_clk_divider(struct da8xx_fb_par *par) | 704 | static int da8xx_fb_config_clk_divider(struct da8xx_fb_par *par, |
705 | unsigned lcdc_clk_div, | ||
706 | unsigned lcdc_clk_rate) | ||
702 | { | 707 | { |
703 | unsigned int lcd_clk, div; | 708 | int ret; |
704 | 709 | ||
705 | lcd_clk = clk_get_rate(par->lcdc_clk); | 710 | if (par->lcdc_clk_rate != lcdc_clk_rate) { |
706 | div = lcd_clk / par->pxl_clk; | 711 | ret = clk_set_rate(par->lcdc_clk, lcdc_clk_rate); |
712 | if (IS_ERR_VALUE(ret)) { | ||
713 | dev_err(par->dev, | ||
714 | "unable to set clock rate at %u\n", | ||
715 | lcdc_clk_rate); | ||
716 | return ret; | ||
717 | } | ||
718 | par->lcdc_clk_rate = clk_get_rate(par->lcdc_clk); | ||
719 | } | ||
707 | 720 | ||
708 | /* Configure the LCD clock divisor. */ | 721 | /* Configure the LCD clock divisor. */ |
709 | lcdc_write(LCD_CLK_DIVISOR(div) | | 722 | lcdc_write(LCD_CLK_DIVISOR(lcdc_clk_div) | |
710 | (LCD_RASTER_MODE & 0x1), LCD_CTRL_REG); | 723 | (LCD_RASTER_MODE & 0x1), LCD_CTRL_REG); |
711 | 724 | ||
712 | if (lcd_revision == LCD_VERSION_2) | 725 | if (lcd_revision == LCD_VERSION_2) |
713 | lcdc_write(LCD_V2_DMA_CLK_EN | LCD_V2_LIDD_CLK_EN | | 726 | lcdc_write(LCD_V2_DMA_CLK_EN | LCD_V2_LIDD_CLK_EN | |
714 | LCD_V2_CORE_CLK_EN, LCD_CLK_ENABLE_REG); | 727 | LCD_V2_CORE_CLK_EN, LCD_CLK_ENABLE_REG); |
715 | 728 | ||
729 | return 0; | ||
730 | } | ||
731 | |||
732 | static unsigned int da8xx_fb_calc_clk_divider(struct da8xx_fb_par *par, | ||
733 | unsigned pixclock, | ||
734 | unsigned *lcdc_clk_rate) | ||
735 | { | ||
736 | unsigned lcdc_clk_div; | ||
737 | |||
738 | pixclock = PICOS2KHZ(pixclock) * 1000; | ||
739 | |||
740 | *lcdc_clk_rate = par->lcdc_clk_rate; | ||
741 | |||
742 | if (pixclock < (*lcdc_clk_rate / CLK_MAX_DIV)) { | ||
743 | *lcdc_clk_rate = clk_round_rate(par->lcdc_clk, | ||
744 | pixclock * CLK_MAX_DIV); | ||
745 | lcdc_clk_div = CLK_MAX_DIV; | ||
746 | } else if (pixclock > (*lcdc_clk_rate / CLK_MIN_DIV)) { | ||
747 | *lcdc_clk_rate = clk_round_rate(par->lcdc_clk, | ||
748 | pixclock * CLK_MIN_DIV); | ||
749 | lcdc_clk_div = CLK_MIN_DIV; | ||
750 | } else { | ||
751 | lcdc_clk_div = *lcdc_clk_rate / pixclock; | ||
752 | } | ||
753 | |||
754 | return lcdc_clk_div; | ||
755 | } | ||
756 | |||
757 | static int da8xx_fb_calc_config_clk_divider(struct da8xx_fb_par *par, | ||
758 | struct fb_videomode *mode) | ||
759 | { | ||
760 | unsigned lcdc_clk_rate; | ||
761 | unsigned lcdc_clk_div = da8xx_fb_calc_clk_divider(par, mode->pixclock, | ||
762 | &lcdc_clk_rate); | ||
763 | |||
764 | return da8xx_fb_config_clk_divider(par, lcdc_clk_div, lcdc_clk_rate); | ||
765 | } | ||
766 | |||
767 | static unsigned da8xx_fb_round_clk(struct da8xx_fb_par *par, | ||
768 | unsigned pixclock) | ||
769 | { | ||
770 | unsigned lcdc_clk_div, lcdc_clk_rate; | ||
771 | |||
772 | lcdc_clk_div = da8xx_fb_calc_clk_divider(par, pixclock, &lcdc_clk_rate); | ||
773 | return KHZ2PICOS(lcdc_clk_rate / (1000 * lcdc_clk_div)); | ||
716 | } | 774 | } |
717 | 775 | ||
718 | static int lcd_init(struct da8xx_fb_par *par, const struct lcd_ctrl_config *cfg, | 776 | static int lcd_init(struct da8xx_fb_par *par, const struct lcd_ctrl_config *cfg, |
@@ -721,10 +779,11 @@ static int lcd_init(struct da8xx_fb_par *par, const struct lcd_ctrl_config *cfg, | |||
721 | u32 bpp; | 779 | u32 bpp; |
722 | int ret = 0; | 780 | int ret = 0; |
723 | 781 | ||
724 | lcd_reset(par); | 782 | ret = da8xx_fb_calc_config_clk_divider(par, panel); |
725 | 783 | if (IS_ERR_VALUE(ret)) { | |
726 | /* Calculate the divider */ | 784 | dev_err(par->dev, "unable to configure clock\n"); |
727 | lcd_calc_clk_divider(par); | 785 | return ret; |
786 | } | ||
728 | 787 | ||
729 | if (panel->sync & FB_SYNC_CLK_INVERT) | 788 | if (panel->sync & FB_SYNC_CLK_INVERT) |
730 | lcdc_write((lcdc_read(LCD_RASTER_TIMING_2_REG) | | 789 | lcdc_write((lcdc_read(LCD_RASTER_TIMING_2_REG) | |
@@ -739,10 +798,10 @@ static int lcd_init(struct da8xx_fb_par *par, const struct lcd_ctrl_config *cfg, | |||
739 | return ret; | 798 | return ret; |
740 | 799 | ||
741 | /* Configure the vertical and horizontal sync properties. */ | 800 | /* Configure the vertical and horizontal sync properties. */ |
742 | lcd_cfg_vertical_sync(panel->lower_margin, panel->vsync_len, | 801 | lcd_cfg_vertical_sync(panel->upper_margin, panel->vsync_len, |
743 | panel->upper_margin); | 802 | panel->lower_margin); |
744 | lcd_cfg_horizontal_sync(panel->right_margin, panel->hsync_len, | 803 | lcd_cfg_horizontal_sync(panel->left_margin, panel->hsync_len, |
745 | panel->left_margin); | 804 | panel->right_margin); |
746 | 805 | ||
747 | /* Configure for disply */ | 806 | /* Configure for disply */ |
748 | ret = lcd_cfg_display(cfg, panel); | 807 | ret = lcd_cfg_display(cfg, panel); |
@@ -773,7 +832,7 @@ static irqreturn_t lcdc_irq_handler_rev02(int irq, void *arg) | |||
773 | u32 stat = lcdc_read(LCD_MASKED_STAT_REG); | 832 | u32 stat = lcdc_read(LCD_MASKED_STAT_REG); |
774 | 833 | ||
775 | if ((stat & LCD_SYNC_LOST) && (stat & LCD_FIFO_UNDERFLOW)) { | 834 | if ((stat & LCD_SYNC_LOST) && (stat & LCD_FIFO_UNDERFLOW)) { |
776 | lcd_disable_raster(false); | 835 | lcd_disable_raster(DA8XX_FRAME_NOWAIT); |
777 | lcdc_write(stat, LCD_MASKED_STAT_REG); | 836 | lcdc_write(stat, LCD_MASKED_STAT_REG); |
778 | lcd_enable_raster(); | 837 | lcd_enable_raster(); |
779 | } else if (stat & LCD_PL_LOAD_DONE) { | 838 | } else if (stat & LCD_PL_LOAD_DONE) { |
@@ -783,7 +842,7 @@ static irqreturn_t lcdc_irq_handler_rev02(int irq, void *arg) | |||
783 | * interrupt via the following write to the status register. If | 842 | * interrupt via the following write to the status register. If |
784 | * this is done after then one gets multiple PL done interrupts. | 843 | * this is done after then one gets multiple PL done interrupts. |
785 | */ | 844 | */ |
786 | lcd_disable_raster(false); | 845 | lcd_disable_raster(DA8XX_FRAME_NOWAIT); |
787 | 846 | ||
788 | lcdc_write(stat, LCD_MASKED_STAT_REG); | 847 | lcdc_write(stat, LCD_MASKED_STAT_REG); |
789 | 848 | ||
@@ -836,7 +895,7 @@ static irqreturn_t lcdc_irq_handler_rev01(int irq, void *arg) | |||
836 | u32 reg_ras; | 895 | u32 reg_ras; |
837 | 896 | ||
838 | if ((stat & LCD_SYNC_LOST) && (stat & LCD_FIFO_UNDERFLOW)) { | 897 | if ((stat & LCD_SYNC_LOST) && (stat & LCD_FIFO_UNDERFLOW)) { |
839 | lcd_disable_raster(false); | 898 | lcd_disable_raster(DA8XX_FRAME_NOWAIT); |
840 | lcdc_write(stat, LCD_STAT_REG); | 899 | lcdc_write(stat, LCD_STAT_REG); |
841 | lcd_enable_raster(); | 900 | lcd_enable_raster(); |
842 | } else if (stat & LCD_PL_LOAD_DONE) { | 901 | } else if (stat & LCD_PL_LOAD_DONE) { |
@@ -846,7 +905,7 @@ static irqreturn_t lcdc_irq_handler_rev01(int irq, void *arg) | |||
846 | * interrupt via the following write to the status register. If | 905 | * interrupt via the following write to the status register. If |
847 | * this is done after then one gets multiple PL done interrupts. | 906 | * this is done after then one gets multiple PL done interrupts. |
848 | */ | 907 | */ |
849 | lcd_disable_raster(false); | 908 | lcd_disable_raster(DA8XX_FRAME_NOWAIT); |
850 | 909 | ||
851 | lcdc_write(stat, LCD_STAT_REG); | 910 | lcdc_write(stat, LCD_STAT_REG); |
852 | 911 | ||
@@ -888,6 +947,9 @@ static int fb_check_var(struct fb_var_screeninfo *var, | |||
888 | struct fb_info *info) | 947 | struct fb_info *info) |
889 | { | 948 | { |
890 | int err = 0; | 949 | int err = 0; |
950 | struct da8xx_fb_par *par = info->par; | ||
951 | int bpp = var->bits_per_pixel >> 3; | ||
952 | unsigned long line_size = var->xres_virtual * bpp; | ||
891 | 953 | ||
892 | if (var->bits_per_pixel > 16 && lcd_revision == LCD_VERSION_1) | 954 | if (var->bits_per_pixel > 16 && lcd_revision == LCD_VERSION_1) |
893 | return -EINVAL; | 955 | return -EINVAL; |
@@ -955,6 +1017,23 @@ static int fb_check_var(struct fb_var_screeninfo *var, | |||
955 | var->green.msb_right = 0; | 1017 | var->green.msb_right = 0; |
956 | var->blue.msb_right = 0; | 1018 | var->blue.msb_right = 0; |
957 | var->transp.msb_right = 0; | 1019 | var->transp.msb_right = 0; |
1020 | |||
1021 | if (line_size * var->yres_virtual > par->vram_size) | ||
1022 | var->yres_virtual = par->vram_size / line_size; | ||
1023 | |||
1024 | if (var->yres > var->yres_virtual) | ||
1025 | var->yres = var->yres_virtual; | ||
1026 | |||
1027 | if (var->xres > var->xres_virtual) | ||
1028 | var->xres = var->xres_virtual; | ||
1029 | |||
1030 | if (var->xres + var->xoffset > var->xres_virtual) | ||
1031 | var->xoffset = var->xres_virtual - var->xres; | ||
1032 | if (var->yres + var->yoffset > var->yres_virtual) | ||
1033 | var->yoffset = var->yres_virtual - var->yres; | ||
1034 | |||
1035 | var->pixclock = da8xx_fb_round_clk(par, var->pixclock); | ||
1036 | |||
958 | return err; | 1037 | return err; |
959 | } | 1038 | } |
960 | 1039 | ||
@@ -966,10 +1045,10 @@ static int lcd_da8xx_cpufreq_transition(struct notifier_block *nb, | |||
966 | 1045 | ||
967 | par = container_of(nb, struct da8xx_fb_par, freq_transition); | 1046 | par = container_of(nb, struct da8xx_fb_par, freq_transition); |
968 | if (val == CPUFREQ_POSTCHANGE) { | 1047 | if (val == CPUFREQ_POSTCHANGE) { |
969 | if (par->lcd_fck_rate != clk_get_rate(par->lcdc_clk)) { | 1048 | if (par->lcdc_clk_rate != clk_get_rate(par->lcdc_clk)) { |
970 | par->lcd_fck_rate = clk_get_rate(par->lcdc_clk); | 1049 | par->lcdc_clk_rate = clk_get_rate(par->lcdc_clk); |
971 | lcd_disable_raster(true); | 1050 | lcd_disable_raster(DA8XX_FRAME_WAIT); |
972 | lcd_calc_clk_divider(par); | 1051 | da8xx_fb_calc_config_clk_divider(par, &par->mode); |
973 | if (par->blank == FB_BLANK_UNBLANK) | 1052 | if (par->blank == FB_BLANK_UNBLANK) |
974 | lcd_enable_raster(); | 1053 | lcd_enable_raster(); |
975 | } | 1054 | } |
@@ -978,7 +1057,7 @@ static int lcd_da8xx_cpufreq_transition(struct notifier_block *nb, | |||
978 | return 0; | 1057 | return 0; |
979 | } | 1058 | } |
980 | 1059 | ||
981 | static inline int lcd_da8xx_cpufreq_register(struct da8xx_fb_par *par) | 1060 | static int lcd_da8xx_cpufreq_register(struct da8xx_fb_par *par) |
982 | { | 1061 | { |
983 | par->freq_transition.notifier_call = lcd_da8xx_cpufreq_transition; | 1062 | par->freq_transition.notifier_call = lcd_da8xx_cpufreq_transition; |
984 | 1063 | ||
@@ -986,7 +1065,7 @@ static inline int lcd_da8xx_cpufreq_register(struct da8xx_fb_par *par) | |||
986 | CPUFREQ_TRANSITION_NOTIFIER); | 1065 | CPUFREQ_TRANSITION_NOTIFIER); |
987 | } | 1066 | } |
988 | 1067 | ||
989 | static inline void lcd_da8xx_cpufreq_deregister(struct da8xx_fb_par *par) | 1068 | static void lcd_da8xx_cpufreq_deregister(struct da8xx_fb_par *par) |
990 | { | 1069 | { |
991 | cpufreq_unregister_notifier(&par->freq_transition, | 1070 | cpufreq_unregister_notifier(&par->freq_transition, |
992 | CPUFREQ_TRANSITION_NOTIFIER); | 1071 | CPUFREQ_TRANSITION_NOTIFIER); |
@@ -1006,7 +1085,7 @@ static int fb_remove(struct platform_device *dev) | |||
1006 | if (par->panel_power_ctrl) | 1085 | if (par->panel_power_ctrl) |
1007 | par->panel_power_ctrl(0); | 1086 | par->panel_power_ctrl(0); |
1008 | 1087 | ||
1009 | lcd_disable_raster(true); | 1088 | lcd_disable_raster(DA8XX_FRAME_WAIT); |
1010 | lcdc_write(0, LCD_RASTER_CTRL_REG); | 1089 | lcdc_write(0, LCD_RASTER_CTRL_REG); |
1011 | 1090 | ||
1012 | /* disable DMA */ | 1091 | /* disable DMA */ |
@@ -1018,12 +1097,9 @@ static int fb_remove(struct platform_device *dev) | |||
1018 | par->p_palette_base); | 1097 | par->p_palette_base); |
1019 | dma_free_coherent(NULL, par->vram_size, par->vram_virt, | 1098 | dma_free_coherent(NULL, par->vram_size, par->vram_virt, |
1020 | par->vram_phys); | 1099 | par->vram_phys); |
1021 | free_irq(par->irq, par); | ||
1022 | pm_runtime_put_sync(&dev->dev); | 1100 | pm_runtime_put_sync(&dev->dev); |
1023 | pm_runtime_disable(&dev->dev); | 1101 | pm_runtime_disable(&dev->dev); |
1024 | framebuffer_release(info); | 1102 | framebuffer_release(info); |
1025 | iounmap(da8xx_fb_reg_base); | ||
1026 | release_mem_region(lcdc_regs->start, resource_size(lcdc_regs)); | ||
1027 | 1103 | ||
1028 | } | 1104 | } |
1029 | return 0; | 1105 | return 0; |
@@ -1122,7 +1198,7 @@ static int cfb_blank(int blank, struct fb_info *info) | |||
1122 | if (par->panel_power_ctrl) | 1198 | if (par->panel_power_ctrl) |
1123 | par->panel_power_ctrl(0); | 1199 | par->panel_power_ctrl(0); |
1124 | 1200 | ||
1125 | lcd_disable_raster(true); | 1201 | lcd_disable_raster(DA8XX_FRAME_WAIT); |
1126 | break; | 1202 | break; |
1127 | default: | 1203 | default: |
1128 | ret = -EINVAL; | 1204 | ret = -EINVAL; |
@@ -1183,9 +1259,50 @@ static int da8xx_pan_display(struct fb_var_screeninfo *var, | |||
1183 | return ret; | 1259 | return ret; |
1184 | } | 1260 | } |
1185 | 1261 | ||
1262 | static int da8xxfb_set_par(struct fb_info *info) | ||
1263 | { | ||
1264 | struct da8xx_fb_par *par = info->par; | ||
1265 | int ret; | ||
1266 | bool raster = da8xx_fb_is_raster_enabled(); | ||
1267 | |||
1268 | if (raster) | ||
1269 | lcd_disable_raster(DA8XX_FRAME_WAIT); | ||
1270 | |||
1271 | fb_var_to_videomode(&par->mode, &info->var); | ||
1272 | |||
1273 | par->cfg.bpp = info->var.bits_per_pixel; | ||
1274 | |||
1275 | info->fix.visual = (par->cfg.bpp <= 8) ? | ||
1276 | FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_TRUECOLOR; | ||
1277 | info->fix.line_length = (par->mode.xres * par->cfg.bpp) / 8; | ||
1278 | |||
1279 | ret = lcd_init(par, &par->cfg, &par->mode); | ||
1280 | if (ret < 0) { | ||
1281 | dev_err(par->dev, "lcd init failed\n"); | ||
1282 | return ret; | ||
1283 | } | ||
1284 | |||
1285 | par->dma_start = info->fix.smem_start + | ||
1286 | info->var.yoffset * info->fix.line_length + | ||
1287 | info->var.xoffset * info->var.bits_per_pixel / 8; | ||
1288 | par->dma_end = par->dma_start + | ||
1289 | info->var.yres * info->fix.line_length - 1; | ||
1290 | |||
1291 | lcdc_write(par->dma_start, LCD_DMA_FRM_BUF_BASE_ADDR_0_REG); | ||
1292 | lcdc_write(par->dma_end, LCD_DMA_FRM_BUF_CEILING_ADDR_0_REG); | ||
1293 | lcdc_write(par->dma_start, LCD_DMA_FRM_BUF_BASE_ADDR_1_REG); | ||
1294 | lcdc_write(par->dma_end, LCD_DMA_FRM_BUF_CEILING_ADDR_1_REG); | ||
1295 | |||
1296 | if (raster) | ||
1297 | lcd_enable_raster(); | ||
1298 | |||
1299 | return 0; | ||
1300 | } | ||
1301 | |||
1186 | static struct fb_ops da8xx_fb_ops = { | 1302 | static struct fb_ops da8xx_fb_ops = { |
1187 | .owner = THIS_MODULE, | 1303 | .owner = THIS_MODULE, |
1188 | .fb_check_var = fb_check_var, | 1304 | .fb_check_var = fb_check_var, |
1305 | .fb_set_par = da8xxfb_set_par, | ||
1189 | .fb_setcolreg = fb_setcolreg, | 1306 | .fb_setcolreg = fb_setcolreg, |
1190 | .fb_pan_display = da8xx_pan_display, | 1307 | .fb_pan_display = da8xx_pan_display, |
1191 | .fb_ioctl = fb_ioctl, | 1308 | .fb_ioctl = fb_ioctl, |
@@ -1195,33 +1312,38 @@ static struct fb_ops da8xx_fb_ops = { | |||
1195 | .fb_blank = cfb_blank, | 1312 | .fb_blank = cfb_blank, |
1196 | }; | 1313 | }; |
1197 | 1314 | ||
1198 | /* Calculate and return pixel clock period in pico seconds */ | 1315 | static struct fb_videomode *da8xx_fb_get_videomode(struct platform_device *dev) |
1199 | static unsigned int da8xxfb_pixel_clk_period(struct da8xx_fb_par *par) | ||
1200 | { | 1316 | { |
1201 | unsigned int lcd_clk, div; | 1317 | struct da8xx_lcdc_platform_data *fb_pdata = dev->dev.platform_data; |
1202 | unsigned int configured_pix_clk; | 1318 | struct fb_videomode *lcdc_info; |
1203 | unsigned long long pix_clk_period_picosec = 1000000000000ULL; | 1319 | int i; |
1204 | 1320 | ||
1205 | lcd_clk = clk_get_rate(par->lcdc_clk); | 1321 | for (i = 0, lcdc_info = known_lcd_panels; |
1206 | div = lcd_clk / par->pxl_clk; | 1322 | i < ARRAY_SIZE(known_lcd_panels); i++, lcdc_info++) { |
1207 | configured_pix_clk = (lcd_clk / div); | 1323 | if (strcmp(fb_pdata->type, lcdc_info->name) == 0) |
1324 | break; | ||
1325 | } | ||
1208 | 1326 | ||
1209 | do_div(pix_clk_period_picosec, configured_pix_clk); | 1327 | if (i == ARRAY_SIZE(known_lcd_panels)) { |
1328 | dev_err(&dev->dev, "no panel found\n"); | ||
1329 | return NULL; | ||
1330 | } | ||
1331 | dev_info(&dev->dev, "found %s panel\n", lcdc_info->name); | ||
1210 | 1332 | ||
1211 | return pix_clk_period_picosec; | 1333 | return lcdc_info; |
1212 | } | 1334 | } |
1213 | 1335 | ||
1214 | static int fb_probe(struct platform_device *device) | 1336 | static int fb_probe(struct platform_device *device) |
1215 | { | 1337 | { |
1216 | struct da8xx_lcdc_platform_data *fb_pdata = | 1338 | struct da8xx_lcdc_platform_data *fb_pdata = |
1217 | device->dev.platform_data; | 1339 | device->dev.platform_data; |
1340 | static struct resource *lcdc_regs; | ||
1218 | struct lcd_ctrl_config *lcd_cfg; | 1341 | struct lcd_ctrl_config *lcd_cfg; |
1219 | struct fb_videomode *lcdc_info; | 1342 | struct fb_videomode *lcdc_info; |
1220 | struct fb_info *da8xx_fb_info; | 1343 | struct fb_info *da8xx_fb_info; |
1221 | struct clk *fb_clk = NULL; | ||
1222 | struct da8xx_fb_par *par; | 1344 | struct da8xx_fb_par *par; |
1223 | resource_size_t len; | 1345 | struct clk *tmp_lcdc_clk; |
1224 | int ret, i; | 1346 | int ret; |
1225 | unsigned long ulcm; | 1347 | unsigned long ulcm; |
1226 | 1348 | ||
1227 | if (fb_pdata == NULL) { | 1349 | if (fb_pdata == NULL) { |
@@ -1229,30 +1351,19 @@ static int fb_probe(struct platform_device *device) | |||
1229 | return -ENOENT; | 1351 | return -ENOENT; |
1230 | } | 1352 | } |
1231 | 1353 | ||
1232 | lcdc_regs = platform_get_resource(device, IORESOURCE_MEM, 0); | 1354 | lcdc_info = da8xx_fb_get_videomode(device); |
1233 | if (!lcdc_regs) { | 1355 | if (lcdc_info == NULL) |
1234 | dev_err(&device->dev, | 1356 | return -ENODEV; |
1235 | "Can not get memory resource for LCD controller\n"); | ||
1236 | return -ENOENT; | ||
1237 | } | ||
1238 | |||
1239 | len = resource_size(lcdc_regs); | ||
1240 | 1357 | ||
1241 | lcdc_regs = request_mem_region(lcdc_regs->start, len, lcdc_regs->name); | 1358 | lcdc_regs = platform_get_resource(device, IORESOURCE_MEM, 0); |
1242 | if (!lcdc_regs) | 1359 | da8xx_fb_reg_base = devm_ioremap_resource(&device->dev, lcdc_regs); |
1243 | return -EBUSY; | 1360 | if (IS_ERR(da8xx_fb_reg_base)) |
1244 | 1361 | return PTR_ERR(da8xx_fb_reg_base); | |
1245 | da8xx_fb_reg_base = ioremap(lcdc_regs->start, len); | ||
1246 | if (!da8xx_fb_reg_base) { | ||
1247 | ret = -EBUSY; | ||
1248 | goto err_request_mem; | ||
1249 | } | ||
1250 | 1362 | ||
1251 | fb_clk = clk_get(&device->dev, "fck"); | 1363 | tmp_lcdc_clk = devm_clk_get(&device->dev, "fck"); |
1252 | if (IS_ERR(fb_clk)) { | 1364 | if (IS_ERR(tmp_lcdc_clk)) { |
1253 | dev_err(&device->dev, "Can not get device clock\n"); | 1365 | dev_err(&device->dev, "Can not get device clock\n"); |
1254 | ret = -ENODEV; | 1366 | return PTR_ERR(tmp_lcdc_clk); |
1255 | goto err_ioremap; | ||
1256 | } | 1367 | } |
1257 | 1368 | ||
1258 | pm_runtime_enable(&device->dev); | 1369 | pm_runtime_enable(&device->dev); |
@@ -1275,22 +1386,12 @@ static int fb_probe(struct platform_device *device) | |||
1275 | break; | 1386 | break; |
1276 | } | 1387 | } |
1277 | 1388 | ||
1278 | for (i = 0, lcdc_info = known_lcd_panels; | 1389 | lcd_cfg = (struct lcd_ctrl_config *)fb_pdata->controller_data; |
1279 | i < ARRAY_SIZE(known_lcd_panels); | ||
1280 | i++, lcdc_info++) { | ||
1281 | if (strcmp(fb_pdata->type, lcdc_info->name) == 0) | ||
1282 | break; | ||
1283 | } | ||
1284 | 1390 | ||
1285 | if (i == ARRAY_SIZE(known_lcd_panels)) { | 1391 | if (!lcd_cfg) { |
1286 | dev_err(&device->dev, "GLCD: No valid panel found\n"); | 1392 | ret = -EINVAL; |
1287 | ret = -ENODEV; | ||
1288 | goto err_pm_runtime_disable; | 1393 | goto err_pm_runtime_disable; |
1289 | } else | 1394 | } |
1290 | dev_info(&device->dev, "GLCD: Found %s panel\n", | ||
1291 | fb_pdata->type); | ||
1292 | |||
1293 | lcd_cfg = (struct lcd_ctrl_config *)fb_pdata->controller_data; | ||
1294 | 1395 | ||
1295 | da8xx_fb_info = framebuffer_alloc(sizeof(struct da8xx_fb_par), | 1396 | da8xx_fb_info = framebuffer_alloc(sizeof(struct da8xx_fb_par), |
1296 | &device->dev); | 1397 | &device->dev); |
@@ -1301,21 +1402,18 @@ static int fb_probe(struct platform_device *device) | |||
1301 | } | 1402 | } |
1302 | 1403 | ||
1303 | par = da8xx_fb_info->par; | 1404 | par = da8xx_fb_info->par; |
1304 | par->lcdc_clk = fb_clk; | 1405 | par->dev = &device->dev; |
1305 | #ifdef CONFIG_CPU_FREQ | 1406 | par->lcdc_clk = tmp_lcdc_clk; |
1306 | par->lcd_fck_rate = clk_get_rate(fb_clk); | 1407 | par->lcdc_clk_rate = clk_get_rate(par->lcdc_clk); |
1307 | #endif | ||
1308 | par->pxl_clk = lcdc_info->pixclock; | ||
1309 | if (fb_pdata->panel_power_ctrl) { | 1408 | if (fb_pdata->panel_power_ctrl) { |
1310 | par->panel_power_ctrl = fb_pdata->panel_power_ctrl; | 1409 | par->panel_power_ctrl = fb_pdata->panel_power_ctrl; |
1311 | par->panel_power_ctrl(1); | 1410 | par->panel_power_ctrl(1); |
1312 | } | 1411 | } |
1313 | 1412 | ||
1314 | if (lcd_init(par, lcd_cfg, lcdc_info) < 0) { | 1413 | fb_videomode_to_var(&da8xx_fb_var, lcdc_info); |
1315 | dev_err(&device->dev, "lcd_init failed\n"); | 1414 | par->cfg = *lcd_cfg; |
1316 | ret = -EFAULT; | 1415 | |
1317 | goto err_release_fb; | 1416 | da8xx_fb_lcd_reset(); |
1318 | } | ||
1319 | 1417 | ||
1320 | /* allocate frame buffer */ | 1418 | /* allocate frame buffer */ |
1321 | par->vram_size = lcdc_info->xres * lcdc_info->yres * lcd_cfg->bpp; | 1419 | par->vram_size = lcdc_info->xres * lcdc_info->yres * lcd_cfg->bpp; |
@@ -1363,27 +1461,10 @@ static int fb_probe(struct platform_device *device) | |||
1363 | goto err_release_pl_mem; | 1461 | goto err_release_pl_mem; |
1364 | } | 1462 | } |
1365 | 1463 | ||
1366 | /* Initialize par */ | ||
1367 | da8xx_fb_info->var.bits_per_pixel = lcd_cfg->bpp; | ||
1368 | |||
1369 | da8xx_fb_var.xres = lcdc_info->xres; | ||
1370 | da8xx_fb_var.xres_virtual = lcdc_info->xres; | ||
1371 | |||
1372 | da8xx_fb_var.yres = lcdc_info->yres; | ||
1373 | da8xx_fb_var.yres_virtual = lcdc_info->yres * LCD_NUM_BUFFERS; | ||
1374 | |||
1375 | da8xx_fb_var.grayscale = | 1464 | da8xx_fb_var.grayscale = |
1376 | lcd_cfg->panel_shade == MONOCHROME ? 1 : 0; | 1465 | lcd_cfg->panel_shade == MONOCHROME ? 1 : 0; |
1377 | da8xx_fb_var.bits_per_pixel = lcd_cfg->bpp; | 1466 | da8xx_fb_var.bits_per_pixel = lcd_cfg->bpp; |
1378 | 1467 | ||
1379 | da8xx_fb_var.hsync_len = lcdc_info->hsync_len; | ||
1380 | da8xx_fb_var.vsync_len = lcdc_info->vsync_len; | ||
1381 | da8xx_fb_var.right_margin = lcdc_info->right_margin; | ||
1382 | da8xx_fb_var.left_margin = lcdc_info->left_margin; | ||
1383 | da8xx_fb_var.lower_margin = lcdc_info->lower_margin; | ||
1384 | da8xx_fb_var.upper_margin = lcdc_info->upper_margin; | ||
1385 | da8xx_fb_var.pixclock = da8xxfb_pixel_clk_period(par); | ||
1386 | |||
1387 | /* Initialize fbinfo */ | 1468 | /* Initialize fbinfo */ |
1388 | da8xx_fb_info->flags = FBINFO_FLAG_DEFAULT; | 1469 | da8xx_fb_info->flags = FBINFO_FLAG_DEFAULT; |
1389 | da8xx_fb_info->fix = da8xx_fb_fix; | 1470 | da8xx_fb_info->fix = da8xx_fb_fix; |
@@ -1433,8 +1514,8 @@ static int fb_probe(struct platform_device *device) | |||
1433 | lcdc_irq_handler = lcdc_irq_handler_rev02; | 1514 | lcdc_irq_handler = lcdc_irq_handler_rev02; |
1434 | } | 1515 | } |
1435 | 1516 | ||
1436 | ret = request_irq(par->irq, lcdc_irq_handler, 0, | 1517 | ret = devm_request_irq(&device->dev, par->irq, lcdc_irq_handler, 0, |
1437 | DRIVER_NAME, par); | 1518 | DRIVER_NAME, par); |
1438 | if (ret) | 1519 | if (ret) |
1439 | goto irq_freq; | 1520 | goto irq_freq; |
1440 | return 0; | 1521 | return 0; |
@@ -1463,12 +1544,6 @@ err_pm_runtime_disable: | |||
1463 | pm_runtime_put_sync(&device->dev); | 1544 | pm_runtime_put_sync(&device->dev); |
1464 | pm_runtime_disable(&device->dev); | 1545 | pm_runtime_disable(&device->dev); |
1465 | 1546 | ||
1466 | err_ioremap: | ||
1467 | iounmap(da8xx_fb_reg_base); | ||
1468 | |||
1469 | err_request_mem: | ||
1470 | release_mem_region(lcdc_regs->start, len); | ||
1471 | |||
1472 | return ret; | 1547 | return ret; |
1473 | } | 1548 | } |
1474 | 1549 | ||
@@ -1546,7 +1621,7 @@ static int fb_suspend(struct platform_device *dev, pm_message_t state) | |||
1546 | par->panel_power_ctrl(0); | 1621 | par->panel_power_ctrl(0); |
1547 | 1622 | ||
1548 | fb_set_suspend(info, 1); | 1623 | fb_set_suspend(info, 1); |
1549 | lcd_disable_raster(true); | 1624 | lcd_disable_raster(DA8XX_FRAME_WAIT); |
1550 | lcd_context_save(); | 1625 | lcd_context_save(); |
1551 | pm_runtime_put_sync(&dev->dev); | 1626 | pm_runtime_put_sync(&dev->dev); |
1552 | console_unlock(); | 1627 | console_unlock(); |
diff --git a/drivers/video/efifb.c b/drivers/video/efifb.c index 2a8286ef2645..7f9ff75d0db2 100644 --- a/drivers/video/efifb.c +++ b/drivers/video/efifb.c | |||
@@ -72,6 +72,7 @@ static void efifb_destroy(struct fb_info *info) | |||
72 | if (request_mem_succeeded) | 72 | if (request_mem_succeeded) |
73 | release_mem_region(info->apertures->ranges[0].base, | 73 | release_mem_region(info->apertures->ranges[0].base, |
74 | info->apertures->ranges[0].size); | 74 | info->apertures->ranges[0].size); |
75 | fb_dealloc_cmap(&info->cmap); | ||
75 | framebuffer_release(info); | 76 | framebuffer_release(info); |
76 | } | 77 | } |
77 | 78 | ||
diff --git a/drivers/video/exynos/exynos_mipi_dsi_lowlevel.c b/drivers/video/exynos/exynos_mipi_dsi_lowlevel.c index 15c5abd408dc..c148d06540c1 100644 --- a/drivers/video/exynos/exynos_mipi_dsi_lowlevel.c +++ b/drivers/video/exynos/exynos_mipi_dsi_lowlevel.c | |||
@@ -27,6 +27,7 @@ | |||
27 | #include <video/exynos_mipi_dsim.h> | 27 | #include <video/exynos_mipi_dsim.h> |
28 | 28 | ||
29 | #include "exynos_mipi_dsi_regs.h" | 29 | #include "exynos_mipi_dsi_regs.h" |
30 | #include "exynos_mipi_dsi_lowlevel.h" | ||
30 | 31 | ||
31 | void exynos_mipi_dsi_func_reset(struct mipi_dsim_device *dsim) | 32 | void exynos_mipi_dsi_func_reset(struct mipi_dsim_device *dsim) |
32 | { | 33 | { |
diff --git a/drivers/video/fbcmap.c b/drivers/video/fbcmap.c index 5c3960da755a..f89245b8ba8e 100644 --- a/drivers/video/fbcmap.c +++ b/drivers/video/fbcmap.c | |||
@@ -285,13 +285,8 @@ int fb_set_user_cmap(struct fb_cmap_user *cmap, struct fb_info *info) | |||
285 | rc = -ENODEV; | 285 | rc = -ENODEV; |
286 | goto out; | 286 | goto out; |
287 | } | 287 | } |
288 | if (cmap->start < 0 || (!info->fbops->fb_setcolreg && | 288 | |
289 | !info->fbops->fb_setcmap)) { | ||
290 | rc = -EINVAL; | ||
291 | goto out1; | ||
292 | } | ||
293 | rc = fb_set_cmap(&umap, info); | 289 | rc = fb_set_cmap(&umap, info); |
294 | out1: | ||
295 | unlock_fb_info(info); | 290 | unlock_fb_info(info); |
296 | out: | 291 | out: |
297 | fb_dealloc_cmap(&umap); | 292 | fb_dealloc_cmap(&umap); |
diff --git a/drivers/video/fbmem.c b/drivers/video/fbmem.c index 36e1fe21b9b5..dacaf74256a3 100644 --- a/drivers/video/fbmem.c +++ b/drivers/video/fbmem.c | |||
@@ -43,8 +43,12 @@ | |||
43 | #define FBPIXMAPSIZE (1024 * 8) | 43 | #define FBPIXMAPSIZE (1024 * 8) |
44 | 44 | ||
45 | static DEFINE_MUTEX(registration_lock); | 45 | static DEFINE_MUTEX(registration_lock); |
46 | |||
46 | struct fb_info *registered_fb[FB_MAX] __read_mostly; | 47 | struct fb_info *registered_fb[FB_MAX] __read_mostly; |
48 | EXPORT_SYMBOL(registered_fb); | ||
49 | |||
47 | int num_registered_fb __read_mostly; | 50 | int num_registered_fb __read_mostly; |
51 | EXPORT_SYMBOL(num_registered_fb); | ||
48 | 52 | ||
49 | static struct fb_info *get_fb_info(unsigned int idx) | 53 | static struct fb_info *get_fb_info(unsigned int idx) |
50 | { | 54 | { |
@@ -182,6 +186,7 @@ char* fb_get_buffer_offset(struct fb_info *info, struct fb_pixmap *buf, u32 size | |||
182 | 186 | ||
183 | return addr; | 187 | return addr; |
184 | } | 188 | } |
189 | EXPORT_SYMBOL(fb_get_buffer_offset); | ||
185 | 190 | ||
186 | #ifdef CONFIG_LOGO | 191 | #ifdef CONFIG_LOGO |
187 | 192 | ||
@@ -669,6 +674,7 @@ int fb_show_logo(struct fb_info *info, int rotate) | |||
669 | int fb_prepare_logo(struct fb_info *info, int rotate) { return 0; } | 674 | int fb_prepare_logo(struct fb_info *info, int rotate) { return 0; } |
670 | int fb_show_logo(struct fb_info *info, int rotate) { return 0; } | 675 | int fb_show_logo(struct fb_info *info, int rotate) { return 0; } |
671 | #endif /* CONFIG_LOGO */ | 676 | #endif /* CONFIG_LOGO */ |
677 | EXPORT_SYMBOL(fb_show_logo); | ||
672 | 678 | ||
673 | static void *fb_seq_start(struct seq_file *m, loff_t *pos) | 679 | static void *fb_seq_start(struct seq_file *m, loff_t *pos) |
674 | { | 680 | { |
@@ -909,6 +915,7 @@ fb_pan_display(struct fb_info *info, struct fb_var_screeninfo *var) | |||
909 | info->var.vmode &= ~FB_VMODE_YWRAP; | 915 | info->var.vmode &= ~FB_VMODE_YWRAP; |
910 | return 0; | 916 | return 0; |
911 | } | 917 | } |
918 | EXPORT_SYMBOL(fb_pan_display); | ||
912 | 919 | ||
913 | static int fb_check_caps(struct fb_info *info, struct fb_var_screeninfo *var, | 920 | static int fb_check_caps(struct fb_info *info, struct fb_var_screeninfo *var, |
914 | u32 activate) | 921 | u32 activate) |
@@ -1042,6 +1049,7 @@ fb_set_var(struct fb_info *info, struct fb_var_screeninfo *var) | |||
1042 | done: | 1049 | done: |
1043 | return ret; | 1050 | return ret; |
1044 | } | 1051 | } |
1052 | EXPORT_SYMBOL(fb_set_var); | ||
1045 | 1053 | ||
1046 | int | 1054 | int |
1047 | fb_blank(struct fb_info *info, int blank) | 1055 | fb_blank(struct fb_info *info, int blank) |
@@ -1073,6 +1081,7 @@ fb_blank(struct fb_info *info, int blank) | |||
1073 | 1081 | ||
1074 | return ret; | 1082 | return ret; |
1075 | } | 1083 | } |
1084 | EXPORT_SYMBOL(fb_blank); | ||
1076 | 1085 | ||
1077 | static long do_fb_ioctl(struct fb_info *info, unsigned int cmd, | 1086 | static long do_fb_ioctl(struct fb_info *info, unsigned int cmd, |
1078 | unsigned long arg) | 1087 | unsigned long arg) |
@@ -1745,6 +1754,7 @@ register_framebuffer(struct fb_info *fb_info) | |||
1745 | 1754 | ||
1746 | return ret; | 1755 | return ret; |
1747 | } | 1756 | } |
1757 | EXPORT_SYMBOL(register_framebuffer); | ||
1748 | 1758 | ||
1749 | /** | 1759 | /** |
1750 | * unregister_framebuffer - releases a frame buffer device | 1760 | * unregister_framebuffer - releases a frame buffer device |
@@ -1773,6 +1783,7 @@ unregister_framebuffer(struct fb_info *fb_info) | |||
1773 | 1783 | ||
1774 | return ret; | 1784 | return ret; |
1775 | } | 1785 | } |
1786 | EXPORT_SYMBOL(unregister_framebuffer); | ||
1776 | 1787 | ||
1777 | /** | 1788 | /** |
1778 | * fb_set_suspend - low level driver signals suspend | 1789 | * fb_set_suspend - low level driver signals suspend |
@@ -1796,6 +1807,7 @@ void fb_set_suspend(struct fb_info *info, int state) | |||
1796 | fb_notifier_call_chain(FB_EVENT_RESUME, &event); | 1807 | fb_notifier_call_chain(FB_EVENT_RESUME, &event); |
1797 | } | 1808 | } |
1798 | } | 1809 | } |
1810 | EXPORT_SYMBOL(fb_set_suspend); | ||
1799 | 1811 | ||
1800 | /** | 1812 | /** |
1801 | * fbmem_init - init frame buffer subsystem | 1813 | * fbmem_init - init frame buffer subsystem |
@@ -1912,6 +1924,7 @@ int fb_get_options(const char *name, char **option) | |||
1912 | 1924 | ||
1913 | return retval; | 1925 | return retval; |
1914 | } | 1926 | } |
1927 | EXPORT_SYMBOL(fb_get_options); | ||
1915 | 1928 | ||
1916 | #ifndef MODULE | 1929 | #ifndef MODULE |
1917 | /** | 1930 | /** |
@@ -1959,20 +1972,4 @@ static int __init video_setup(char *options) | |||
1959 | __setup("video=", video_setup); | 1972 | __setup("video=", video_setup); |
1960 | #endif | 1973 | #endif |
1961 | 1974 | ||
1962 | /* | ||
1963 | * Visible symbols for modules | ||
1964 | */ | ||
1965 | |||
1966 | EXPORT_SYMBOL(register_framebuffer); | ||
1967 | EXPORT_SYMBOL(unregister_framebuffer); | ||
1968 | EXPORT_SYMBOL(num_registered_fb); | ||
1969 | EXPORT_SYMBOL(registered_fb); | ||
1970 | EXPORT_SYMBOL(fb_show_logo); | ||
1971 | EXPORT_SYMBOL(fb_set_var); | ||
1972 | EXPORT_SYMBOL(fb_blank); | ||
1973 | EXPORT_SYMBOL(fb_pan_display); | ||
1974 | EXPORT_SYMBOL(fb_get_buffer_offset); | ||
1975 | EXPORT_SYMBOL(fb_set_suspend); | ||
1976 | EXPORT_SYMBOL(fb_get_options); | ||
1977 | |||
1978 | MODULE_LICENSE("GPL"); | 1975 | MODULE_LICENSE("GPL"); |
diff --git a/drivers/video/matrox/matroxfb_base.c b/drivers/video/matrox/matroxfb_base.c index 401a56e250bd..245652911650 100644 --- a/drivers/video/matrox/matroxfb_base.c +++ b/drivers/video/matrox/matroxfb_base.c | |||
@@ -2029,10 +2029,9 @@ static int matroxfb_probe(struct pci_dev* pdev, const struct pci_device_id* dumm | |||
2029 | return -1; | 2029 | return -1; |
2030 | } | 2030 | } |
2031 | 2031 | ||
2032 | minfo = kmalloc(sizeof(*minfo), GFP_KERNEL); | 2032 | minfo = kzalloc(sizeof(*minfo), GFP_KERNEL); |
2033 | if (!minfo) | 2033 | if (!minfo) |
2034 | return -1; | 2034 | return -1; |
2035 | memset(minfo, 0, sizeof(*minfo)); | ||
2036 | 2035 | ||
2037 | minfo->pcidev = pdev; | 2036 | minfo->pcidev = pdev; |
2038 | minfo->dead = 0; | 2037 | minfo->dead = 0; |
diff --git a/drivers/video/mxsfb.c b/drivers/video/mxsfb.c index dc09ebe4aba5..d250ed0f806d 100644 --- a/drivers/video/mxsfb.c +++ b/drivers/video/mxsfb.c | |||
@@ -46,7 +46,6 @@ | |||
46 | #include <linux/clk.h> | 46 | #include <linux/clk.h> |
47 | #include <linux/dma-mapping.h> | 47 | #include <linux/dma-mapping.h> |
48 | #include <linux/io.h> | 48 | #include <linux/io.h> |
49 | #include <linux/pinctrl/consumer.h> | ||
50 | #include <linux/fb.h> | 49 | #include <linux/fb.h> |
51 | #include <linux/regulator/consumer.h> | 50 | #include <linux/regulator/consumer.h> |
52 | #include <video/of_display_timing.h> | 51 | #include <video/of_display_timing.h> |
@@ -851,18 +850,11 @@ static int mxsfb_probe(struct platform_device *pdev) | |||
851 | struct mxsfb_info *host; | 850 | struct mxsfb_info *host; |
852 | struct fb_info *fb_info; | 851 | struct fb_info *fb_info; |
853 | struct fb_modelist *modelist; | 852 | struct fb_modelist *modelist; |
854 | struct pinctrl *pinctrl; | ||
855 | int ret; | 853 | int ret; |
856 | 854 | ||
857 | if (of_id) | 855 | if (of_id) |
858 | pdev->id_entry = of_id->data; | 856 | pdev->id_entry = of_id->data; |
859 | 857 | ||
860 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
861 | if (!res) { | ||
862 | dev_err(&pdev->dev, "Cannot get memory IO resource\n"); | ||
863 | return -ENODEV; | ||
864 | } | ||
865 | |||
866 | fb_info = framebuffer_alloc(sizeof(struct mxsfb_info), &pdev->dev); | 858 | fb_info = framebuffer_alloc(sizeof(struct mxsfb_info), &pdev->dev); |
867 | if (!fb_info) { | 859 | if (!fb_info) { |
868 | dev_err(&pdev->dev, "Failed to allocate fbdev\n"); | 860 | dev_err(&pdev->dev, "Failed to allocate fbdev\n"); |
@@ -871,6 +863,7 @@ static int mxsfb_probe(struct platform_device *pdev) | |||
871 | 863 | ||
872 | host = to_imxfb_host(fb_info); | 864 | host = to_imxfb_host(fb_info); |
873 | 865 | ||
866 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
874 | host->base = devm_ioremap_resource(&pdev->dev, res); | 867 | host->base = devm_ioremap_resource(&pdev->dev, res); |
875 | if (IS_ERR(host->base)) { | 868 | if (IS_ERR(host->base)) { |
876 | ret = PTR_ERR(host->base); | 869 | ret = PTR_ERR(host->base); |
@@ -882,12 +875,6 @@ static int mxsfb_probe(struct platform_device *pdev) | |||
882 | 875 | ||
883 | host->devdata = &mxsfb_devdata[pdev->id_entry->driver_data]; | 876 | host->devdata = &mxsfb_devdata[pdev->id_entry->driver_data]; |
884 | 877 | ||
885 | pinctrl = devm_pinctrl_get_select_default(&pdev->dev); | ||
886 | if (IS_ERR(pinctrl)) { | ||
887 | ret = PTR_ERR(pinctrl); | ||
888 | goto fb_release; | ||
889 | } | ||
890 | |||
891 | host->clk = devm_clk_get(&host->pdev->dev, NULL); | 878 | host->clk = devm_clk_get(&host->pdev->dev, NULL); |
892 | if (IS_ERR(host->clk)) { | 879 | if (IS_ERR(host->clk)) { |
893 | ret = PTR_ERR(host->clk); | 880 | ret = PTR_ERR(host->clk); |
diff --git a/drivers/video/omap2/dss/hdmi.c b/drivers/video/omap2/dss/hdmi.c index 75f3c740ef8c..82a964074993 100644 --- a/drivers/video/omap2/dss/hdmi.c +++ b/drivers/video/omap2/dss/hdmi.c | |||
@@ -612,10 +612,11 @@ static void hdmi_display_set_timing(struct omap_dss_device *dssdev, | |||
612 | hdmi.ip_data.cfg.cm = cm; | 612 | hdmi.ip_data.cfg.cm = cm; |
613 | 613 | ||
614 | t = hdmi_get_timings(); | 614 | t = hdmi_get_timings(); |
615 | if (t != NULL) | 615 | if (t != NULL) { |
616 | hdmi.ip_data.cfg = *t; | 616 | hdmi.ip_data.cfg = *t; |
617 | 617 | ||
618 | dispc_set_tv_pclk(t->timings.pixel_clock * 1000); | 618 | dispc_set_tv_pclk(t->timings.pixel_clock * 1000); |
619 | } | ||
619 | 620 | ||
620 | mutex_unlock(&hdmi.lock); | 621 | mutex_unlock(&hdmi.lock); |
621 | } | 622 | } |
diff --git a/drivers/video/omap2/dss/manager-sysfs.c b/drivers/video/omap2/dss/manager-sysfs.c index de7e7b5b1b7c..37b59fe28dc8 100644 --- a/drivers/video/omap2/dss/manager-sysfs.c +++ b/drivers/video/omap2/dss/manager-sysfs.c | |||
@@ -285,9 +285,10 @@ static ssize_t manager_alpha_blending_enabled_show( | |||
285 | { | 285 | { |
286 | struct omap_overlay_manager_info info; | 286 | struct omap_overlay_manager_info info; |
287 | 287 | ||
288 | mgr->get_manager_info(mgr, &info); | 288 | if(!dss_has_feature(FEAT_ALPHA_FIXED_ZORDER)) |
289 | return -ENODEV; | ||
289 | 290 | ||
290 | WARN_ON(!dss_has_feature(FEAT_ALPHA_FIXED_ZORDER)); | 291 | mgr->get_manager_info(mgr, &info); |
291 | 292 | ||
292 | return snprintf(buf, PAGE_SIZE, "%d\n", | 293 | return snprintf(buf, PAGE_SIZE, "%d\n", |
293 | info.partial_alpha_enabled); | 294 | info.partial_alpha_enabled); |
@@ -301,7 +302,8 @@ static ssize_t manager_alpha_blending_enabled_store( | |||
301 | bool enable; | 302 | bool enable; |
302 | int r; | 303 | int r; |
303 | 304 | ||
304 | WARN_ON(!dss_has_feature(FEAT_ALPHA_FIXED_ZORDER)); | 305 | if(!dss_has_feature(FEAT_ALPHA_FIXED_ZORDER)) |
306 | return -ENODEV; | ||
305 | 307 | ||
306 | r = strtobool(buf, &enable); | 308 | r = strtobool(buf, &enable); |
307 | if (r) | 309 | if (r) |
diff --git a/drivers/video/omap2/dss/ti_hdmi_4xxx_ip.c b/drivers/video/omap2/dss/ti_hdmi_4xxx_ip.c index e242ed85cb07..3dfe00956a4f 100644 --- a/drivers/video/omap2/dss/ti_hdmi_4xxx_ip.c +++ b/drivers/video/omap2/dss/ti_hdmi_4xxx_ip.c | |||
@@ -779,16 +779,14 @@ void ti_hdmi_4xxx_basic_configure(struct hdmi_ip_data *ip_data) | |||
779 | struct omap_video_timings video_timing; | 779 | struct omap_video_timings video_timing; |
780 | struct hdmi_video_format video_format; | 780 | struct hdmi_video_format video_format; |
781 | /* HDMI core */ | 781 | /* HDMI core */ |
782 | struct hdmi_core_infoframe_avi avi_cfg = ip_data->avi_cfg; | 782 | struct hdmi_core_infoframe_avi *avi_cfg = &ip_data->avi_cfg; |
783 | struct hdmi_core_video_config v_core_cfg; | 783 | struct hdmi_core_video_config v_core_cfg; |
784 | struct hdmi_core_packet_enable_repeat repeat_cfg; | 784 | struct hdmi_core_packet_enable_repeat repeat_cfg; |
785 | struct hdmi_config *cfg = &ip_data->cfg; | 785 | struct hdmi_config *cfg = &ip_data->cfg; |
786 | 786 | ||
787 | hdmi_wp_init(&video_timing, &video_format); | 787 | hdmi_wp_init(&video_timing, &video_format); |
788 | 788 | ||
789 | hdmi_core_init(&v_core_cfg, | 789 | hdmi_core_init(&v_core_cfg, avi_cfg, &repeat_cfg); |
790 | &avi_cfg, | ||
791 | &repeat_cfg); | ||
792 | 790 | ||
793 | hdmi_wp_video_init_format(&video_format, &video_timing, cfg); | 791 | hdmi_wp_video_init_format(&video_format, &video_timing, cfg); |
794 | 792 | ||
@@ -822,24 +820,24 @@ void ti_hdmi_4xxx_basic_configure(struct hdmi_ip_data *ip_data) | |||
822 | * configure packet | 820 | * configure packet |
823 | * info frame video see doc CEA861-D page 65 | 821 | * info frame video see doc CEA861-D page 65 |
824 | */ | 822 | */ |
825 | avi_cfg.db1_format = HDMI_INFOFRAME_AVI_DB1Y_RGB; | 823 | avi_cfg->db1_format = HDMI_INFOFRAME_AVI_DB1Y_RGB; |
826 | avi_cfg.db1_active_info = | 824 | avi_cfg->db1_active_info = |
827 | HDMI_INFOFRAME_AVI_DB1A_ACTIVE_FORMAT_OFF; | 825 | HDMI_INFOFRAME_AVI_DB1A_ACTIVE_FORMAT_OFF; |
828 | avi_cfg.db1_bar_info_dv = HDMI_INFOFRAME_AVI_DB1B_NO; | 826 | avi_cfg->db1_bar_info_dv = HDMI_INFOFRAME_AVI_DB1B_NO; |
829 | avi_cfg.db1_scan_info = HDMI_INFOFRAME_AVI_DB1S_0; | 827 | avi_cfg->db1_scan_info = HDMI_INFOFRAME_AVI_DB1S_0; |
830 | avi_cfg.db2_colorimetry = HDMI_INFOFRAME_AVI_DB2C_NO; | 828 | avi_cfg->db2_colorimetry = HDMI_INFOFRAME_AVI_DB2C_NO; |
831 | avi_cfg.db2_aspect_ratio = HDMI_INFOFRAME_AVI_DB2M_NO; | 829 | avi_cfg->db2_aspect_ratio = HDMI_INFOFRAME_AVI_DB2M_NO; |
832 | avi_cfg.db2_active_fmt_ar = HDMI_INFOFRAME_AVI_DB2R_SAME; | 830 | avi_cfg->db2_active_fmt_ar = HDMI_INFOFRAME_AVI_DB2R_SAME; |
833 | avi_cfg.db3_itc = HDMI_INFOFRAME_AVI_DB3ITC_NO; | 831 | avi_cfg->db3_itc = HDMI_INFOFRAME_AVI_DB3ITC_NO; |
834 | avi_cfg.db3_ec = HDMI_INFOFRAME_AVI_DB3EC_XVYUV601; | 832 | avi_cfg->db3_ec = HDMI_INFOFRAME_AVI_DB3EC_XVYUV601; |
835 | avi_cfg.db3_q_range = HDMI_INFOFRAME_AVI_DB3Q_DEFAULT; | 833 | avi_cfg->db3_q_range = HDMI_INFOFRAME_AVI_DB3Q_DEFAULT; |
836 | avi_cfg.db3_nup_scaling = HDMI_INFOFRAME_AVI_DB3SC_NO; | 834 | avi_cfg->db3_nup_scaling = HDMI_INFOFRAME_AVI_DB3SC_NO; |
837 | avi_cfg.db4_videocode = cfg->cm.code; | 835 | avi_cfg->db4_videocode = cfg->cm.code; |
838 | avi_cfg.db5_pixel_repeat = HDMI_INFOFRAME_AVI_DB5PR_NO; | 836 | avi_cfg->db5_pixel_repeat = HDMI_INFOFRAME_AVI_DB5PR_NO; |
839 | avi_cfg.db6_7_line_eoftop = 0; | 837 | avi_cfg->db6_7_line_eoftop = 0; |
840 | avi_cfg.db8_9_line_sofbottom = 0; | 838 | avi_cfg->db8_9_line_sofbottom = 0; |
841 | avi_cfg.db10_11_pixel_eofleft = 0; | 839 | avi_cfg->db10_11_pixel_eofleft = 0; |
842 | avi_cfg.db12_13_pixel_sofright = 0; | 840 | avi_cfg->db12_13_pixel_sofright = 0; |
843 | 841 | ||
844 | hdmi_core_aux_infoframe_avi_config(ip_data); | 842 | hdmi_core_aux_infoframe_avi_config(ip_data); |
845 | 843 | ||
diff --git a/drivers/video/output.c b/drivers/video/output.c index 6285b9718451..1446c49fe6af 100644 --- a/drivers/video/output.c +++ b/drivers/video/output.c | |||
@@ -32,8 +32,8 @@ MODULE_DESCRIPTION("Display Output Switcher Lowlevel Control Abstraction"); | |||
32 | MODULE_LICENSE("GPL"); | 32 | MODULE_LICENSE("GPL"); |
33 | MODULE_AUTHOR("Luming Yu <luming.yu@intel.com>"); | 33 | MODULE_AUTHOR("Luming Yu <luming.yu@intel.com>"); |
34 | 34 | ||
35 | static ssize_t video_output_show_state(struct device *dev, | 35 | static ssize_t state_show(struct device *dev, struct device_attribute *attr, |
36 | struct device_attribute *attr, char *buf) | 36 | char *buf) |
37 | { | 37 | { |
38 | ssize_t ret_size = 0; | 38 | ssize_t ret_size = 0; |
39 | struct output_device *od = to_output_device(dev); | 39 | struct output_device *od = to_output_device(dev); |
@@ -42,9 +42,8 @@ static ssize_t video_output_show_state(struct device *dev, | |||
42 | return ret_size; | 42 | return ret_size; |
43 | } | 43 | } |
44 | 44 | ||
45 | static ssize_t video_output_store_state(struct device *dev, | 45 | static ssize_t state_store(struct device *dev, struct device_attribute *attr, |
46 | struct device_attribute *attr, | 46 | const char *buf,size_t count) |
47 | const char *buf,size_t count) | ||
48 | { | 47 | { |
49 | char *endp; | 48 | char *endp; |
50 | struct output_device *od = to_output_device(dev); | 49 | struct output_device *od = to_output_device(dev); |
@@ -62,6 +61,7 @@ static ssize_t video_output_store_state(struct device *dev, | |||
62 | } | 61 | } |
63 | return count; | 62 | return count; |
64 | } | 63 | } |
64 | static DEVICE_ATTR_RW(state); | ||
65 | 65 | ||
66 | static void video_output_release(struct device *dev) | 66 | static void video_output_release(struct device *dev) |
67 | { | 67 | { |
@@ -69,16 +69,16 @@ static void video_output_release(struct device *dev) | |||
69 | kfree(od); | 69 | kfree(od); |
70 | } | 70 | } |
71 | 71 | ||
72 | static struct device_attribute video_output_attributes[] = { | 72 | static struct attribute *video_output_attrs[] = { |
73 | __ATTR(state, 0644, video_output_show_state, video_output_store_state), | 73 | &dev_attr_state.attr, |
74 | __ATTR_NULL, | 74 | NULL, |
75 | }; | 75 | }; |
76 | 76 | ATTRIBUTE_GROUPS(video_output); | |
77 | 77 | ||
78 | static struct class video_output_class = { | 78 | static struct class video_output_class = { |
79 | .name = "video_output", | 79 | .name = "video_output", |
80 | .dev_release = video_output_release, | 80 | .dev_release = video_output_release, |
81 | .dev_attrs = video_output_attributes, | 81 | .dev_groups = video_output_groups, |
82 | }; | 82 | }; |
83 | 83 | ||
84 | struct output_device *video_output_register(const char *name, | 84 | struct output_device *video_output_register(const char *name, |
diff --git a/drivers/video/xilinxfb.c b/drivers/video/xilinxfb.c index 6629b29a8202..84c664ea8eb9 100644 --- a/drivers/video/xilinxfb.c +++ b/drivers/video/xilinxfb.c | |||
@@ -259,12 +259,12 @@ static int xilinxfb_assign(struct platform_device *pdev, | |||
259 | struct resource *res; | 259 | struct resource *res; |
260 | 260 | ||
261 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 261 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
262 | drvdata->regs_phys = res->start; | 262 | drvdata->regs = devm_ioremap_resource(&pdev->dev, res); |
263 | drvdata->regs = devm_request_and_ioremap(&pdev->dev, res); | 263 | if (IS_ERR(drvdata->regs)) { |
264 | if (!drvdata->regs) { | 264 | rc = PTR_ERR(drvdata->regs); |
265 | rc = -EADDRNOTAVAIL; | ||
266 | goto err_region; | 265 | goto err_region; |
267 | } | 266 | } |
267 | drvdata->regs_phys = res->start; | ||
268 | } | 268 | } |
269 | 269 | ||
270 | /* Allocate the framebuffer memory */ | 270 | /* Allocate the framebuffer memory */ |
diff --git a/include/linux/platform_data/simplefb.h b/include/linux/platform_data/simplefb.h index 53774b0cd8e9..077303cedbf4 100644 --- a/include/linux/platform_data/simplefb.h +++ b/include/linux/platform_data/simplefb.h | |||
@@ -25,6 +25,7 @@ | |||
25 | { "r8g8b8", 24, {16, 8}, {8, 8}, {0, 8}, {0, 0}, DRM_FORMAT_RGB888 }, \ | 25 | { "r8g8b8", 24, {16, 8}, {8, 8}, {0, 8}, {0, 0}, DRM_FORMAT_RGB888 }, \ |
26 | { "x8r8g8b8", 32, {16, 8}, {8, 8}, {0, 8}, {0, 0}, DRM_FORMAT_XRGB8888 }, \ | 26 | { "x8r8g8b8", 32, {16, 8}, {8, 8}, {0, 8}, {0, 0}, DRM_FORMAT_XRGB8888 }, \ |
27 | { "a8r8g8b8", 32, {16, 8}, {8, 8}, {0, 8}, {24, 8}, DRM_FORMAT_ARGB8888 }, \ | 27 | { "a8r8g8b8", 32, {16, 8}, {8, 8}, {0, 8}, {24, 8}, DRM_FORMAT_ARGB8888 }, \ |
28 | { "a8b8g8r8", 32, {0, 8}, {8, 8}, {16, 8}, {24, 8}, DRM_FORMAT_ABGR8888 }, \ | ||
28 | { "x2r10g10b10", 32, {20, 10}, {10, 10}, {0, 10}, {0, 0}, DRM_FORMAT_XRGB2101010 }, \ | 29 | { "x2r10g10b10", 32, {20, 10}, {10, 10}, {0, 10}, {0, 0}, DRM_FORMAT_XRGB2101010 }, \ |
29 | { "a2r10g10b10", 32, {20, 10}, {10, 10}, {0, 10}, {30, 2}, DRM_FORMAT_ARGB2101010 }, \ | 30 | { "a2r10g10b10", 32, {20, 10}, {10, 10}, {0, 10}, {30, 2}, DRM_FORMAT_ARGB2101010 }, \ |
30 | } | 31 | } |
diff --git a/include/video/da8xx-fb.h b/include/video/da8xx-fb.h index f88825928dd1..efed3c3383d6 100644 --- a/include/video/da8xx-fb.h +++ b/include/video/da8xx-fb.h | |||
@@ -23,6 +23,11 @@ enum raster_load_mode { | |||
23 | LOAD_PALETTE, | 23 | LOAD_PALETTE, |
24 | }; | 24 | }; |
25 | 25 | ||
26 | enum da8xx_frame_complete { | ||
27 | DA8XX_FRAME_WAIT, | ||
28 | DA8XX_FRAME_NOWAIT, | ||
29 | }; | ||
30 | |||
26 | struct da8xx_lcdc_platform_data { | 31 | struct da8xx_lcdc_platform_data { |
27 | const char manu_name[10]; | 32 | const char manu_name[10]; |
28 | void *controller_data; | 33 | void *controller_data; |