diff options
| author | Maciej W. Rozycki <macro@mips.com> | 2018-05-14 11:49:43 -0400 |
|---|---|---|
| committer | James Hogan <jhogan@kernel.org> | 2018-05-14 18:54:25 -0400 |
| commit | 9a3a92ccfe3620743d4ae57c987dc8e9c5f88996 (patch) | |
| tree | e973a29b75eddc2c01155fa96efe3a6a8a718065 | |
| parent | 947bc875116042d5375446aa29bc1073c2d38977 (diff) | |
MIPS: Fix ptrace(2) PTRACE_PEEKUSR and PTRACE_POKEUSR accesses to o32 FGRs
Check the TIF_32BIT_FPREGS task setting of the tracee rather than the
tracer in determining the layout of floating-point general registers in
the floating-point context, correcting access to odd-numbered registers
for o32 tracees where the setting disagrees between the two processes.
Fixes: 597ce1723e0f ("MIPS: Support for 64-bit FP with O32 binaries")
Signed-off-by: Maciej W. Rozycki <macro@mips.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Cc: <stable@vger.kernel.org> # 3.14+
Signed-off-by: James Hogan <jhogan@kernel.org>
| -rw-r--r-- | arch/mips/kernel/ptrace.c | 4 | ||||
| -rw-r--r-- | arch/mips/kernel/ptrace32.c | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/arch/mips/kernel/ptrace.c b/arch/mips/kernel/ptrace.c index aede42990f08..8d098b9f395c 100644 --- a/arch/mips/kernel/ptrace.c +++ b/arch/mips/kernel/ptrace.c | |||
| @@ -807,7 +807,7 @@ long arch_ptrace(struct task_struct *child, long request, | |||
| 807 | fregs = get_fpu_regs(child); | 807 | fregs = get_fpu_regs(child); |
| 808 | 808 | ||
| 809 | #ifdef CONFIG_32BIT | 809 | #ifdef CONFIG_32BIT |
| 810 | if (test_thread_flag(TIF_32BIT_FPREGS)) { | 810 | if (test_tsk_thread_flag(child, TIF_32BIT_FPREGS)) { |
| 811 | /* | 811 | /* |
| 812 | * The odd registers are actually the high | 812 | * The odd registers are actually the high |
| 813 | * order bits of the values stored in the even | 813 | * order bits of the values stored in the even |
| @@ -902,7 +902,7 @@ long arch_ptrace(struct task_struct *child, long request, | |||
| 902 | 902 | ||
| 903 | init_fp_ctx(child); | 903 | init_fp_ctx(child); |
| 904 | #ifdef CONFIG_32BIT | 904 | #ifdef CONFIG_32BIT |
| 905 | if (test_thread_flag(TIF_32BIT_FPREGS)) { | 905 | if (test_tsk_thread_flag(child, TIF_32BIT_FPREGS)) { |
| 906 | /* | 906 | /* |
| 907 | * The odd registers are actually the high | 907 | * The odd registers are actually the high |
| 908 | * order bits of the values stored in the even | 908 | * order bits of the values stored in the even |
diff --git a/arch/mips/kernel/ptrace32.c b/arch/mips/kernel/ptrace32.c index 2b9260f92ccd..656a137c1fe2 100644 --- a/arch/mips/kernel/ptrace32.c +++ b/arch/mips/kernel/ptrace32.c | |||
| @@ -99,7 +99,7 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request, | |||
| 99 | break; | 99 | break; |
| 100 | } | 100 | } |
| 101 | fregs = get_fpu_regs(child); | 101 | fregs = get_fpu_regs(child); |
| 102 | if (test_thread_flag(TIF_32BIT_FPREGS)) { | 102 | if (test_tsk_thread_flag(child, TIF_32BIT_FPREGS)) { |
| 103 | /* | 103 | /* |
| 104 | * The odd registers are actually the high | 104 | * The odd registers are actually the high |
| 105 | * order bits of the values stored in the even | 105 | * order bits of the values stored in the even |
| @@ -212,7 +212,7 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request, | |||
| 212 | sizeof(child->thread.fpu)); | 212 | sizeof(child->thread.fpu)); |
| 213 | child->thread.fpu.fcr31 = 0; | 213 | child->thread.fpu.fcr31 = 0; |
| 214 | } | 214 | } |
| 215 | if (test_thread_flag(TIF_32BIT_FPREGS)) { | 215 | if (test_tsk_thread_flag(child, TIF_32BIT_FPREGS)) { |
| 216 | /* | 216 | /* |
| 217 | * The odd registers are actually the high | 217 | * The odd registers are actually the high |
| 218 | * order bits of the values stored in the even | 218 | * order bits of the values stored in the even |