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authorDinh Nguyen <dinguyen@altera.com>2014-01-06 21:54:43 -0500
committerDinh Nguyen <dinguyen@altera.com>2014-01-08 12:58:44 -0500
commit9a21e55d77ab909b36c2c730e5a1e1d1a9a57c5e (patch)
tree26eb53d1f48b4cf67b0725b8b9dc094c5b7064bd
parent374b105797c3d4f29c685f3be535c35f5689b30e (diff)
ARM: dts: socfpga: update L2 tag and data latency
Sets the appropriate L2-cache latencies for the SOCFPGA platform. Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
-rw-r--r--arch/arm/boot/dts/socfpga.dtsi2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index f936476c2753..efcc38a2a110 100644
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -467,6 +467,8 @@
467 interrupts = <0 38 0x04>; 467 interrupts = <0 38 0x04>;
468 cache-unified; 468 cache-unified;
469 cache-level = <2>; 469 cache-level = <2>;
470 arm,tag-latency = <1 1 1>;
471 arm,data-latency = <2 1 1>;
470 }; 472 };
471 473
472 /* Local timer */ 474 /* Local timer */