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authorOlof Johansson <olof@lixom.net>2014-05-05 01:20:30 -0400
committerOlof Johansson <olof@lixom.net>2014-05-05 01:20:30 -0400
commit9a2044fce2021358e082d344b8c248e83b1c499b (patch)
treea2215fc0e023d4acee69ae9d220f31d6377a6028
parent12e8e5952598714faa6f202ab028bcd291337cce (diff)
parent4c05160342f16361fc37ae34dcae9210306a83e9 (diff)
Merge tag 'omap-for-v3.15/fixes-gpmc' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
Merge fixes from Tony Lindgren: Mostly fixes for occasional memory corruption caused by bad timings for smc911x LAN9220 (and potentially LAN9221) devices that were noted on a cm-t3730 system. Also fix THUMB mode for SMP, and mailbox related warnings when booted with device tree. * tag 'omap-for-v3.15/fixes-gpmc' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: dts: AM3517: Disable absent IPs inherited from OMAP3 ARM: dts: OMAP2: Fix interrupts for OMAP2420 mailbox ARM: dts: OMAP5: Add mailbox dt node to fix boot warning ARM: OMAP5: Switch to THUMB mode if needed on secondary CPU ARM: dts: am437x-gp-evm: Do not reset gpio5 ARM: dts: omap3-igep0020: use SMSC9221 timings ARM: dts: Fix GPMC timings for LAN9220 ARM: dts: Fix GPMC Ethernet timings for omap cm-t sbc-t boards for device tree ARM: dts: Fix bad OTG muxing for cm-t boards Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat
-rw-r--r--arch/arm/boot/dts/am3517.dtsi16
-rw-r--r--arch/arm/boot/dts/am437x-gp-evm.dts5
-rw-r--r--arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi19
-rw-r--r--arch/arm/boot/dts/omap2.dtsi7
-rw-r--r--arch/arm/boot/dts/omap2420.dtsi8
-rw-r--r--arch/arm/boot/dts/omap2430.dtsi7
-rw-r--r--arch/arm/boot/dts/omap3-cm-t3x30.dtsi66
-rw-r--r--arch/arm/boot/dts/omap3-igep.dtsi2
-rw-r--r--arch/arm/boot/dts/omap3-igep0020.dts4
-rw-r--r--arch/arm/boot/dts/omap3-sb-t35.dtsi37
-rw-r--r--arch/arm/boot/dts/omap3-sbc-t3517.dts13
-rw-r--r--arch/arm/boot/dts/omap3.dtsi2
-rw-r--r--arch/arm/boot/dts/omap5.dtsi7
-rw-r--r--arch/arm/mach-omap2/omap-headsmp.S8
14 files changed, 99 insertions, 102 deletions
diff --git a/arch/arm/boot/dts/am3517.dtsi b/arch/arm/boot/dts/am3517.dtsi
index 788391f91684..5a452fdd7c5d 100644
--- a/arch/arm/boot/dts/am3517.dtsi
+++ b/arch/arm/boot/dts/am3517.dtsi
@@ -62,5 +62,21 @@
62 }; 62 };
63}; 63};
64 64
65&iva {
66 status = "disabled";
67};
68
69&mailbox {
70 status = "disabled";
71};
72
73&mmu_isp {
74 status = "disabled";
75};
76
77&smartreflex_mpu_iva {
78 status = "disabled";
79};
80
65/include/ "am35xx-clocks.dtsi" 81/include/ "am35xx-clocks.dtsi"
66/include/ "omap36xx-am35xx-omap3430es2plus-clocks.dtsi" 82/include/ "omap36xx-am35xx-omap3430es2plus-clocks.dtsi"
diff --git a/arch/arm/boot/dts/am437x-gp-evm.dts b/arch/arm/boot/dts/am437x-gp-evm.dts
index df8798e8bd25..a055f7f0f14a 100644
--- a/arch/arm/boot/dts/am437x-gp-evm.dts
+++ b/arch/arm/boot/dts/am437x-gp-evm.dts
@@ -117,6 +117,11 @@
117 status = "okay"; 117 status = "okay";
118}; 118};
119 119
120&gpio5 {
121 status = "okay";
122 ti,no-reset-on-init;
123};
124
120&mmc1 { 125&mmc1 {
121 status = "okay"; 126 status = "okay";
122 vmmc-supply = <&vmmcsd_fixed>; 127 vmmc-supply = <&vmmcsd_fixed>;
diff --git a/arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi b/arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi
index f577b7df9a29..521c587acaee 100644
--- a/arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi
+++ b/arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi
@@ -24,11 +24,10 @@
24 compatible = "smsc,lan9221", "smsc,lan9115"; 24 compatible = "smsc,lan9221", "smsc,lan9115";
25 bank-width = <2>; 25 bank-width = <2>;
26 gpmc,mux-add-data; 26 gpmc,mux-add-data;
27 gpmc,cs-on-ns = <0>; 27 gpmc,cs-on-ns = <1>;
28 gpmc,cs-rd-off-ns = <186>; 28 gpmc,cs-rd-off-ns = <180>;
29 gpmc,cs-wr-off-ns = <186>; 29 gpmc,cs-wr-off-ns = <180>;
30 gpmc,adv-on-ns = <12>; 30 gpmc,adv-rd-off-ns = <18>;
31 gpmc,adv-rd-off-ns = <48>;
32 gpmc,adv-wr-off-ns = <48>; 31 gpmc,adv-wr-off-ns = <48>;
33 gpmc,oe-on-ns = <54>; 32 gpmc,oe-on-ns = <54>;
34 gpmc,oe-off-ns = <168>; 33 gpmc,oe-off-ns = <168>;
@@ -36,12 +35,10 @@
36 gpmc,we-off-ns = <168>; 35 gpmc,we-off-ns = <168>;
37 gpmc,rd-cycle-ns = <186>; 36 gpmc,rd-cycle-ns = <186>;
38 gpmc,wr-cycle-ns = <186>; 37 gpmc,wr-cycle-ns = <186>;
39 gpmc,access-ns = <114>; 38 gpmc,access-ns = <144>;
40 gpmc,page-burst-access-ns = <6>; 39 gpmc,page-burst-access-ns = <24>;
41 gpmc,bus-turnaround-ns = <12>; 40 gpmc,bus-turnaround-ns = <90>;
42 gpmc,cycle2cycle-delay-ns = <18>; 41 gpmc,cycle2cycle-delay-ns = <90>;
43 gpmc,wr-data-mux-bus-ns = <90>;
44 gpmc,wr-access-ns = <186>;
45 gpmc,cycle2cycle-samecsen; 42 gpmc,cycle2cycle-samecsen;
46 gpmc,cycle2cycle-diffcsen; 43 gpmc,cycle2cycle-diffcsen;
47 vddvario-supply = <&vddvario>; 44 vddvario-supply = <&vddvario>;
diff --git a/arch/arm/boot/dts/omap2.dtsi b/arch/arm/boot/dts/omap2.dtsi
index 22f35ea142c1..8f8c07da4ac1 100644
--- a/arch/arm/boot/dts/omap2.dtsi
+++ b/arch/arm/boot/dts/omap2.dtsi
@@ -71,13 +71,6 @@
71 interrupts = <58>; 71 interrupts = <58>;
72 }; 72 };
73 73
74 mailbox: mailbox@48094000 {
75 compatible = "ti,omap2-mailbox";
76 ti,hwmods = "mailbox";
77 reg = <0x48094000 0x200>;
78 interrupts = <26>;
79 };
80
81 intc: interrupt-controller@1 { 74 intc: interrupt-controller@1 {
82 compatible = "ti,omap2-intc"; 75 compatible = "ti,omap2-intc";
83 interrupt-controller; 76 interrupt-controller;
diff --git a/arch/arm/boot/dts/omap2420.dtsi b/arch/arm/boot/dts/omap2420.dtsi
index 85b1fb014c43..2d9979835f24 100644
--- a/arch/arm/boot/dts/omap2420.dtsi
+++ b/arch/arm/boot/dts/omap2420.dtsi
@@ -125,6 +125,14 @@
125 dma-names = "tx", "rx"; 125 dma-names = "tx", "rx";
126 }; 126 };
127 127
128 mailbox: mailbox@48094000 {
129 compatible = "ti,omap2-mailbox";
130 reg = <0x48094000 0x200>;
131 interrupts = <26>, <34>;
132 interrupt-names = "dsp", "iva";
133 ti,hwmods = "mailbox";
134 };
135
128 timer1: timer@48028000 { 136 timer1: timer@48028000 {
129 compatible = "ti,omap2420-timer"; 137 compatible = "ti,omap2420-timer";
130 reg = <0x48028000 0x400>; 138 reg = <0x48028000 0x400>;
diff --git a/arch/arm/boot/dts/omap2430.dtsi b/arch/arm/boot/dts/omap2430.dtsi
index d09697dab55e..42d2c61c9e2d 100644
--- a/arch/arm/boot/dts/omap2430.dtsi
+++ b/arch/arm/boot/dts/omap2430.dtsi
@@ -216,6 +216,13 @@
216 dma-names = "tx", "rx"; 216 dma-names = "tx", "rx";
217 }; 217 };
218 218
219 mailbox: mailbox@48094000 {
220 compatible = "ti,omap2-mailbox";
221 reg = <0x48094000 0x200>;
222 interrupts = <26>;
223 ti,hwmods = "mailbox";
224 };
225
219 timer1: timer@49018000 { 226 timer1: timer@49018000 {
220 compatible = "ti,omap2420-timer"; 227 compatible = "ti,omap2420-timer";
221 reg = <0x49018000 0x400>; 228 reg = <0x49018000 0x400>;
diff --git a/arch/arm/boot/dts/omap3-cm-t3x30.dtsi b/arch/arm/boot/dts/omap3-cm-t3x30.dtsi
index d00055809e31..25ba08331d88 100644
--- a/arch/arm/boot/dts/omap3-cm-t3x30.dtsi
+++ b/arch/arm/boot/dts/omap3-cm-t3x30.dtsi
@@ -10,18 +10,6 @@
10 cpu0-supply = <&vcc>; 10 cpu0-supply = <&vcc>;
11 }; 11 };
12 }; 12 };
13
14 vddvario: regulator-vddvario {
15 compatible = "regulator-fixed";
16 regulator-name = "vddvario";
17 regulator-always-on;
18 };
19
20 vdd33a: regulator-vdd33a {
21 compatible = "regulator-fixed";
22 regulator-name = "vdd33a";
23 regulator-always-on;
24 };
25}; 13};
26 14
27&omap3_pmx_core { 15&omap3_pmx_core {
@@ -35,58 +23,34 @@
35 23
36 hsusb0_pins: pinmux_hsusb0_pins { 24 hsusb0_pins: pinmux_hsusb0_pins {
37 pinctrl-single,pins = < 25 pinctrl-single,pins = <
38 OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* hsusb0_clk.hsusb0_clk */ 26 OMAP3_CORE1_IOPAD(0x21a2, PIN_OUTPUT | MUX_MODE0) /* hsusb0_clk.hsusb0_clk */
39 OMAP3_CORE1_IOPAD(0x21a2, PIN_OUTPUT | MUX_MODE0) /* hsusb0_stp.hsusb0_stp */ 27 OMAP3_CORE1_IOPAD(0x21a4, PIN_OUTPUT | MUX_MODE0) /* hsusb0_stp.hsusb0_stp */
40 OMAP3_CORE1_IOPAD(0x21a4, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_dir.hsusb0_dir */ 28 OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_dir.hsusb0_dir */
41 OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_nxt.hsusb0_nxt */ 29 OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_nxt.hsusb0_nxt */
42 OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data0.hsusb2_data0 */ 30 OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data0.hsusb2_data0 */
43 OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data1.hsusb0_data1 */ 31 OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data1.hsusb0_data1 */
44 OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data2.hsusb0_data2 */ 32 OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data2.hsusb0_data2 */
45 OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data3 */ 33 OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data3 */
46 OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data4 */ 34 OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data4 */
47 OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data5 */ 35 OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data5 */
48 OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data6 */ 36 OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data6 */
49 OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data7 */ 37 OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data7 */
50 >; 38 >;
51 }; 39 };
52}; 40};
53 41
42#include "omap-gpmc-smsc911x.dtsi"
43
54&gpmc { 44&gpmc {
55 ranges = <5 0 0x2c000000 0x01000000>; 45 ranges = <5 0 0x2c000000 0x01000000>;
56 46
57 smsc1: ethernet@5,0 { 47 smsc1: ethernet@gpmc {
58 compatible = "smsc,lan9221", "smsc,lan9115"; 48 compatible = "smsc,lan9221", "smsc,lan9115";
59 pinctrl-names = "default"; 49 pinctrl-names = "default";
60 pinctrl-0 = <&smsc1_pins>; 50 pinctrl-0 = <&smsc1_pins>;
61 interrupt-parent = <&gpio6>; 51 interrupt-parent = <&gpio6>;
62 interrupts = <3 IRQ_TYPE_LEVEL_LOW>; 52 interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
63 reg = <5 0 0xff>; 53 reg = <5 0 0xff>;
64 bank-width = <2>;
65 gpmc,mux-add-data;
66 gpmc,cs-on-ns = <0>;
67 gpmc,cs-rd-off-ns = <186>;
68 gpmc,cs-wr-off-ns = <186>;
69 gpmc,adv-on-ns = <12>;
70 gpmc,adv-rd-off-ns = <48>;
71 gpmc,adv-wr-off-ns = <48>;
72 gpmc,oe-on-ns = <54>;
73 gpmc,oe-off-ns = <168>;
74 gpmc,we-on-ns = <54>;
75 gpmc,we-off-ns = <168>;
76 gpmc,rd-cycle-ns = <186>;
77 gpmc,wr-cycle-ns = <186>;
78 gpmc,access-ns = <114>;
79 gpmc,page-burst-access-ns = <6>;
80 gpmc,bus-turnaround-ns = <12>;
81 gpmc,cycle2cycle-delay-ns = <18>;
82 gpmc,wr-data-mux-bus-ns = <90>;
83 gpmc,wr-access-ns = <186>;
84 gpmc,cycle2cycle-samecsen;
85 gpmc,cycle2cycle-diffcsen;
86 vddvario-supply = <&vddvario>;
87 vdd33a-supply = <&vdd33a>;
88 reg-io-width = <4>;
89 smsc,save-mac-address;
90 }; 54 };
91}; 55};
92 56
diff --git a/arch/arm/boot/dts/omap3-igep.dtsi b/arch/arm/boot/dts/omap3-igep.dtsi
index b97736d98a64..e2d163bf0619 100644
--- a/arch/arm/boot/dts/omap3-igep.dtsi
+++ b/arch/arm/boot/dts/omap3-igep.dtsi
@@ -107,7 +107,7 @@
107 >; 107 >;
108 }; 108 };
109 109
110 smsc911x_pins: pinmux_smsc911x_pins { 110 smsc9221_pins: pinmux_smsc9221_pins {
111 pinctrl-single,pins = < 111 pinctrl-single,pins = <
112 0x1a2 (PIN_INPUT | MUX_MODE4) /* mcspi1_cs2.gpio_176 */ 112 0x1a2 (PIN_INPUT | MUX_MODE4) /* mcspi1_cs2.gpio_176 */
113 >; 113 >;
diff --git a/arch/arm/boot/dts/omap3-igep0020.dts b/arch/arm/boot/dts/omap3-igep0020.dts
index 7abd64f6ae21..b22caaaf774b 100644
--- a/arch/arm/boot/dts/omap3-igep0020.dts
+++ b/arch/arm/boot/dts/omap3-igep0020.dts
@@ -10,7 +10,7 @@
10 */ 10 */
11 11
12#include "omap3-igep.dtsi" 12#include "omap3-igep.dtsi"
13#include "omap-gpmc-smsc911x.dtsi" 13#include "omap-gpmc-smsc9221.dtsi"
14 14
15/ { 15/ {
16 model = "IGEPv2 (TI OMAP AM/DM37x)"; 16 model = "IGEPv2 (TI OMAP AM/DM37x)";
@@ -248,7 +248,7 @@
248 248
249 ethernet@gpmc { 249 ethernet@gpmc {
250 pinctrl-names = "default"; 250 pinctrl-names = "default";
251 pinctrl-0 = <&smsc911x_pins>; 251 pinctrl-0 = <&smsc9221_pins>;
252 reg = <5 0 0xff>; 252 reg = <5 0 0xff>;
253 interrupt-parent = <&gpio6>; 253 interrupt-parent = <&gpio6>;
254 interrupts = <16 IRQ_TYPE_LEVEL_LOW>; 254 interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
diff --git a/arch/arm/boot/dts/omap3-sb-t35.dtsi b/arch/arm/boot/dts/omap3-sb-t35.dtsi
index 7909c51b05a5..d59e3de1441e 100644
--- a/arch/arm/boot/dts/omap3-sb-t35.dtsi
+++ b/arch/arm/boot/dts/omap3-sb-t35.dtsi
@@ -2,20 +2,6 @@
2 * Common support for CompuLab SB-T35 used on SBC-T3530, SBC-T3517 and SBC-T3730 2 * Common support for CompuLab SB-T35 used on SBC-T3530, SBC-T3517 and SBC-T3730
3 */ 3 */
4 4
5/ {
6 vddvario_sb_t35: regulator-vddvario-sb-t35 {
7 compatible = "regulator-fixed";
8 regulator-name = "vddvario";
9 regulator-always-on;
10 };
11
12 vdd33a_sb_t35: regulator-vdd33a-sb-t35 {
13 compatible = "regulator-fixed";
14 regulator-name = "vdd33a";
15 regulator-always-on;
16 };
17};
18
19&omap3_pmx_core { 5&omap3_pmx_core {
20 smsc2_pins: pinmux_smsc2_pins { 6 smsc2_pins: pinmux_smsc2_pins {
21 pinctrl-single,pins = < 7 pinctrl-single,pins = <
@@ -37,11 +23,10 @@
37 reg = <4 0 0xff>; 23 reg = <4 0 0xff>;
38 bank-width = <2>; 24 bank-width = <2>;
39 gpmc,mux-add-data; 25 gpmc,mux-add-data;
40 gpmc,cs-on-ns = <0>; 26 gpmc,cs-on-ns = <1>;
41 gpmc,cs-rd-off-ns = <186>; 27 gpmc,cs-rd-off-ns = <180>;
42 gpmc,cs-wr-off-ns = <186>; 28 gpmc,cs-wr-off-ns = <180>;
43 gpmc,adv-on-ns = <12>; 29 gpmc,adv-rd-off-ns = <18>;
44 gpmc,adv-rd-off-ns = <48>;
45 gpmc,adv-wr-off-ns = <48>; 30 gpmc,adv-wr-off-ns = <48>;
46 gpmc,oe-on-ns = <54>; 31 gpmc,oe-on-ns = <54>;
47 gpmc,oe-off-ns = <168>; 32 gpmc,oe-off-ns = <168>;
@@ -49,16 +34,14 @@
49 gpmc,we-off-ns = <168>; 34 gpmc,we-off-ns = <168>;
50 gpmc,rd-cycle-ns = <186>; 35 gpmc,rd-cycle-ns = <186>;
51 gpmc,wr-cycle-ns = <186>; 36 gpmc,wr-cycle-ns = <186>;
52 gpmc,access-ns = <114>; 37 gpmc,access-ns = <144>;
53 gpmc,page-burst-access-ns = <6>; 38 gpmc,page-burst-access-ns = <24>;
54 gpmc,bus-turnaround-ns = <12>; 39 gpmc,bus-turnaround-ns = <90>;
55 gpmc,cycle2cycle-delay-ns = <18>; 40 gpmc,cycle2cycle-delay-ns = <90>;
56 gpmc,wr-data-mux-bus-ns = <90>;
57 gpmc,wr-access-ns = <186>;
58 gpmc,cycle2cycle-samecsen; 41 gpmc,cycle2cycle-samecsen;
59 gpmc,cycle2cycle-diffcsen; 42 gpmc,cycle2cycle-diffcsen;
60 vddvario-supply = <&vddvario_sb_t35>; 43 vddvario-supply = <&vddvario>;
61 vdd33a-supply = <&vdd33a_sb_t35>; 44 vdd33a-supply = <&vdd33a>;
62 reg-io-width = <4>; 45 reg-io-width = <4>;
63 smsc,save-mac-address; 46 smsc,save-mac-address;
64 }; 47 };
diff --git a/arch/arm/boot/dts/omap3-sbc-t3517.dts b/arch/arm/boot/dts/omap3-sbc-t3517.dts
index 024c9c6c682d..42189b65d393 100644
--- a/arch/arm/boot/dts/omap3-sbc-t3517.dts
+++ b/arch/arm/boot/dts/omap3-sbc-t3517.dts
@@ -8,6 +8,19 @@
8/ { 8/ {
9 model = "CompuLab SBC-T3517 with CM-T3517"; 9 model = "CompuLab SBC-T3517 with CM-T3517";
10 compatible = "compulab,omap3-sbc-t3517", "compulab,omap3-cm-t3517", "ti,am3517", "ti,omap3"; 10 compatible = "compulab,omap3-sbc-t3517", "compulab,omap3-cm-t3517", "ti,am3517", "ti,omap3";
11
12 /* Only one GPMC smsc9220 on SBC-T3517, CM-T3517 uses am35x Ethernet */
13 vddvario: regulator-vddvario-sb-t35 {
14 compatible = "regulator-fixed";
15 regulator-name = "vddvario";
16 regulator-always-on;
17 };
18
19 vdd33a: regulator-vdd33a-sb-t35 {
20 compatible = "regulator-fixed";
21 regulator-name = "vdd33a";
22 regulator-always-on;
23 };
11}; 24};
12 25
13&omap3_pmx_core { 26&omap3_pmx_core {
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
index acb9019dc437..4231191ade06 100644
--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -61,7 +61,7 @@
61 ti,hwmods = "mpu"; 61 ti,hwmods = "mpu";
62 }; 62 };
63 63
64 iva { 64 iva: iva {
65 compatible = "ti,iva2.2"; 65 compatible = "ti,iva2.2";
66 ti,hwmods = "iva"; 66 ti,hwmods = "iva";
67 67
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index f8c9855ce587..36b4312a5e0d 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -630,6 +630,13 @@
630 status = "disabled"; 630 status = "disabled";
631 }; 631 };
632 632
633 mailbox: mailbox@4a0f4000 {
634 compatible = "ti,omap4-mailbox";
635 reg = <0x4a0f4000 0x200>;
636 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
637 ti,hwmods = "mailbox";
638 };
639
633 timer1: timer@4ae18000 { 640 timer1: timer@4ae18000 {
634 compatible = "ti,omap5430-timer"; 641 compatible = "ti,omap5430-timer";
635 reg = <0x4ae18000 0x80>; 642 reg = <0x4ae18000 0x80>;
diff --git a/arch/arm/mach-omap2/omap-headsmp.S b/arch/arm/mach-omap2/omap-headsmp.S
index 75e92952c18e..40c5d5f1451c 100644
--- a/arch/arm/mach-omap2/omap-headsmp.S
+++ b/arch/arm/mach-omap2/omap-headsmp.S
@@ -1,7 +1,7 @@
1/* 1/*
2 * Secondary CPU startup routine source file. 2 * Secondary CPU startup routine source file.
3 * 3 *
4 * Copyright (C) 2009 Texas Instruments, Inc. 4 * Copyright (C) 2009-2014 Texas Instruments, Inc.
5 * 5 *
6 * Author: 6 * Author:
7 * Santosh Shilimkar <santosh.shilimkar@ti.com> 7 * Santosh Shilimkar <santosh.shilimkar@ti.com>
@@ -28,9 +28,13 @@
28 * code. This routine also provides a holding flag into which 28 * code. This routine also provides a holding flag into which
29 * secondary core is held until we're ready for it to initialise. 29 * secondary core is held until we're ready for it to initialise.
30 * The primary core will update this flag using a hardware 30 * The primary core will update this flag using a hardware
31+ * register AuxCoreBoot0. 31 * register AuxCoreBoot0.
32 */ 32 */
33ENTRY(omap5_secondary_startup) 33ENTRY(omap5_secondary_startup)
34.arm
35THUMB( adr r9, BSYM(wait) ) @ CPU may be entered in ARM mode.
36THUMB( bx r9 ) @ If this is a Thumb-2 kernel,
37THUMB( .thumb ) @ switch to Thumb now.
34wait: ldr r2, =AUX_CORE_BOOT0_PA @ read from AuxCoreBoot0 38wait: ldr r2, =AUX_CORE_BOOT0_PA @ read from AuxCoreBoot0
35 ldr r0, [r2] 39 ldr r0, [r2]
36 mov r0, r0, lsr #5 40 mov r0, r0, lsr #5
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-22 21:15:08 -0400