diff options
author | Ben Skeggs <bskeggs@redhat.com> | 2016-04-13 20:39:18 -0400 |
---|---|---|
committer | Ben Skeggs <bskeggs@redhat.com> | 2016-05-20 00:43:04 -0400 |
commit | 99c5917253a6c5584a7052f9ee578e2c6852253f (patch) | |
tree | 3a474ce77932a871f4d2ca52a195066571fe3116 | |
parent | 917d95a86e7b7036d481323240443566be82a619 (diff) |
drm/nouveau/fb/gf100-: allocate mmu debug buffers
Later chipsets require setting this up both in FB and GR, so let's just
move the allocation to FB.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
-rw-r--r-- | drivers/gpu/drm/nouveau/include/nvkm/subdev/fb.h | 3 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c | 29 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h | 3 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/gr/gk104.c | 7 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/gr/gk20a.c | 6 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/gr/gm107.c | 6 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/gr/gm200.c | 6 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/subdev/fb/base.c | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/subdev/fb/gf100.c | 26 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/subdev/fb/gk104.c | 1 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/subdev/fb/gk20a.c | 1 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/subdev/fb/gm107.c | 1 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/subdev/fb/priv.h | 1 |
13 files changed, 58 insertions, 36 deletions
diff --git a/drivers/gpu/drm/nouveau/include/nvkm/subdev/fb.h b/drivers/gpu/drm/nouveau/include/nvkm/subdev/fb.h index 85ab72c7f821..bb9247d88190 100644 --- a/drivers/gpu/drm/nouveau/include/nvkm/subdev/fb.h +++ b/drivers/gpu/drm/nouveau/include/nvkm/subdev/fb.h | |||
@@ -55,6 +55,9 @@ struct nvkm_fb { | |||
55 | struct nvkm_fb_tile region[16]; | 55 | struct nvkm_fb_tile region[16]; |
56 | int regions; | 56 | int regions; |
57 | } tile; | 57 | } tile; |
58 | |||
59 | struct nvkm_memory *mmu_rd; | ||
60 | struct nvkm_memory *mmu_wr; | ||
58 | }; | 61 | }; |
59 | 62 | ||
60 | bool nvkm_fb_memtype_valid(struct nvkm_fb *, u32 memtype); | 63 | bool nvkm_fb_memtype_valid(struct nvkm_fb *, u32 memtype); |
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c index da2e47228d7d..9513badb8220 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c | |||
@@ -1616,30 +1616,10 @@ gf100_gr_oneinit(struct nvkm_gr *base) | |||
1616 | { | 1616 | { |
1617 | struct gf100_gr *gr = gf100_gr(base); | 1617 | struct gf100_gr *gr = gf100_gr(base); |
1618 | struct nvkm_device *device = gr->base.engine.subdev.device; | 1618 | struct nvkm_device *device = gr->base.engine.subdev.device; |
1619 | int ret, i, j; | 1619 | int i, j; |
1620 | 1620 | ||
1621 | nvkm_pmu_pgob(device->pmu, false); | 1621 | nvkm_pmu_pgob(device->pmu, false); |
1622 | 1622 | ||
1623 | ret = nvkm_memory_new(device, NVKM_MEM_TARGET_INST, 0x1000, 256, false, | ||
1624 | &gr->unk4188b4); | ||
1625 | if (ret) | ||
1626 | return ret; | ||
1627 | |||
1628 | ret = nvkm_memory_new(device, NVKM_MEM_TARGET_INST, 0x1000, 256, false, | ||
1629 | &gr->unk4188b8); | ||
1630 | if (ret) | ||
1631 | return ret; | ||
1632 | |||
1633 | nvkm_kmap(gr->unk4188b4); | ||
1634 | for (i = 0; i < 0x1000; i += 4) | ||
1635 | nvkm_wo32(gr->unk4188b4, i, 0x00000010); | ||
1636 | nvkm_done(gr->unk4188b4); | ||
1637 | |||
1638 | nvkm_kmap(gr->unk4188b8); | ||
1639 | for (i = 0; i < 0x1000; i += 4) | ||
1640 | nvkm_wo32(gr->unk4188b8, i, 0x00000010); | ||
1641 | nvkm_done(gr->unk4188b8); | ||
1642 | |||
1643 | gr->rop_nr = gr->func->rops(gr); | 1623 | gr->rop_nr = gr->func->rops(gr); |
1644 | gr->gpc_nr = nvkm_rd32(device, 0x409604) & 0x0000001f; | 1624 | gr->gpc_nr = nvkm_rd32(device, 0x409604) & 0x0000001f; |
1645 | for (i = 0; i < gr->gpc_nr; i++) { | 1625 | for (i = 0; i < gr->gpc_nr; i++) { |
@@ -1736,8 +1716,6 @@ gf100_gr_dtor(struct nvkm_gr *base) | |||
1736 | gf100_gr_dtor_init(gr->fuc_sw_ctx); | 1716 | gf100_gr_dtor_init(gr->fuc_sw_ctx); |
1737 | gf100_gr_dtor_init(gr->fuc_sw_nonctx); | 1717 | gf100_gr_dtor_init(gr->fuc_sw_nonctx); |
1738 | 1718 | ||
1739 | nvkm_memory_del(&gr->unk4188b8); | ||
1740 | nvkm_memory_del(&gr->unk4188b4); | ||
1741 | return gr; | 1719 | return gr; |
1742 | } | 1720 | } |
1743 | 1721 | ||
@@ -1822,6 +1800,7 @@ int | |||
1822 | gf100_gr_init(struct gf100_gr *gr) | 1800 | gf100_gr_init(struct gf100_gr *gr) |
1823 | { | 1801 | { |
1824 | struct nvkm_device *device = gr->base.engine.subdev.device; | 1802 | struct nvkm_device *device = gr->base.engine.subdev.device; |
1803 | struct nvkm_fb *fb = device->fb; | ||
1825 | const u32 magicgpc918 = DIV_ROUND_UP(0x00800000, gr->tpc_total); | 1804 | const u32 magicgpc918 = DIV_ROUND_UP(0x00800000, gr->tpc_total); |
1826 | u32 data[TPC_MAX / 8] = {}; | 1805 | u32 data[TPC_MAX / 8] = {}; |
1827 | u8 tpcnr[GPC_MAX]; | 1806 | u8 tpcnr[GPC_MAX]; |
@@ -1834,8 +1813,8 @@ gf100_gr_init(struct gf100_gr *gr) | |||
1834 | nvkm_wr32(device, GPC_BCAST(0x088c), 0x00000000); | 1813 | nvkm_wr32(device, GPC_BCAST(0x088c), 0x00000000); |
1835 | nvkm_wr32(device, GPC_BCAST(0x0890), 0x00000000); | 1814 | nvkm_wr32(device, GPC_BCAST(0x0890), 0x00000000); |
1836 | nvkm_wr32(device, GPC_BCAST(0x0894), 0x00000000); | 1815 | nvkm_wr32(device, GPC_BCAST(0x0894), 0x00000000); |
1837 | nvkm_wr32(device, GPC_BCAST(0x08b4), nvkm_memory_addr(gr->unk4188b4) >> 8); | 1816 | nvkm_wr32(device, GPC_BCAST(0x08b4), nvkm_memory_addr(fb->mmu_wr) >> 8); |
1838 | nvkm_wr32(device, GPC_BCAST(0x08b8), nvkm_memory_addr(gr->unk4188b8) >> 8); | 1817 | nvkm_wr32(device, GPC_BCAST(0x08b8), nvkm_memory_addr(fb->mmu_rd) >> 8); |
1839 | 1818 | ||
1840 | gf100_gr_mmio(gr, gr->func->mmio); | 1819 | gf100_gr_mmio(gr, gr->func->mmio); |
1841 | 1820 | ||
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h index 9a2c7bacc0e6..90c70e777dff 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h +++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h | |||
@@ -101,9 +101,6 @@ struct gf100_gr { | |||
101 | u8 ppc_mask[GPC_MAX]; | 101 | u8 ppc_mask[GPC_MAX]; |
102 | u8 ppc_tpc_nr[GPC_MAX][4]; | 102 | u8 ppc_tpc_nr[GPC_MAX][4]; |
103 | 103 | ||
104 | struct nvkm_memory *unk4188b4; | ||
105 | struct nvkm_memory *unk4188b8; | ||
106 | |||
107 | struct gf100_gr_data mmio_data[4]; | 104 | struct gf100_gr_data mmio_data[4]; |
108 | struct gf100_gr_mmio mmio_list[4096/8]; | 105 | struct gf100_gr_mmio mmio_list[4096/8]; |
109 | u32 size; | 106 | u32 size; |
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gk104.c b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gk104.c index cf7d6a5c2476..2aebae4df2fd 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gk104.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gk104.c | |||
@@ -24,6 +24,8 @@ | |||
24 | #include "gf100.h" | 24 | #include "gf100.h" |
25 | #include "ctxgf100.h" | 25 | #include "ctxgf100.h" |
26 | 26 | ||
27 | #include <subdev/fb.h> | ||
28 | |||
27 | #include <nvif/class.h> | 29 | #include <nvif/class.h> |
28 | 30 | ||
29 | /******************************************************************************* | 31 | /******************************************************************************* |
@@ -181,6 +183,7 @@ int | |||
181 | gk104_gr_init(struct gf100_gr *gr) | 183 | gk104_gr_init(struct gf100_gr *gr) |
182 | { | 184 | { |
183 | struct nvkm_device *device = gr->base.engine.subdev.device; | 185 | struct nvkm_device *device = gr->base.engine.subdev.device; |
186 | struct nvkm_fb *fb = device->fb; | ||
184 | const u32 magicgpc918 = DIV_ROUND_UP(0x00800000, gr->tpc_total); | 187 | const u32 magicgpc918 = DIV_ROUND_UP(0x00800000, gr->tpc_total); |
185 | u32 data[TPC_MAX / 8] = {}; | 188 | u32 data[TPC_MAX / 8] = {}; |
186 | u8 tpcnr[GPC_MAX]; | 189 | u8 tpcnr[GPC_MAX]; |
@@ -193,8 +196,8 @@ gk104_gr_init(struct gf100_gr *gr) | |||
193 | nvkm_wr32(device, GPC_BCAST(0x088c), 0x00000000); | 196 | nvkm_wr32(device, GPC_BCAST(0x088c), 0x00000000); |
194 | nvkm_wr32(device, GPC_BCAST(0x0890), 0x00000000); | 197 | nvkm_wr32(device, GPC_BCAST(0x0890), 0x00000000); |
195 | nvkm_wr32(device, GPC_BCAST(0x0894), 0x00000000); | 198 | nvkm_wr32(device, GPC_BCAST(0x0894), 0x00000000); |
196 | nvkm_wr32(device, GPC_BCAST(0x08b4), nvkm_memory_addr(gr->unk4188b4) >> 8); | 199 | nvkm_wr32(device, GPC_BCAST(0x08b4), nvkm_memory_addr(fb->mmu_wr) >> 8); |
197 | nvkm_wr32(device, GPC_BCAST(0x08b8), nvkm_memory_addr(gr->unk4188b8) >> 8); | 200 | nvkm_wr32(device, GPC_BCAST(0x08b8), nvkm_memory_addr(fb->mmu_rd) >> 8); |
198 | 201 | ||
199 | gf100_gr_mmio(gr, gr->func->mmio); | 202 | gf100_gr_mmio(gr, gr->func->mmio); |
200 | 203 | ||
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gk20a.c b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gk20a.c index d28feb4465f9..a40509376ece 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gk20a.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gk20a.c | |||
@@ -22,6 +22,7 @@ | |||
22 | #include "gf100.h" | 22 | #include "gf100.h" |
23 | #include "ctxgf100.h" | 23 | #include "ctxgf100.h" |
24 | 24 | ||
25 | #include <subdev/fb.h> | ||
25 | #include <subdev/timer.h> | 26 | #include <subdev/timer.h> |
26 | 27 | ||
27 | #include <nvif/class.h> | 28 | #include <nvif/class.h> |
@@ -219,6 +220,7 @@ int | |||
219 | gk20a_gr_init(struct gf100_gr *gr) | 220 | gk20a_gr_init(struct gf100_gr *gr) |
220 | { | 221 | { |
221 | struct nvkm_device *device = gr->base.engine.subdev.device; | 222 | struct nvkm_device *device = gr->base.engine.subdev.device; |
223 | struct nvkm_fb *fb = device->fb; | ||
222 | const u32 magicgpc918 = DIV_ROUND_UP(0x00800000, gr->tpc_total); | 224 | const u32 magicgpc918 = DIV_ROUND_UP(0x00800000, gr->tpc_total); |
223 | u32 data[TPC_MAX / 8] = {}; | 225 | u32 data[TPC_MAX / 8] = {}; |
224 | u8 tpcnr[GPC_MAX]; | 226 | u8 tpcnr[GPC_MAX]; |
@@ -239,8 +241,8 @@ gk20a_gr_init(struct gf100_gr *gr) | |||
239 | return ret; | 241 | return ret; |
240 | 242 | ||
241 | /* MMU debug buffer */ | 243 | /* MMU debug buffer */ |
242 | nvkm_wr32(device, 0x100cc8, nvkm_memory_addr(gr->unk4188b4) >> 8); | 244 | nvkm_wr32(device, 0x100cc8, nvkm_memory_addr(fb->mmu_wr) >> 8); |
243 | nvkm_wr32(device, 0x100ccc, nvkm_memory_addr(gr->unk4188b8) >> 8); | 245 | nvkm_wr32(device, 0x100ccc, nvkm_memory_addr(fb->mmu_rd) >> 8); |
244 | 246 | ||
245 | if (gr->func->init_gpc_mmu) | 247 | if (gr->func->init_gpc_mmu) |
246 | gr->func->init_gpc_mmu(gr); | 248 | gr->func->init_gpc_mmu(gr); |
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gm107.c b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gm107.c index c4f5500be234..487bd65b167d 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gm107.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gm107.c | |||
@@ -26,6 +26,7 @@ | |||
26 | 26 | ||
27 | #include <subdev/bios.h> | 27 | #include <subdev/bios.h> |
28 | #include <subdev/bios/P0260.h> | 28 | #include <subdev/bios/P0260.h> |
29 | #include <subdev/fb.h> | ||
29 | 30 | ||
30 | #include <nvif/class.h> | 31 | #include <nvif/class.h> |
31 | 32 | ||
@@ -311,6 +312,7 @@ int | |||
311 | gm107_gr_init(struct gf100_gr *gr) | 312 | gm107_gr_init(struct gf100_gr *gr) |
312 | { | 313 | { |
313 | struct nvkm_device *device = gr->base.engine.subdev.device; | 314 | struct nvkm_device *device = gr->base.engine.subdev.device; |
315 | struct nvkm_fb *fb = device->fb; | ||
314 | const u32 magicgpc918 = DIV_ROUND_UP(0x00800000, gr->tpc_total); | 316 | const u32 magicgpc918 = DIV_ROUND_UP(0x00800000, gr->tpc_total); |
315 | u32 data[TPC_MAX / 8] = {}; | 317 | u32 data[TPC_MAX / 8] = {}; |
316 | u8 tpcnr[GPC_MAX]; | 318 | u8 tpcnr[GPC_MAX]; |
@@ -320,8 +322,8 @@ gm107_gr_init(struct gf100_gr *gr) | |||
320 | nvkm_wr32(device, GPC_BCAST(0x0880), 0x00000000); | 322 | nvkm_wr32(device, GPC_BCAST(0x0880), 0x00000000); |
321 | nvkm_wr32(device, GPC_BCAST(0x0890), 0x00000000); | 323 | nvkm_wr32(device, GPC_BCAST(0x0890), 0x00000000); |
322 | nvkm_wr32(device, GPC_BCAST(0x0894), 0x00000000); | 324 | nvkm_wr32(device, GPC_BCAST(0x0894), 0x00000000); |
323 | nvkm_wr32(device, GPC_BCAST(0x08b4), nvkm_memory_addr(gr->unk4188b4) >> 8); | 325 | nvkm_wr32(device, GPC_BCAST(0x08b4), nvkm_memory_addr(fb->mmu_wr) >> 8); |
324 | nvkm_wr32(device, GPC_BCAST(0x08b8), nvkm_memory_addr(gr->unk4188b8) >> 8); | 326 | nvkm_wr32(device, GPC_BCAST(0x08b8), nvkm_memory_addr(fb->mmu_rd) >> 8); |
325 | 327 | ||
326 | gf100_gr_mmio(gr, gr->func->mmio); | 328 | gf100_gr_mmio(gr, gr->func->mmio); |
327 | 329 | ||
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gm200.c b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gm200.c index 47b8d6ffb1ef..6e992c6f9532 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gm200.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gm200.c | |||
@@ -24,6 +24,7 @@ | |||
24 | #include "gf100.h" | 24 | #include "gf100.h" |
25 | #include "ctxgf100.h" | 25 | #include "ctxgf100.h" |
26 | 26 | ||
27 | #include <subdev/fb.h> | ||
27 | #include <subdev/secboot.h> | 28 | #include <subdev/secboot.h> |
28 | 29 | ||
29 | #include <nvif/class.h> | 30 | #include <nvif/class.h> |
@@ -56,6 +57,7 @@ int | |||
56 | gm200_gr_init(struct gf100_gr *gr) | 57 | gm200_gr_init(struct gf100_gr *gr) |
57 | { | 58 | { |
58 | struct nvkm_device *device = gr->base.engine.subdev.device; | 59 | struct nvkm_device *device = gr->base.engine.subdev.device; |
60 | struct nvkm_fb *fb = device->fb; | ||
59 | const u32 magicgpc918 = DIV_ROUND_UP(0x00800000, gr->tpc_total); | 61 | const u32 magicgpc918 = DIV_ROUND_UP(0x00800000, gr->tpc_total); |
60 | u32 data[TPC_MAX / 8] = {}; | 62 | u32 data[TPC_MAX / 8] = {}; |
61 | u8 tpcnr[GPC_MAX]; | 63 | u8 tpcnr[GPC_MAX]; |
@@ -63,8 +65,8 @@ gm200_gr_init(struct gf100_gr *gr) | |||
63 | int i; | 65 | int i; |
64 | 66 | ||
65 | /*XXX: belongs in fb */ | 67 | /*XXX: belongs in fb */ |
66 | nvkm_wr32(device, 0x100cc8, nvkm_memory_addr(gr->unk4188b4) >> 8); | 68 | nvkm_wr32(device, 0x100cc8, nvkm_memory_addr(fb->mmu_wr) >> 8); |
67 | nvkm_wr32(device, 0x100ccc, nvkm_memory_addr(gr->unk4188b8) >> 8); | 69 | nvkm_wr32(device, 0x100ccc, nvkm_memory_addr(fb->mmu_rd) >> 8); |
68 | nvkm_mask(device, 0x100cc4, 0x00040000, 0x00040000); | 70 | nvkm_mask(device, 0x100cc4, 0x00040000, 0x00040000); |
69 | gr->func->init_gpc_mmu(gr); | 71 | gr->func->init_gpc_mmu(gr); |
70 | 72 | ||
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/fb/base.c b/drivers/gpu/drm/nouveau/nvkm/subdev/fb/base.c index f1a1a52aab12..ce90242b8cce 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/fb/base.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/fb/base.c | |||
@@ -24,6 +24,7 @@ | |||
24 | #include "priv.h" | 24 | #include "priv.h" |
25 | #include "ram.h" | 25 | #include "ram.h" |
26 | 26 | ||
27 | #include <core/memory.h> | ||
27 | #include <subdev/bios.h> | 28 | #include <subdev/bios.h> |
28 | #include <subdev/bios/M0203.h> | 29 | #include <subdev/bios/M0203.h> |
29 | #include <engine/gr.h> | 30 | #include <engine/gr.h> |
@@ -142,6 +143,9 @@ nvkm_fb_dtor(struct nvkm_subdev *subdev) | |||
142 | struct nvkm_fb *fb = nvkm_fb(subdev); | 143 | struct nvkm_fb *fb = nvkm_fb(subdev); |
143 | int i; | 144 | int i; |
144 | 145 | ||
146 | nvkm_memory_del(&fb->mmu_wr); | ||
147 | nvkm_memory_del(&fb->mmu_rd); | ||
148 | |||
145 | for (i = 0; i < fb->tile.regions; i++) | 149 | for (i = 0; i < fb->tile.regions; i++) |
146 | fb->func->tile.fini(fb, i, &fb->tile.region[i]); | 150 | fb->func->tile.fini(fb, i, &fb->tile.region[i]); |
147 | 151 | ||
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/fb/gf100.c b/drivers/gpu/drm/nouveau/nvkm/subdev/fb/gf100.c index 008bb9849f3b..e649ead5ccfc 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/fb/gf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/fb/gf100.c | |||
@@ -24,6 +24,9 @@ | |||
24 | #include "gf100.h" | 24 | #include "gf100.h" |
25 | #include "ram.h" | 25 | #include "ram.h" |
26 | 26 | ||
27 | #include <core/memory.h> | ||
28 | #include <core/option.h> | ||
29 | |||
27 | extern const u8 gf100_pte_storage_type_map[256]; | 30 | extern const u8 gf100_pte_storage_type_map[256]; |
28 | 31 | ||
29 | bool | 32 | bool |
@@ -46,6 +49,28 @@ gf100_fb_intr(struct nvkm_fb *base) | |||
46 | nvkm_debug(subdev, "PBFB intr\n"); | 49 | nvkm_debug(subdev, "PBFB intr\n"); |
47 | } | 50 | } |
48 | 51 | ||
52 | int | ||
53 | gf100_fb_oneinit(struct nvkm_fb *fb) | ||
54 | { | ||
55 | struct nvkm_device *device = fb->subdev.device; | ||
56 | int ret, size = 0x1000; | ||
57 | |||
58 | size = nvkm_longopt(device->cfgopt, "MmuDebugBufferSize", size); | ||
59 | size = min(size, 0x1000); | ||
60 | |||
61 | ret = nvkm_memory_new(device, NVKM_MEM_TARGET_INST, size, 0x1000, | ||
62 | false, &fb->mmu_rd); | ||
63 | if (ret) | ||
64 | return ret; | ||
65 | |||
66 | ret = nvkm_memory_new(device, NVKM_MEM_TARGET_INST, size, 0x1000, | ||
67 | false, &fb->mmu_wr); | ||
68 | if (ret) | ||
69 | return ret; | ||
70 | |||
71 | return 0; | ||
72 | } | ||
73 | |||
49 | void | 74 | void |
50 | gf100_fb_init(struct nvkm_fb *base) | 75 | gf100_fb_init(struct nvkm_fb *base) |
51 | { | 76 | { |
@@ -98,6 +123,7 @@ gf100_fb_new_(const struct nvkm_fb_func *func, struct nvkm_device *device, | |||
98 | static const struct nvkm_fb_func | 123 | static const struct nvkm_fb_func |
99 | gf100_fb = { | 124 | gf100_fb = { |
100 | .dtor = gf100_fb_dtor, | 125 | .dtor = gf100_fb_dtor, |
126 | .oneinit = gf100_fb_oneinit, | ||
101 | .init = gf100_fb_init, | 127 | .init = gf100_fb_init, |
102 | .intr = gf100_fb_intr, | 128 | .intr = gf100_fb_intr, |
103 | .ram_new = gf100_ram_new, | 129 | .ram_new = gf100_ram_new, |
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/fb/gk104.c b/drivers/gpu/drm/nouveau/nvkm/subdev/fb/gk104.c index 0edb3c316f5c..b41f0f70038c 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/fb/gk104.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/fb/gk104.c | |||
@@ -27,6 +27,7 @@ | |||
27 | static const struct nvkm_fb_func | 27 | static const struct nvkm_fb_func |
28 | gk104_fb = { | 28 | gk104_fb = { |
29 | .dtor = gf100_fb_dtor, | 29 | .dtor = gf100_fb_dtor, |
30 | .oneinit = gf100_fb_oneinit, | ||
30 | .init = gf100_fb_init, | 31 | .init = gf100_fb_init, |
31 | .intr = gf100_fb_intr, | 32 | .intr = gf100_fb_intr, |
32 | .ram_new = gk104_ram_new, | 33 | .ram_new = gk104_ram_new, |
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/fb/gk20a.c b/drivers/gpu/drm/nouveau/nvkm/subdev/fb/gk20a.c index 81447eb4c948..6102e29dbbdf 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/fb/gk20a.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/fb/gk20a.c | |||
@@ -30,6 +30,7 @@ gk20a_fb_init(struct nvkm_fb *fb) | |||
30 | 30 | ||
31 | static const struct nvkm_fb_func | 31 | static const struct nvkm_fb_func |
32 | gk20a_fb = { | 32 | gk20a_fb = { |
33 | .oneinit = gf100_fb_oneinit, | ||
33 | .init = gk20a_fb_init, | 34 | .init = gk20a_fb_init, |
34 | .memtype_valid = gf100_fb_memtype_valid, | 35 | .memtype_valid = gf100_fb_memtype_valid, |
35 | }; | 36 | }; |
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/fb/gm107.c b/drivers/gpu/drm/nouveau/nvkm/subdev/fb/gm107.c index 2a91df8655dd..4869fdb753c9 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/fb/gm107.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/fb/gm107.c | |||
@@ -27,6 +27,7 @@ | |||
27 | static const struct nvkm_fb_func | 27 | static const struct nvkm_fb_func |
28 | gm107_fb = { | 28 | gm107_fb = { |
29 | .dtor = gf100_fb_dtor, | 29 | .dtor = gf100_fb_dtor, |
30 | .oneinit = gf100_fb_oneinit, | ||
30 | .init = gf100_fb_init, | 31 | .init = gf100_fb_init, |
31 | .intr = gf100_fb_intr, | 32 | .intr = gf100_fb_intr, |
32 | .ram_new = gm107_ram_new, | 33 | .ram_new = gm107_ram_new, |
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/fb/priv.h b/drivers/gpu/drm/nouveau/nvkm/subdev/fb/priv.h index 3c5600cd8ef4..d97d640e60a0 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/fb/priv.h +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/fb/priv.h | |||
@@ -59,5 +59,6 @@ void nv44_fb_tile_prog(struct nvkm_fb *, int, struct nvkm_fb_tile *); | |||
59 | void nv46_fb_tile_init(struct nvkm_fb *, int i, u32 addr, u32 size, | 59 | void nv46_fb_tile_init(struct nvkm_fb *, int i, u32 addr, u32 size, |
60 | u32 pitch, u32 flags, struct nvkm_fb_tile *); | 60 | u32 pitch, u32 flags, struct nvkm_fb_tile *); |
61 | 61 | ||
62 | int gf100_fb_oneinit(struct nvkm_fb *); | ||
62 | bool gf100_fb_memtype_valid(struct nvkm_fb *, u32); | 63 | bool gf100_fb_memtype_valid(struct nvkm_fb *, u32); |
63 | #endif | 64 | #endif |