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authorPali Rohár <pali.rohar@gmail.com>2016-02-19 13:35:39 -0500
committerTony Lindgren <tony@atomide.com>2016-02-19 13:35:39 -0500
commit98f42221501353067251fbf11e732707dbb68ce3 (patch)
treecbef371f6fd0e44efce7640c56806d255451af76
parent92e963f50fc74041b5e9e744c330dca48e04f08d (diff)
ARM: OMAP3: Add cpuidle parameters table for omap3430
Based on CPU type choose generic omap3 or omap3430 specific cpuidle parameters. Parameters for omap3430 were measured on Nokia N900 device and added by commit 5a1b1d3a9efa ("OMAP3: RX-51: Pass cpu idle parameters") which were later removed by commit 231900afba52 ("ARM: OMAP3: cpuidle - remove rx51 cpuidle parameters table") due to huge code complexity. This patch brings cpuidle parameters for omap3430 devices again, but uses simple condition based on CPU type. Fixes: 231900afba52 ("ARM: OMAP3: cpuidle - remove rx51 cpuidle parameters table") Signed-off-by: Pali Rohár <pali.rohar@gmail.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
-rw-r--r--arch/arm/mach-omap2/cpuidle34xx.c69
1 files changed, 68 insertions, 1 deletions
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c
index aa7b379e2661..2a3db0bd9e15 100644
--- a/arch/arm/mach-omap2/cpuidle34xx.c
+++ b/arch/arm/mach-omap2/cpuidle34xx.c
@@ -34,6 +34,7 @@
34#include "pm.h" 34#include "pm.h"
35#include "control.h" 35#include "control.h"
36#include "common.h" 36#include "common.h"
37#include "soc.h"
37 38
38/* Mach specific information to be recorded in the C-state driver_data */ 39/* Mach specific information to be recorded in the C-state driver_data */
39struct omap3_idle_statedata { 40struct omap3_idle_statedata {
@@ -315,6 +316,69 @@ static struct cpuidle_driver omap3_idle_driver = {
315 .safe_state_index = 0, 316 .safe_state_index = 0,
316}; 317};
317 318
319/*
320 * Numbers based on measurements made in October 2009 for PM optimized kernel
321 * with CPU freq enabled on device Nokia N900. Assumes OPP2 (main idle OPP,
322 * and worst case latencies).
323 */
324static struct cpuidle_driver omap3430_idle_driver = {
325 .name = "omap3430_idle",
326 .owner = THIS_MODULE,
327 .states = {
328 {
329 .enter = omap3_enter_idle_bm,
330 .exit_latency = 110 + 162,
331 .target_residency = 5,
332 .name = "C1",
333 .desc = "MPU ON + CORE ON",
334 },
335 {
336 .enter = omap3_enter_idle_bm,
337 .exit_latency = 106 + 180,
338 .target_residency = 309,
339 .name = "C2",
340 .desc = "MPU ON + CORE ON",
341 },
342 {
343 .enter = omap3_enter_idle_bm,
344 .exit_latency = 107 + 410,
345 .target_residency = 46057,
346 .name = "C3",
347 .desc = "MPU RET + CORE ON",
348 },
349 {
350 .enter = omap3_enter_idle_bm,
351 .exit_latency = 121 + 3374,
352 .target_residency = 46057,
353 .name = "C4",
354 .desc = "MPU OFF + CORE ON",
355 },
356 {
357 .enter = omap3_enter_idle_bm,
358 .exit_latency = 855 + 1146,
359 .target_residency = 46057,
360 .name = "C5",
361 .desc = "MPU RET + CORE RET",
362 },
363 {
364 .enter = omap3_enter_idle_bm,
365 .exit_latency = 7580 + 4134,
366 .target_residency = 484329,
367 .name = "C6",
368 .desc = "MPU OFF + CORE RET",
369 },
370 {
371 .enter = omap3_enter_idle_bm,
372 .exit_latency = 7505 + 15274,
373 .target_residency = 484329,
374 .name = "C7",
375 .desc = "MPU OFF + CORE OFF",
376 },
377 },
378 .state_count = ARRAY_SIZE(omap3_idle_data),
379 .safe_state_index = 0,
380};
381
318/* Public functions */ 382/* Public functions */
319 383
320/** 384/**
@@ -333,5 +397,8 @@ int __init omap3_idle_init(void)
333 if (!mpu_pd || !core_pd || !per_pd || !cam_pd) 397 if (!mpu_pd || !core_pd || !per_pd || !cam_pd)
334 return -ENODEV; 398 return -ENODEV;
335 399
336 return cpuidle_register(&omap3_idle_driver, NULL); 400 if (cpu_is_omap3430())
401 return cpuidle_register(&omap3430_idle_driver, NULL);
402 else
403 return cpuidle_register(&omap3_idle_driver, NULL);
337} 404}