diff options
author | Shawn Guo <shawn.guo@linaro.org> | 2016-12-28 01:41:37 -0500 |
---|---|---|
committer | Shawn Guo <shawn.guo@linaro.org> | 2017-01-27 21:17:40 -0500 |
commit | 98ae9869d187ab737b5b231e7879d15e1e9a763d (patch) | |
tree | a70a2d240e7cb20ec43e58f9ef3b558c4678cb4d | |
parent | 83d7115250c181da6dacd187671e174f8be71dfd (diff) |
drm: zte: make zx_plane accessible from zx_vou driver
Move struct zx_plane from zx_plane.c to zx_plane.h, so that it can be
accessed from zx_vou driver, and we can save the use of struct
zx_layer_data completely. More importantly, those additional data used
by VOU controller to enable/disable graphic and video layers can later
be added and accessed much more easily from zx_vou driver.
While at it, we make two changes to zx_plane_init() interface:
- Encode struct device pointer in zx_plane, so that we do not need to
pass it as a parameter.
- Change return of zx_plane_init() from struct drm_plane pointer to
error code, since we can get the pointer from zx_plane in zx_vou
driver now.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
-rw-r--r-- | drivers/gpu/drm/zte/zx_plane.c | 36 | ||||
-rw-r--r-- | drivers/gpu/drm/zte/zx_plane.h | 11 | ||||
-rw-r--r-- | drivers/gpu/drm/zte/zx_vou.c | 31 |
3 files changed, 33 insertions, 45 deletions
diff --git a/drivers/gpu/drm/zte/zx_plane.c b/drivers/gpu/drm/zte/zx_plane.c index 546eb92a94e8..78d29b1db91c 100644 --- a/drivers/gpu/drm/zte/zx_plane.c +++ b/drivers/gpu/drm/zte/zx_plane.c | |||
@@ -21,16 +21,6 @@ | |||
21 | #include "zx_plane_regs.h" | 21 | #include "zx_plane_regs.h" |
22 | #include "zx_vou.h" | 22 | #include "zx_vou.h" |
23 | 23 | ||
24 | struct zx_plane { | ||
25 | struct drm_plane plane; | ||
26 | void __iomem *layer; | ||
27 | void __iomem *csc; | ||
28 | void __iomem *hbsc; | ||
29 | void __iomem *rsz; | ||
30 | }; | ||
31 | |||
32 | #define to_zx_plane(plane) container_of(plane, struct zx_plane, plane) | ||
33 | |||
34 | static const uint32_t gl_formats[] = { | 24 | static const uint32_t gl_formats[] = { |
35 | DRM_FORMAT_ARGB8888, | 25 | DRM_FORMAT_ARGB8888, |
36 | DRM_FORMAT_XRGB8888, | 26 | DRM_FORMAT_XRGB8888, |
@@ -248,28 +238,16 @@ static void zx_plane_hbsc_init(struct zx_plane *zplane) | |||
248 | zx_writel(hbsc + HBSC_THRESHOLD_COL3, (0x3c0 << 16) | 0x40); | 238 | zx_writel(hbsc + HBSC_THRESHOLD_COL3, (0x3c0 << 16) | 0x40); |
249 | } | 239 | } |
250 | 240 | ||
251 | struct drm_plane *zx_plane_init(struct drm_device *drm, struct device *dev, | 241 | int zx_plane_init(struct drm_device *drm, struct zx_plane *zplane, |
252 | struct zx_layer_data *data, | 242 | enum drm_plane_type type) |
253 | enum drm_plane_type type) | ||
254 | { | 243 | { |
255 | const struct drm_plane_helper_funcs *helper; | 244 | const struct drm_plane_helper_funcs *helper; |
256 | struct zx_plane *zplane; | 245 | struct drm_plane *plane = &zplane->plane; |
257 | struct drm_plane *plane; | 246 | struct device *dev = zplane->dev; |
258 | const uint32_t *formats; | 247 | const uint32_t *formats; |
259 | unsigned int format_count; | 248 | unsigned int format_count; |
260 | int ret; | 249 | int ret; |
261 | 250 | ||
262 | zplane = devm_kzalloc(dev, sizeof(*zplane), GFP_KERNEL); | ||
263 | if (!zplane) | ||
264 | return ERR_PTR(-ENOMEM); | ||
265 | |||
266 | plane = &zplane->plane; | ||
267 | |||
268 | zplane->layer = data->layer; | ||
269 | zplane->hbsc = data->hbsc; | ||
270 | zplane->csc = data->csc; | ||
271 | zplane->rsz = data->rsz; | ||
272 | |||
273 | zx_plane_hbsc_init(zplane); | 251 | zx_plane_hbsc_init(zplane); |
274 | 252 | ||
275 | switch (type) { | 253 | switch (type) { |
@@ -282,7 +260,7 @@ struct drm_plane *zx_plane_init(struct drm_device *drm, struct device *dev, | |||
282 | /* TODO: add video layer (vl) support */ | 260 | /* TODO: add video layer (vl) support */ |
283 | break; | 261 | break; |
284 | default: | 262 | default: |
285 | return ERR_PTR(-ENODEV); | 263 | return -ENODEV; |
286 | } | 264 | } |
287 | 265 | ||
288 | ret = drm_universal_plane_init(drm, plane, VOU_CRTC_MASK, | 266 | ret = drm_universal_plane_init(drm, plane, VOU_CRTC_MASK, |
@@ -290,10 +268,10 @@ struct drm_plane *zx_plane_init(struct drm_device *drm, struct device *dev, | |||
290 | type, NULL); | 268 | type, NULL); |
291 | if (ret) { | 269 | if (ret) { |
292 | DRM_DEV_ERROR(dev, "failed to init universal plane: %d\n", ret); | 270 | DRM_DEV_ERROR(dev, "failed to init universal plane: %d\n", ret); |
293 | return ERR_PTR(ret); | 271 | return ret; |
294 | } | 272 | } |
295 | 273 | ||
296 | drm_plane_helper_add(plane, helper); | 274 | drm_plane_helper_add(plane, helper); |
297 | 275 | ||
298 | return plane; | 276 | return 0; |
299 | } | 277 | } |
diff --git a/drivers/gpu/drm/zte/zx_plane.h b/drivers/gpu/drm/zte/zx_plane.h index 2b82cd558d9d..264a92e0b532 100644 --- a/drivers/gpu/drm/zte/zx_plane.h +++ b/drivers/gpu/drm/zte/zx_plane.h | |||
@@ -11,16 +11,19 @@ | |||
11 | #ifndef __ZX_PLANE_H__ | 11 | #ifndef __ZX_PLANE_H__ |
12 | #define __ZX_PLANE_H__ | 12 | #define __ZX_PLANE_H__ |
13 | 13 | ||
14 | struct zx_layer_data { | 14 | struct zx_plane { |
15 | struct drm_plane plane; | ||
16 | struct device *dev; | ||
15 | void __iomem *layer; | 17 | void __iomem *layer; |
16 | void __iomem *csc; | 18 | void __iomem *csc; |
17 | void __iomem *hbsc; | 19 | void __iomem *hbsc; |
18 | void __iomem *rsz; | 20 | void __iomem *rsz; |
19 | }; | 21 | }; |
20 | 22 | ||
21 | struct drm_plane *zx_plane_init(struct drm_device *drm, struct device *dev, | 23 | #define to_zx_plane(plane) container_of(plane, struct zx_plane, plane) |
22 | struct zx_layer_data *data, | 24 | |
23 | enum drm_plane_type type); | 25 | int zx_plane_init(struct drm_device *drm, struct zx_plane *zplane, |
26 | enum drm_plane_type type); | ||
24 | void zx_plane_set_update(struct drm_plane *plane); | 27 | void zx_plane_set_update(struct drm_plane *plane); |
25 | 28 | ||
26 | #endif /* __ZX_PLANE_H__ */ | 29 | #endif /* __ZX_PLANE_H__ */ |
diff --git a/drivers/gpu/drm/zte/zx_vou.c b/drivers/gpu/drm/zte/zx_vou.c index f89ad7f72fdb..1bc8f8762956 100644 --- a/drivers/gpu/drm/zte/zx_vou.c +++ b/drivers/gpu/drm/zte/zx_vou.c | |||
@@ -303,7 +303,7 @@ static int zx_crtc_init(struct drm_device *drm, struct zx_vou_hw *vou, | |||
303 | enum vou_chn_type chn_type) | 303 | enum vou_chn_type chn_type) |
304 | { | 304 | { |
305 | struct device *dev = vou->dev; | 305 | struct device *dev = vou->dev; |
306 | struct zx_layer_data data; | 306 | struct zx_plane *zplane; |
307 | struct zx_crtc *zcrtc; | 307 | struct zx_crtc *zcrtc; |
308 | int ret; | 308 | int ret; |
309 | 309 | ||
@@ -314,19 +314,25 @@ static int zx_crtc_init(struct drm_device *drm, struct zx_vou_hw *vou, | |||
314 | zcrtc->vou = vou; | 314 | zcrtc->vou = vou; |
315 | zcrtc->chn_type = chn_type; | 315 | zcrtc->chn_type = chn_type; |
316 | 316 | ||
317 | zplane = devm_kzalloc(dev, sizeof(*zplane), GFP_KERNEL); | ||
318 | if (!zplane) | ||
319 | return -ENOMEM; | ||
320 | |||
321 | zplane->dev = dev; | ||
322 | |||
317 | if (chn_type == VOU_CHN_MAIN) { | 323 | if (chn_type == VOU_CHN_MAIN) { |
318 | data.layer = vou->osd + MAIN_GL_OFFSET; | 324 | zplane->layer = vou->osd + MAIN_GL_OFFSET; |
319 | data.csc = vou->osd + MAIN_CSC_OFFSET; | 325 | zplane->csc = vou->osd + MAIN_CSC_OFFSET; |
320 | data.hbsc = vou->osd + MAIN_HBSC_OFFSET; | 326 | zplane->hbsc = vou->osd + MAIN_HBSC_OFFSET; |
321 | data.rsz = vou->otfppu + MAIN_RSZ_OFFSET; | 327 | zplane->rsz = vou->otfppu + MAIN_RSZ_OFFSET; |
322 | zcrtc->chnreg = vou->osd + OSD_MAIN_CHN; | 328 | zcrtc->chnreg = vou->osd + OSD_MAIN_CHN; |
323 | zcrtc->regs = &main_crtc_regs; | 329 | zcrtc->regs = &main_crtc_regs; |
324 | zcrtc->bits = &main_crtc_bits; | 330 | zcrtc->bits = &main_crtc_bits; |
325 | } else { | 331 | } else { |
326 | data.layer = vou->osd + AUX_GL_OFFSET; | 332 | zplane->layer = vou->osd + AUX_GL_OFFSET; |
327 | data.csc = vou->osd + AUX_CSC_OFFSET; | 333 | zplane->csc = vou->osd + AUX_CSC_OFFSET; |
328 | data.hbsc = vou->osd + AUX_HBSC_OFFSET; | 334 | zplane->hbsc = vou->osd + AUX_HBSC_OFFSET; |
329 | data.rsz = vou->otfppu + AUX_RSZ_OFFSET; | 335 | zplane->rsz = vou->otfppu + AUX_RSZ_OFFSET; |
330 | zcrtc->chnreg = vou->osd + OSD_AUX_CHN; | 336 | zcrtc->chnreg = vou->osd + OSD_AUX_CHN; |
331 | zcrtc->regs = &aux_crtc_regs; | 337 | zcrtc->regs = &aux_crtc_regs; |
332 | zcrtc->bits = &aux_crtc_bits; | 338 | zcrtc->bits = &aux_crtc_bits; |
@@ -340,13 +346,14 @@ static int zx_crtc_init(struct drm_device *drm, struct zx_vou_hw *vou, | |||
340 | return ret; | 346 | return ret; |
341 | } | 347 | } |
342 | 348 | ||
343 | zcrtc->primary = zx_plane_init(drm, dev, &data, DRM_PLANE_TYPE_PRIMARY); | 349 | ret = zx_plane_init(drm, zplane, DRM_PLANE_TYPE_PRIMARY); |
344 | if (IS_ERR(zcrtc->primary)) { | 350 | if (ret) { |
345 | ret = PTR_ERR(zcrtc->primary); | ||
346 | DRM_DEV_ERROR(dev, "failed to init primary plane: %d\n", ret); | 351 | DRM_DEV_ERROR(dev, "failed to init primary plane: %d\n", ret); |
347 | return ret; | 352 | return ret; |
348 | } | 353 | } |
349 | 354 | ||
355 | zcrtc->primary = &zplane->plane; | ||
356 | |||
350 | ret = drm_crtc_init_with_planes(drm, &zcrtc->crtc, zcrtc->primary, NULL, | 357 | ret = drm_crtc_init_with_planes(drm, &zcrtc->crtc, zcrtc->primary, NULL, |
351 | &zx_crtc_funcs, NULL); | 358 | &zx_crtc_funcs, NULL); |
352 | if (ret) { | 359 | if (ret) { |