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authorJan Glauber <jglauber@cavium.com>2016-08-24 17:25:46 -0400
committerWolfram Sang <wsa@the-dreams.de>2016-08-25 18:41:57 -0400
commit97d970046a15bf5baac849dbeac56310c8ee3966 (patch)
tree0a61089daf63501a2db807f70ad6f579fd8fd397
parent1e5866711accf16e931c4f8174cf898b554e9f4a (diff)
i2c: octeon,thunderx: Move register offsets to struct
The register offsets are different between Octeon and ThunderX so move them into the algorithm struct and get rid of the define. Signed-off-by: Jan Glauber <jglauber@cavium.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-rw-r--r--drivers/i2c/busses/i2c-octeon-core.c28
-rw-r--r--drivers/i2c/busses/i2c-octeon-core.h35
-rw-r--r--drivers/i2c/busses/i2c-octeon-platdrv.c4
-rw-r--r--drivers/i2c/busses/i2c-thunderx-pcidrv.c4
4 files changed, 40 insertions, 31 deletions
diff --git a/drivers/i2c/busses/i2c-octeon-core.c b/drivers/i2c/busses/i2c-octeon-core.c
index 23384efc101a..a327a5fa453e 100644
--- a/drivers/i2c/busses/i2c-octeon-core.c
+++ b/drivers/i2c/busses/i2c-octeon-core.c
@@ -99,7 +99,7 @@ static int octeon_i2c_wait(struct octeon_i2c *i2c)
99 99
100static bool octeon_i2c_hlc_test_valid(struct octeon_i2c *i2c) 100static bool octeon_i2c_hlc_test_valid(struct octeon_i2c *i2c)
101{ 101{
102 return (__raw_readq(i2c->twsi_base + SW_TWSI) & SW_TWSI_V) == 0; 102 return (__raw_readq(i2c->twsi_base + SW_TWSI(i2c)) & SW_TWSI_V) == 0;
103} 103}
104 104
105static bool octeon_i2c_hlc_test_ready(struct octeon_i2c *i2c, bool *first) 105static bool octeon_i2c_hlc_test_ready(struct octeon_i2c *i2c, bool *first)
@@ -446,12 +446,12 @@ static int octeon_i2c_hlc_read(struct octeon_i2c *i2c, struct i2c_msg *msgs)
446 else 446 else
447 cmd |= SW_TWSI_OP_7; 447 cmd |= SW_TWSI_OP_7;
448 448
449 octeon_i2c_writeq_flush(cmd, i2c->twsi_base + SW_TWSI); 449 octeon_i2c_writeq_flush(cmd, i2c->twsi_base + SW_TWSI(i2c));
450 ret = octeon_i2c_hlc_wait(i2c); 450 ret = octeon_i2c_hlc_wait(i2c);
451 if (ret) 451 if (ret)
452 goto err; 452 goto err;
453 453
454 cmd = __raw_readq(i2c->twsi_base + SW_TWSI); 454 cmd = __raw_readq(i2c->twsi_base + SW_TWSI(i2c));
455 if ((cmd & SW_TWSI_R) == 0) 455 if ((cmd & SW_TWSI_R) == 0)
456 return -EAGAIN; 456 return -EAGAIN;
457 457
@@ -459,7 +459,7 @@ static int octeon_i2c_hlc_read(struct octeon_i2c *i2c, struct i2c_msg *msgs)
459 msgs[0].buf[j] = (cmd >> (8 * i)) & 0xff; 459 msgs[0].buf[j] = (cmd >> (8 * i)) & 0xff;
460 460
461 if (msgs[0].len > 4) { 461 if (msgs[0].len > 4) {
462 cmd = __raw_readq(i2c->twsi_base + SW_TWSI_EXT); 462 cmd = __raw_readq(i2c->twsi_base + SW_TWSI_EXT(i2c));
463 for (i = 0; i < msgs[0].len - 4 && i < 4; i++, j--) 463 for (i = 0; i < msgs[0].len - 4 && i < 4; i++, j--)
464 msgs[0].buf[j] = (cmd >> (8 * i)) & 0xff; 464 msgs[0].buf[j] = (cmd >> (8 * i)) & 0xff;
465 } 465 }
@@ -496,15 +496,15 @@ static int octeon_i2c_hlc_write(struct octeon_i2c *i2c, struct i2c_msg *msgs)
496 496
497 for (i = 0; i < msgs[0].len - 4 && i < 4; i++, j--) 497 for (i = 0; i < msgs[0].len - 4 && i < 4; i++, j--)
498 ext |= (u64)msgs[0].buf[j] << (8 * i); 498 ext |= (u64)msgs[0].buf[j] << (8 * i);
499 octeon_i2c_writeq_flush(ext, i2c->twsi_base + SW_TWSI_EXT); 499 octeon_i2c_writeq_flush(ext, i2c->twsi_base + SW_TWSI_EXT(i2c));
500 } 500 }
501 501
502 octeon_i2c_writeq_flush(cmd, i2c->twsi_base + SW_TWSI); 502 octeon_i2c_writeq_flush(cmd, i2c->twsi_base + SW_TWSI(i2c));
503 ret = octeon_i2c_hlc_wait(i2c); 503 ret = octeon_i2c_hlc_wait(i2c);
504 if (ret) 504 if (ret)
505 goto err; 505 goto err;
506 506
507 cmd = __raw_readq(i2c->twsi_base + SW_TWSI); 507 cmd = __raw_readq(i2c->twsi_base + SW_TWSI(i2c));
508 if ((cmd & SW_TWSI_R) == 0) 508 if ((cmd & SW_TWSI_R) == 0)
509 return -EAGAIN; 509 return -EAGAIN;
510 510
@@ -539,19 +539,19 @@ static int octeon_i2c_hlc_comp_read(struct octeon_i2c *i2c, struct i2c_msg *msgs
539 cmd |= SW_TWSI_EIA; 539 cmd |= SW_TWSI_EIA;
540 ext = (u64)msgs[0].buf[0] << SW_TWSI_IA_SHIFT; 540 ext = (u64)msgs[0].buf[0] << SW_TWSI_IA_SHIFT;
541 cmd |= (u64)msgs[0].buf[1] << SW_TWSI_IA_SHIFT; 541 cmd |= (u64)msgs[0].buf[1] << SW_TWSI_IA_SHIFT;
542 octeon_i2c_writeq_flush(ext, i2c->twsi_base + SW_TWSI_EXT); 542 octeon_i2c_writeq_flush(ext, i2c->twsi_base + SW_TWSI_EXT(i2c));
543 } else { 543 } else {
544 cmd |= (u64)msgs[0].buf[0] << SW_TWSI_IA_SHIFT; 544 cmd |= (u64)msgs[0].buf[0] << SW_TWSI_IA_SHIFT;
545 } 545 }
546 546
547 octeon_i2c_hlc_int_clear(i2c); 547 octeon_i2c_hlc_int_clear(i2c);
548 octeon_i2c_writeq_flush(cmd, i2c->twsi_base + SW_TWSI); 548 octeon_i2c_writeq_flush(cmd, i2c->twsi_base + SW_TWSI(i2c));
549 549
550 ret = octeon_i2c_hlc_wait(i2c); 550 ret = octeon_i2c_hlc_wait(i2c);
551 if (ret) 551 if (ret)
552 goto err; 552 goto err;
553 553
554 cmd = __raw_readq(i2c->twsi_base + SW_TWSI); 554 cmd = __raw_readq(i2c->twsi_base + SW_TWSI(i2c));
555 if ((cmd & SW_TWSI_R) == 0) 555 if ((cmd & SW_TWSI_R) == 0)
556 return -EAGAIN; 556 return -EAGAIN;
557 557
@@ -559,7 +559,7 @@ static int octeon_i2c_hlc_comp_read(struct octeon_i2c *i2c, struct i2c_msg *msgs
559 msgs[1].buf[j] = (cmd >> (8 * i)) & 0xff; 559 msgs[1].buf[j] = (cmd >> (8 * i)) & 0xff;
560 560
561 if (msgs[1].len > 4) { 561 if (msgs[1].len > 4) {
562 cmd = __raw_readq(i2c->twsi_base + SW_TWSI_EXT); 562 cmd = __raw_readq(i2c->twsi_base + SW_TWSI_EXT(i2c));
563 for (i = 0; i < msgs[1].len - 4 && i < 4; i++, j--) 563 for (i = 0; i < msgs[1].len - 4 && i < 4; i++, j--)
564 msgs[1].buf[j] = (cmd >> (8 * i)) & 0xff; 564 msgs[1].buf[j] = (cmd >> (8 * i)) & 0xff;
565 } 565 }
@@ -606,16 +606,16 @@ static int octeon_i2c_hlc_comp_write(struct octeon_i2c *i2c, struct i2c_msg *msg
606 set_ext = true; 606 set_ext = true;
607 } 607 }
608 if (set_ext) 608 if (set_ext)
609 octeon_i2c_writeq_flush(ext, i2c->twsi_base + SW_TWSI_EXT); 609 octeon_i2c_writeq_flush(ext, i2c->twsi_base + SW_TWSI_EXT(i2c));
610 610
611 octeon_i2c_hlc_int_clear(i2c); 611 octeon_i2c_hlc_int_clear(i2c);
612 octeon_i2c_writeq_flush(cmd, i2c->twsi_base + SW_TWSI); 612 octeon_i2c_writeq_flush(cmd, i2c->twsi_base + SW_TWSI(i2c));
613 613
614 ret = octeon_i2c_hlc_wait(i2c); 614 ret = octeon_i2c_hlc_wait(i2c);
615 if (ret) 615 if (ret)
616 goto err; 616 goto err;
617 617
618 cmd = __raw_readq(i2c->twsi_base + SW_TWSI); 618 cmd = __raw_readq(i2c->twsi_base + SW_TWSI(i2c));
619 if ((cmd & SW_TWSI_R) == 0) 619 if ((cmd & SW_TWSI_R) == 0)
620 return -EAGAIN; 620 return -EAGAIN;
621 621
diff --git a/drivers/i2c/busses/i2c-octeon-core.h b/drivers/i2c/busses/i2c-octeon-core.h
index 2ed6f7a36b88..87151ea74acd 100644
--- a/drivers/i2c/busses/i2c-octeon-core.h
+++ b/drivers/i2c/busses/i2c-octeon-core.h
@@ -8,17 +8,6 @@
8#include <linux/kernel.h> 8#include <linux/kernel.h>
9#include <linux/pci.h> 9#include <linux/pci.h>
10 10
11/* Register offsets */
12#if IS_ENABLED(CONFIG_I2C_THUNDERX)
13 #define SW_TWSI 0x1000
14 #define TWSI_INT 0x1010
15 #define SW_TWSI_EXT 0x1018
16#else
17 #define SW_TWSI 0x00
18 #define TWSI_INT 0x10
19 #define SW_TWSI_EXT 0x18
20#endif
21
22/* Controller command patterns */ 11/* Controller command patterns */
23#define SW_TWSI_V BIT_ULL(63) /* Valid bit */ 12#define SW_TWSI_V BIT_ULL(63) /* Valid bit */
24#define SW_TWSI_EIA BIT_ULL(61) /* Extended internal address */ 13#define SW_TWSI_EIA BIT_ULL(61) /* Extended internal address */
@@ -98,9 +87,21 @@
98 87
99#define I2C_OCTEON_EVENT_WAIT 80 /* microseconds */ 88#define I2C_OCTEON_EVENT_WAIT 80 /* microseconds */
100 89
90/* Register offsets */
91struct octeon_i2c_reg_offset {
92 unsigned int sw_twsi;
93 unsigned int twsi_int;
94 unsigned int sw_twsi_ext;
95};
96
97#define SW_TWSI(x) (x->roff.sw_twsi)
98#define TWSI_INT(x) (x->roff.twsi_int)
99#define SW_TWSI_EXT(x) (x->roff.sw_twsi_ext)
100
101struct octeon_i2c { 101struct octeon_i2c {
102 wait_queue_head_t queue; 102 wait_queue_head_t queue;
103 struct i2c_adapter adap; 103 struct i2c_adapter adap;
104 struct octeon_i2c_reg_offset roff;
104 struct clk *clk; 105 struct clk *clk;
105 int irq; 106 int irq;
106 int hlc_irq; /* For cn7890 only */ 107 int hlc_irq; /* For cn7890 only */
@@ -142,9 +143,9 @@ static inline void octeon_i2c_reg_write(struct octeon_i2c *i2c, u64 eop_reg, u8
142{ 143{
143 u64 tmp; 144 u64 tmp;
144 145
145 __raw_writeq(SW_TWSI_V | eop_reg | data, i2c->twsi_base + SW_TWSI); 146 __raw_writeq(SW_TWSI_V | eop_reg | data, i2c->twsi_base + SW_TWSI(i2c));
146 do { 147 do {
147 tmp = __raw_readq(i2c->twsi_base + SW_TWSI); 148 tmp = __raw_readq(i2c->twsi_base + SW_TWSI(i2c));
148 } while ((tmp & SW_TWSI_V) != 0); 149 } while ((tmp & SW_TWSI_V) != 0);
149} 150}
150 151
@@ -166,9 +167,9 @@ static inline u8 octeon_i2c_reg_read(struct octeon_i2c *i2c, u64 eop_reg)
166{ 167{
167 u64 tmp; 168 u64 tmp;
168 169
169 __raw_writeq(SW_TWSI_V | eop_reg | SW_TWSI_R, i2c->twsi_base + SW_TWSI); 170 __raw_writeq(SW_TWSI_V | eop_reg | SW_TWSI_R, i2c->twsi_base + SW_TWSI(i2c));
170 do { 171 do {
171 tmp = __raw_readq(i2c->twsi_base + SW_TWSI); 172 tmp = __raw_readq(i2c->twsi_base + SW_TWSI(i2c));
172 } while ((tmp & SW_TWSI_V) != 0); 173 } while ((tmp & SW_TWSI_V) != 0);
173 174
174 return tmp & 0xFF; 175 return tmp & 0xFF;
@@ -189,7 +190,7 @@ static inline u8 octeon_i2c_reg_read(struct octeon_i2c *i2c, u64 eop_reg)
189 */ 190 */
190static inline u64 octeon_i2c_read_int(struct octeon_i2c *i2c) 191static inline u64 octeon_i2c_read_int(struct octeon_i2c *i2c)
191{ 192{
192 return __raw_readq(i2c->twsi_base + TWSI_INT); 193 return __raw_readq(i2c->twsi_base + TWSI_INT(i2c));
193} 194}
194 195
195/** 196/**
@@ -199,7 +200,7 @@ static inline u64 octeon_i2c_read_int(struct octeon_i2c *i2c)
199 */ 200 */
200static inline void octeon_i2c_write_int(struct octeon_i2c *i2c, u64 data) 201static inline void octeon_i2c_write_int(struct octeon_i2c *i2c, u64 data)
201{ 202{
202 octeon_i2c_writeq_flush(data, i2c->twsi_base + TWSI_INT); 203 octeon_i2c_writeq_flush(data, i2c->twsi_base + TWSI_INT(i2c));
203} 204}
204 205
205/* Prototypes */ 206/* Prototypes */
diff --git a/drivers/i2c/busses/i2c-octeon-platdrv.c b/drivers/i2c/busses/i2c-octeon-platdrv.c
index 53fa9a0d96bb..2861821bbd60 100644
--- a/drivers/i2c/busses/i2c-octeon-platdrv.c
+++ b/drivers/i2c/busses/i2c-octeon-platdrv.c
@@ -163,6 +163,10 @@ static int octeon_i2c_probe(struct platform_device *pdev)
163 } 163 }
164 i2c->dev = &pdev->dev; 164 i2c->dev = &pdev->dev;
165 165
166 i2c->roff.sw_twsi = 0x00;
167 i2c->roff.twsi_int = 0x10;
168 i2c->roff.sw_twsi_ext = 0x18;
169
166 res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 170 res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
167 i2c->twsi_base = devm_ioremap_resource(&pdev->dev, res_mem); 171 i2c->twsi_base = devm_ioremap_resource(&pdev->dev, res_mem);
168 if (IS_ERR(i2c->twsi_base)) { 172 if (IS_ERR(i2c->twsi_base)) {
diff --git a/drivers/i2c/busses/i2c-thunderx-pcidrv.c b/drivers/i2c/busses/i2c-thunderx-pcidrv.c
index e8c3ce0eaf4d..bba5b429f69c 100644
--- a/drivers/i2c/busses/i2c-thunderx-pcidrv.c
+++ b/drivers/i2c/busses/i2c-thunderx-pcidrv.c
@@ -158,6 +158,10 @@ static int thunder_i2c_probe_pci(struct pci_dev *pdev,
158 if (!i2c) 158 if (!i2c)
159 return -ENOMEM; 159 return -ENOMEM;
160 160
161 i2c->roff.sw_twsi = 0x1000;
162 i2c->roff.twsi_int = 0x1010;
163 i2c->roff.sw_twsi_ext = 0x1018;
164
161 i2c->dev = dev; 165 i2c->dev = dev;
162 pci_set_drvdata(pdev, i2c); 166 pci_set_drvdata(pdev, i2c);
163 ret = pcim_enable_device(pdev); 167 ret = pcim_enable_device(pdev);