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authorMarc Zyngier <marc.zyngier@arm.com>2014-06-06 09:16:21 -0400
committerCatalin Marinas <catalin.marinas@arm.com>2014-07-04 11:16:52 -0400
commit974c8e450b9327a03453a4a450a2030b1bd42b5f (patch)
treec0e2539e84fe0b169ebd350368ca0b6da543ae53
parent923b8f5044da753e4985ab15c1374ced2cdf616c (diff)
arm64: fix el2_setup check of CurrentEL
The CurrentEL system register reports the Current Exception Level of the CPU. It doesn't say anything about the stack handling, and yet we compare it to PSR_MODE_EL2t and PSR_MODE_EL2h. It works by chance because PSR_MODE_EL2t happens to match the right bits, but that's otherwise a very bad idea. Just check for the EL value instead. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> [catalin.marinas@arm.com: fixed arch/arm64/kernel/efi-entry.S] Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
-rw-r--r--arch/arm64/include/asm/ptrace.h4
-rw-r--r--arch/arm64/kernel/efi-entry.S3
-rw-r--r--arch/arm64/kernel/head.S3
3 files changed, 6 insertions, 4 deletions
diff --git a/arch/arm64/include/asm/ptrace.h b/arch/arm64/include/asm/ptrace.h
index a429b5940be2..501000fadb6f 100644
--- a/arch/arm64/include/asm/ptrace.h
+++ b/arch/arm64/include/asm/ptrace.h
@@ -21,6 +21,10 @@
21 21
22#include <uapi/asm/ptrace.h> 22#include <uapi/asm/ptrace.h>
23 23
24/* Current Exception Level values, as contained in CurrentEL */
25#define CurrentEL_EL1 (1 << 2)
26#define CurrentEL_EL2 (2 << 2)
27
24/* AArch32-specific ptrace requests */ 28/* AArch32-specific ptrace requests */
25#define COMPAT_PTRACE_GETREGS 12 29#define COMPAT_PTRACE_GETREGS 12
26#define COMPAT_PTRACE_SETREGS 13 30#define COMPAT_PTRACE_SETREGS 13
diff --git a/arch/arm64/kernel/efi-entry.S b/arch/arm64/kernel/efi-entry.S
index 66716c9b9e5f..619b1dd7bcde 100644
--- a/arch/arm64/kernel/efi-entry.S
+++ b/arch/arm64/kernel/efi-entry.S
@@ -78,8 +78,7 @@ ENTRY(efi_stub_entry)
78 78
79 /* Turn off Dcache and MMU */ 79 /* Turn off Dcache and MMU */
80 mrs x0, CurrentEL 80 mrs x0, CurrentEL
81 cmp x0, #PSR_MODE_EL2t 81 cmp x0, #CurrentEL_EL2
82 ccmp x0, #PSR_MODE_EL2h, #0x4, ne
83 b.ne 1f 82 b.ne 1f
84 mrs x0, sctlr_el2 83 mrs x0, sctlr_el2
85 bic x0, x0, #1 << 0 // clear SCTLR.M 84 bic x0, x0, #1 << 0 // clear SCTLR.M
diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S
index a96d3a6a63f6..a2c1195abb7f 100644
--- a/arch/arm64/kernel/head.S
+++ b/arch/arm64/kernel/head.S
@@ -270,8 +270,7 @@ ENDPROC(stext)
270 */ 270 */
271ENTRY(el2_setup) 271ENTRY(el2_setup)
272 mrs x0, CurrentEL 272 mrs x0, CurrentEL
273 cmp x0, #PSR_MODE_EL2t 273 cmp x0, #CurrentEL_EL2
274 ccmp x0, #PSR_MODE_EL2h, #0x4, ne
275 b.ne 1f 274 b.ne 1f
276 mrs x0, sctlr_el2 275 mrs x0, sctlr_el2
277CPU_BE( orr x0, x0, #(1 << 25) ) // Set the EE bit for EL2 276CPU_BE( orr x0, x0, #(1 << 25) ) // Set the EE bit for EL2