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authorArnd Bergmann <arnd@arndb.de>2018-10-02 04:15:07 -0400
committerArnd Bergmann <arnd@arndb.de>2018-10-02 04:15:17 -0400
commit9620135fe10a07e0c96d9593e09215954ce81520 (patch)
treed321015d397cb5be2de615a7a9fb9f2cf1f0a67e
parent64d20b774f49b31e9d5ebe413d5c3d37195e9a64 (diff)
parent8d8e3b7d8f06f69005d829d4a195b00ef976004b (diff)
Merge tag 'imx-drivers-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/drivers
i.MX drivers update for 4.20: - A couple of patches from Anson to update variable and macro naming in GPCv2 driver, as a preparation of reusing the driver on i.MX8. - Switch GPC/GPCv2 drivers to use SPDX identifier for licence claiming. - Clean up the unnecessary DT node name NULL pointer checking from imx-weim driver, since it can never be NULL at all. - A couple of improvements on GPC driver from Sven Schmitt to correct PDN register and use GPC_PGC_DOMAIN_* indexes for consistency. * tag 'imx-drivers-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: soc: imx: gpcv2: Switch to SPDX identifier soc: imx: gpc: Switch to SPDX identifier bus: imx-weim: drop unnecessary DT node name NULL check soc: imx: gpcv2: make pgc driver more generic for other i.MX platforms soc: imx: gpcv2: use A_CORE instread of A7 for more i.MX platforms soc: imx: gpc: use GPC_PGC_DOMAIN_* indexes soc: imx: gpc: fix PDN delay Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-rw-r--r--drivers/bus/imx-weim.c3
-rw-r--r--drivers/soc/imx/gpc.c26
-rw-r--r--drivers/soc/imx/gpcv2.c100
3 files changed, 66 insertions, 63 deletions
diff --git a/drivers/bus/imx-weim.c b/drivers/bus/imx-weim.c
index 6a94aa6a22c2..d84996a4528e 100644
--- a/drivers/bus/imx-weim.c
+++ b/drivers/bus/imx-weim.c
@@ -156,9 +156,6 @@ static int __init weim_parse_dt(struct platform_device *pdev,
156 } 156 }
157 157
158 for_each_available_child_of_node(pdev->dev.of_node, child) { 158 for_each_available_child_of_node(pdev->dev.of_node, child) {
159 if (!child->name)
160 continue;
161
162 ret = weim_timing_setup(child, base, devtype); 159 ret = weim_timing_setup(child, base, devtype);
163 if (ret) 160 if (ret)
164 dev_warn(&pdev->dev, "%pOF set timing failed.\n", 161 dev_warn(&pdev->dev, "%pOF set timing failed.\n",
diff --git a/drivers/soc/imx/gpc.c b/drivers/soc/imx/gpc.c
index b3da635970ea..aa3729ecaa9e 100644
--- a/drivers/soc/imx/gpc.c
+++ b/drivers/soc/imx/gpc.c
@@ -1,13 +1,7 @@
1// SPDX-License-Identifier: GPL-2.0+
1/* 2/*
2 * Copyright 2015-2017 Pengutronix, Lucas Stach <kernel@pengutronix.de> 3 * Copyright 2015-2017 Pengutronix, Lucas Stach <kernel@pengutronix.de>
3 * Copyright 2011-2013 Freescale Semiconductor, Inc. 4 * Copyright 2011-2013 Freescale Semiconductor, Inc.
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */ 5 */
12 6
13#include <linux/clk.h> 7#include <linux/clk.h>
@@ -69,7 +63,7 @@ static int imx6_pm_domain_power_off(struct generic_pm_domain *genpd)
69 u32 val; 63 u32 val;
70 64
71 /* Read ISO and ISO2SW power down delays */ 65 /* Read ISO and ISO2SW power down delays */
72 regmap_read(pd->regmap, pd->reg_offs + GPC_PGC_PUPSCR_OFFS, &val); 66 regmap_read(pd->regmap, pd->reg_offs + GPC_PGC_PDNSCR_OFFS, &val);
73 iso = val & 0x3f; 67 iso = val & 0x3f;
74 iso2sw = (val >> 8) & 0x3f; 68 iso2sw = (val >> 8) & 0x3f;
75 69
@@ -247,6 +241,7 @@ builtin_platform_driver(imx_pgc_power_domain_driver)
247#define GPC_PGC_DOMAIN_ARM 0 241#define GPC_PGC_DOMAIN_ARM 0
248#define GPC_PGC_DOMAIN_PU 1 242#define GPC_PGC_DOMAIN_PU 1
249#define GPC_PGC_DOMAIN_DISPLAY 2 243#define GPC_PGC_DOMAIN_DISPLAY 2
244#define GPC_PGC_DOMAIN_PCI 3
250 245
251static struct genpd_power_state imx6_pm_domain_pu_state = { 246static struct genpd_power_state imx6_pm_domain_pu_state = {
252 .power_off_latency_ns = 25000, 247 .power_off_latency_ns = 25000,
@@ -254,12 +249,13 @@ static struct genpd_power_state imx6_pm_domain_pu_state = {
254}; 249};
255 250
256static struct imx_pm_domain imx_gpc_domains[] = { 251static struct imx_pm_domain imx_gpc_domains[] = {
257 { 252 [GPC_PGC_DOMAIN_ARM] {
258 .base = { 253 .base = {
259 .name = "ARM", 254 .name = "ARM",
260 .flags = GENPD_FLAG_ALWAYS_ON, 255 .flags = GENPD_FLAG_ALWAYS_ON,
261 }, 256 },
262 }, { 257 },
258 [GPC_PGC_DOMAIN_PU] {
263 .base = { 259 .base = {
264 .name = "PU", 260 .name = "PU",
265 .power_off = imx6_pm_domain_power_off, 261 .power_off = imx6_pm_domain_power_off,
@@ -269,7 +265,8 @@ static struct imx_pm_domain imx_gpc_domains[] = {
269 }, 265 },
270 .reg_offs = 0x260, 266 .reg_offs = 0x260,
271 .cntr_pdn_bit = 0, 267 .cntr_pdn_bit = 0,
272 }, { 268 },
269 [GPC_PGC_DOMAIN_DISPLAY] {
273 .base = { 270 .base = {
274 .name = "DISPLAY", 271 .name = "DISPLAY",
275 .power_off = imx6_pm_domain_power_off, 272 .power_off = imx6_pm_domain_power_off,
@@ -277,7 +274,8 @@ static struct imx_pm_domain imx_gpc_domains[] = {
277 }, 274 },
278 .reg_offs = 0x240, 275 .reg_offs = 0x240,
279 .cntr_pdn_bit = 4, 276 .cntr_pdn_bit = 4,
280 }, { 277 },
278 [GPC_PGC_DOMAIN_PCI] {
281 .base = { 279 .base = {
282 .name = "PCI", 280 .name = "PCI",
283 .power_off = imx6_pm_domain_power_off, 281 .power_off = imx6_pm_domain_power_off,
@@ -348,8 +346,8 @@ static const struct regmap_config imx_gpc_regmap_config = {
348}; 346};
349 347
350static struct generic_pm_domain *imx_gpc_onecell_domains[] = { 348static struct generic_pm_domain *imx_gpc_onecell_domains[] = {
351 &imx_gpc_domains[0].base, 349 &imx_gpc_domains[GPC_PGC_DOMAIN_ARM].base,
352 &imx_gpc_domains[1].base, 350 &imx_gpc_domains[GPC_PGC_DOMAIN_PU].base,
353}; 351};
354 352
355static struct genpd_onecell_data imx_gpc_onecell_data = { 353static struct genpd_onecell_data imx_gpc_onecell_data = {
diff --git a/drivers/soc/imx/gpcv2.c b/drivers/soc/imx/gpcv2.c
index 6ef18cf8f243..e7b5994fee9d 100644
--- a/drivers/soc/imx/gpcv2.c
+++ b/drivers/soc/imx/gpcv2.c
@@ -1,3 +1,4 @@
1// SPDX-License-Identifier: GPL-2.0+
1/* 2/*
2 * Copyright 2017 Impinj, Inc 3 * Copyright 2017 Impinj, Inc
3 * Author: Andrey Smirnov <andrew.smirnov@gmail.com> 4 * Author: Andrey Smirnov <andrew.smirnov@gmail.com>
@@ -5,29 +6,23 @@
5 * Based on the code of analogus driver: 6 * Based on the code of analogus driver:
6 * 7 *
7 * Copyright 2015-2017 Pengutronix, Lucas Stach <kernel@pengutronix.de> 8 * Copyright 2015-2017 Pengutronix, Lucas Stach <kernel@pengutronix.de>
8 *
9 * The code contained herein is licensed under the GNU General Public
10 * License. You may obtain a copy of the GNU General Public License
11 * Version 2 or later at the following locations:
12 *
13 * http://www.opensource.org/licenses/gpl-license.html
14 * http://www.gnu.org/copyleft/gpl.html
15 */ 9 */
16 10
11#include <linux/of_device.h>
17#include <linux/platform_device.h> 12#include <linux/platform_device.h>
18#include <linux/pm_domain.h> 13#include <linux/pm_domain.h>
19#include <linux/regmap.h> 14#include <linux/regmap.h>
20#include <linux/regulator/consumer.h> 15#include <linux/regulator/consumer.h>
21#include <dt-bindings/power/imx7-power.h> 16#include <dt-bindings/power/imx7-power.h>
22 17
23#define GPC_LPCR_A7_BSC 0x000 18#define GPC_LPCR_A_CORE_BSC 0x000
24 19
25#define GPC_PGC_CPU_MAPPING 0x0ec 20#define GPC_PGC_CPU_MAPPING 0x0ec
26#define USB_HSIC_PHY_A7_DOMAIN BIT(6) 21#define USB_HSIC_PHY_A_CORE_DOMAIN BIT(6)
27#define USB_OTG2_PHY_A7_DOMAIN BIT(5) 22#define USB_OTG2_PHY_A_CORE_DOMAIN BIT(5)
28#define USB_OTG1_PHY_A7_DOMAIN BIT(4) 23#define USB_OTG1_PHY_A_CORE_DOMAIN BIT(4)
29#define PCIE_PHY_A7_DOMAIN BIT(3) 24#define PCIE_PHY_A_CORE_DOMAIN BIT(3)
30#define MIPI_PHY_A7_DOMAIN BIT(2) 25#define MIPI_PHY_A_CORE_DOMAIN BIT(2)
31 26
32#define GPC_PU_PGC_SW_PUP_REQ 0x0f8 27#define GPC_PU_PGC_SW_PUP_REQ 0x0f8
33#define GPC_PU_PGC_SW_PDN_REQ 0x104 28#define GPC_PU_PGC_SW_PDN_REQ 0x104
@@ -53,7 +48,7 @@
53 48
54#define GPC_PGC_CTRL_PCR BIT(0) 49#define GPC_PGC_CTRL_PCR BIT(0)
55 50
56struct imx7_pgc_domain { 51struct imx_pgc_domain {
57 struct generic_pm_domain genpd; 52 struct generic_pm_domain genpd;
58 struct regmap *regmap; 53 struct regmap *regmap;
59 struct regulator *regulator; 54 struct regulator *regulator;
@@ -69,11 +64,16 @@ struct imx7_pgc_domain {
69 struct device *dev; 64 struct device *dev;
70}; 65};
71 66
72static int imx7_gpc_pu_pgc_sw_pxx_req(struct generic_pm_domain *genpd, 67struct imx_pgc_domain_data {
68 const struct imx_pgc_domain *domains;
69 size_t domains_num;
70};
71
72static int imx_gpc_pu_pgc_sw_pxx_req(struct generic_pm_domain *genpd,
73 bool on) 73 bool on)
74{ 74{
75 struct imx7_pgc_domain *domain = container_of(genpd, 75 struct imx_pgc_domain *domain = container_of(genpd,
76 struct imx7_pgc_domain, 76 struct imx_pgc_domain,
77 genpd); 77 genpd);
78 unsigned int offset = on ? 78 unsigned int offset = on ?
79 GPC_PU_PGC_SW_PUP_REQ : GPC_PU_PGC_SW_PDN_REQ; 79 GPC_PU_PGC_SW_PUP_REQ : GPC_PU_PGC_SW_PDN_REQ;
@@ -150,24 +150,24 @@ unmap:
150 return ret; 150 return ret;
151} 151}
152 152
153static int imx7_gpc_pu_pgc_sw_pup_req(struct generic_pm_domain *genpd) 153static int imx_gpc_pu_pgc_sw_pup_req(struct generic_pm_domain *genpd)
154{ 154{
155 return imx7_gpc_pu_pgc_sw_pxx_req(genpd, true); 155 return imx_gpc_pu_pgc_sw_pxx_req(genpd, true);
156} 156}
157 157
158static int imx7_gpc_pu_pgc_sw_pdn_req(struct generic_pm_domain *genpd) 158static int imx_gpc_pu_pgc_sw_pdn_req(struct generic_pm_domain *genpd)
159{ 159{
160 return imx7_gpc_pu_pgc_sw_pxx_req(genpd, false); 160 return imx_gpc_pu_pgc_sw_pxx_req(genpd, false);
161} 161}
162 162
163static const struct imx7_pgc_domain imx7_pgc_domains[] = { 163static const struct imx_pgc_domain imx7_pgc_domains[] = {
164 [IMX7_POWER_DOMAIN_MIPI_PHY] = { 164 [IMX7_POWER_DOMAIN_MIPI_PHY] = {
165 .genpd = { 165 .genpd = {
166 .name = "mipi-phy", 166 .name = "mipi-phy",
167 }, 167 },
168 .bits = { 168 .bits = {
169 .pxx = MIPI_PHY_SW_Pxx_REQ, 169 .pxx = MIPI_PHY_SW_Pxx_REQ,
170 .map = MIPI_PHY_A7_DOMAIN, 170 .map = MIPI_PHY_A_CORE_DOMAIN,
171 }, 171 },
172 .voltage = 1000000, 172 .voltage = 1000000,
173 .pgc = PGC_MIPI, 173 .pgc = PGC_MIPI,
@@ -179,7 +179,7 @@ static const struct imx7_pgc_domain imx7_pgc_domains[] = {
179 }, 179 },
180 .bits = { 180 .bits = {
181 .pxx = PCIE_PHY_SW_Pxx_REQ, 181 .pxx = PCIE_PHY_SW_Pxx_REQ,
182 .map = PCIE_PHY_A7_DOMAIN, 182 .map = PCIE_PHY_A_CORE_DOMAIN,
183 }, 183 },
184 .voltage = 1000000, 184 .voltage = 1000000,
185 .pgc = PGC_PCIE, 185 .pgc = PGC_PCIE,
@@ -191,16 +191,21 @@ static const struct imx7_pgc_domain imx7_pgc_domains[] = {
191 }, 191 },
192 .bits = { 192 .bits = {
193 .pxx = USB_HSIC_PHY_SW_Pxx_REQ, 193 .pxx = USB_HSIC_PHY_SW_Pxx_REQ,
194 .map = USB_HSIC_PHY_A7_DOMAIN, 194 .map = USB_HSIC_PHY_A_CORE_DOMAIN,
195 }, 195 },
196 .voltage = 1200000, 196 .voltage = 1200000,
197 .pgc = PGC_USB_HSIC, 197 .pgc = PGC_USB_HSIC,
198 }, 198 },
199}; 199};
200 200
201static int imx7_pgc_domain_probe(struct platform_device *pdev) 201static const struct imx_pgc_domain_data imx7_pgc_domain_data = {
202 .domains = imx7_pgc_domains,
203 .domains_num = ARRAY_SIZE(imx7_pgc_domains),
204};
205
206static int imx_pgc_domain_probe(struct platform_device *pdev)
202{ 207{
203 struct imx7_pgc_domain *domain = pdev->dev.platform_data; 208 struct imx_pgc_domain *domain = pdev->dev.platform_data;
204 int ret; 209 int ret;
205 210
206 domain->dev = &pdev->dev; 211 domain->dev = &pdev->dev;
@@ -233,9 +238,9 @@ static int imx7_pgc_domain_probe(struct platform_device *pdev)
233 return ret; 238 return ret;
234} 239}
235 240
236static int imx7_pgc_domain_remove(struct platform_device *pdev) 241static int imx_pgc_domain_remove(struct platform_device *pdev)
237{ 242{
238 struct imx7_pgc_domain *domain = pdev->dev.platform_data; 243 struct imx_pgc_domain *domain = pdev->dev.platform_data;
239 244
240 of_genpd_del_provider(domain->dev->of_node); 245 of_genpd_del_provider(domain->dev->of_node);
241 pm_genpd_remove(&domain->genpd); 246 pm_genpd_remove(&domain->genpd);
@@ -243,25 +248,26 @@ static int imx7_pgc_domain_remove(struct platform_device *pdev)
243 return 0; 248 return 0;
244} 249}
245 250
246static const struct platform_device_id imx7_pgc_domain_id[] = { 251static const struct platform_device_id imx_pgc_domain_id[] = {
247 { "imx7-pgc-domain", }, 252 { "imx-pgc-domain", },
248 { }, 253 { },
249}; 254};
250 255
251static struct platform_driver imx7_pgc_domain_driver = { 256static struct platform_driver imx_pgc_domain_driver = {
252 .driver = { 257 .driver = {
253 .name = "imx7-pgc", 258 .name = "imx-pgc",
254 }, 259 },
255 .probe = imx7_pgc_domain_probe, 260 .probe = imx_pgc_domain_probe,
256 .remove = imx7_pgc_domain_remove, 261 .remove = imx_pgc_domain_remove,
257 .id_table = imx7_pgc_domain_id, 262 .id_table = imx_pgc_domain_id,
258}; 263};
259builtin_platform_driver(imx7_pgc_domain_driver) 264builtin_platform_driver(imx_pgc_domain_driver)
260 265
261static int imx_gpcv2_probe(struct platform_device *pdev) 266static int imx_gpcv2_probe(struct platform_device *pdev)
262{ 267{
268 static const struct imx_pgc_domain_data *domain_data;
263 static const struct regmap_range yes_ranges[] = { 269 static const struct regmap_range yes_ranges[] = {
264 regmap_reg_range(GPC_LPCR_A7_BSC, 270 regmap_reg_range(GPC_LPCR_A_CORE_BSC,
265 GPC_M4_PU_PDN_FLG), 271 GPC_M4_PU_PDN_FLG),
266 regmap_reg_range(GPC_PGC_CTRL(PGC_MIPI), 272 regmap_reg_range(GPC_PGC_CTRL(PGC_MIPI),
267 GPC_PGC_SR(PGC_MIPI)), 273 GPC_PGC_SR(PGC_MIPI)),
@@ -307,9 +313,11 @@ static int imx_gpcv2_probe(struct platform_device *pdev)
307 return ret; 313 return ret;
308 } 314 }
309 315
316 domain_data = of_device_get_match_data(&pdev->dev);
317
310 for_each_child_of_node(pgc_np, np) { 318 for_each_child_of_node(pgc_np, np) {
311 struct platform_device *pd_pdev; 319 struct platform_device *pd_pdev;
312 struct imx7_pgc_domain *domain; 320 struct imx_pgc_domain *domain;
313 u32 domain_index; 321 u32 domain_index;
314 322
315 ret = of_property_read_u32(np, "reg", &domain_index); 323 ret = of_property_read_u32(np, "reg", &domain_index);
@@ -319,14 +327,14 @@ static int imx_gpcv2_probe(struct platform_device *pdev)
319 return ret; 327 return ret;
320 } 328 }
321 329
322 if (domain_index >= ARRAY_SIZE(imx7_pgc_domains)) { 330 if (domain_index >= domain_data->domains_num) {
323 dev_warn(dev, 331 dev_warn(dev,
324 "Domain index %d is out of bounds\n", 332 "Domain index %d is out of bounds\n",
325 domain_index); 333 domain_index);
326 continue; 334 continue;
327 } 335 }
328 336
329 pd_pdev = platform_device_alloc("imx7-pgc-domain", 337 pd_pdev = platform_device_alloc("imx-pgc-domain",
330 domain_index); 338 domain_index);
331 if (!pd_pdev) { 339 if (!pd_pdev) {
332 dev_err(dev, "Failed to allocate platform device\n"); 340 dev_err(dev, "Failed to allocate platform device\n");
@@ -335,8 +343,8 @@ static int imx_gpcv2_probe(struct platform_device *pdev)
335 } 343 }
336 344
337 ret = platform_device_add_data(pd_pdev, 345 ret = platform_device_add_data(pd_pdev,
338 &imx7_pgc_domains[domain_index], 346 &domain_data->domains[domain_index],
339 sizeof(imx7_pgc_domains[domain_index])); 347 sizeof(domain_data->domains[domain_index]));
340 if (ret) { 348 if (ret) {
341 platform_device_put(pd_pdev); 349 platform_device_put(pd_pdev);
342 of_node_put(np); 350 of_node_put(np);
@@ -345,8 +353,8 @@ static int imx_gpcv2_probe(struct platform_device *pdev)
345 353
346 domain = pd_pdev->dev.platform_data; 354 domain = pd_pdev->dev.platform_data;
347 domain->regmap = regmap; 355 domain->regmap = regmap;
348 domain->genpd.power_on = imx7_gpc_pu_pgc_sw_pup_req; 356 domain->genpd.power_on = imx_gpc_pu_pgc_sw_pup_req;
349 domain->genpd.power_off = imx7_gpc_pu_pgc_sw_pdn_req; 357 domain->genpd.power_off = imx_gpc_pu_pgc_sw_pdn_req;
350 358
351 pd_pdev->dev.parent = dev; 359 pd_pdev->dev.parent = dev;
352 pd_pdev->dev.of_node = np; 360 pd_pdev->dev.of_node = np;
@@ -363,7 +371,7 @@ static int imx_gpcv2_probe(struct platform_device *pdev)
363} 371}
364 372
365static const struct of_device_id imx_gpcv2_dt_ids[] = { 373static const struct of_device_id imx_gpcv2_dt_ids[] = {
366 { .compatible = "fsl,imx7d-gpc" }, 374 { .compatible = "fsl,imx7d-gpc", .data = &imx7_pgc_domain_data, },
367 { } 375 { }
368}; 376};
369 377