diff options
author | Alex Deucher <alexander.deucher@amd.com> | 2015-11-24 10:37:54 -0500 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2015-12-02 12:45:58 -0500 |
commit | 95addb2ae06f46cd13346ed87bbda3990438a69b (patch) | |
tree | 94cc55c1f682702518300ef5701655db2ceb661f | |
parent | 1eb22bd38ac58a1be6e7e0ae6dd4ab6d604a27d6 (diff) |
drm/amdgpu: add read_bios_from_rom callback for VI parts
Read the vbios image directly from the rom.
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/vi.c | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c index 2adc1c855e85..bf5bd931b8ca 100644 --- a/drivers/gpu/drm/amd/amdgpu/vi.c +++ b/drivers/gpu/drm/amd/amdgpu/vi.c | |||
@@ -376,6 +376,38 @@ static bool vi_read_disabled_bios(struct amdgpu_device *adev) | |||
376 | WREG32_SMC(ixROM_CNTL, rom_cntl); | 376 | WREG32_SMC(ixROM_CNTL, rom_cntl); |
377 | return r; | 377 | return r; |
378 | } | 378 | } |
379 | |||
380 | static bool vi_read_bios_from_rom(struct amdgpu_device *adev, | ||
381 | u8 *bios, u32 length_bytes) | ||
382 | { | ||
383 | u32 *dw_ptr; | ||
384 | unsigned long flags; | ||
385 | u32 i, length_dw; | ||
386 | |||
387 | if (bios == NULL) | ||
388 | return false; | ||
389 | if (length_bytes == 0) | ||
390 | return false; | ||
391 | /* APU vbios image is part of sbios image */ | ||
392 | if (adev->flags & AMD_IS_APU) | ||
393 | return false; | ||
394 | |||
395 | dw_ptr = (u32 *)bios; | ||
396 | length_dw = ALIGN(length_bytes, 4) / 4; | ||
397 | /* take the smc lock since we are using the smc index */ | ||
398 | spin_lock_irqsave(&adev->smc_idx_lock, flags); | ||
399 | /* set rom index to 0 */ | ||
400 | WREG32(mmSMC_IND_INDEX_0, ixROM_INDEX); | ||
401 | WREG32(mmSMC_IND_DATA_0, 0); | ||
402 | /* set index to data for continous read */ | ||
403 | WREG32(mmSMC_IND_INDEX_0, ixROM_DATA); | ||
404 | for (i = 0; i < length_dw; i++) | ||
405 | dw_ptr[i] = RREG32(mmSMC_IND_DATA_0); | ||
406 | spin_unlock_irqrestore(&adev->smc_idx_lock, flags); | ||
407 | |||
408 | return true; | ||
409 | } | ||
410 | |||
379 | static struct amdgpu_allowed_register_entry tonga_allowed_read_registers[] = { | 411 | static struct amdgpu_allowed_register_entry tonga_allowed_read_registers[] = { |
380 | {mmGB_MACROTILE_MODE7, true}, | 412 | {mmGB_MACROTILE_MODE7, true}, |
381 | }; | 413 | }; |
@@ -1368,6 +1400,7 @@ static uint32_t vi_get_rev_id(struct amdgpu_device *adev) | |||
1368 | static const struct amdgpu_asic_funcs vi_asic_funcs = | 1400 | static const struct amdgpu_asic_funcs vi_asic_funcs = |
1369 | { | 1401 | { |
1370 | .read_disabled_bios = &vi_read_disabled_bios, | 1402 | .read_disabled_bios = &vi_read_disabled_bios, |
1403 | .read_bios_from_rom = &vi_read_bios_from_rom, | ||
1371 | .read_register = &vi_read_register, | 1404 | .read_register = &vi_read_register, |
1372 | .reset = &vi_asic_reset, | 1405 | .reset = &vi_asic_reset, |
1373 | .set_vga_state = &vi_vga_set_state, | 1406 | .set_vga_state = &vi_vga_set_state, |