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authorHoria Geantă <horia.geanta@nxp.com>2018-09-12 04:59:32 -0400
committerHerbert Xu <herbert@gondor.apana.org.au>2018-09-21 01:24:51 -0400
commit94cebd9da42cffbcf308c295656e6cd73d02a610 (patch)
tree78c7087e098412da08239fd147e6aa21fc3821aa
parentf9cb74fd88376bd8759df2fff2d2e70321fd0468 (diff)
crypto: caam - add Queue Interface v2 error codes
Add support to translate error codes returned by QI v2, i.e. Queue Interface present on DataPath Acceleration Architecture v2 (DPAA2). Signed-off-by: Horia Geantă <horia.geanta@nxp.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
-rw-r--r--drivers/crypto/caam/error.c75
-rw-r--r--drivers/crypto/caam/error.h6
-rw-r--r--drivers/crypto/caam/regs.h2
3 files changed, 79 insertions, 4 deletions
diff --git a/drivers/crypto/caam/error.c b/drivers/crypto/caam/error.c
index 8da88beb1abb..db0f0d96842e 100644
--- a/drivers/crypto/caam/error.c
+++ b/drivers/crypto/caam/error.c
@@ -108,6 +108,54 @@ static const struct {
108 { 0xF1, "3GPP HFN matches or exceeds the Threshold" }, 108 { 0xF1, "3GPP HFN matches or exceeds the Threshold" },
109}; 109};
110 110
111static const struct {
112 u8 value;
113 const char *error_text;
114} qi_error_list[] = {
115 { 0x1F, "Job terminated by FQ or ICID flush" },
116 { 0x20, "FD format error"},
117 { 0x21, "FD command format error"},
118 { 0x23, "FL format error"},
119 { 0x25, "CRJD specified in FD, but not enabled in FLC"},
120 { 0x30, "Max. buffer size too small"},
121 { 0x31, "DHR exceeds max. buffer size (allocate mode, S/G format)"},
122 { 0x32, "SGT exceeds max. buffer size (allocate mode, S/G format"},
123 { 0x33, "Size over/underflow (allocate mode)"},
124 { 0x34, "Size over/underflow (reuse mode)"},
125 { 0x35, "Length exceeds max. short length (allocate mode, S/G/ format)"},
126 { 0x36, "Memory footprint exceeds max. value (allocate mode, S/G/ format)"},
127 { 0x41, "SBC frame format not supported (allocate mode)"},
128 { 0x42, "Pool 0 invalid / pool 1 size < pool 0 size (allocate mode)"},
129 { 0x43, "Annotation output enabled but ASAR = 0 (allocate mode)"},
130 { 0x44, "Unsupported or reserved frame format or SGHR = 1 (reuse mode)"},
131 { 0x45, "DHR correction underflow (reuse mode, single buffer format)"},
132 { 0x46, "Annotation length exceeds offset (reuse mode)"},
133 { 0x48, "Annotation output enabled but ASA limited by ASAR (reuse mode)"},
134 { 0x49, "Data offset correction exceeds input frame data length (reuse mode)"},
135 { 0x4B, "Annotation output enabled but ASA cannote be expanded (frame list)"},
136 { 0x51, "Unsupported IF reuse mode"},
137 { 0x52, "Unsupported FL use mode"},
138 { 0x53, "Unsupported RJD use mode"},
139 { 0x54, "Unsupported inline descriptor use mode"},
140 { 0xC0, "Table buffer pool 0 depletion"},
141 { 0xC1, "Table buffer pool 1 depletion"},
142 { 0xC2, "Data buffer pool 0 depletion, no OF allocated"},
143 { 0xC3, "Data buffer pool 1 depletion, no OF allocated"},
144 { 0xC4, "Data buffer pool 0 depletion, partial OF allocated"},
145 { 0xC5, "Data buffer pool 1 depletion, partial OF allocated"},
146 { 0xD0, "FLC read error"},
147 { 0xD1, "FL read error"},
148 { 0xD2, "FL write error"},
149 { 0xD3, "OF SGT write error"},
150 { 0xD4, "PTA read error"},
151 { 0xD5, "PTA write error"},
152 { 0xD6, "OF SGT F-bit write error"},
153 { 0xD7, "ASA write error"},
154 { 0xE1, "FLC[ICR]=0 ICID error"},
155 { 0xE2, "FLC[ICR]=1 ICID error"},
156 { 0xE4, "source of ICID flush not trusted (BDI = 0)"},
157};
158
111static const char * const cha_id_list[] = { 159static const char * const cha_id_list[] = {
112 "", 160 "",
113 "AES", 161 "AES",
@@ -236,6 +284,27 @@ static void report_deco_status(struct device *jrdev, const u32 status,
236 status, error, idx_str, idx, err_str, err_err_code); 284 status, error, idx_str, idx, err_str, err_err_code);
237} 285}
238 286
287static void report_qi_status(struct device *qidev, const u32 status,
288 const char *error)
289{
290 u8 err_id = status & JRSTA_QIERR_ERROR_MASK;
291 const char *err_str = "unidentified error value 0x";
292 char err_err_code[3] = { 0 };
293 int i;
294
295 for (i = 0; i < ARRAY_SIZE(qi_error_list); i++)
296 if (qi_error_list[i].value == err_id)
297 break;
298
299 if (i != ARRAY_SIZE(qi_error_list) && qi_error_list[i].error_text)
300 err_str = qi_error_list[i].error_text;
301 else
302 snprintf(err_err_code, sizeof(err_err_code), "%02x", err_id);
303
304 dev_err(qidev, "%08x: %s: %s%s\n",
305 status, error, err_str, err_err_code);
306}
307
239static void report_jr_status(struct device *jrdev, const u32 status, 308static void report_jr_status(struct device *jrdev, const u32 status,
240 const char *error) 309 const char *error)
241{ 310{
@@ -250,7 +319,7 @@ static void report_cond_code_status(struct device *jrdev, const u32 status,
250 status, error, __func__); 319 status, error, __func__);
251} 320}
252 321
253void caam_jr_strstatus(struct device *jrdev, u32 status) 322void caam_strstatus(struct device *jrdev, u32 status, bool qi_v2)
254{ 323{
255 static const struct stat_src { 324 static const struct stat_src {
256 void (*report_ssed)(struct device *jrdev, const u32 status, 325 void (*report_ssed)(struct device *jrdev, const u32 status,
@@ -262,7 +331,7 @@ void caam_jr_strstatus(struct device *jrdev, u32 status)
262 { report_ccb_status, "CCB" }, 331 { report_ccb_status, "CCB" },
263 { report_jump_status, "Jump" }, 332 { report_jump_status, "Jump" },
264 { report_deco_status, "DECO" }, 333 { report_deco_status, "DECO" },
265 { NULL, "Queue Manager Interface" }, 334 { report_qi_status, "Queue Manager Interface" },
266 { report_jr_status, "Job Ring" }, 335 { report_jr_status, "Job Ring" },
267 { report_cond_code_status, "Condition Code" }, 336 { report_cond_code_status, "Condition Code" },
268 { NULL, NULL }, 337 { NULL, NULL },
@@ -288,4 +357,4 @@ void caam_jr_strstatus(struct device *jrdev, u32 status)
288 else 357 else
289 dev_err(jrdev, "%d: unknown error source\n", ssrc); 358 dev_err(jrdev, "%d: unknown error source\n", ssrc);
290} 359}
291EXPORT_SYMBOL(caam_jr_strstatus); 360EXPORT_SYMBOL(caam_strstatus);
diff --git a/drivers/crypto/caam/error.h b/drivers/crypto/caam/error.h
index 5aa332bac4b0..67ea94079837 100644
--- a/drivers/crypto/caam/error.h
+++ b/drivers/crypto/caam/error.h
@@ -8,7 +8,11 @@
8#ifndef CAAM_ERROR_H 8#ifndef CAAM_ERROR_H
9#define CAAM_ERROR_H 9#define CAAM_ERROR_H
10#define CAAM_ERROR_STR_MAX 302 10#define CAAM_ERROR_STR_MAX 302
11void caam_jr_strstatus(struct device *jrdev, u32 status); 11
12void caam_strstatus(struct device *dev, u32 status, bool qi_v2);
13
14#define caam_jr_strstatus(jrdev, status) caam_strstatus(jrdev, status, false)
15#define caam_qi2_strstatus(qidev, status) caam_strstatus(qidev, status, true)
12 16
13void caam_dump_sg(const char *level, const char *prefix_str, int prefix_type, 17void caam_dump_sg(const char *level, const char *prefix_str, int prefix_type,
14 int rowsize, int groupsize, struct scatterlist *sg, 18 int rowsize, int groupsize, struct scatterlist *sg,
diff --git a/drivers/crypto/caam/regs.h b/drivers/crypto/caam/regs.h
index ce3f9ad7120f..457815f965c0 100644
--- a/drivers/crypto/caam/regs.h
+++ b/drivers/crypto/caam/regs.h
@@ -633,6 +633,8 @@ struct caam_job_ring {
633#define JRSTA_DECOERR_INVSIGN 0x86 633#define JRSTA_DECOERR_INVSIGN 0x86
634#define JRSTA_DECOERR_DSASIGN 0x87 634#define JRSTA_DECOERR_DSASIGN 0x87
635 635
636#define JRSTA_QIERR_ERROR_MASK 0x00ff
637
636#define JRSTA_CCBERR_JUMP 0x08000000 638#define JRSTA_CCBERR_JUMP 0x08000000
637#define JRSTA_CCBERR_INDEX_MASK 0xff00 639#define JRSTA_CCBERR_INDEX_MASK 0xff00
638#define JRSTA_CCBERR_INDEX_SHIFT 8 640#define JRSTA_CCBERR_INDEX_SHIFT 8