ARM: imx: add mmdc ipg clock operation for mmdc

i.MX6 SoCs have MMDC ipg clock for registers access, to make
sure MMDC registers access successfully, add optional clock
enable for MMDC driver.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

1 files changed, 14 insertions, 0 deletions

diff --git a/arch/arm/mach-imx/mmdc.c b/arch/arm/mach-imx/mmdc.c
index 04b3bf71de94..e49e06834516 100644
--- a/arch/arm/mach-imx/mmdc.c
+++ b/arch/arm/mach-imx/mmdc.c
@@ -11,6 +11,7 @@
  * http://www.gnu.org/copyleft/gpl.html
  */
 
+#include <linux/clk.h>
 #include <linux/hrtimer.h>
 #include <linux/init.h>
 #include <linux/interrupt.h>
@@ -546,7 +547,20 @@ static int imx_mmdc_probe(struct platform_device *pdev)
 {
         struct device_node *np = pdev->dev.of_node;
         void __iomem *mmdc_base, *reg;
+        struct clk *mmdc_ipg_clk;
         u32 val;
+        int err;
+
+        /* the ipg clock is optional */
+        mmdc_ipg_clk = devm_clk_get(&pdev->dev, NULL);
+        if (IS_ERR(mmdc_ipg_clk))
+                mmdc_ipg_clk = NULL;
+
+        err = clk_prepare_enable(mmdc_ipg_clk);
+        if (err) {
+                dev_err(&pdev->dev, "Unable to enable mmdc ipg clock.\n");
+                return err;
+        }
 
         mmdc_base = of_iomap(np, 0);
         WARN_ON(!mmdc_base);