arm64: dts: marvell: Add node labels for the cpus

Aligned with what we have done for the others nodes. It will also allow to easily modify the cpu configuration at board (or sub-SoC) level. Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
author: Gregory CLEMENT <gregory.clement@bootlin.com> 2018-09-21 12:09:15 -0400
committer: Gregory CLEMENT <gregory.clement@bootlin.com> 2018-10-02 10:46:52 -0400
commit: 92e5d4e9398eabf997075bed2543d7fd783e1ab0 (patch)
tree: 35cf0fda0175218772db2d37a62e8ce5bbdd7996
parent: 620cfb31bad4c5be7d9250f1e47a592750fc364b (diff)
5 files changed, 16 insertions, 16 deletions
diff --git a/arch/arm64/boot/dts/marvell/armada-372x.dtsi b/arch/arm64/boot/dts/marvell/armada-372x.dtsi
index 97558a64e276..6800945a88ad 100644
--- a/arch/arm64/boot/dts/marvell/armada-372x.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-372x.dtsi
@@ -16,7 +16,7 @@
        compatible = "marvell,armada3720", "marvell,armada3710";
        cpus {
-                cpu@1 {
+                cpu1: cpu@1 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a53","arm,armv8";
                        reg = <0x1>;
diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
index f5eaec531aa8..4472bcd8f9fb 100644
--- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
@@ -40,7 +40,7 @@
        cpus {
                #address-cells = <1>;
                #size-cells = <0>;
-                cpu@0 {
+                cpu0: cpu@0 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a53", "arm,armv8";
                        reg = <0>;
diff --git a/arch/arm64/boot/dts/marvell/armada-ap806-dual.dtsi b/arch/arm64/boot/dts/marvell/armada-ap806-dual.dtsi
index 64b5e61a698e..d3c0636558ff 100644
--- a/arch/arm64/boot/dts/marvell/armada-ap806-dual.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-ap806-dual.dtsi
@@ -15,13 +15,13 @@
                #address-cells = <1>;
                #size-cells = <0>;
-                cpu@0 {
+                cpu0: cpu@0 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a72", "arm,armv8";
                        reg = <0x000>;
                        enable-method = "psci";
                };
-                cpu@1 {
+                cpu1: cpu@1 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a72", "arm,armv8";
                        reg = <0x001>;
diff --git a/arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi b/arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi
index 746e792767f5..01ea662afba8 100644
--- a/arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi
@@ -15,25 +15,25 @@
                #address-cells = <1>;
                #size-cells = <0>;
-                cpu@0 {
+                cpu0: cpu@0 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a72", "arm,armv8";
                        reg = <0x000>;
                        enable-method = "psci";
                };
-                cpu@1 {
+                cpu1: cpu@1 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a72", "arm,armv8";
                        reg = <0x001>;
                        enable-method = "psci";
                };
-                cpu@100 {
+                cpu2: cpu@100 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a72", "arm,armv8";
                        reg = <0x100>;
                        enable-method = "psci";
                };
-                cpu@101 {
+                cpu3: cpu@101 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a72", "arm,armv8";
                        reg = <0x101>;
diff --git a/arch/arm64/boot/dts/marvell/armada-ap810-ap0-octa-core.dtsi b/arch/arm64/boot/dts/marvell/armada-ap810-ap0-octa-core.dtsi
index 7d00ae78fc79..b788cb63caf2 100644
--- a/arch/arm64/boot/dts/marvell/armada-ap810-ap0-octa-core.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-ap810-ap0-octa-core.dtsi
@@ -13,49 +13,49 @@
                #size-cells = <0>;
                compatible = "marvell,armada-ap810-octa";
-                cpu@0 {
+                cpu0: cpu@0 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a72", "arm,armv8";
                        reg = <0x000>;
                        enable-method = "psci";
                };
-                cpu@1 {
+                cpu1: cpu@1 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a72", "arm,armv8";
                        reg = <0x001>;
                        enable-method = "psci";
                };
-                cpu@100 {
+                cpu2: cpu@100 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a72", "arm,armv8";
                        reg = <0x100>;
                        enable-method = "psci";
                };
-                cpu@101 {
+                cpu3: cpu@101 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a72", "arm,armv8";
                        reg = <0x101>;
                        enable-method = "psci";
                };
-                cpu@200 {
+                cpu4: cpu@200 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a72", "arm,armv8";
                        reg = <0x200>;
                        enable-method = "psci";
                };
-                cpu@201 {
+                cpu5: cpu@201 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a72", "arm,armv8";
                        reg = <0x201>;
                        enable-method = "psci";
                };
-                cpu@300 {
+                cpu6: cpu@300 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a72", "arm,armv8";
                        reg = <0x300>;
                        enable-method = "psci";
                };
-                cpu@301 {
+                cpu7: cpu@301 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a72", "arm,armv8";
                        reg = <0x301>;
author	Gregory CLEMENT <gregory.clement@bootlin.com>	2018-09-21 12:09:15 -0400
committer	Gregory CLEMENT <gregory.clement@bootlin.com>	2018-10-02 10:46:52 -0400
commit	92e5d4e9398eabf997075bed2543d7fd783e1ab0 (patch)
tree	35cf0fda0175218772db2d37a62e8ce5bbdd7996
parent	620cfb31bad4c5be7d9250f1e47a592750fc364b (diff)

diff --git a/arch/arm64/boot/dts/marvell/armada-372x.dtsi b/arch/arm64/boot/dts/marvell/armada-372x.dtsi index 97558a64e276..6800945a88ad 100644 --- a/arch/arm64/boot/dts/marvell/armada-372x.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-372x.dtsi
@@ -16,7 +16,7 @@
16	compatible = "marvell,armada3720", "marvell,armada3710";	16	compatible = "marvell,armada3720", "marvell,armada3710";
17		17
18	cpus {	18	cpus {
19	cpu@1 {	19	cpu1: cpu@1 {
20	device_type = "cpu";	20	device_type = "cpu";
21	compatible = "arm,cortex-a53","arm,armv8";	21	compatible = "arm,cortex-a53","arm,armv8";
22	reg = <0x1>;	22	reg = <0x1>;


diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi index f5eaec531aa8..4472bcd8f9fb 100644 --- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
@@ -40,7 +40,7 @@
40	cpus {	40	cpus {
41	#address-cells = <1>;	41	#address-cells = <1>;
42	#size-cells = <0>;	42	#size-cells = <0>;
43	cpu@0 {	43	cpu0: cpu@0 {
44	device_type = "cpu";	44	device_type = "cpu";
45	compatible = "arm,cortex-a53", "arm,armv8";	45	compatible = "arm,cortex-a53", "arm,armv8";
46	reg = <0>;	46	reg = <0>;


diff --git a/arch/arm64/boot/dts/marvell/armada-ap806-dual.dtsi b/arch/arm64/boot/dts/marvell/armada-ap806-dual.dtsi index 64b5e61a698e..d3c0636558ff 100644 --- a/arch/arm64/boot/dts/marvell/armada-ap806-dual.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-ap806-dual.dtsi
@@ -15,13 +15,13 @@
15	#address-cells = <1>;	15	#address-cells = <1>;
16	#size-cells = <0>;	16	#size-cells = <0>;
17		17
18	cpu@0 {	18	cpu0: cpu@0 {
19	device_type = "cpu";	19	device_type = "cpu";
20	compatible = "arm,cortex-a72", "arm,armv8";	20	compatible = "arm,cortex-a72", "arm,armv8";
21	reg = <0x000>;	21	reg = <0x000>;
22	enable-method = "psci";	22	enable-method = "psci";
23	};	23	};
24	cpu@1 {	24	cpu1: cpu@1 {
25	device_type = "cpu";	25	device_type = "cpu";
26	compatible = "arm,cortex-a72", "arm,armv8";	26	compatible = "arm,cortex-a72", "arm,armv8";
27	reg = <0x001>;	27	reg = <0x001>;


diff --git a/arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi b/arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi index 746e792767f5..01ea662afba8 100644 --- a/arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi
@@ -15,25 +15,25 @@
15	#address-cells = <1>;	15	#address-cells = <1>;
16	#size-cells = <0>;	16	#size-cells = <0>;
17		17
18	cpu@0 {	18	cpu0: cpu@0 {
19	device_type = "cpu";	19	device_type = "cpu";
20	compatible = "arm,cortex-a72", "arm,armv8";	20	compatible = "arm,cortex-a72", "arm,armv8";
21	reg = <0x000>;	21	reg = <0x000>;
22	enable-method = "psci";	22	enable-method = "psci";
23	};	23	};
24	cpu@1 {	24	cpu1: cpu@1 {
25	device_type = "cpu";	25	device_type = "cpu";
26	compatible = "arm,cortex-a72", "arm,armv8";	26	compatible = "arm,cortex-a72", "arm,armv8";
27	reg = <0x001>;	27	reg = <0x001>;
28	enable-method = "psci";	28	enable-method = "psci";
29	};	29	};
30	cpu@100 {	30	cpu2: cpu@100 {
31	device_type = "cpu";	31	device_type = "cpu";
32	compatible = "arm,cortex-a72", "arm,armv8";	32	compatible = "arm,cortex-a72", "arm,armv8";
33	reg = <0x100>;	33	reg = <0x100>;
34	enable-method = "psci";	34	enable-method = "psci";
35	};	35	};
36	cpu@101 {	36	cpu3: cpu@101 {
37	device_type = "cpu";	37	device_type = "cpu";
38	compatible = "arm,cortex-a72", "arm,armv8";	38	compatible = "arm,cortex-a72", "arm,armv8";
39	reg = <0x101>;	39	reg = <0x101>;


diff --git a/arch/arm64/boot/dts/marvell/armada-ap810-ap0-octa-core.dtsi b/arch/arm64/boot/dts/marvell/armada-ap810-ap0-octa-core.dtsi index 7d00ae78fc79..b788cb63caf2 100644 --- a/arch/arm64/boot/dts/marvell/armada-ap810-ap0-octa-core.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-ap810-ap0-octa-core.dtsi
@@ -13,49 +13,49 @@
13	#size-cells = <0>;	13	#size-cells = <0>;
14	compatible = "marvell,armada-ap810-octa";	14	compatible = "marvell,armada-ap810-octa";
15		15
16	cpu@0 {	16	cpu0: cpu@0 {
17	device_type = "cpu";	17	device_type = "cpu";
18	compatible = "arm,cortex-a72", "arm,armv8";	18	compatible = "arm,cortex-a72", "arm,armv8";
19	reg = <0x000>;	19	reg = <0x000>;
20	enable-method = "psci";	20	enable-method = "psci";
21	};	21	};
22	cpu@1 {	22	cpu1: cpu@1 {
23	device_type = "cpu";	23	device_type = "cpu";
24	compatible = "arm,cortex-a72", "arm,armv8";	24	compatible = "arm,cortex-a72", "arm,armv8";
25	reg = <0x001>;	25	reg = <0x001>;
26	enable-method = "psci";	26	enable-method = "psci";
27	};	27	};
28	cpu@100 {	28	cpu2: cpu@100 {
29	device_type = "cpu";	29	device_type = "cpu";
30	compatible = "arm,cortex-a72", "arm,armv8";	30	compatible = "arm,cortex-a72", "arm,armv8";
31	reg = <0x100>;	31	reg = <0x100>;
32	enable-method = "psci";	32	enable-method = "psci";
33	};	33	};
34	cpu@101 {	34	cpu3: cpu@101 {
35	device_type = "cpu";	35	device_type = "cpu";
36	compatible = "arm,cortex-a72", "arm,armv8";	36	compatible = "arm,cortex-a72", "arm,armv8";
37	reg = <0x101>;	37	reg = <0x101>;
38	enable-method = "psci";	38	enable-method = "psci";
39	};	39	};
40	cpu@200 {	40	cpu4: cpu@200 {
41	device_type = "cpu";	41	device_type = "cpu";
42	compatible = "arm,cortex-a72", "arm,armv8";	42	compatible = "arm,cortex-a72", "arm,armv8";
43	reg = <0x200>;	43	reg = <0x200>;
44	enable-method = "psci";	44	enable-method = "psci";
45	};	45	};
46	cpu@201 {	46	cpu5: cpu@201 {
47	device_type = "cpu";	47	device_type = "cpu";
48	compatible = "arm,cortex-a72", "arm,armv8";	48	compatible = "arm,cortex-a72", "arm,armv8";
49	reg = <0x201>;	49	reg = <0x201>;
50	enable-method = "psci";	50	enable-method = "psci";
51	};	51	};
52	cpu@300 {	52	cpu6: cpu@300 {
53	device_type = "cpu";	53	device_type = "cpu";
54	compatible = "arm,cortex-a72", "arm,armv8";	54	compatible = "arm,cortex-a72", "arm,armv8";
55	reg = <0x300>;	55	reg = <0x300>;
56	enable-method = "psci";	56	enable-method = "psci";
57	};	57	};
58	cpu@301 {	58	cpu7: cpu@301 {
59	device_type = "cpu";	59	device_type = "cpu";
60	compatible = "arm,cortex-a72", "arm,armv8";	60	compatible = "arm,cortex-a72", "arm,armv8";
61	reg = <0x301>;	61	reg = <0x301>;