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authorGabriel Somlo <somlo@cmu.edu>2016-01-28 09:23:14 -0500
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2016-02-09 20:37:39 -0500
commit92aed5d6ba90c2031c8d321a02e7af3d4cb05b8d (patch)
tree6e86c45269a8404f33b223b00048a1f4671e08ad
parent246c46ebaeaef17814dc5a8830d16e7f1b01116b (diff)
devicetree: update documentation for fw_cfg ARM bindings
Remove fw_cfg hardware interface details from Documentation/devicetree/bindings/arm/fw-cfg.txt, and replace them with a pointer to the authoritative documentation in the QEMU source tree. Signed-off-by: Gabriel Somlo <somlo@cmu.edu> Cc: Laszlo Ersek <lersek@redhat.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r--Documentation/devicetree/bindings/arm/fw-cfg.txt38
1 files changed, 2 insertions, 36 deletions
diff --git a/Documentation/devicetree/bindings/arm/fw-cfg.txt b/Documentation/devicetree/bindings/arm/fw-cfg.txt
index 953fb640d9c4..fd54e1db2156 100644
--- a/Documentation/devicetree/bindings/arm/fw-cfg.txt
+++ b/Documentation/devicetree/bindings/arm/fw-cfg.txt
@@ -11,43 +11,9 @@ QEMU exposes the control and data register to ARM guests as memory mapped
11registers; their location is communicated to the guest's UEFI firmware in the 11registers; their location is communicated to the guest's UEFI firmware in the
12DTB that QEMU places at the bottom of the guest's DRAM. 12DTB that QEMU places at the bottom of the guest's DRAM.
13 13
14The guest writes a selector value (a key) to the selector register, and then 14The authoritative guest-side hardware interface documentation to the fw_cfg
15can read the corresponding data (produced by QEMU) via the data register. If 15device can be found in "docs/specs/fw_cfg.txt" in the QEMU source tree.
16the selected entry is writable, the guest can rewrite it through the data
17register.
18 16
19The selector register takes keys in big endian byte order.
20
21The data register allows accesses with 8, 16, 32 and 64-bit width (only at
22offset 0 of the register). Accesses larger than a byte are interpreted as
23arrays, bundled together only for better performance. The bytes constituting
24such a word, in increasing address order, correspond to the bytes that would
25have been transferred by byte-wide accesses in chronological order.
26
27The interface allows guest firmware to download various parameters and blobs
28that affect how the firmware works and what tables it installs for the guest
29OS. For example, boot order of devices, ACPI tables, SMBIOS tables, kernel and
30initrd images for direct kernel booting, virtual machine UUID, SMP information,
31virtual NUMA topology, and so on.
32
33The authoritative registry of the valid selector values and their meanings is
34the QEMU source code; the structure of the data blobs corresponding to the
35individual key values is also defined in the QEMU source code.
36
37The presence of the registers can be verified by selecting the "signature" blob
38with key 0x0000, and reading four bytes from the data register. The returned
39signature is "QEMU".
40
41The outermost protocol (involving the write / read sequences of the control and
42data registers) is expected to be versioned, and/or described by feature bits.
43The interface revision / feature bitmap can be retrieved with key 0x0001. The
44blob to be read from the data register has size 4, and it is to be interpreted
45as a uint32_t value in little endian byte order. The current value
46(corresponding to the above outer protocol) is zero.
47
48The guest kernel is not expected to use these registers (although it is
49certainly allowed to); the device tree bindings are documented here because
50this is where device tree bindings reside in general.
51 17
52Required properties: 18Required properties:
53 19