diff options
author | Zhang Rui <rui.zhang@intel.com> | 2015-08-24 16:27:11 -0400 |
---|---|---|
committer | Bjorn Helgaas <bhelgaas@google.com> | 2015-08-24 16:27:11 -0400 |
commit | 91f15fb30c77d4a0d0d9b97e5cec647650853145 (patch) | |
tree | 8b8fd59b94906421d82e9fbc5d2a6b71693fb372 | |
parent | 24b390aad2930b889b6e15fc7cf7bfa7c99fad21 (diff) |
PCI: Disable async suspend/resume for JMicron multi-function SATA/AHCI
On multi-function JMicron SATA/PATA/AHCI devices, the PATA controller at
function 1 doesn't work if it is powered on before the SATA controller at
function 0. The result is that PATA doesn't work after resume, and we
print messages like this:
pata_jmicron 0000:02:00.1: Refused to change power state, currently in D3
irq 17: nobody cared (try booting with the "irqpoll" option)
Async resume was introduced in v3.15 by 76569faa62c4 ("PM / sleep:
Asynchronous threads for resume_noirq"). Prior to that, we powered on
the functions in order, so this problem shouldn't happen.
e6b7e41cdd8c ("ata: Disabling the async PM for JMicron chip 363/361")
solved the problem for JMicron 361 and 363 devices. With async suspend
disabled, we always power on function 0 before function 1.
Barto then reported the same problem with a JMicron 368 (see comment #57 in
the bugzilla).
Rather than extending the blacklist piecemeal, disable async suspend for
all JMicron multi-function SATA/PATA/AHCI devices.
This quirk could stay in the ahci and pata_jmicron drivers, but it's likely
the problem will occur even if pata_jmicron isn't loaded until after the
suspend/resume. Making it a PCI quirk ensures that we'll preserve the
power-on order even if the drivers aren't loaded.
[bhelgaas: changelog, limit to multi-function, limit to IDE/ATA]
Link: https://bugzilla.kernel.org/show_bug.cgi?id=81551
Reported-and-tested-by: Barto <mister.freeman@laposte.net>
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
CC: stable@vger.kernel.org # v3.15+
-rw-r--r-- | drivers/ata/ahci.c | 13 | ||||
-rw-r--r-- | drivers/ata/pata_jmicron.c | 12 | ||||
-rw-r--r-- | drivers/pci/quirks.c | 12 |
3 files changed, 13 insertions, 24 deletions
diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c index 7e62751abfac..a46660204e3a 100644 --- a/drivers/ata/ahci.c +++ b/drivers/ata/ahci.c | |||
@@ -351,6 +351,7 @@ static const struct pci_device_id ahci_pci_tbl[] = { | |||
351 | /* JMicron 362B and 362C have an AHCI function with IDE class code */ | 351 | /* JMicron 362B and 362C have an AHCI function with IDE class code */ |
352 | { PCI_VDEVICE(JMICRON, 0x2362), board_ahci_ign_iferr }, | 352 | { PCI_VDEVICE(JMICRON, 0x2362), board_ahci_ign_iferr }, |
353 | { PCI_VDEVICE(JMICRON, 0x236f), board_ahci_ign_iferr }, | 353 | { PCI_VDEVICE(JMICRON, 0x236f), board_ahci_ign_iferr }, |
354 | /* May need to update quirk_jmicron_async_suspend() for additions */ | ||
354 | 355 | ||
355 | /* ATI */ | 356 | /* ATI */ |
356 | { PCI_VDEVICE(ATI, 0x4380), board_ahci_sb600 }, /* ATI SB600 */ | 357 | { PCI_VDEVICE(ATI, 0x4380), board_ahci_sb600 }, /* ATI SB600 */ |
@@ -1451,18 +1452,6 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
1451 | else if (pdev->vendor == 0x177d && pdev->device == 0xa01c) | 1452 | else if (pdev->vendor == 0x177d && pdev->device == 0xa01c) |
1452 | ahci_pci_bar = AHCI_PCI_BAR_CAVIUM; | 1453 | ahci_pci_bar = AHCI_PCI_BAR_CAVIUM; |
1453 | 1454 | ||
1454 | /* | ||
1455 | * The JMicron chip 361/363 contains one SATA controller and one | ||
1456 | * PATA controller,for powering on these both controllers, we must | ||
1457 | * follow the sequence one by one, otherwise one of them can not be | ||
1458 | * powered on successfully, so here we disable the async suspend | ||
1459 | * method for these chips. | ||
1460 | */ | ||
1461 | if (pdev->vendor == PCI_VENDOR_ID_JMICRON && | ||
1462 | (pdev->device == PCI_DEVICE_ID_JMICRON_JMB363 || | ||
1463 | pdev->device == PCI_DEVICE_ID_JMICRON_JMB361)) | ||
1464 | device_disable_async_suspend(&pdev->dev); | ||
1465 | |||
1466 | /* acquire resources */ | 1455 | /* acquire resources */ |
1467 | rc = pcim_enable_device(pdev); | 1456 | rc = pcim_enable_device(pdev); |
1468 | if (rc) | 1457 | if (rc) |
diff --git a/drivers/ata/pata_jmicron.c b/drivers/ata/pata_jmicron.c index 47e418b8c8ba..4d1a5d2c4287 100644 --- a/drivers/ata/pata_jmicron.c +++ b/drivers/ata/pata_jmicron.c | |||
@@ -143,18 +143,6 @@ static int jmicron_init_one (struct pci_dev *pdev, const struct pci_device_id *i | |||
143 | }; | 143 | }; |
144 | const struct ata_port_info *ppi[] = { &info, NULL }; | 144 | const struct ata_port_info *ppi[] = { &info, NULL }; |
145 | 145 | ||
146 | /* | ||
147 | * The JMicron chip 361/363 contains one SATA controller and one | ||
148 | * PATA controller,for powering on these both controllers, we must | ||
149 | * follow the sequence one by one, otherwise one of them can not be | ||
150 | * powered on successfully, so here we disable the async suspend | ||
151 | * method for these chips. | ||
152 | */ | ||
153 | if (pdev->vendor == PCI_VENDOR_ID_JMICRON && | ||
154 | (pdev->device == PCI_DEVICE_ID_JMICRON_JMB363 || | ||
155 | pdev->device == PCI_DEVICE_ID_JMICRON_JMB361)) | ||
156 | device_disable_async_suspend(&pdev->dev); | ||
157 | |||
158 | return ata_pci_bmdma_init_one(pdev, ppi, &jmicron_sht, NULL, 0); | 146 | return ata_pci_bmdma_init_one(pdev, ppi, &jmicron_sht, NULL, 0); |
159 | } | 147 | } |
160 | 148 | ||
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index b6af4b0192b8..cbf5b3d617cd 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c | |||
@@ -1570,6 +1570,18 @@ DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB3 | |||
1570 | 1570 | ||
1571 | #endif | 1571 | #endif |
1572 | 1572 | ||
1573 | static void quirk_jmicron_async_suspend(struct pci_dev *dev) | ||
1574 | { | ||
1575 | if (dev->multifunction) { | ||
1576 | device_disable_async_suspend(&dev->dev); | ||
1577 | dev_info(&dev->dev, "async suspend disabled to avoid multi-function power-on ordering issue\n"); | ||
1578 | } | ||
1579 | } | ||
1580 | DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_CLASS_STORAGE_IDE, 8, quirk_jmicron_async_suspend); | ||
1581 | DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_CLASS_STORAGE_SATA_AHCI, 0, quirk_jmicron_async_suspend); | ||
1582 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_JMICRON, 0x2362, quirk_jmicron_async_suspend); | ||
1583 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_JMICRON, 0x236f, quirk_jmicron_async_suspend); | ||
1584 | |||
1573 | #ifdef CONFIG_X86_IO_APIC | 1585 | #ifdef CONFIG_X86_IO_APIC |
1574 | static void quirk_alder_ioapic(struct pci_dev *pdev) | 1586 | static void quirk_alder_ioapic(struct pci_dev *pdev) |
1575 | { | 1587 | { |