diff options
author | Chris Paterson <chris.paterson2@renesas.com> | 2016-11-24 11:13:40 -0500 |
---|---|---|
committer | Simon Horman <horms+renesas@verge.net.au> | 2017-01-03 04:41:22 -0500 |
commit | 909c1625241515aa2a5027a24e17d77b54e8ce4b (patch) | |
tree | 1390f31c29dc0ad90d1b47defc3b8f9518f8f640 | |
parent | 8a6de0453954095c269efc5054da53c73bfc8298 (diff) |
arm64: dts: r8a7796: Add CAN support
Adds CAN controller nodes for r8a7796.
Based on a patch for r8a7795 by Ramesh Shanmugasundaram.
Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Marc Kleine-Budde <mkl@pengutronix.de>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-rw-r--r-- | arch/arm64/boot/dts/renesas/r8a7796.dtsi | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi index c0f9ced8df7e..a97ef2e7202c 100644 --- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi | |||
@@ -367,6 +367,36 @@ | |||
367 | status = "disabled"; | 367 | status = "disabled"; |
368 | }; | 368 | }; |
369 | 369 | ||
370 | can0: can@e6c30000 { | ||
371 | compatible = "renesas,can-r8a7796", | ||
372 | "renesas,rcar-gen3-can"; | ||
373 | reg = <0 0xe6c30000 0 0x1000>; | ||
374 | interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; | ||
375 | clocks = <&cpg CPG_MOD 916>, | ||
376 | <&cpg CPG_CORE R8A7796_CLK_CANFD>, | ||
377 | <&can_clk>; | ||
378 | clock-names = "clkp1", "clkp2", "can_clk"; | ||
379 | assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>; | ||
380 | assigned-clock-rates = <40000000>; | ||
381 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | ||
382 | status = "disabled"; | ||
383 | }; | ||
384 | |||
385 | can1: can@e6c38000 { | ||
386 | compatible = "renesas,can-r8a7796", | ||
387 | "renesas,rcar-gen3-can"; | ||
388 | reg = <0 0xe6c38000 0 0x1000>; | ||
389 | interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; | ||
390 | clocks = <&cpg CPG_MOD 915>, | ||
391 | <&cpg CPG_CORE R8A7796_CLK_CANFD>, | ||
392 | <&can_clk>; | ||
393 | clock-names = "clkp1", "clkp2", "can_clk"; | ||
394 | assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>; | ||
395 | assigned-clock-rates = <40000000>; | ||
396 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | ||
397 | status = "disabled"; | ||
398 | }; | ||
399 | |||
370 | scif2: serial@e6e88000 { | 400 | scif2: serial@e6e88000 { |
371 | compatible = "renesas,scif-r8a7796", | 401 | compatible = "renesas,scif-r8a7796", |
372 | "renesas,rcar-gen3-scif", "renesas,scif"; | 402 | "renesas,rcar-gen3-scif", "renesas,scif"; |