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authorShanker Donthineni <shankerd@codeaurora.org>2017-03-07 09:20:38 -0500
committerMarc Zyngier <marc.zyngier@arm.com>2017-03-07 09:34:27 -0500
commit90922a2d03d84de36bf8a9979d62580102f31a92 (patch)
tree5f0f9da3b20bf6b01a1f6f87f25496d62c59676c
parentb3e228473e6cec7cf83b4025b4570c8066ab2dd8 (diff)
irqchip/gicv3-its: Add workaround for QDF2400 ITS erratum 0065
On Qualcomm Datacenter Technologies QDF2400 SoCs, the ITS hardware implementation uses 16Bytes for Interrupt Translation Entry (ITE), but reports an incorrect value of 8Bytes in GITS_TYPER.ITTE_size. It might cause kernel memory corruption depending on the number of MSI(x) that are configured and the amount of memory that has been allocated for ITEs in its_create_device(). This patch fixes the potential memory corruption by setting the correct ITE size to 16Bytes. Cc: stable@vger.kernel.org Signed-off-by: Shanker Donthineni <shankerd@codeaurora.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
-rw-r--r--Documentation/arm64/silicon-errata.txt1
-rw-r--r--arch/arm64/Kconfig10
-rw-r--r--drivers/irqchip/irq-gic-v3-its.c16
3 files changed, 27 insertions, 0 deletions
diff --git a/Documentation/arm64/silicon-errata.txt b/Documentation/arm64/silicon-errata.txt
index a71b8095dbd8..2f66683500b8 100644
--- a/Documentation/arm64/silicon-errata.txt
+++ b/Documentation/arm64/silicon-errata.txt
@@ -68,3 +68,4 @@ stable kernels.
68| | | | | 68| | | | |
69| Qualcomm Tech. | Falkor v1 | E1003 | QCOM_FALKOR_ERRATUM_1003 | 69| Qualcomm Tech. | Falkor v1 | E1003 | QCOM_FALKOR_ERRATUM_1003 |
70| Qualcomm Tech. | Falkor v1 | E1009 | QCOM_FALKOR_ERRATUM_1009 | 70| Qualcomm Tech. | Falkor v1 | E1009 | QCOM_FALKOR_ERRATUM_1009 |
71| Qualcomm Tech. | QDF2400 ITS | E0065 | QCOM_QDF2400_ERRATUM_0065 |
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index a39029b5414e..8c7c244247b6 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -508,6 +508,16 @@ config QCOM_FALKOR_ERRATUM_1009
508 508
509 If unsure, say Y. 509 If unsure, say Y.
510 510
511config QCOM_QDF2400_ERRATUM_0065
512 bool "QDF2400 E0065: Incorrect GITS_TYPER.ITT_Entry_size"
513 default y
514 help
515 On Qualcomm Datacenter Technologies QDF2400 SoC, ITS hardware reports
516 ITE size incorrectly. The GITS_TYPER.ITT_Entry_size field should have
517 been indicated as 16Bytes (0xf), not 8Bytes (0x7).
518
519 If unsure, say Y.
520
511endmenu 521endmenu
512 522
513 523
diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
index 23201004fd7a..f77f840d2b5f 100644
--- a/drivers/irqchip/irq-gic-v3-its.c
+++ b/drivers/irqchip/irq-gic-v3-its.c
@@ -1601,6 +1601,14 @@ static void __maybe_unused its_enable_quirk_cavium_23144(void *data)
1601 its->flags |= ITS_FLAGS_WORKAROUND_CAVIUM_23144; 1601 its->flags |= ITS_FLAGS_WORKAROUND_CAVIUM_23144;
1602} 1602}
1603 1603
1604static void __maybe_unused its_enable_quirk_qdf2400_e0065(void *data)
1605{
1606 struct its_node *its = data;
1607
1608 /* On QDF2400, the size of the ITE is 16Bytes */
1609 its->ite_size = 16;
1610}
1611
1604static const struct gic_quirk its_quirks[] = { 1612static const struct gic_quirk its_quirks[] = {
1605#ifdef CONFIG_CAVIUM_ERRATUM_22375 1613#ifdef CONFIG_CAVIUM_ERRATUM_22375
1606 { 1614 {
@@ -1618,6 +1626,14 @@ static const struct gic_quirk its_quirks[] = {
1618 .init = its_enable_quirk_cavium_23144, 1626 .init = its_enable_quirk_cavium_23144,
1619 }, 1627 },
1620#endif 1628#endif
1629#ifdef CONFIG_QCOM_QDF2400_ERRATUM_0065
1630 {
1631 .desc = "ITS: QDF2400 erratum 0065",
1632 .iidr = 0x00001070, /* QDF2400 ITS rev 1.x */
1633 .mask = 0xffffffff,
1634 .init = its_enable_quirk_qdf2400_e0065,
1635 },
1636#endif
1621 { 1637 {
1622 } 1638 }
1623}; 1639};