arm: dts: mt7623: update subsystem clock controller device nodes

Update MT7623 subsystem clock controllers, inlcuding mmsys, imgsys,
vdecsys, g3dsys and bdpsys.

Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

1 files changed, 41 insertions, 0 deletions

diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
index 8c43bd0715a9..b7ccf8b840d9 100644
--- a/arch/arm/boot/dts/mt7623.dtsi
+++ b/arch/arm/boot/dts/mt7623.dtsi
@@ -692,6 +692,39 @@
                 status = "disabled";
         };
 
+        g3dsys: syscon@13000000 {
+                compatible = "mediatek,mt7623-g3dsys",
+                             "mediatek,mt2701-g3dsys",
+                             "syscon";
+                reg = <0 0x13000000 0 0x200>;
+                #clock-cells = <1>;
+                #reset-cells = <1>;
+        };
+
+        mmsys: syscon@14000000 {
+                compatible = "mediatek,mt7623-mmsys",
+                             "mediatek,mt2701-mmsys",
+                             "syscon";
+                reg = <0 0x14000000 0 0x1000>;
+                #clock-cells = <1>;
+        };
+
+        imgsys: syscon@15000000 {
+                compatible = "mediatek,mt7623-imgsys",
+                             "mediatek,mt2701-imgsys",
+                             "syscon";
+                reg = <0 0x15000000 0 0x1000>;
+                #clock-cells = <1>;
+        };
+
+        vdecsys: syscon@16000000 {
+                compatible = "mediatek,mt7623-vdecsys",
+                             "mediatek,mt2701-vdecsys",
+                             "syscon";
+                reg = <0 0x16000000 0 0x1000>;
+                #clock-cells = <1>;
+        };
+
         hifsys: syscon@1a000000 {
                 compatible = "mediatek,mt7623-hifsys",
                              "mediatek,mt2701-hifsys",
@@ -946,6 +979,14 @@
                 power-domains = <&scpsys MT2701_POWER_DOMAIN_ETH>;
                 status = "disabled";
         };
+
+        bdpsys: syscon@1c000000 {
+                compatible = "mediatek,mt7623-bdpsys",
+                             "mediatek,mt2701-bdpsys",
+                             "syscon";
+                reg = <0 0x1c000000 0 0x1000>;
+                #clock-cells = <1>;
+        };
 };
 
 &pio {