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authorTimur Tabi <timur@codeaurora.org>2015-07-15 12:47:14 -0400
committerLinus Walleij <linus.walleij@linaro.org>2015-07-17 15:56:14 -0400
commit8f1338cd80648adf5434798f5393ad7c55d10848 (patch)
tree70676f0ebf67ea8c3aaee12b1ad672055827c9a0
parentb4c45fe974bc5fa6240a729ea1f77db8b56d132a (diff)
pinctrl: add support for Qualcomm Technologies QDF2xxx ARM64 SoCs
Add the pinctrl driver for the Qualcomm Technologies QDF2xxx ARM64 SoCs, which uses the Qualcomm Technologies TLMM pinctrl/gpio device. This driver is probed via ACPI and uses the pinctrl-msm.c backend driver. This driver is intended to be used only an ACPI-enabled system. As such, UEFI will handle all pin control configuration, so this driver does not provide pin control functions. It is effectively a GPIO-only driver. Signed-off-by: Timur Tabi <timur@codeaurora.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-rw-r--r--drivers/pinctrl/qcom/Kconfig8
-rw-r--r--drivers/pinctrl/qcom/Makefile1
-rw-r--r--drivers/pinctrl/qcom/pinctrl-qdf2xxx.c122
3 files changed, 131 insertions, 0 deletions
diff --git a/drivers/pinctrl/qcom/Kconfig b/drivers/pinctrl/qcom/Kconfig
index 8eef820b216e..383263a92e59 100644
--- a/drivers/pinctrl/qcom/Kconfig
+++ b/drivers/pinctrl/qcom/Kconfig
@@ -63,6 +63,14 @@ config PINCTRL_MSM8916
63 This is the pinctrl, pinmux, pinconf and gpiolib driver for the 63 This is the pinctrl, pinmux, pinconf and gpiolib driver for the
64 Qualcomm TLMM block found on the Qualcomm 8916 platform. 64 Qualcomm TLMM block found on the Qualcomm 8916 platform.
65 65
66config PINCTRL_QDF2XXX
67 tristate "Qualcomm Technologies QDF2xxx pin controller driver"
68 depends on GPIOLIB && ACPI
69 select PINCTRL_MSM
70 help
71 This is the GPIO driver for the TLMM block found on the
72 Qualcomm Technologies QDF2xxx SOCs.
73
66config PINCTRL_QCOM_SPMI_PMIC 74config PINCTRL_QCOM_SPMI_PMIC
67 tristate "Qualcomm SPMI PMIC pin controller driver" 75 tristate "Qualcomm SPMI PMIC pin controller driver"
68 depends on GPIOLIB && OF && SPMI 76 depends on GPIOLIB && OF && SPMI
diff --git a/drivers/pinctrl/qcom/Makefile b/drivers/pinctrl/qcom/Makefile
index e321f7ab325b..13b190e72c21 100644
--- a/drivers/pinctrl/qcom/Makefile
+++ b/drivers/pinctrl/qcom/Makefile
@@ -7,6 +7,7 @@ obj-$(CONFIG_PINCTRL_MSM8660) += pinctrl-msm8660.o
7obj-$(CONFIG_PINCTRL_MSM8960) += pinctrl-msm8960.o 7obj-$(CONFIG_PINCTRL_MSM8960) += pinctrl-msm8960.o
8obj-$(CONFIG_PINCTRL_MSM8X74) += pinctrl-msm8x74.o 8obj-$(CONFIG_PINCTRL_MSM8X74) += pinctrl-msm8x74.o
9obj-$(CONFIG_PINCTRL_MSM8916) += pinctrl-msm8916.o 9obj-$(CONFIG_PINCTRL_MSM8916) += pinctrl-msm8916.o
10obj-$(CONFIG_PINCTRL_QDF2XXX) += pinctrl-qdf2xxx.o
10obj-$(CONFIG_PINCTRL_QCOM_SPMI_PMIC) += pinctrl-spmi-gpio.o 11obj-$(CONFIG_PINCTRL_QCOM_SPMI_PMIC) += pinctrl-spmi-gpio.o
11obj-$(CONFIG_PINCTRL_QCOM_SPMI_PMIC) += pinctrl-spmi-mpp.o 12obj-$(CONFIG_PINCTRL_QCOM_SPMI_PMIC) += pinctrl-spmi-mpp.o
12obj-$(CONFIG_PINCTRL_QCOM_SSBI_PMIC) += pinctrl-ssbi-gpio.o 13obj-$(CONFIG_PINCTRL_QCOM_SSBI_PMIC) += pinctrl-ssbi-gpio.o
diff --git a/drivers/pinctrl/qcom/pinctrl-qdf2xxx.c b/drivers/pinctrl/qcom/pinctrl-qdf2xxx.c
new file mode 100644
index 000000000000..e9ff3bc150bb
--- /dev/null
+++ b/drivers/pinctrl/qcom/pinctrl-qdf2xxx.c
@@ -0,0 +1,122 @@
1/*
2 * Copyright (c) 2015, The Linux Foundation. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * GPIO and pin control functions on this SOC are handled by the "TLMM"
14 * device. The driver which controls this device is pinctrl-msm.c. Each
15 * SOC with a TLMM is expected to create a client driver that registers
16 * with pinctrl-msm.c. This means that all TLMM drivers are pin control
17 * drivers.
18 *
19 * This pin control driver is intended to be used only an ACPI-enabled
20 * system. As such, UEFI will handle all pin control configuration, so
21 * this driver does not provide pin control functions. It is effectively
22 * a GPIO-only driver. The alternative is to duplicate the GPIO code of
23 * pinctrl-msm.c into another driver.
24 */
25
26#include <linux/module.h>
27#include <linux/platform_device.h>
28#include <linux/pinctrl/pinctrl.h>
29#include <linux/acpi.h>
30
31#include "pinctrl-msm.h"
32
33static struct msm_pinctrl_soc_data qdf2xxx_pinctrl;
34
35static int qdf2xxx_pinctrl_probe(struct platform_device *pdev)
36{
37 struct pinctrl_pin_desc *pins;
38 struct msm_pingroup *groups;
39 unsigned int i;
40 u32 num_gpios;
41 int ret;
42
43 /* Query the number of GPIOs from ACPI */
44 ret = device_property_read_u32(&pdev->dev, "num-gpios", &num_gpios);
45 if (ret < 0)
46 return ret;
47
48 if (!num_gpios) {
49 dev_warn(&pdev->dev, "missing num-gpios property\n");
50 return -ENODEV;
51 }
52
53 pins = devm_kcalloc(&pdev->dev, num_gpios,
54 sizeof(struct pinctrl_pin_desc), GFP_KERNEL);
55 groups = devm_kcalloc(&pdev->dev, num_gpios,
56 sizeof(struct msm_pingroup), GFP_KERNEL);
57
58 for (i = 0; i < num_gpios; i++) {
59 pins[i].number = i;
60
61 groups[i].npins = 1,
62 groups[i].pins = &pins[i].number;
63 groups[i].ctl_reg = 0x10000 * i;
64 groups[i].io_reg = 0x04 + 0x10000 * i;
65 groups[i].intr_cfg_reg = 0x08 + 0x10000 * i;
66 groups[i].intr_status_reg = 0x0c + 0x10000 * i;
67 groups[i].intr_target_reg = 0x08 + 0x10000 * i;
68
69 groups[i].mux_bit = 2;
70 groups[i].pull_bit = 0;
71 groups[i].drv_bit = 6;
72 groups[i].oe_bit = 9;
73 groups[i].in_bit = 0;
74 groups[i].out_bit = 1;
75 groups[i].intr_enable_bit = 0;
76 groups[i].intr_status_bit = 0;
77 groups[i].intr_target_bit = 5;
78 groups[i].intr_target_kpss_val = 1;
79 groups[i].intr_raw_status_bit = 4;
80 groups[i].intr_polarity_bit = 1;
81 groups[i].intr_detection_bit = 2;
82 groups[i].intr_detection_width = 2;
83 }
84
85 qdf2xxx_pinctrl.pins = pins;
86 qdf2xxx_pinctrl.groups = groups;
87 qdf2xxx_pinctrl.npins = num_gpios;
88 qdf2xxx_pinctrl.ngroups = num_gpios;
89 qdf2xxx_pinctrl.ngpios = num_gpios;
90
91 return msm_pinctrl_probe(pdev, &qdf2xxx_pinctrl);
92}
93
94static const struct acpi_device_id qdf2xxx_acpi_ids[] = {
95 {"QCOM8001"},
96 {},
97};
98MODULE_DEVICE_TABLE(acpi, qdf2xxx_acpi_ids);
99
100static struct platform_driver qdf2xxx_pinctrl_driver = {
101 .driver = {
102 .name = "qdf2xxx-pinctrl",
103 .acpi_match_table = ACPI_PTR(qdf2xxx_acpi_ids),
104 },
105 .probe = qdf2xxx_pinctrl_probe,
106 .remove = msm_pinctrl_remove,
107};
108
109static int __init qdf2xxx_pinctrl_init(void)
110{
111 return platform_driver_register(&qdf2xxx_pinctrl_driver);
112}
113arch_initcall(qdf2xxx_pinctrl_init);
114
115static void __exit qdf2xxx_pinctrl_exit(void)
116{
117 platform_driver_unregister(&qdf2xxx_pinctrl_driver);
118}
119module_exit(qdf2xxx_pinctrl_exit);
120
121MODULE_DESCRIPTION("Qualcomm Technologies QDF2xxx pin control driver");
122MODULE_LICENSE("GPL v2");