diff options
author | Colin Ian King <colin.king@canonical.com> | 2017-12-04 12:21:06 -0500 |
---|---|---|
committer | Zhenyu Wang <zhenyuw@linux.intel.com> | 2017-12-04 22:45:06 -0500 |
commit | 8e60b7f195d2536b2f090ae97f74ed19a504d60c (patch) | |
tree | 99f658fc76da1f6404dbdc9a529ccf11bd7a0906 | |
parent | f745e9cc7e40c4570ab5e8d5ef32bfaa6e8ced46 (diff) |
drm/i915/gvt: fix off-by-one comparison of ring_id
The ring_id maximum boundary is being compared using the > operator
instead of >=, leading to an off-by-one error and an out of bounds
write into array vgpu->hws_pga[]. Fix this by simply using the
correct comparison operator. Also re-work another comparison that
uses the comparison > I915_NUM_ENGINES - 1 to use the >= idiom using
to keep this consistent in this code.
Detected by CoverityScan, CID#1462404 ("Out-of-bounds write")
Fixes: a2ae95af9646 ("drm/i915/gvt: update CSB and CSB write pointer in virtual HWSP")
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
-rw-r--r-- | drivers/gpu/drm/i915/gvt/handlers.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c index 54f5eac8bcc3..6f95bc04f0f0 100644 --- a/drivers/gpu/drm/i915/gvt/handlers.c +++ b/drivers/gpu/drm/i915/gvt/handlers.c | |||
@@ -1398,7 +1398,7 @@ static int hws_pga_write(struct intel_vgpu *vgpu, unsigned int offset, | |||
1398 | * update the VM CSB status correctly. Here listed registers can | 1398 | * update the VM CSB status correctly. Here listed registers can |
1399 | * support BDW, SKL or other platforms with same HWSP registers. | 1399 | * support BDW, SKL or other platforms with same HWSP registers. |
1400 | */ | 1400 | */ |
1401 | if (unlikely(ring_id < 0 || ring_id > I915_NUM_ENGINES)) { | 1401 | if (unlikely(ring_id < 0 || ring_id >= I915_NUM_ENGINES)) { |
1402 | gvt_vgpu_err("VM(%d) access unknown hardware status page register:0x%x\n", | 1402 | gvt_vgpu_err("VM(%d) access unknown hardware status page register:0x%x\n", |
1403 | vgpu->id, offset); | 1403 | vgpu->id, offset); |
1404 | return -EINVAL; | 1404 | return -EINVAL; |
@@ -1507,7 +1507,7 @@ static int elsp_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, | |||
1507 | u32 data = *(u32 *)p_data; | 1507 | u32 data = *(u32 *)p_data; |
1508 | int ret = 0; | 1508 | int ret = 0; |
1509 | 1509 | ||
1510 | if (WARN_ON(ring_id < 0 || ring_id > I915_NUM_ENGINES - 1)) | 1510 | if (WARN_ON(ring_id < 0 || ring_id >= I915_NUM_ENGINES)) |
1511 | return -EINVAL; | 1511 | return -EINVAL; |
1512 | 1512 | ||
1513 | execlist = &vgpu->submission.execlist[ring_id]; | 1513 | execlist = &vgpu->submission.execlist[ring_id]; |