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authorArnd Bergmann <arnd@arndb.de>2017-12-21 10:38:31 -0500
committerArnd Bergmann <arnd@arndb.de>2017-12-21 10:38:31 -0500
commit8d7ac420c161a63574e1709288a035148d3b377e (patch)
tree877c18c84b255d51c2b2b53398d7ccc82189564b
parentc4e8db5f057bdd4c1f98bafe0fe88c7a307f6205 (diff)
parent3106507e1004dd398ef75d0caf048f97ba2dfd0b (diff)
Merge tag 'amlogic-dt64' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt
Pull "Amlogic 64-bit DT updates for v4.16" from Kevin Hilman - meson-gx: add VPU power domain support - odroid-c2: add HDMI and CEC nodes - misc cleanups * tag 'amlogic-dt64' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: ARM64: dts: meson-gxm: fix q200 interrupt number ARM64: dts: meson-gxm: add the PHY interrupt line on Khadas VIM2 ARM64: dts: meson: add comments with the GPIO for the PHY interrupts ARM64: dts: amlogic: use generic bus node names ARM64: dts: meson: drop "sana" clock from SAR ADC ARM64: dts: odroid-c2: Add HDMI and CEC Nodes ARM64: dts: meson-gx: grow reset controller memory zone ARM64: dts: meson-gx: Add HDMI_5V regulator on selected boards ARM64: dts: meson-gx: add VPU power domain
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-axg.dtsi4
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi12
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gx.dtsi19
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts1
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts32
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts1
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi46
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts12
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi12
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxl.dtsi46
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts15
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts3
12 files changed, 192 insertions, 11 deletions
diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
index b932a784b02a..e7213eb53958 100644
--- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
@@ -113,7 +113,7 @@
113 #size-cells = <2>; 113 #size-cells = <2>;
114 ranges; 114 ranges;
115 115
116 cbus: cbus@ffd00000 { 116 cbus: bus@ffd00000 {
117 compatible = "simple-bus"; 117 compatible = "simple-bus";
118 reg = <0x0 0xffd00000 0x0 0x25000>; 118 reg = <0x0 0xffd00000 0x0 0x25000>;
119 #address-cells = <2>; 119 #address-cells = <2>;
@@ -175,7 +175,7 @@
175 }; 175 };
176 }; 176 };
177 177
178 aobus: aobus@ff800000 { 178 aobus: bus@ff800000 {
179 compatible = "simple-bus"; 179 compatible = "simple-bus";
180 reg = <0x0 0xff800000 0x0 0x100000>; 180 reg = <0x0 0xff800000 0x0 0x100000>;
181 #address-cells = <2>; 181 #address-cells = <2>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi
index 7d4b95e49993..aeb6d21a3bec 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi
@@ -59,6 +59,18 @@
59 reg = <0x0 0x0 0x0 0x80000000>; 59 reg = <0x0 0x0 0x0 0x80000000>;
60 }; 60 };
61 61
62 hdmi_5v: regulator-hdmi-5v {
63 compatible = "regulator-fixed";
64
65 regulator-name = "HDMI_5V";
66 regulator-min-microvolt = <5000000>;
67 regulator-max-microvolt = <5000000>;
68
69 gpio = <&gpio GPIOH_3 GPIO_ACTIVE_HIGH>;
70 enable-active-high;
71 regulator-always-on;
72 };
73
62 vddio_boot: regulator-vddio_boot { 74 vddio_boot: regulator-vddio_boot {
63 compatible = "regulator-fixed"; 75 compatible = "regulator-fixed";
64 regulator-name = "VDDIO_BOOT"; 76 regulator-name = "VDDIO_BOOT";
diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
index ab7ce1644cdc..6cb3c2a52baf 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
@@ -211,7 +211,7 @@
211 #size-cells = <2>; 211 #size-cells = <2>;
212 ranges; 212 ranges;
213 213
214 cbus: cbus@c1100000 { 214 cbus: bus@c1100000 {
215 compatible = "simple-bus"; 215 compatible = "simple-bus";
216 reg = <0x0 0xc1100000 0x0 0x100000>; 216 reg = <0x0 0xc1100000 0x0 0x100000>;
217 #address-cells = <2>; 217 #address-cells = <2>;
@@ -229,7 +229,7 @@
229 229
230 reset: reset-controller@4404 { 230 reset: reset-controller@4404 {
231 compatible = "amlogic,meson-gx-reset", "amlogic,meson-gxbb-reset"; 231 compatible = "amlogic,meson-gx-reset", "amlogic,meson-gxbb-reset";
232 reg = <0x0 0x04404 0x0 0x20>; 232 reg = <0x0 0x04404 0x0 0x9c>;
233 #reset-cells = <1>; 233 #reset-cells = <1>;
234 }; 234 };
235 235
@@ -366,7 +366,7 @@
366 }; 366 };
367 }; 367 };
368 368
369 aobus: aobus@c8100000 { 369 aobus: bus@c8100000 {
370 compatible = "simple-bus"; 370 compatible = "simple-bus";
371 reg = <0x0 0xc8100000 0x0 0x100000>; 371 reg = <0x0 0xc8100000 0x0 0x100000>;
372 #address-cells = <2>; 372 #address-cells = <2>;
@@ -377,6 +377,12 @@
377 compatible = "amlogic,meson-gx-ao-sysctrl", "syscon", "simple-mfd"; 377 compatible = "amlogic,meson-gx-ao-sysctrl", "syscon", "simple-mfd";
378 reg = <0x0 0x0 0x0 0x100>; 378 reg = <0x0 0x0 0x0 0x100>;
379 379
380 pwrc_vpu: power-controller-vpu {
381 compatible = "amlogic,meson-gx-pwrc-vpu";
382 #power-domain-cells = <0>;
383 amlogic,hhi-sysctrl = <&sysctrl>;
384 };
385
380 clkc_AO: clock-controller { 386 clkc_AO: clock-controller {
381 compatible = "amlogic,meson-gx-aoclkc"; 387 compatible = "amlogic,meson-gx-aoclkc";
382 #clock-cells = <1>; 388 #clock-cells = <1>;
@@ -447,13 +453,18 @@
447 }; 453 };
448 }; 454 };
449 455
450 hiubus: hiubus@c883c000 { 456 hiubus: bus@c883c000 {
451 compatible = "simple-bus"; 457 compatible = "simple-bus";
452 reg = <0x0 0xc883c000 0x0 0x2000>; 458 reg = <0x0 0xc883c000 0x0 0x2000>;
453 #address-cells = <2>; 459 #address-cells = <2>;
454 #size-cells = <2>; 460 #size-cells = <2>;
455 ranges = <0x0 0x0 0x0 0xc883c000 0x0 0x2000>; 461 ranges = <0x0 0x0 0x0 0xc883c000 0x0 0x2000>;
456 462
463 sysctrl: system-controller@0 {
464 compatible = "amlogic,meson-gx-hhi-sysctrl", "syscon", "simple-mfd";
465 reg = <0 0 0 0x400>;
466 };
467
457 mailbox: mailbox@404 { 468 mailbox: mailbox@404 {
458 compatible = "amlogic,meson-gx-mhu", "amlogic,meson-gxbb-mhu"; 469 compatible = "amlogic,meson-gx-mhu", "amlogic,meson-gxbb-mhu";
459 reg = <0 0x404 0 0x4c>; 470 reg = <0 0x404 0 0x4c>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts
index 4a4251001bfd..011e8e08e429 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts
@@ -169,6 +169,7 @@
169 /* Realtek RTL8211F (0x001cc916) */ 169 /* Realtek RTL8211F (0x001cc916) */
170 reg = <0>; 170 reg = <0>;
171 interrupt-parent = <&gpio_intc>; 171 interrupt-parent = <&gpio_intc>;
172 /* MAC_INTR on GPIOZ_15 */
172 interrupts = <29 IRQ_TYPE_LEVEL_LOW>; 173 interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
173 }; 174 };
174 }; 175 };
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
index f8d221463c60..ee4ada61c59c 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
@@ -135,6 +135,24 @@
135 compatible = "mmc-pwrseq-emmc"; 135 compatible = "mmc-pwrseq-emmc";
136 reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>; 136 reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
137 }; 137 };
138
139 hdmi-connector {
140 compatible = "hdmi-connector";
141 type = "a";
142
143 port {
144 hdmi_connector_in: endpoint {
145 remote-endpoint = <&hdmi_tx_tmds_out>;
146 };
147 };
148 };
149};
150
151&cec_AO {
152 status = "okay";
153 pinctrl-0 = <&ao_cec_pins>;
154 pinctrl-names = "default";
155 hdmi-phandle = <&hdmi_tx>;
138}; 156};
139 157
140&ethmac { 158&ethmac {
@@ -156,8 +174,10 @@
156 #size-cells = <0>; 174 #size-cells = <0>;
157 175
158 eth_phy0: ethernet-phy@0 { 176 eth_phy0: ethernet-phy@0 {
177 /* Realtek RTL8211F (0x001cc916) */
159 reg = <0>; 178 reg = <0>;
160 interrupt-parent = <&gpio_intc>; 179 interrupt-parent = <&gpio_intc>;
180 /* MAC_INTR on GPIOZ_15 */
161 interrupts = <29 IRQ_TYPE_LEVEL_LOW>; 181 interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
162 eee-broken-1000t; 182 eee-broken-1000t;
163 }; 183 };
@@ -179,6 +199,18 @@
179 }; 199 };
180}; 200};
181 201
202&hdmi_tx {
203 status = "okay";
204 pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
205 pinctrl-names = "default";
206};
207
208&hdmi_tx_tmds_port {
209 hdmi_tx_tmds_out: endpoint {
210 remote-endpoint = <&hdmi_connector_in>;
211 };
212};
213
182&i2c_A { 214&i2c_A {
183 status = "okay"; 215 status = "okay";
184 pinctrl-0 = <&i2c_a_pins>; 216 pinctrl-0 = <&i2c_a_pins>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts
index 9bf16bb7c491..09f34f7ef084 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts
@@ -118,6 +118,7 @@
118 /* Micrel KSZ9031 (0x00221620) */ 118 /* Micrel KSZ9031 (0x00221620) */
119 reg = <3>; 119 reg = <3>;
120 interrupt-parent = <&gpio_intc>; 120 interrupt-parent = <&gpio_intc>;
121 /* MAC_INTR on GPIOZ_15 */
121 interrupts = <29 IRQ_TYPE_LEVEL_LOW>; 122 interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
122 }; 123 };
123 }; 124 };
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
index 1fb8b9d6cb4e..3290a4dc3522 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
@@ -694,14 +694,55 @@
694 }; 694 };
695}; 695};
696 696
697&pwrc_vpu {
698 resets = <&reset RESET_VIU>,
699 <&reset RESET_VENC>,
700 <&reset RESET_VCBUS>,
701 <&reset RESET_BT656>,
702 <&reset RESET_DVIN_RESET>,
703 <&reset RESET_RDMA>,
704 <&reset RESET_VENCI>,
705 <&reset RESET_VENCP>,
706 <&reset RESET_VDAC>,
707 <&reset RESET_VDI6>,
708 <&reset RESET_VENCL>,
709 <&reset RESET_VID_LOCK>;
710 clocks = <&clkc CLKID_VPU>,
711 <&clkc CLKID_VAPB>;
712 clock-names = "vpu", "vapb";
713 /*
714 * VPU clocking is provided by two identical clock paths
715 * VPU_0 and VPU_1 muxed to a single clock by a glitch
716 * free mux to safely change frequency while running.
717 * Same for VAPB but with a final gate after the glitch free mux.
718 */
719 assigned-clocks = <&clkc CLKID_VPU_0_SEL>,
720 <&clkc CLKID_VPU_0>,
721 <&clkc CLKID_VPU>, /* Glitch free mux */
722 <&clkc CLKID_VAPB_0_SEL>,
723 <&clkc CLKID_VAPB_0>,
724 <&clkc CLKID_VAPB_SEL>; /* Glitch free mux */
725 assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
726 <0>, /* Do Nothing */
727 <&clkc CLKID_VPU_0>,
728 <&clkc CLKID_FCLK_DIV4>,
729 <0>, /* Do Nothing */
730 <&clkc CLKID_VAPB_0>;
731 assigned-clock-rates = <0>, /* Do Nothing */
732 <666666666>,
733 <0>, /* Do Nothing */
734 <0>, /* Do Nothing */
735 <250000000>,
736 <0>; /* Do Nothing */
737};
738
697&saradc { 739&saradc {
698 compatible = "amlogic,meson-gxbb-saradc", "amlogic,meson-saradc"; 740 compatible = "amlogic,meson-gxbb-saradc", "amlogic,meson-saradc";
699 clocks = <&xtal>, 741 clocks = <&xtal>,
700 <&clkc CLKID_SAR_ADC>, 742 <&clkc CLKID_SAR_ADC>,
701 <&clkc CLKID_SANA>,
702 <&clkc CLKID_SAR_ADC_CLK>, 743 <&clkc CLKID_SAR_ADC_CLK>,
703 <&clkc CLKID_SAR_ADC_SEL>; 744 <&clkc CLKID_SAR_ADC_SEL>;
704 clock-names = "clkin", "core", "sana", "adc_clk", "adc_sel"; 745 clock-names = "clkin", "core", "adc_clk", "adc_sel";
705}; 746};
706 747
707&sd_emmc_a { 748&sd_emmc_a {
@@ -763,4 +804,5 @@
763 804
764&vpu { 805&vpu {
765 compatible = "amlogic,meson-gxbb-vpu", "amlogic,meson-gx-vpu"; 806 compatible = "amlogic,meson-gxbb-vpu", "amlogic,meson-gx-vpu";
807 power-domains = <&pwrc_vpu>;
766}; 808};
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts
index dc9c3b8216c2..9671f1e3c74a 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts
@@ -72,6 +72,18 @@
72 reg = <0x0 0x0 0x0 0x80000000>; 72 reg = <0x0 0x0 0x0 0x80000000>;
73 }; 73 };
74 74
75 hdmi_5v: regulator-hdmi-5v {
76 compatible = "regulator-fixed";
77
78 regulator-name = "HDMI_5V";
79 regulator-min-microvolt = <5000000>;
80 regulator-max-microvolt = <5000000>;
81
82 gpio = <&gpio GPIOH_3 GPIO_ACTIVE_HIGH>;
83 enable-active-high;
84 regulator-always-on;
85 };
86
75 vcc_3v3: regulator-vcc_3v3 { 87 vcc_3v3: regulator-vcc_3v3 {
76 compatible = "regulator-fixed"; 88 compatible = "regulator-fixed";
77 regulator-name = "VCC_3V3"; 89 regulator-name = "VCC_3V3";
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi
index ff09df1fd5a3..7005068346a0 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi
@@ -28,6 +28,18 @@
28 reg = <0x0 0x0 0x0 0x80000000>; 28 reg = <0x0 0x0 0x0 0x80000000>;
29 }; 29 };
30 30
31 hdmi_5v: regulator-hdmi-5v {
32 compatible = "regulator-fixed";
33
34 regulator-name = "HDMI_5V";
35 regulator-min-microvolt = <5000000>;
36 regulator-max-microvolt = <5000000>;
37
38 gpio = <&gpio GPIOH_3 GPIO_ACTIVE_HIGH>;
39 enable-active-high;
40 regulator-always-on;
41 };
42
31 vddio_boot: regulator-vddio_boot { 43 vddio_boot: regulator-vddio_boot {
32 compatible = "regulator-fixed"; 44 compatible = "regulator-fixed";
33 regulator-name = "VDDIO_BOOT"; 45 regulator-name = "VDDIO_BOOT";
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
index 6524b89e7115..4f355f17eed6 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
@@ -644,14 +644,55 @@
644 }; 644 };
645}; 645};
646 646
647&pwrc_vpu {
648 resets = <&reset RESET_VIU>,
649 <&reset RESET_VENC>,
650 <&reset RESET_VCBUS>,
651 <&reset RESET_BT656>,
652 <&reset RESET_DVIN_RESET>,
653 <&reset RESET_RDMA>,
654 <&reset RESET_VENCI>,
655 <&reset RESET_VENCP>,
656 <&reset RESET_VDAC>,
657 <&reset RESET_VDI6>,
658 <&reset RESET_VENCL>,
659 <&reset RESET_VID_LOCK>;
660 clocks = <&clkc CLKID_VPU>,
661 <&clkc CLKID_VAPB>;
662 clock-names = "vpu", "vapb";
663 /*
664 * VPU clocking is provided by two identical clock paths
665 * VPU_0 and VPU_1 muxed to a single clock by a glitch
666 * free mux to safely change frequency while running.
667 * Same for VAPB but with a final gate after the glitch free mux.
668 */
669 assigned-clocks = <&clkc CLKID_VPU_0_SEL>,
670 <&clkc CLKID_VPU_0>,
671 <&clkc CLKID_VPU>, /* Glitch free mux */
672 <&clkc CLKID_VAPB_0_SEL>,
673 <&clkc CLKID_VAPB_0>,
674 <&clkc CLKID_VAPB_SEL>; /* Glitch free mux */
675 assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
676 <0>, /* Do Nothing */
677 <&clkc CLKID_VPU_0>,
678 <&clkc CLKID_FCLK_DIV4>,
679 <0>, /* Do Nothing */
680 <&clkc CLKID_VAPB_0>;
681 assigned-clock-rates = <0>, /* Do Nothing */
682 <666666666>,
683 <0>, /* Do Nothing */
684 <0>, /* Do Nothing */
685 <250000000>,
686 <0>; /* Do Nothing */
687};
688
647&saradc { 689&saradc {
648 compatible = "amlogic,meson-gxl-saradc", "amlogic,meson-saradc"; 690 compatible = "amlogic,meson-gxl-saradc", "amlogic,meson-saradc";
649 clocks = <&xtal>, 691 clocks = <&xtal>,
650 <&clkc CLKID_SAR_ADC>, 692 <&clkc CLKID_SAR_ADC>,
651 <&clkc CLKID_SANA>,
652 <&clkc CLKID_SAR_ADC_CLK>, 693 <&clkc CLKID_SAR_ADC_CLK>,
653 <&clkc CLKID_SAR_ADC_SEL>; 694 <&clkc CLKID_SAR_ADC_SEL>;
654 clock-names = "clkin", "core", "sana", "adc_clk", "adc_sel"; 695 clock-names = "clkin", "core", "adc_clk", "adc_sel";
655}; 696};
656 697
657&sd_emmc_a { 698&sd_emmc_a {
@@ -713,4 +754,5 @@
713 754
714&vpu { 755&vpu {
715 compatible = "amlogic,meson-gxl-vpu", "amlogic,meson-gx-vpu"; 756 compatible = "amlogic,meson-gxl-vpu", "amlogic,meson-gx-vpu";
757 power-domains = <&pwrc_vpu>;
716}; 758};
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts
index 34a41b26a4ed..1448c3dba08e 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts
@@ -153,6 +153,18 @@
153 }; 153 };
154 }; 154 };
155 155
156 hdmi_5v: regulator-hdmi-5v {
157 compatible = "regulator-fixed";
158
159 regulator-name = "HDMI_5V";
160 regulator-min-microvolt = <5000000>;
161 regulator-max-microvolt = <5000000>;
162
163 gpio = <&gpio GPIOH_3 GPIO_ACTIVE_HIGH>;
164 enable-active-high;
165 regulator-always-on;
166 };
167
156 vcc_3v3: regulator-vcc_3v3 { 168 vcc_3v3: regulator-vcc_3v3 {
157 compatible = "regulator-fixed"; 169 compatible = "regulator-fixed";
158 regulator-name = "VCC_3V3"; 170 regulator-name = "VCC_3V3";
@@ -232,6 +244,9 @@
232 external_phy: ethernet-phy@0 { 244 external_phy: ethernet-phy@0 {
233 /* Realtek RTL8211F (0x001cc916) */ 245 /* Realtek RTL8211F (0x001cc916) */
234 reg = <0>; 246 reg = <0>;
247 interrupt-parent = <&gpio_intc>;
248 /* MAC_INTR on GPIOZ_15 */
249 interrupts = <25 IRQ_TYPE_LEVEL_LOW>;
235 }; 250 };
236}; 251};
237 252
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts
index 66c6da7e112c..388fac4f2d97 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts
@@ -111,7 +111,8 @@
111 reg = <0>; 111 reg = <0>;
112 max-speed = <1000>; 112 max-speed = <1000>;
113 interrupt-parent = <&gpio_intc>; 113 interrupt-parent = <&gpio_intc>;
114 interrupts = <29 IRQ_TYPE_LEVEL_LOW>; 114 /* MAC_INTR on GPIOZ_15 */
115 interrupts = <25 IRQ_TYPE_LEVEL_LOW>;
115 }; 116 };
116}; 117};
117 118