diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2017-08-09 17:30:34 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2017-08-09 17:30:34 -0400 |
commit | 8d31f80eb38819e4f2905ad21c0e8998382a08f7 (patch) | |
tree | 11b3af719b373271f9a5340137f9ee492dde8bb2 | |
parent | 48fb6f4db940e92cfb16cd878cddd59ea6120d06 (diff) | |
parent | 0cca6c8920ade95e2741b2062cf1397dc546fb0f (diff) |
Merge tag 'pinctrl-v4.13-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control fixes from Linus Walleij:
"These are the pin control fixes I have gathered since the return from
my vacation. They boiled in -next a while so let's get them in.
Apart from the documentation build it is purely driver fixes. Which is
nice. The Intel fixes seem kind of important.
- Fix the documentation build as the docs were moved
- Correct the UART pin list on the Intel Merrifield
- Fix pin assignment and number of pins on the Marvell Armada 37xx
pin controller
- Cover the Setzer models in the Chromebook DMI quirk in the Intel
cheryview driver so they start working
- Add the missing "sim" function to the sunxi driver
- Fix USB pin definitions on Uniphier Pro4
- Smatch fix for invalid reference in the zx pin control driver"
* tag 'pinctrl-v4.13-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl:
pinctrl: generic: update references to Documentation/pinctrl.txt
pinctrl: intel: merrifield: Correct UART pin lists
pinctrl: armada-37xx: Fix number of pin in south bridge
pinctrl: armada-37xx: Fix the pin 23 on south bridge
pinctrl: cherryview: Add Setzer models to the Chromebook DMI quirk
pinctrl: sunxi: add a missing function of A10/A20 pinctrl driver
pinctrl: uniphier: fix USB3 pin assignment for Pro4
pinctrl: zte: fix dereference of 'data' in zx_set_mux()
-rw-r--r-- | Documentation/gpio/gpio-legacy.txt | 2 | ||||
-rw-r--r-- | MAINTAINERS | 2 | ||||
-rw-r--r-- | drivers/pinctrl/intel/pinctrl-cherryview.c | 7 | ||||
-rw-r--r-- | drivers/pinctrl/intel/pinctrl-merrifield.c | 6 | ||||
-rw-r--r-- | drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 25 | ||||
-rw-r--r-- | drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c | 1 | ||||
-rw-r--r-- | drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c | 2 | ||||
-rw-r--r-- | drivers/pinctrl/zte/pinctrl-zx.c | 11 | ||||
-rw-r--r-- | include/linux/device.h | 2 | ||||
-rw-r--r-- | include/linux/pinctrl/pinconf-generic.h | 4 |
10 files changed, 42 insertions, 20 deletions
diff --git a/Documentation/gpio/gpio-legacy.txt b/Documentation/gpio/gpio-legacy.txt index b34fd94f7089..5eacc147ea87 100644 --- a/Documentation/gpio/gpio-legacy.txt +++ b/Documentation/gpio/gpio-legacy.txt | |||
@@ -459,7 +459,7 @@ pin controller? | |||
459 | 459 | ||
460 | This is done by registering "ranges" of pins, which are essentially | 460 | This is done by registering "ranges" of pins, which are essentially |
461 | cross-reference tables. These are described in | 461 | cross-reference tables. These are described in |
462 | Documentation/pinctrl.txt | 462 | Documentation/driver-api/pinctl.rst |
463 | 463 | ||
464 | While the pin allocation is totally managed by the pinctrl subsystem, | 464 | While the pin allocation is totally managed by the pinctrl subsystem, |
465 | gpio (under gpiolib) is still maintained by gpio drivers. It may happen | 465 | gpio (under gpiolib) is still maintained by gpio drivers. It may happen |
diff --git a/MAINTAINERS b/MAINTAINERS index 3c419022ed93..84d6a8277cbd 100644 --- a/MAINTAINERS +++ b/MAINTAINERS | |||
@@ -10383,7 +10383,7 @@ L: linux-gpio@vger.kernel.org | |||
10383 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git | 10383 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git |
10384 | S: Maintained | 10384 | S: Maintained |
10385 | F: Documentation/devicetree/bindings/pinctrl/ | 10385 | F: Documentation/devicetree/bindings/pinctrl/ |
10386 | F: Documentation/pinctrl.txt | 10386 | F: Documentation/driver-api/pinctl.rst |
10387 | F: drivers/pinctrl/ | 10387 | F: drivers/pinctrl/ |
10388 | F: include/linux/pinctrl/ | 10388 | F: include/linux/pinctrl/ |
10389 | 10389 | ||
diff --git a/drivers/pinctrl/intel/pinctrl-cherryview.c b/drivers/pinctrl/intel/pinctrl-cherryview.c index 20f1b4493994..04e929fd0ffe 100644 --- a/drivers/pinctrl/intel/pinctrl-cherryview.c +++ b/drivers/pinctrl/intel/pinctrl-cherryview.c | |||
@@ -1548,6 +1548,13 @@ static const struct dmi_system_id chv_no_valid_mask[] = { | |||
1548 | }, | 1548 | }, |
1549 | }, | 1549 | }, |
1550 | { | 1550 | { |
1551 | .ident = "HP Chromebook 11 G5 (Setzer)", | ||
1552 | .matches = { | ||
1553 | DMI_MATCH(DMI_SYS_VENDOR, "HP"), | ||
1554 | DMI_MATCH(DMI_PRODUCT_NAME, "Setzer"), | ||
1555 | }, | ||
1556 | }, | ||
1557 | { | ||
1551 | .ident = "Acer Chromebook R11 (Cyan)", | 1558 | .ident = "Acer Chromebook R11 (Cyan)", |
1552 | .matches = { | 1559 | .matches = { |
1553 | DMI_MATCH(DMI_SYS_VENDOR, "GOOGLE"), | 1560 | DMI_MATCH(DMI_SYS_VENDOR, "GOOGLE"), |
diff --git a/drivers/pinctrl/intel/pinctrl-merrifield.c b/drivers/pinctrl/intel/pinctrl-merrifield.c index 4d4ef42a39b5..86c4b3fab7b0 100644 --- a/drivers/pinctrl/intel/pinctrl-merrifield.c +++ b/drivers/pinctrl/intel/pinctrl-merrifield.c | |||
@@ -343,9 +343,9 @@ static const struct pinctrl_pin_desc mrfld_pins[] = { | |||
343 | 343 | ||
344 | static const unsigned int mrfld_sdio_pins[] = { 50, 51, 52, 53, 54, 55, 56 }; | 344 | static const unsigned int mrfld_sdio_pins[] = { 50, 51, 52, 53, 54, 55, 56 }; |
345 | static const unsigned int mrfld_spi5_pins[] = { 90, 91, 92, 93, 94, 95, 96 }; | 345 | static const unsigned int mrfld_spi5_pins[] = { 90, 91, 92, 93, 94, 95, 96 }; |
346 | static const unsigned int mrfld_uart0_pins[] = { 124, 125, 126, 127 }; | 346 | static const unsigned int mrfld_uart0_pins[] = { 115, 116, 117, 118 }; |
347 | static const unsigned int mrfld_uart1_pins[] = { 128, 129, 130, 131 }; | 347 | static const unsigned int mrfld_uart1_pins[] = { 119, 120, 121, 122 }; |
348 | static const unsigned int mrfld_uart2_pins[] = { 132, 133, 134, 135 }; | 348 | static const unsigned int mrfld_uart2_pins[] = { 123, 124, 125, 126 }; |
349 | static const unsigned int mrfld_pwm0_pins[] = { 144 }; | 349 | static const unsigned int mrfld_pwm0_pins[] = { 144 }; |
350 | static const unsigned int mrfld_pwm1_pins[] = { 145 }; | 350 | static const unsigned int mrfld_pwm1_pins[] = { 145 }; |
351 | static const unsigned int mrfld_pwm2_pins[] = { 132 }; | 351 | static const unsigned int mrfld_pwm2_pins[] = { 132 }; |
diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c index f024e25787fc..0c6d7812d6fd 100644 --- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c +++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | |||
@@ -37,7 +37,7 @@ | |||
37 | #define IRQ_STATUS 0x10 | 37 | #define IRQ_STATUS 0x10 |
38 | #define IRQ_WKUP 0x18 | 38 | #define IRQ_WKUP 0x18 |
39 | 39 | ||
40 | #define NB_FUNCS 2 | 40 | #define NB_FUNCS 3 |
41 | #define GPIO_PER_REG 32 | 41 | #define GPIO_PER_REG 32 |
42 | 42 | ||
43 | /** | 43 | /** |
@@ -126,6 +126,16 @@ struct armada_37xx_pinctrl { | |||
126 | .funcs = {_func1, "gpio"} \ | 126 | .funcs = {_func1, "gpio"} \ |
127 | } | 127 | } |
128 | 128 | ||
129 | #define PIN_GRP_GPIO_3(_name, _start, _nr, _mask, _v1, _v2, _v3, _f1, _f2) \ | ||
130 | { \ | ||
131 | .name = _name, \ | ||
132 | .start_pin = _start, \ | ||
133 | .npins = _nr, \ | ||
134 | .reg_mask = _mask, \ | ||
135 | .val = {_v1, _v2, _v3}, \ | ||
136 | .funcs = {_f1, _f2, "gpio"} \ | ||
137 | } | ||
138 | |||
129 | #define PIN_GRP_EXTRA(_name, _start, _nr, _mask, _v1, _v2, _start2, _nr2, \ | 139 | #define PIN_GRP_EXTRA(_name, _start, _nr, _mask, _v1, _v2, _start2, _nr2, \ |
130 | _f1, _f2) \ | 140 | _f1, _f2) \ |
131 | { \ | 141 | { \ |
@@ -171,12 +181,13 @@ static struct armada_37xx_pin_group armada_37xx_sb_groups[] = { | |||
171 | PIN_GRP_GPIO("usb32_drvvbus0", 0, 1, BIT(0), "drvbus"), | 181 | PIN_GRP_GPIO("usb32_drvvbus0", 0, 1, BIT(0), "drvbus"), |
172 | PIN_GRP_GPIO("usb2_drvvbus1", 1, 1, BIT(1), "drvbus"), | 182 | PIN_GRP_GPIO("usb2_drvvbus1", 1, 1, BIT(1), "drvbus"), |
173 | PIN_GRP_GPIO("sdio_sb", 24, 6, BIT(2), "sdio"), | 183 | PIN_GRP_GPIO("sdio_sb", 24, 6, BIT(2), "sdio"), |
174 | PIN_GRP_EXTRA("rgmii", 6, 12, BIT(3), 0, BIT(3), 23, 1, "mii", "gpio"), | 184 | PIN_GRP_GPIO("rgmii", 6, 12, BIT(3), "mii"), |
175 | PIN_GRP_GPIO("pcie1", 3, 2, BIT(4), "pcie"), | 185 | PIN_GRP_GPIO("pcie1", 3, 2, BIT(4), "pcie"), |
176 | PIN_GRP_GPIO("ptp", 20, 3, BIT(5), "ptp"), | 186 | PIN_GRP_GPIO("ptp", 20, 3, BIT(5), "ptp"), |
177 | PIN_GRP("ptp_clk", 21, 1, BIT(6), "ptp", "mii"), | 187 | PIN_GRP("ptp_clk", 21, 1, BIT(6), "ptp", "mii"), |
178 | PIN_GRP("ptp_trig", 22, 1, BIT(7), "ptp", "mii"), | 188 | PIN_GRP("ptp_trig", 22, 1, BIT(7), "ptp", "mii"), |
179 | PIN_GRP("mii_col", 23, 1, BIT(8), "mii", "mii_err"), | 189 | PIN_GRP_GPIO_3("mii_col", 23, 1, BIT(8) | BIT(14), 0, BIT(8), BIT(14), |
190 | "mii", "mii_err"), | ||
180 | }; | 191 | }; |
181 | 192 | ||
182 | const struct armada_37xx_pin_data armada_37xx_pin_nb = { | 193 | const struct armada_37xx_pin_data armada_37xx_pin_nb = { |
@@ -187,7 +198,7 @@ const struct armada_37xx_pin_data armada_37xx_pin_nb = { | |||
187 | }; | 198 | }; |
188 | 199 | ||
189 | const struct armada_37xx_pin_data armada_37xx_pin_sb = { | 200 | const struct armada_37xx_pin_data armada_37xx_pin_sb = { |
190 | .nr_pins = 29, | 201 | .nr_pins = 30, |
191 | .name = "GPIO2", | 202 | .name = "GPIO2", |
192 | .groups = armada_37xx_sb_groups, | 203 | .groups = armada_37xx_sb_groups, |
193 | .ngroups = ARRAY_SIZE(armada_37xx_sb_groups), | 204 | .ngroups = ARRAY_SIZE(armada_37xx_sb_groups), |
@@ -208,7 +219,7 @@ static int armada_37xx_get_func_reg(struct armada_37xx_pin_group *grp, | |||
208 | { | 219 | { |
209 | int f; | 220 | int f; |
210 | 221 | ||
211 | for (f = 0; f < NB_FUNCS; f++) | 222 | for (f = 0; (f < NB_FUNCS) && grp->funcs[f]; f++) |
212 | if (!strcmp(grp->funcs[f], func)) | 223 | if (!strcmp(grp->funcs[f], func)) |
213 | return f; | 224 | return f; |
214 | 225 | ||
@@ -795,7 +806,7 @@ static int armada_37xx_fill_group(struct armada_37xx_pinctrl *info) | |||
795 | for (j = 0; j < grp->extra_npins; j++) | 806 | for (j = 0; j < grp->extra_npins; j++) |
796 | grp->pins[i+j] = grp->extra_pin + j; | 807 | grp->pins[i+j] = grp->extra_pin + j; |
797 | 808 | ||
798 | for (f = 0; f < NB_FUNCS; f++) { | 809 | for (f = 0; (f < NB_FUNCS) && grp->funcs[f]; f++) { |
799 | int ret; | 810 | int ret; |
800 | /* check for unique functions and count groups */ | 811 | /* check for unique functions and count groups */ |
801 | ret = armada_37xx_add_function(info->funcs, &funcsize, | 812 | ret = armada_37xx_add_function(info->funcs, &funcsize, |
@@ -847,7 +858,7 @@ static int armada_37xx_fill_func(struct armada_37xx_pinctrl *info) | |||
847 | struct armada_37xx_pin_group *gp = &info->groups[g]; | 858 | struct armada_37xx_pin_group *gp = &info->groups[g]; |
848 | int f; | 859 | int f; |
849 | 860 | ||
850 | for (f = 0; f < NB_FUNCS; f++) { | 861 | for (f = 0; (f < NB_FUNCS) && gp->funcs[f]; f++) { |
851 | if (strcmp(gp->funcs[f], name) == 0) { | 862 | if (strcmp(gp->funcs[f], name) == 0) { |
852 | *groups = gp->name; | 863 | *groups = gp->name; |
853 | groups++; | 864 | groups++; |
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c b/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c index 159580c04b14..47a392bc73c8 100644 --- a/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c +++ b/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c | |||
@@ -918,6 +918,7 @@ static const struct sunxi_desc_pin sun4i_a10_pins[] = { | |||
918 | SUNXI_FUNCTION_VARIANT(0x3, "emac", /* ETXD1 */ | 918 | SUNXI_FUNCTION_VARIANT(0x3, "emac", /* ETXD1 */ |
919 | PINCTRL_SUN7I_A20), | 919 | PINCTRL_SUN7I_A20), |
920 | SUNXI_FUNCTION(0x4, "keypad"), /* IN6 */ | 920 | SUNXI_FUNCTION(0x4, "keypad"), /* IN6 */ |
921 | SUNXI_FUNCTION(0x5, "sim"), /* DET */ | ||
921 | SUNXI_FUNCTION_IRQ(0x6, 16), /* EINT16 */ | 922 | SUNXI_FUNCTION_IRQ(0x6, 16), /* EINT16 */ |
922 | SUNXI_FUNCTION(0x7, "csi1")), /* D16 */ | 923 | SUNXI_FUNCTION(0x7, "csi1")), /* D16 */ |
923 | SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 17), | 924 | SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 17), |
diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c index a433a306a2d0..c75e094b2d90 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c | |||
@@ -1084,7 +1084,7 @@ static const unsigned usb1_pins[] = {182, 183}; | |||
1084 | static const int usb1_muxvals[] = {0, 0}; | 1084 | static const int usb1_muxvals[] = {0, 0}; |
1085 | static const unsigned usb2_pins[] = {184, 185}; | 1085 | static const unsigned usb2_pins[] = {184, 185}; |
1086 | static const int usb2_muxvals[] = {0, 0}; | 1086 | static const int usb2_muxvals[] = {0, 0}; |
1087 | static const unsigned usb3_pins[] = {186, 187}; | 1087 | static const unsigned usb3_pins[] = {187, 188}; |
1088 | static const int usb3_muxvals[] = {0, 0}; | 1088 | static const int usb3_muxvals[] = {0, 0}; |
1089 | static const unsigned port_range0_pins[] = { | 1089 | static const unsigned port_range0_pins[] = { |
1090 | 300, 301, 302, 303, 304, 305, 306, 307, /* PORT0x */ | 1090 | 300, 301, 302, 303, 304, 305, 306, 307, /* PORT0x */ |
diff --git a/drivers/pinctrl/zte/pinctrl-zx.c b/drivers/pinctrl/zte/pinctrl-zx.c index 787e3967bd5c..f828ee340a98 100644 --- a/drivers/pinctrl/zte/pinctrl-zx.c +++ b/drivers/pinctrl/zte/pinctrl-zx.c | |||
@@ -64,10 +64,8 @@ static int zx_set_mux(struct pinctrl_dev *pctldev, unsigned int func_selector, | |||
64 | struct zx_pinctrl_soc_info *info = zpctl->info; | 64 | struct zx_pinctrl_soc_info *info = zpctl->info; |
65 | const struct pinctrl_pin_desc *pindesc = info->pins + group_selector; | 65 | const struct pinctrl_pin_desc *pindesc = info->pins + group_selector; |
66 | struct zx_pin_data *data = pindesc->drv_data; | 66 | struct zx_pin_data *data = pindesc->drv_data; |
67 | struct zx_mux_desc *mux = data->muxes; | 67 | struct zx_mux_desc *mux; |
68 | u32 mask = (1 << data->width) - 1; | 68 | u32 mask, offset, bitpos; |
69 | u32 offset = data->offset; | ||
70 | u32 bitpos = data->bitpos; | ||
71 | struct function_desc *func; | 69 | struct function_desc *func; |
72 | unsigned long flags; | 70 | unsigned long flags; |
73 | u32 val, mval; | 71 | u32 val, mval; |
@@ -76,6 +74,11 @@ static int zx_set_mux(struct pinctrl_dev *pctldev, unsigned int func_selector, | |||
76 | if (!data) | 74 | if (!data) |
77 | return -EINVAL; | 75 | return -EINVAL; |
78 | 76 | ||
77 | mux = data->muxes; | ||
78 | mask = (1 << data->width) - 1; | ||
79 | offset = data->offset; | ||
80 | bitpos = data->bitpos; | ||
81 | |||
79 | func = pinmux_generic_get_function(pctldev, func_selector); | 82 | func = pinmux_generic_get_function(pctldev, func_selector); |
80 | if (!func) | 83 | if (!func) |
81 | return -EINVAL; | 84 | return -EINVAL; |
diff --git a/include/linux/device.h b/include/linux/device.h index 723cd54b94da..beabdbc08420 100644 --- a/include/linux/device.h +++ b/include/linux/device.h | |||
@@ -843,7 +843,7 @@ struct dev_links_info { | |||
843 | * hibernation, system resume and during runtime PM transitions | 843 | * hibernation, system resume and during runtime PM transitions |
844 | * along with subsystem-level and driver-level callbacks. | 844 | * along with subsystem-level and driver-level callbacks. |
845 | * @pins: For device pin management. | 845 | * @pins: For device pin management. |
846 | * See Documentation/pinctrl.txt for details. | 846 | * See Documentation/driver-api/pinctl.rst for details. |
847 | * @msi_list: Hosts MSI descriptors | 847 | * @msi_list: Hosts MSI descriptors |
848 | * @msi_domain: The generic MSI domain this device is using. | 848 | * @msi_domain: The generic MSI domain this device is using. |
849 | * @numa_node: NUMA node this device is close to. | 849 | * @numa_node: NUMA node this device is close to. |
diff --git a/include/linux/pinctrl/pinconf-generic.h b/include/linux/pinctrl/pinconf-generic.h index 231d3075815a..e91d1b6a260d 100644 --- a/include/linux/pinctrl/pinconf-generic.h +++ b/include/linux/pinctrl/pinconf-generic.h | |||
@@ -81,8 +81,8 @@ | |||
81 | * it. | 81 | * it. |
82 | * @PIN_CONFIG_OUTPUT: this will configure the pin as an output and drive a | 82 | * @PIN_CONFIG_OUTPUT: this will configure the pin as an output and drive a |
83 | * value on the line. Use argument 1 to indicate high level, argument 0 to | 83 | * value on the line. Use argument 1 to indicate high level, argument 0 to |
84 | * indicate low level. (Please see Documentation/pinctrl.txt, section | 84 | * indicate low level. (Please see Documentation/driver-api/pinctl.rst, |
85 | * "GPIO mode pitfalls" for a discussion around this parameter.) | 85 | * section "GPIO mode pitfalls" for a discussion around this parameter.) |
86 | * @PIN_CONFIG_POWER_SOURCE: if the pin can select between different power | 86 | * @PIN_CONFIG_POWER_SOURCE: if the pin can select between different power |
87 | * supplies, the argument to this parameter (on a custom format) tells | 87 | * supplies, the argument to this parameter (on a custom format) tells |
88 | * the driver which alternative power source to use. | 88 | * the driver which alternative power source to use. |