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authorDave Airlie <airlied@redhat.com>2017-06-28 03:08:12 -0400
committerDave Airlie <airlied@redhat.com>2017-06-28 03:08:12 -0400
commit8cd373707bc1903869573f577f7d39f9cee9c7ad (patch)
tree23b9bc8257c669ce985e1918a78d45a51017398b
parent6d61e70ccc21606ffb8a0a03bd3aba24f659502b (diff)
parent46a269da7e8a1ab6510ea5c88b2732925e5efc79 (diff)
Merge branch 'etnaviv/next' of https://git.pengutronix.de/git/lst/linux into drm-next
- a fix from Eric for synchronization with etnaviv exported dma-bufs - thermal throttle support for newer GPU cores - updated module clock gating to work around GPU errata - a fix to restore userspace buffer cache performance * 'etnaviv/next' of https://git.pengutronix.de/git/lst/linux: drm/etnaviv: restore ETNA_PREP_NOSYNC behaviour drm/etnaviv: implement cooling support for new GPU cores drm/etnaviv: update MLCG disables with info from newer Vivante driver drm/etnaviv: update common.xml.h drm/etnaviv: Expose our reservation object when exporting a dmabuf.
-rw-r--r--drivers/gpu/drm/etnaviv/common.xml.h150
-rw-r--r--drivers/gpu/drm/etnaviv/etnaviv_drv.c1
-rw-r--r--drivers/gpu/drm/etnaviv/etnaviv_drv.h1
-rw-r--r--drivers/gpu/drm/etnaviv/etnaviv_gem.c24
-rw-r--r--drivers/gpu/drm/etnaviv/etnaviv_gem_prime.c7
-rw-r--r--drivers/gpu/drm/etnaviv/etnaviv_gpu.c30
-rw-r--r--drivers/gpu/drm/etnaviv/etnaviv_gpu.h2
7 files changed, 136 insertions, 79 deletions
diff --git a/drivers/gpu/drm/etnaviv/common.xml.h b/drivers/gpu/drm/etnaviv/common.xml.h
index e881482b5971..207f45c999c3 100644
--- a/drivers/gpu/drm/etnaviv/common.xml.h
+++ b/drivers/gpu/drm/etnaviv/common.xml.h
@@ -8,10 +8,38 @@ http://0x04.net/cgit/index.cgi/rules-ng-ng
8git clone git://0x04.net/rules-ng-ng 8git clone git://0x04.net/rules-ng-ng
9 9
10The rules-ng-ng source files this header was generated from are: 10The rules-ng-ng source files this header was generated from are:
11- state_hi.xml ( 24309 bytes, from 2015-12-12 09:02:53) 11- state.xml ( 19930 bytes, from 2017-03-09 15:43:43)
12- common.xml ( 18379 bytes, from 2015-12-12 09:02:53) 12- common.xml ( 23473 bytes, from 2017-03-09 15:43:43)
13- state_hi.xml ( 26403 bytes, from 2017-03-09 15:43:43)
14- copyright.xml ( 1597 bytes, from 2016-12-08 16:37:56)
15- state_2d.xml ( 51552 bytes, from 2016-12-08 16:37:56)
16- state_3d.xml ( 66957 bytes, from 2017-03-09 15:43:43)
17- state_vg.xml ( 5975 bytes, from 2016-12-08 16:37:56)
13 18
14Copyright (C) 2015 19Copyright (C) 2012-2017 by the following authors:
20- Wladimir J. van der Laan <laanwj@gmail.com>
21- Christian Gmeiner <christian.gmeiner@gmail.com>
22- Lucas Stach <l.stach@pengutronix.de>
23- Russell King <rmk@arm.linux.org.uk>
24
25Permission is hereby granted, free of charge, to any person obtaining a
26copy of this software and associated documentation files (the "Software"),
27to deal in the Software without restriction, including without limitation
28the rights to use, copy, modify, merge, publish, distribute, sub license,
29and/or sell copies of the Software, and to permit persons to whom the
30Software is furnished to do so, subject to the following conditions:
31
32The above copyright notice and this permission notice (including the
33next paragraph) shall be included in all copies or substantial portions
34of the Software.
35
36THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
37IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
38FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
39THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
40LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
41FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
42DEALINGS IN THE SOFTWARE.
15*/ 43*/
16 44
17 45
@@ -162,129 +190,129 @@ Copyright (C) 2015
162#define chipMinorFeatures1_FC_FLUSH_STALL 0x80000000 190#define chipMinorFeatures1_FC_FLUSH_STALL 0x80000000
163#define chipMinorFeatures2_LINE_LOOP 0x00000001 191#define chipMinorFeatures2_LINE_LOOP 0x00000001
164#define chipMinorFeatures2_LOGIC_OP 0x00000002 192#define chipMinorFeatures2_LOGIC_OP 0x00000002
165#define chipMinorFeatures2_UNK2 0x00000004 193#define chipMinorFeatures2_SEAMLESS_CUBE_MAP 0x00000004
166#define chipMinorFeatures2_SUPERTILED_TEXTURE 0x00000008 194#define chipMinorFeatures2_SUPERTILED_TEXTURE 0x00000008
167#define chipMinorFeatures2_UNK4 0x00000010 195#define chipMinorFeatures2_LINEAR_PE 0x00000010
168#define chipMinorFeatures2_RECT_PRIMITIVE 0x00000020 196#define chipMinorFeatures2_RECT_PRIMITIVE 0x00000020
169#define chipMinorFeatures2_COMPOSITION 0x00000040 197#define chipMinorFeatures2_COMPOSITION 0x00000040
170#define chipMinorFeatures2_CORRECT_AUTO_DISABLE_COUNT 0x00000080 198#define chipMinorFeatures2_CORRECT_AUTO_DISABLE_COUNT 0x00000080
171#define chipMinorFeatures2_UNK8 0x00000100 199#define chipMinorFeatures2_PE_SWIZZLE 0x00000100
172#define chipMinorFeatures2_UNK9 0x00000200 200#define chipMinorFeatures2_END_EVENT 0x00000200
173#define chipMinorFeatures2_UNK10 0x00000400 201#define chipMinorFeatures2_S1S8 0x00000400
174#define chipMinorFeatures2_HALTI1 0x00000800 202#define chipMinorFeatures2_HALTI1 0x00000800
175#define chipMinorFeatures2_UNK12 0x00001000 203#define chipMinorFeatures2_RGB888 0x00001000
176#define chipMinorFeatures2_UNK13 0x00002000 204#define chipMinorFeatures2_TX__YUV_ASSEMBLER 0x00002000
177#define chipMinorFeatures2_UNK14 0x00004000 205#define chipMinorFeatures2_DYNAMIC_FREQUENCY_SCALING 0x00004000
178#define chipMinorFeatures2_EXTRA_TEXTURE_STATE 0x00008000 206#define chipMinorFeatures2_EXTRA_TEXTURE_STATE 0x00008000
179#define chipMinorFeatures2_FULL_DIRECTFB 0x00010000 207#define chipMinorFeatures2_FULL_DIRECTFB 0x00010000
180#define chipMinorFeatures2_2D_TILING 0x00020000 208#define chipMinorFeatures2_2D_TILING 0x00020000
181#define chipMinorFeatures2_THREAD_WALKER_IN_PS 0x00040000 209#define chipMinorFeatures2_THREAD_WALKER_IN_PS 0x00040000
182#define chipMinorFeatures2_TILE_FILLER 0x00080000 210#define chipMinorFeatures2_TILE_FILLER 0x00080000
183#define chipMinorFeatures2_UNK20 0x00100000 211#define chipMinorFeatures2_YUV_STANDARD 0x00100000
184#define chipMinorFeatures2_2D_MULTI_SOURCE_BLIT 0x00200000 212#define chipMinorFeatures2_2D_MULTI_SOURCE_BLIT 0x00200000
185#define chipMinorFeatures2_UNK22 0x00400000 213#define chipMinorFeatures2_YUV_CONVERSION 0x00400000
186#define chipMinorFeatures2_UNK23 0x00800000 214#define chipMinorFeatures2_FLUSH_FIXED_2D 0x00800000
187#define chipMinorFeatures2_UNK24 0x01000000 215#define chipMinorFeatures2_INTERLEAVER 0x01000000
188#define chipMinorFeatures2_MIXED_STREAMS 0x02000000 216#define chipMinorFeatures2_MIXED_STREAMS 0x02000000
189#define chipMinorFeatures2_2D_420_L2CACHE 0x04000000 217#define chipMinorFeatures2_2D_420_L2CACHE 0x04000000
190#define chipMinorFeatures2_UNK27 0x08000000 218#define chipMinorFeatures2_BUG_FIXES7 0x08000000
191#define chipMinorFeatures2_2D_NO_INDEX8_BRUSH 0x10000000 219#define chipMinorFeatures2_2D_NO_INDEX8_BRUSH 0x10000000
192#define chipMinorFeatures2_TEXTURE_TILED_READ 0x20000000 220#define chipMinorFeatures2_TEXTURE_TILED_READ 0x20000000
193#define chipMinorFeatures2_UNK30 0x40000000 221#define chipMinorFeatures2_DECOMPRESS_Z16 0x40000000
194#define chipMinorFeatures2_UNK31 0x80000000 222#define chipMinorFeatures2_BUG_FIXES8 0x80000000
195#define chipMinorFeatures3_ROTATION_STALL_FIX 0x00000001 223#define chipMinorFeatures3_ROTATION_STALL_FIX 0x00000001
196#define chipMinorFeatures3_UNK1 0x00000002 224#define chipMinorFeatures3_OCL_ONLY 0x00000002
197#define chipMinorFeatures3_2D_MULTI_SOURCE_BLT_EX 0x00000004 225#define chipMinorFeatures3_2D_MULTI_SOURCE_BLT_EX 0x00000004
198#define chipMinorFeatures3_UNK3 0x00000008 226#define chipMinorFeatures3_INSTRUCTION_CACHE 0x00000008
199#define chipMinorFeatures3_UNK4 0x00000010 227#define chipMinorFeatures3_GEOMETRY_SHADER 0x00000010
200#define chipMinorFeatures3_UNK5 0x00000020 228#define chipMinorFeatures3_TEX_COMPRESSION_SUPERTILED 0x00000020
201#define chipMinorFeatures3_UNK6 0x00000040 229#define chipMinorFeatures3_GENERICS 0x00000040
202#define chipMinorFeatures3_UNK7 0x00000080 230#define chipMinorFeatures3_BUG_FIXES9 0x00000080
203#define chipMinorFeatures3_FAST_MSAA 0x00000100 231#define chipMinorFeatures3_FAST_MSAA 0x00000100
204#define chipMinorFeatures3_UNK9 0x00000200 232#define chipMinorFeatures3_WCLIP 0x00000200
205#define chipMinorFeatures3_BUG_FIXES10 0x00000400 233#define chipMinorFeatures3_BUG_FIXES10 0x00000400
206#define chipMinorFeatures3_UNK11 0x00000800 234#define chipMinorFeatures3_UNIFIED_SAMPLERS 0x00000800
207#define chipMinorFeatures3_BUG_FIXES11 0x00001000 235#define chipMinorFeatures3_BUG_FIXES11 0x00001000
208#define chipMinorFeatures3_UNK13 0x00002000 236#define chipMinorFeatures3_PERFORMANCE_COUNTERS 0x00002000
209#define chipMinorFeatures3_UNK14 0x00004000 237#define chipMinorFeatures3_HAS_FAST_TRANSCENDENTALS 0x00004000
210#define chipMinorFeatures3_UNK15 0x00008000 238#define chipMinorFeatures3_BUG_FIXES12 0x00008000
211#define chipMinorFeatures3_UNK16 0x00010000 239#define chipMinorFeatures3_BUG_FIXES13 0x00010000
212#define chipMinorFeatures3_UNK17 0x00020000 240#define chipMinorFeatures3_DE_ENHANCEMENTS1 0x00020000
213#define chipMinorFeatures3_ACE 0x00040000 241#define chipMinorFeatures3_ACE 0x00040000
214#define chipMinorFeatures3_UNK19 0x00080000 242#define chipMinorFeatures3_TX_ENHANCEMENTS1 0x00080000
215#define chipMinorFeatures3_UNK20 0x00100000 243#define chipMinorFeatures3_SH_ENHANCEMENTS1 0x00100000
216#define chipMinorFeatures3_UNK21 0x00200000 244#define chipMinorFeatures3_SH_ENHANCEMENTS2 0x00200000
217#define chipMinorFeatures3_UNK22 0x00400000 245#define chipMinorFeatures3_UNK22 0x00400000
218#define chipMinorFeatures3_UNK23 0x00800000 246#define chipMinorFeatures3_2D_FC_SOURCE 0x00800000
219#define chipMinorFeatures3_UNK24 0x01000000 247#define chipMinorFeatures3_UNK24 0x01000000
220#define chipMinorFeatures3_UNK25 0x02000000 248#define chipMinorFeatures3_UNK25 0x02000000
221#define chipMinorFeatures3_NEW_HZ 0x04000000 249#define chipMinorFeatures3_NEW_HZ 0x04000000
222#define chipMinorFeatures3_UNK27 0x08000000 250#define chipMinorFeatures3_UNK27 0x08000000
223#define chipMinorFeatures3_UNK28 0x10000000 251#define chipMinorFeatures3_UNK28 0x10000000
224#define chipMinorFeatures3_UNK29 0x20000000 252#define chipMinorFeatures3_SH_ENHANCEMENTS3 0x20000000
225#define chipMinorFeatures3_UNK30 0x40000000 253#define chipMinorFeatures3_UNK30 0x40000000
226#define chipMinorFeatures3_UNK31 0x80000000 254#define chipMinorFeatures3_UNK31 0x80000000
227#define chipMinorFeatures4_UNK0 0x00000001 255#define chipMinorFeatures4_UNK0 0x00000001
228#define chipMinorFeatures4_UNK1 0x00000002 256#define chipMinorFeatures4_PE_ENHANCEMENTS2 0x00000002
229#define chipMinorFeatures4_UNK2 0x00000004 257#define chipMinorFeatures4_FRUSTUM_CLIP_FIX 0x00000004
230