diff options
author | Andreas Färber <afaerber@suse.de> | 2017-07-29 15:12:46 -0400 |
---|---|---|
committer | Andreas Färber <afaerber@suse.de> | 2017-09-19 07:42:07 -0400 |
commit | 8c04f65ce833fae3ee6740e15cab3821b1009504 (patch) | |
tree | a4db842acb2965e8cee1473371267e5c8c5677d9 | |
parent | 2bd6bf03f4c1c59381d62c61d03f6cc3fe71f66e (diff) |
arm64: dts: realtek: Clean up RTD1295 UART reg property
The downstream RTD1195 and apparently RTD1295 trees have a modified 8250
serial driver that acknowledges its interrupts using the second reg area,
which is an irq mux.
Drop these unused second reg entries for the UART nodes.
Fixes: 72a7786c0a0d ("ARM64: dts: Add Realtek RTD1295 and Zidoo X9S")
Signed-off-by: Andreas Färber <afaerber@suse.de>
-rw-r--r-- | arch/arm64/boot/dts/realtek/rtd1295.dtsi | 9 |
1 files changed, 3 insertions, 6 deletions
diff --git a/arch/arm64/boot/dts/realtek/rtd1295.dtsi b/arch/arm64/boot/dts/realtek/rtd1295.dtsi index d8f84666c8ce..43da91fce2b1 100644 --- a/arch/arm64/boot/dts/realtek/rtd1295.dtsi +++ b/arch/arm64/boot/dts/realtek/rtd1295.dtsi | |||
@@ -89,8 +89,7 @@ | |||
89 | 89 | ||
90 | uart0: serial@98007800 { | 90 | uart0: serial@98007800 { |
91 | compatible = "snps,dw-apb-uart"; | 91 | compatible = "snps,dw-apb-uart"; |
92 | reg = <0x98007800 0x400>, | 92 | reg = <0x98007800 0x400>; |
93 | <0x98007000 0x100>; | ||
94 | reg-shift = <2>; | 93 | reg-shift = <2>; |
95 | reg-io-width = <4>; | 94 | reg-io-width = <4>; |
96 | clock-frequency = <27000000>; | 95 | clock-frequency = <27000000>; |
@@ -99,8 +98,7 @@ | |||
99 | 98 | ||
100 | uart1: serial@9801b200 { | 99 | uart1: serial@9801b200 { |
101 | compatible = "snps,dw-apb-uart"; | 100 | compatible = "snps,dw-apb-uart"; |
102 | reg = <0x9801b200 0x100>, | 101 | reg = <0x9801b200 0x100>; |
103 | <0x9801b00c 0x100>; | ||
104 | reg-shift = <2>; | 102 | reg-shift = <2>; |
105 | reg-io-width = <4>; | 103 | reg-io-width = <4>; |
106 | clock-frequency = <432000000>; | 104 | clock-frequency = <432000000>; |
@@ -109,8 +107,7 @@ | |||
109 | 107 | ||
110 | uart2: serial@9801b400 { | 108 | uart2: serial@9801b400 { |
111 | compatible = "snps,dw-apb-uart"; | 109 | compatible = "snps,dw-apb-uart"; |
112 | reg = <0x9801b400 0x100>, | 110 | reg = <0x9801b400 0x100>; |
113 | <0x9801b00c 0x100>; | ||
114 | reg-shift = <2>; | 111 | reg-shift = <2>; |
115 | reg-io-width = <4>; | 112 | reg-io-width = <4>; |
116 | clock-frequency = <432000000>; | 113 | clock-frequency = <432000000>; |