diff options
author | Nicolin Chen <nicoleotsuka@gmail.com> | 2017-12-17 21:52:09 -0500 |
---|---|---|
committer | Mark Brown <broonie@kernel.org> | 2017-12-19 04:25:02 -0500 |
commit | 8bc84a3344ca27836cff29bfbb42365753c9c557 (patch) | |
tree | 7a6df5f48a64d2598648568c6c1d76e3c53edb7b | |
parent | 2474e4037c4e3fe8b4fe4ab37232973d9b17a573 (diff) |
ASoC: fsl_ssi: Rename i2smode to i2s_net
Since this i2smode also includes the setting of Network mode, it
should have it in the name. This patch also adds its MASK define.
Signed-off-by: Nicolin Chen <nicoleotsuka@gmail.com>
Tested-by: Maciej S. Szmigiero <mail@maciej.szmigiero.name>
Reviewed-by: Maciej S. Szmigiero <mail@maciej.szmigiero.name>
Acked-by: Timur Tabi <timur@tabi.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
-rw-r--r-- | sound/soc/fsl/fsl_ssi.c | 24 | ||||
-rw-r--r-- | sound/soc/fsl/fsl_ssi.h | 1 |
2 files changed, 13 insertions, 12 deletions
diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c index aef014c46d96..2b3915c45199 100644 --- a/sound/soc/fsl/fsl_ssi.c +++ b/sound/soc/fsl/fsl_ssi.c | |||
@@ -201,7 +201,7 @@ struct fsl_ssi_soc_data { | |||
201 | * @cpu_dai_drv: CPU DAI driver for this device | 201 | * @cpu_dai_drv: CPU DAI driver for this device |
202 | * | 202 | * |
203 | * @dai_fmt: DAI configuration this device is currently used with | 203 | * @dai_fmt: DAI configuration this device is currently used with |
204 | * @i2s_mode: I2S and Network mode configuration of SCR register | 204 | * @i2s_net: I2S and Network mode configurations of SCR register |
205 | * @use_dma: DMA is used or FIQ with stream filter | 205 | * @use_dma: DMA is used or FIQ with stream filter |
206 | * @use_dual_fifo: DMA with support for dual FIFO mode | 206 | * @use_dual_fifo: DMA with support for dual FIFO mode |
207 | * @has_ipg_clk_name: If "ipg" is in the clock name list of device tree | 207 | * @has_ipg_clk_name: If "ipg" is in the clock name list of device tree |
@@ -245,7 +245,7 @@ struct fsl_ssi { | |||
245 | struct snd_soc_dai_driver cpu_dai_drv; | 245 | struct snd_soc_dai_driver cpu_dai_drv; |
246 | 246 | ||
247 | unsigned int dai_fmt; | 247 | unsigned int dai_fmt; |
248 | u8 i2s_mode; | 248 | u8 i2s_net; |
249 | bool use_dma; | 249 | bool use_dma; |
250 | bool use_dual_fifo; | 250 | bool use_dual_fifo; |
251 | bool has_ipg_clk_name; | 251 | bool has_ipg_clk_name; |
@@ -836,16 +836,16 @@ static int fsl_ssi_hw_params(struct snd_pcm_substream *substream, | |||
836 | } | 836 | } |
837 | 837 | ||
838 | if (!fsl_ssi_is_ac97(ssi)) { | 838 | if (!fsl_ssi_is_ac97(ssi)) { |
839 | u8 i2smode; | 839 | u8 i2s_net; |
840 | /* Normal + Network mode to send 16-bit data in 32-bit frames */ | 840 | /* Normal + Network mode to send 16-bit data in 32-bit frames */ |
841 | if (fsl_ssi_is_i2s_cbm_cfs(ssi) && sample_size == 16) | 841 | if (fsl_ssi_is_i2s_cbm_cfs(ssi) && sample_size == 16) |
842 | i2smode = SSI_SCR_I2S_MODE_NORMAL | SSI_SCR_NET; | 842 | i2s_net = SSI_SCR_I2S_MODE_NORMAL | SSI_SCR_NET; |
843 | else | 843 | else |
844 | i2smode = ssi->i2s_mode; | 844 | i2s_net = ssi->i2s_net; |
845 | 845 | ||
846 | regmap_update_bits(regs, REG_SSI_SCR, | 846 | regmap_update_bits(regs, REG_SSI_SCR, |
847 | SSI_SCR_NET | SSI_SCR_I2S_MODE_MASK, | 847 | SSI_SCR_I2S_NET_MASK, |
848 | channels == 1 ? 0 : i2smode); | 848 | channels == 1 ? 0 : i2s_net); |
849 | } | 849 | } |
850 | 850 | ||
851 | /* In synchronous mode, the SSI uses STCCR for capture */ | 851 | /* In synchronous mode, the SSI uses STCCR for capture */ |
@@ -902,7 +902,7 @@ static int _fsl_ssi_set_dai_fmt(struct device *dev, | |||
902 | srcr &= ~mask; | 902 | srcr &= ~mask; |
903 | 903 | ||
904 | /* Use Network mode as default */ | 904 | /* Use Network mode as default */ |
905 | ssi->i2s_mode = SSI_SCR_NET; | 905 | ssi->i2s_net = SSI_SCR_NET; |
906 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { | 906 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { |
907 | case SND_SOC_DAIFMT_I2S: | 907 | case SND_SOC_DAIFMT_I2S: |
908 | regmap_update_bits(regs, REG_SSI_STCCR, | 908 | regmap_update_bits(regs, REG_SSI_STCCR, |
@@ -912,10 +912,10 @@ static int _fsl_ssi_set_dai_fmt(struct device *dev, | |||
912 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { | 912 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { |
913 | case SND_SOC_DAIFMT_CBM_CFS: | 913 | case SND_SOC_DAIFMT_CBM_CFS: |
914 | case SND_SOC_DAIFMT_CBS_CFS: | 914 | case SND_SOC_DAIFMT_CBS_CFS: |
915 | ssi->i2s_mode |= SSI_SCR_I2S_MODE_MASTER; | 915 | ssi->i2s_net |= SSI_SCR_I2S_MODE_MASTER; |
916 | break; | 916 | break; |
917 | case SND_SOC_DAIFMT_CBM_CFM: | 917 | case SND_SOC_DAIFMT_CBM_CFM: |
918 | ssi->i2s_mode |= SSI_SCR_I2S_MODE_SLAVE; | 918 | ssi->i2s_net |= SSI_SCR_I2S_MODE_SLAVE; |
919 | break; | 919 | break; |
920 | default: | 920 | default: |
921 | return -EINVAL; | 921 | return -EINVAL; |
@@ -940,12 +940,12 @@ static int _fsl_ssi_set_dai_fmt(struct device *dev, | |||
940 | break; | 940 | break; |
941 | case SND_SOC_DAIFMT_AC97: | 941 | case SND_SOC_DAIFMT_AC97: |
942 | /* Data on falling edge of bclk, frame high, 1clk before data */ | 942 | /* Data on falling edge of bclk, frame high, 1clk before data */ |
943 | ssi->i2s_mode |= SSI_SCR_I2S_MODE_NORMAL; | 943 | ssi->i2s_net |= SSI_SCR_I2S_MODE_NORMAL; |
944 | break; | 944 | break; |
945 | default: | 945 | default: |
946 | return -EINVAL; | 946 | return -EINVAL; |
947 | } | 947 | } |
948 | scr |= ssi->i2s_mode; | 948 | scr |= ssi->i2s_net; |
949 | 949 | ||
950 | /* DAI clock inversion */ | 950 | /* DAI clock inversion */ |
951 | switch (fmt & SND_SOC_DAIFMT_INV_MASK) { | 951 | switch (fmt & SND_SOC_DAIFMT_INV_MASK) { |
diff --git a/sound/soc/fsl/fsl_ssi.h b/sound/soc/fsl/fsl_ssi.h index 52b88f1d6c6f..b61008779e3c 100644 --- a/sound/soc/fsl/fsl_ssi.h +++ b/sound/soc/fsl/fsl_ssi.h | |||
@@ -95,6 +95,7 @@ | |||
95 | #define SSI_SCR_I2S_MODE_SLAVE 0x00000040 | 95 | #define SSI_SCR_I2S_MODE_SLAVE 0x00000040 |
96 | #define SSI_SCR_SYN 0x00000010 | 96 | #define SSI_SCR_SYN 0x00000010 |
97 | #define SSI_SCR_NET 0x00000008 | 97 | #define SSI_SCR_NET 0x00000008 |
98 | #define SSI_SCR_I2S_NET_MASK (SSI_SCR_NET | SSI_SCR_I2S_MODE_MASK) | ||
98 | #define SSI_SCR_RE 0x00000004 | 99 | #define SSI_SCR_RE 0x00000004 |
99 | #define SSI_SCR_TE 0x00000002 | 100 | #define SSI_SCR_TE 0x00000002 |
100 | #define SSI_SCR_SSIEN 0x00000001 | 101 | #define SSI_SCR_SSIEN 0x00000001 |