diff options
| author | Simon Horman <horms+renesas@verge.net.au> | 2016-12-20 05:32:36 -0500 |
|---|---|---|
| committer | Simon Horman <horms+renesas@verge.net.au> | 2017-01-03 04:41:44 -0500 |
| commit | 8b51f97138ca22b6ae728a434215a05b7e5bbc63 (patch) | |
| tree | 9a5517771d792011f0fb4b4770d7d5dd2551e43a | |
| parent | dc36965a890515753671628cdf25365ee45e6206 (diff) | |
arm64: dts: r8a7796: Use R-Car Gen 3 fallback binding for msiof nodes
Use recently added R-Car Gen 3 fallback binding for msiof nodes in
DT for r8a7796 SoC.
This has no run-time effect for the current driver as the initialisation
sequence is the same for the SoC-specific binding for r8a7796 and the
fallback binding for R-Car Gen 3.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
| -rw-r--r-- | arch/arm64/boot/dts/renesas/r8a7796.dtsi | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi index d4beb15b076a..eb446d966621 100644 --- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi | |||
| @@ -485,7 +485,8 @@ | |||
| 485 | }; | 485 | }; |
| 486 | 486 | ||
| 487 | msiof0: spi@e6e90000 { | 487 | msiof0: spi@e6e90000 { |
| 488 | compatible = "renesas,msiof-r8a7796"; | 488 | compatible = "renesas,msiof-r8a7796", |
| 489 | "renesas,rcar-gen3-msiof"; | ||
| 489 | reg = <0 0xe6e90000 0 0x0064>; | 490 | reg = <0 0xe6e90000 0 0x0064>; |
| 490 | interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; | 491 | interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; |
| 491 | clocks = <&cpg CPG_MOD 211>; | 492 | clocks = <&cpg CPG_MOD 211>; |
| @@ -499,7 +500,8 @@ | |||
| 499 | }; | 500 | }; |
| 500 | 501 | ||
| 501 | msiof1: spi@e6ea0000 { | 502 | msiof1: spi@e6ea0000 { |
| 502 | compatible = "renesas,msiof-r8a7796"; | 503 | compatible = "renesas,msiof-r8a7796", |
| 504 | "renesas,rcar-gen3-msiof"; | ||
| 503 | reg = <0 0xe6ea0000 0 0x0064>; | 505 | reg = <0 0xe6ea0000 0 0x0064>; |
| 504 | interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; | 506 | interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; |
| 505 | clocks = <&cpg CPG_MOD 210>; | 507 | clocks = <&cpg CPG_MOD 210>; |
| @@ -513,7 +515,8 @@ | |||
| 513 | }; | 515 | }; |
| 514 | 516 | ||
| 515 | msiof2: spi@e6c00000 { | 517 | msiof2: spi@e6c00000 { |
| 516 | compatible = "renesas,msiof-r8a7796"; | 518 | compatible = "renesas,msiof-r8a7796", |
| 519 | "renesas,rcar-gen3-msiof"; | ||
| 517 | reg = <0 0xe6c00000 0 0x0064>; | 520 | reg = <0 0xe6c00000 0 0x0064>; |
| 518 | interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; | 521 | interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; |
| 519 | clocks = <&cpg CPG_MOD 209>; | 522 | clocks = <&cpg CPG_MOD 209>; |
| @@ -526,7 +529,8 @@ | |||
| 526 | }; | 529 | }; |
| 527 | 530 | ||
| 528 | msiof3: spi@e6c10000 { | 531 | msiof3: spi@e6c10000 { |
| 529 | compatible = "renesas,msiof-r8a7796"; | 532 | compatible = "renesas,msiof-r8a7796", |
| 533 | "renesas,rcar-gen3-msiof"; | ||
| 530 | reg = <0 0xe6c10000 0 0x0064>; | 534 | reg = <0 0xe6c10000 0 0x0064>; |
| 531 | interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; | 535 | interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; |
| 532 | clocks = <&cpg CPG_MOD 208>; | 536 | clocks = <&cpg CPG_MOD 208>; |