x86/asm/entry/irq: Clean up IRQn_VECTOR macros

Since the ISA irqs are in a single block, use
ISA_IRQ_VECTOR(irq) instead of individual macros.

Signed-off-by: Brian Gerst <brgerst@gmail.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/1431185813-15413-5-git-send-email-brgerst@gmail.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>

5 files changed, 10 insertions, 26 deletions

diff --git a/arch/x86/include/asm/irq_vectors.h b/arch/x86/include/asm/irq_vectors.h
index 07f27926d473..117db96ad5fb 100644
--- a/arch/x86/include/asm/irq_vectors.h
+++ b/arch/x86/include/asm/irq_vectors.h
@@ -52,23 +52,7 @@
  * Vectors 0x30-0x3f are used for ISA interrupts.
  *   round up to the next 16-vector boundary
  */
-#define IRQ0_VECTOR                     ((FIRST_EXTERNAL_VECTOR + 16) & ~15)
-
-#define IRQ1_VECTOR                     (IRQ0_VECTOR +  1)
-#define IRQ2_VECTOR                     (IRQ0_VECTOR +  2)
-#define IRQ3_VECTOR                     (IRQ0_VECTOR +  3)
-#define IRQ4_VECTOR                     (IRQ0_VECTOR +  4)
-#define IRQ5_VECTOR                     (IRQ0_VECTOR +  5)
-#define IRQ6_VECTOR                     (IRQ0_VECTOR +  6)
-#define IRQ7_VECTOR                     (IRQ0_VECTOR +  7)
-#define IRQ8_VECTOR                     (IRQ0_VECTOR +  8)
-#define IRQ9_VECTOR                     (IRQ0_VECTOR +  9)
-#define IRQ10_VECTOR                    (IRQ0_VECTOR + 10)
-#define IRQ11_VECTOR                    (IRQ0_VECTOR + 11)
-#define IRQ12_VECTOR                    (IRQ0_VECTOR + 12)
-#define IRQ13_VECTOR                    (IRQ0_VECTOR + 13)
-#define IRQ14_VECTOR                    (IRQ0_VECTOR + 14)
-#define IRQ15_VECTOR                    (IRQ0_VECTOR + 15)
+#define ISA_IRQ_VECTOR(irq)             (((FIRST_EXTERNAL_VECTOR + 16) & ~15) + irq)
 
 /*
  * Special IRQ vectors used by the SMP architecture, 0xf0-0xff
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index f4dc2462a1ac..e01e4117188a 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -258,11 +258,11 @@ int __init arch_early_ioapic_init(void)
 
         /*
          * For legacy IRQ's, start with assigning irq0 to irq15 to
-         * IRQ0_VECTOR to IRQ15_VECTOR for all cpu's.
+         * ISA_IRQ_VECTOR(irq) for all cpu's.
          */
         for (i = 0; i < nr_legacy_irqs(); i++) {
                 cfg = alloc_irq_and_cfg_at(i, node);
-                cfg->vector = IRQ0_VECTOR + i;
+                cfg->vector = ISA_IRQ_VECTOR(i);
                 cpumask_setall(cfg->domain);
         }
 
diff --git a/arch/x86/kernel/apic/vector.c b/arch/x86/kernel/apic/vector.c
index 6cedd7914581..82d44c314a3f 100644
--- a/arch/x86/kernel/apic/vector.c
+++ b/arch/x86/kernel/apic/vector.c
@@ -314,7 +314,7 @@ void setup_vector_irq(int cpu)
          * legacy vector to irq mapping:
          */
         for (irq = 0; irq < nr_legacy_irqs(); irq++)
-                per_cpu(vector_irq, cpu)[IRQ0_VECTOR + irq] = irq;
+                per_cpu(vector_irq, cpu)[ISA_IRQ_VECTOR(irq)] = irq;
 
         __setup_vector_irq(cpu);
 }
diff --git a/arch/x86/kernel/i8259.c b/arch/x86/kernel/i8259.c
index e7cc5370cd2f..16cb827a5b27 100644
--- a/arch/x86/kernel/i8259.c
+++ b/arch/x86/kernel/i8259.c
@@ -329,8 +329,8 @@ static void init_8259A(int auto_eoi)
          */
         outb_pic(0x11, PIC_MASTER_CMD); /* ICW1: select 8259A-1 init */
 
-        /* ICW2: 8259A-1 IR0-7 mapped to 0x30-0x37 */
-        outb_pic(IRQ0_VECTOR, PIC_MASTER_IMR);
+        /* ICW2: 8259A-1 IR0-7 mapped to ISA_IRQ_VECTOR(0) */
+        outb_pic(ISA_IRQ_VECTOR(0), PIC_MASTER_IMR);
 
         /* 8259A-1 (the master) has a slave on IR2 */
         outb_pic(1U << PIC_CASCADE_IR, PIC_MASTER_IMR);
@@ -342,8 +342,8 @@ static void init_8259A(int auto_eoi)
 
         outb_pic(0x11, PIC_SLAVE_CMD);  /* ICW1: select 8259A-2 init */
 
-        /* ICW2: 8259A-2 IR0-7 mapped to IRQ8_VECTOR */
-        outb_pic(IRQ8_VECTOR, PIC_SLAVE_IMR);
+        /* ICW2: 8259A-2 IR0-7 mapped to ISA_IRQ_VECTOR(8) */
+        outb_pic(ISA_IRQ_VECTOR(8), PIC_SLAVE_IMR);
         /* 8259A-2 is a slave on master's IR2 */
         outb_pic(PIC_CASCADE_IR, PIC_SLAVE_IMR);
         /* (slave's support for AEOI in flat mode is to be investigated) */
diff --git a/arch/x86/kernel/irqinit.c b/arch/x86/kernel/irqinit.c
index cd10a6437264..dc1e08d23552 100644
--- a/arch/x86/kernel/irqinit.c
+++ b/arch/x86/kernel/irqinit.c
@@ -86,7 +86,7 @@ void __init init_IRQ(void)
         int i;
 
         /*
-         * On cpu 0, Assign IRQ0_VECTOR..IRQ15_VECTOR's to IRQ 0..15.
+         * On cpu 0, Assign ISA_IRQ_VECTOR(irq) to IRQ 0..15.
          * If these IRQ's are handled by legacy interrupt-controllers like PIC,
          * then this configuration will likely be static after the boot. If
          * these IRQ's are handled by more mordern controllers like IO-APIC,
@@ -94,7 +94,7 @@ void __init init_IRQ(void)
          * irq's migrate etc.
          */
         for (i = 0; i < nr_legacy_irqs(); i++)
-                per_cpu(vector_irq, 0)[IRQ0_VECTOR + i] = i;
+                per_cpu(vector_irq, 0)[ISA_IRQ_VECTOR(i)] = i;
 
         x86_init.irqs.intr_init();
 }