diff options
author | Jagan Teki <jagan@amarulasolutions.com> | 2018-09-04 00:40:49 -0400 |
---|---|---|
committer | Maxime Ripard <maxime.ripard@bootlin.com> | 2018-09-05 03:19:59 -0400 |
commit | 8b2a37870419f4aa6e6f837aa8ec627eae984010 (patch) | |
tree | 77d847f9e300a112d543d25d9af1a02f0b1d7c2a | |
parent | 5de39acaf34604bd04834f092479cf4dcc946dd4 (diff) |
dt-bindings: clock: sun50i-a64-ccu: Add PLL_VIDEO0 macro
Allwinner A64 HDMI PHY clock has PLL_VIDEO0 as a parent.
Include the macro on dt-bindings so-that the same can be used
while defining CCU clock phandles.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
-rw-r--r-- | drivers/clk/sunxi-ng/ccu-sun50i-a64.h | 4 | ||||
-rw-r--r-- | include/dt-bindings/clock/sun50i-a64-ccu.h | 1 |
2 files changed, 4 insertions, 1 deletions
diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-a64.h b/drivers/clk/sunxi-ng/ccu-sun50i-a64.h index 061b6fbb4f95..cd415b968e8c 100644 --- a/drivers/clk/sunxi-ng/ccu-sun50i-a64.h +++ b/drivers/clk/sunxi-ng/ccu-sun50i-a64.h | |||
@@ -27,7 +27,9 @@ | |||
27 | #define CLK_PLL_AUDIO_2X 4 | 27 | #define CLK_PLL_AUDIO_2X 4 |
28 | #define CLK_PLL_AUDIO_4X 5 | 28 | #define CLK_PLL_AUDIO_4X 5 |
29 | #define CLK_PLL_AUDIO_8X 6 | 29 | #define CLK_PLL_AUDIO_8X 6 |
30 | #define CLK_PLL_VIDEO0 7 | 30 | |
31 | /* PLL_VIDEO0 exported for HDMI PHY */ | ||
32 | |||
31 | #define CLK_PLL_VIDEO0_2X 8 | 33 | #define CLK_PLL_VIDEO0_2X 8 |
32 | #define CLK_PLL_VE 9 | 34 | #define CLK_PLL_VE 9 |
33 | #define CLK_PLL_DDR0 10 | 35 | #define CLK_PLL_DDR0 10 |
diff --git a/include/dt-bindings/clock/sun50i-a64-ccu.h b/include/dt-bindings/clock/sun50i-a64-ccu.h index d66432c6e675..a8ac4cfcdcbc 100644 --- a/include/dt-bindings/clock/sun50i-a64-ccu.h +++ b/include/dt-bindings/clock/sun50i-a64-ccu.h | |||
@@ -43,6 +43,7 @@ | |||
43 | #ifndef _DT_BINDINGS_CLK_SUN50I_A64_H_ | 43 | #ifndef _DT_BINDINGS_CLK_SUN50I_A64_H_ |
44 | #define _DT_BINDINGS_CLK_SUN50I_A64_H_ | 44 | #define _DT_BINDINGS_CLK_SUN50I_A64_H_ |
45 | 45 | ||
46 | #define CLK_PLL_VIDEO0 7 | ||
46 | #define CLK_PLL_PERIPH0 11 | 47 | #define CLK_PLL_PERIPH0 11 |
47 | 48 | ||
48 | #define CLK_BUS_MIPI_DSI 28 | 49 | #define CLK_BUS_MIPI_DSI 28 |