KVM: MIPS/Emulate: Fix CACHE emulation for EVA hosts

Use protected_writeback_dcache_line() instead of flush_dcache_line(),
and protected_flush_icache_line() instead of flush_icache_line(), so
that CACHEE (the EVA variant) is used on EVA host kernels.

Without this, guest floating point branch delay slot emulation via a
trampoline on the user stack fails on EVA host kernels due to failure of
the icache sync, resulting in the break instruction getting skipped and
execution from the stack.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: "Radim Krčmář" <rkrcmar@redhat.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Cc: kvm@vger.kernel.org

1 files changed, 3 insertions, 3 deletions

diff --git a/arch/mips/kvm/emulate.c b/arch/mips/kvm/emulate.c
index 3ced662e012e..9ac8e45017ce 100644
--- a/arch/mips/kvm/emulate.c
+++ b/arch/mips/kvm/emulate.c
@@ -1792,7 +1792,7 @@ enum emulation_result kvm_mips_emulate_cache(union mips_instruction inst,
 skip_fault:
         /* XXXKYMA: Only a subset of cache ops are supported, used by Linux */
         if (op_inst == Hit_Writeback_Inv_D || op_inst == Hit_Invalidate_D) {
-                flush_dcache_line(va);
+                protected_writeback_dcache_line(va);
 
 #ifdef CONFIG_KVM_MIPS_DYN_TRANS
                 /*
@@ -1802,8 +1802,8 @@ skip_fault:
                 kvm_mips_trans_cache_va(inst, opc, vcpu);
 #endif
         } else if (op_inst == Hit_Invalidate_I) {
-                flush_dcache_line(va);
-                flush_icache_line(va);
+                protected_writeback_dcache_line(va);
+                protected_flush_icache_line(va);
 
 #ifdef CONFIG_KVM_MIPS_DYN_TRANS
                 /* Replace the CACHE instruction, with a SYNCI */