aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorSergei Shtylyov <sergei.shtylyov@cogentembedded.com>2017-11-28 15:15:45 -0500
committerSimon Horman <horms+renesas@verge.net.au>2017-12-05 03:30:48 -0500
commit8aba250d7800702bbd2f6a91174e01b9a84ed2dd (patch)
tree69539351c0676ee23a2ebc8d8d2e0ee9b0c18c6a
parente221dab085d89bbd49ed6713b07201a5262aad7f (diff)
arm64: dts: renesas: r8a77970: use SYSC power domain macros
Now that the commit 833bdb47c826 ("dt-bindings: power: add R8A77970 SYSC power domain definitions") has hit Linus' tree, we can replace the bare numbers (we had to use to avoid a cross tree dependency) with these macro definitions... Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-rw-r--r--arch/arm64/boot/dts/renesas/r8a77970.dtsi32
1 files changed, 16 insertions, 16 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
index 7bb224595c95..c35a117fc447 100644
--- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
@@ -33,14 +33,14 @@
33 compatible = "arm,cortex-a53", "arm,armv8"; 33 compatible = "arm,cortex-a53", "arm,armv8";
34 reg = <0>; 34 reg = <0>;
35 clocks = <&cpg CPG_CORE R8A77970_CLK_Z2>; 35 clocks = <&cpg CPG_CORE R8A77970_CLK_Z2>;
36 power-domains = <&sysc 5>; 36 power-domains = <&sysc R8A77970_PD_CA53_CPU0>;
37 next-level-cache = <&L2_CA53>; 37 next-level-cache = <&L2_CA53>;
38 enable-method = "psci"; 38 enable-method = "psci";
39 }; 39 };
40 40
41 L2_CA53: cache-controller { 41 L2_CA53: cache-controller {
42 compatible = "cache"; 42 compatible = "cache";
43 power-domains = <&sysc 21>; 43 power-domains = <&sysc R8A77970_PD_CA53_SCU>;
44 cache-unified; 44 cache-unified;
45 cache-level = <2>; 45 cache-level = <2>;
46 }; 46 };
@@ -88,7 +88,7 @@
88 IRQ_TYPE_LEVEL_HIGH)>; 88 IRQ_TYPE_LEVEL_HIGH)>;
89 clocks = <&cpg CPG_MOD 408>; 89 clocks = <&cpg CPG_MOD 408>;
90 clock-names = "clk"; 90 clock-names = "clk";
91 power-domains = <&sysc 32>; 91 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
92 resets = <&cpg 408>; 92 resets = <&cpg 408>;
93 }; 93 };
94 94
@@ -109,7 +109,7 @@
109 "renesas,rcar-gen3-wdt"; 109 "renesas,rcar-gen3-wdt";
110 reg = <0 0xe6020000 0 0x0c>; 110 reg = <0 0xe6020000 0 0x0c>;
111 clocks = <&cpg CPG_MOD 402>; 111 clocks = <&cpg CPG_MOD 402>;
112 power-domains = <&sysc 32>; 112 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
113 resets = <&cpg 402>; 113 resets = <&cpg 402>;
114 status = "disabled"; 114 status = "disabled";
115 }; 115 };
@@ -190,7 +190,7 @@
190 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH 190 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
191 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 191 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
192 clocks = <&cpg CPG_MOD 407>; 192 clocks = <&cpg CPG_MOD 407>;
193 power-domains = <&sysc 32>; 193 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
194 resets = <&cpg 407>; 194 resets = <&cpg 407>;
195 }; 195 };
196 196
@@ -217,7 +217,7 @@
217 "ch4", "ch5", "ch6", "ch7"; 217 "ch4", "ch5", "ch6", "ch7";
218 clocks = <&cpg CPG_MOD 218>; 218 clocks = <&cpg CPG_MOD 218>;
219 clock-names = "fck"; 219 clock-names = "fck";
220 power-domains = <&sysc 32>; 220 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
221 resets = <&cpg 218>; 221 resets = <&cpg 218>;
222 #dma-cells = <1>; 222 #dma-cells = <1>;
223 dma-channels = <8>; 223 dma-channels = <8>;
@@ -245,7 +245,7 @@
245 "ch4", "ch5", "ch6", "ch7"; 245 "ch4", "ch5", "ch6", "ch7";
246 clocks = <&cpg CPG_MOD 217>; 246 clocks = <&cpg CPG_MOD 217>;
247 clock-names = "fck"; 247 clock-names = "fck";
248 power-domains = <&sysc 32>; 248 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
249 resets = <&cpg 217>; 249 resets = <&cpg 217>;
250 #dma-cells = <1>; 250 #dma-cells = <1>;
251 dma-channels = <8>; 251 dma-channels = <8>;
@@ -268,7 +268,7 @@
268 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 268 dmas = <&dmac1 0x31>, <&dmac1 0x30>,
269 <&dmac2 0x31>, <&dmac2 0x30>; 269 <&dmac2 0x31>, <&dmac2 0x30>;
270 dma-names = "tx", "rx", "tx", "rx"; 270 dma-names = "tx", "rx", "tx", "rx";
271 power-domains = <&sysc 32>; 271 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
272 resets = <&cpg 520>; 272 resets = <&cpg 520>;
273 status = "disabled"; 273 status = "disabled";
274 }; 274 };
@@ -286,7 +286,7 @@
286 dmas = <&dmac1 0x33>, <&dmac1 0x32>, 286 dmas = <&dmac1 0x33>, <&dmac1 0x32>,
287 <&dmac2 0x33>, <&dmac2 0x32>; 287 <&dmac2 0x33>, <&dmac2 0x32>;
288 dma-names = "tx", "rx", "tx", "rx"; 288 dma-names = "tx", "rx", "tx", "rx";
289 power-domains = <&sysc 32>; 289 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
290 resets = <&cpg 519>; 290 resets = <&cpg 519>;
291 status = "disabled"; 291 status = "disabled";
292 }; 292 };
@@ -304,7 +304,7 @@
304 dmas = <&dmac1 0x35>, <&dmac1 0x34>, 304 dmas = <&dmac1 0x35>, <&dmac1 0x34>,
305 <&dmac2 0x35>, <&dmac2 0x34>; 305 <&dmac2 0x35>, <&dmac2 0x34>;
306 dma-names = "tx", "rx", "tx", "rx"; 306 dma-names = "tx", "rx", "tx", "rx";
307 power-domains = <&sysc 32>; 307 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
308 resets = <&cpg 518>; 308 resets = <&cpg 518>;
309 status = "disabled"; 309 status = "disabled";
310 }; 310 };
@@ -321,7 +321,7 @@
321 dmas = <&dmac1 0x37>, <&dmac1 0x36>, 321 dmas = <&dmac1 0x37>, <&dmac1 0x36>,
322 <&dmac2 0x37>, <&dmac2 0x36>; 322 <&dmac2 0x37>, <&dmac2 0x36>;
323 dma-names = "tx", "rx", "tx", "rx"; 323 dma-names = "tx", "rx", "tx", "rx";
324 power-domains = <&sysc 32>; 324 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
325 resets = <&cpg 517>; 325 resets = <&cpg 517>;
326 status = "disabled"; 326 status = "disabled";
327 }; 327 };
@@ -339,7 +339,7 @@
339 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 339 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
340 <&dmac2 0x51>, <&dmac2 0x50>; 340 <&dmac2 0x51>, <&dmac2 0x50>;
341 dma-names = "tx", "rx", "tx", "rx"; 341 dma-names = "tx", "rx", "tx", "rx";
342 power-domains = <&sysc 32>; 342 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
343 resets = <&cpg 207>; 343 resets = <&cpg 207>;
344 status = "disabled"; 344 status = "disabled";
345 }; 345 };
@@ -357,7 +357,7 @@
357 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 357 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
358 <&dmac2 0x53>, <&dmac2 0x52>; 358 <&dmac2 0x53>, <&dmac2 0x52>;
359 dma-names = "tx", "rx", "tx", "rx"; 359 dma-names = "tx", "rx", "tx", "rx";
360 power-domains = <&sysc 32>; 360 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
361 resets = <&cpg 206>; 361 resets = <&cpg 206>;
362 status = "disabled"; 362 status = "disabled";
363 }; 363 };
@@ -375,7 +375,7 @@
375 dmas = <&dmac1 0x57>, <&dmac1 0x56>, 375 dmas = <&dmac1 0x57>, <&dmac1 0x56>,
376 <&dmac2 0x57>, <&dmac2 0x56>; 376 <&dmac2 0x57>, <&dmac2 0x56>;
377 dma-names = "tx", "rx", "tx", "rx"; 377 dma-names = "tx", "rx", "tx", "rx";
378 power-domains = <&sysc 32>; 378 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
379 resets = <&cpg 204>; 379 resets = <&cpg 204>;
380 status = "disabled"; 380 status = "disabled";
381 }; 381 };
@@ -392,7 +392,7 @@
392 dmas = <&dmac1 0x59>, <&dmac1 0x58>, 392 dmas = <&dmac1 0x59>, <&dmac1 0x58>,
393 <&dmac2 0x59>, <&dmac2 0x58>; 393 <&dmac2 0x59>, <&dmac2 0x58>;
394 dma-names = "tx", "rx", "tx", "rx"; 394 dma-names = "tx", "rx", "tx", "rx";
395 power-domains = <&sysc 32>; 395 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
396 resets = <&cpg 203>; 396 resets = <&cpg 203>;
397 status = "disabled"; 397 status = "disabled";
398 }; 398 };
@@ -434,7 +434,7 @@
434 "ch20", "ch21", "ch22", "ch23", 434 "ch20", "ch21", "ch22", "ch23",
435 "ch24"; 435 "ch24";
436 clocks = <&cpg CPG_MOD 812>; 436 clocks = <&cpg CPG_MOD 812>;
437 power-domains = <&sysc 32>; 437 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
438 resets = <&cpg 812>; 438 resets = <&cpg 812>;
439 phy-mode = "rgmii-id"; 439 phy-mode = "rgmii-id";
440 iommus = <&ipmmu_rt 3>; 440 iommus = <&ipmmu_rt 3>;