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authorSergei Shtylyov <sergei.shtylyov@cogentembedded.com>2016-02-17 15:45:10 -0500
committerSimon Horman <horms+renesas@verge.net.au>2016-02-19 00:54:11 -0500
commit89aac8af1a607355710c7c954efec85a9302bc95 (patch)
tree81eef7b05fe38a659bb494391da15a76d73843e5
parent255a40424e2618610a2ad8d39e12b843b723959a (diff)
ARM: dts: r8a7794: add EtherAVB support
Define the generic R8A7794 part of the EtherAVB device node. Based on the commit 46ece349aa54 ("ARM: shmobile: r8a7791: add EtherAVB DT support"). Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-rw-r--r--arch/arm/boot/dts/r8a7794.dtsi12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
index 042440b6dc8c..eacb2b291361 100644
--- a/arch/arm/boot/dts/r8a7794.dtsi
+++ b/arch/arm/boot/dts/r8a7794.dtsi
@@ -544,6 +544,18 @@
544 status = "disabled"; 544 status = "disabled";
545 }; 545 };
546 546
547 avb: ethernet@e6800000 {
548 compatible = "renesas,etheravb-r8a7794",
549 "renesas,etheravb-rcar-gen2";
550 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
551 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
552 clocks = <&mstp8_clks R8A7794_CLK_ETHERAVB>;
553 power-domains = <&cpg_clocks>;
554 #address-cells = <1>;
555 #size-cells = <0>;
556 status = "disabled";
557 };
558
547 /* The memory map in the User's Manual maps the cores to bus numbers */ 559 /* The memory map in the User's Manual maps the cores to bus numbers */
548 i2c0: i2c@e6508000 { 560 i2c0: i2c@e6508000 {
549 compatible = "renesas,i2c-r8a7794"; 561 compatible = "renesas,i2c-r8a7794";