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authorTakashi Iwai <tiwai@suse.de>2018-01-12 08:02:15 -0500
committerTakashi Iwai <tiwai@suse.de>2018-01-12 08:02:15 -0500
commit8999bd3c6323a3f3815b5c45628023f3a994b7a8 (patch)
tree6d4c4ef9de11d333d0ed0b3e0e1ea3b04e956c29
parent8ac60e733f7c9c41e4c125619a2f8390aca9d4db (diff)
parent4ac71d1b68365915bcde14d0ff8fda186ad377ac (diff)
Merge tag 'asoc-v4.16-2' of https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-next
ASoC: Updates for v4.16 Some more updates for v4.16, the big things here are the ST DFSDM driver and the IIO patches required to support that and even more in the neverending series of code quality improvements for x86, including Pierre's work to improve the Kconfig. The unused SN95031 driver and associated board support are also removed, they haven't been buildable for a considerable time without anyone noticing.
-rw-r--r--.mailmap1
-rw-r--r--Documentation/ABI/testing/sysfs-bus-iio-dfsdm-adc-stm3216
-rw-r--r--Documentation/devicetree/bindings/iio/adc/sigma-delta-modulator.txt13
-rw-r--r--Documentation/devicetree/bindings/iio/adc/st,stm32-dfsdm-adc.txt128
-rw-r--r--Documentation/devicetree/bindings/sound/dmic.txt2
-rw-r--r--Documentation/devicetree/bindings/sound/st,stm32-adfsdm.txt63
-rw-r--r--Documentation/driver-api/iio/hw-consumer.rst51
-rw-r--r--Documentation/driver-api/iio/index.rst1
-rw-r--r--Documentation/gpu/i915.rst5
-rw-r--r--Documentation/x86/x86_64/mm.txt18
-rw-r--r--MAINTAINERS7
-rw-r--r--Makefile2
-rw-r--r--arch/arc/boot/dts/axc003.dtsi8
-rw-r--r--arch/arc/boot/dts/axc003_idu.dtsi8
-rw-r--r--arch/arc/boot/dts/hsdk.dts8
-rw-r--r--arch/arc/configs/hsdk_defconfig5
-rw-r--r--arch/arc/include/asm/uaccess.h5
-rw-r--r--arch/arc/kernel/setup.c2
-rw-r--r--arch/arc/kernel/stacktrace.c2
-rw-r--r--arch/arc/kernel/traps.c14
-rw-r--r--arch/arc/kernel/troubleshoot.c3
-rw-r--r--arch/arc/plat-axs10x/axs10x.c18
-rw-r--r--arch/arc/plat-hsdk/platform.c42
-rw-r--r--arch/arm/boot/dts/aspeed-g4.dtsi2
-rw-r--r--arch/arm/boot/dts/at91-tse850-3.dts1
-rw-r--r--arch/arm/boot/dts/da850-lego-ev3.dts4
-rw-r--r--arch/arm/boot/dts/exynos5800-peach-pi.dts4
-rw-r--r--arch/arm/boot/dts/ls1021a-qds.dts2
-rw-r--r--arch/arm/boot/dts/ls1021a-twr.dts2
-rw-r--r--arch/arm/boot/dts/rk3066a-marsboard.dts4
-rw-r--r--arch/arm/boot/dts/rk3288.dtsi2
-rw-r--r--arch/arm/boot/dts/sun4i-a10.dtsi4
-rw-r--r--arch/arm/boot/dts/sun5i-a10s.dtsi4
-rw-r--r--arch/arm/boot/dts/sun6i-a31.dtsi4
-rw-r--r--arch/arm/boot/dts/sun7i-a20.dtsi4
-rw-r--r--arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts1
-rw-r--r--arch/arm/boot/dts/tango4-common.dtsi1
-rw-r--r--arch/arm/kernel/traps.c1
-rw-r--r--arch/arm/mach-davinci/dm365.c29
-rw-r--r--arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts1
-rw-r--r--arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts1
-rw-r--r--arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts3
-rw-r--r--arch/arm64/boot/dts/allwinner/sun50i-a64-sopine.dtsi11
-rw-r--r--arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts2
-rw-r--r--arch/arm64/boot/dts/renesas/salvator-common.dtsi1
-rw-r--r--arch/arm64/boot/dts/renesas/ulcb.dtsi1
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3328-rock64.dts2
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3328.dtsi2
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi11
-rw-r--r--arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi4
-rw-r--r--arch/m32r/kernel/traps.c1
-rw-r--r--arch/parisc/include/asm/ldcw.h2
-rw-r--r--arch/parisc/kernel/drivers.c2
-rw-r--r--arch/parisc/kernel/entry.S13
-rw-r--r--arch/parisc/kernel/pacache.S9
-rw-r--r--arch/parisc/kernel/process.c39
-rw-r--r--arch/parisc/mm/init.c10
-rw-r--r--arch/powerpc/mm/fault.c7
-rw-r--r--arch/s390/kvm/kvm-s390.c9
-rw-r--r--arch/s390/kvm/priv.c2
-rw-r--r--arch/s390/lib/uaccess.c2
-rw-r--r--arch/s390/pci/pci_dma.c21
-rw-r--r--arch/s390/pci/pci_insn.c3
-rw-r--r--arch/unicore32/kernel/traps.c1
-rw-r--r--arch/x86/entry/entry_64_compat.S13
-rw-r--r--arch/x86/events/intel/ds.c16
-rw-r--r--arch/x86/include/asm/alternative.h4
-rw-r--r--arch/x86/include/asm/cpufeatures.h2
-rw-r--r--arch/x86/include/asm/pgtable_64_types.h14
-rw-r--r--arch/x86/include/asm/unwind.h17
-rw-r--r--arch/x86/kernel/cpu/common.c4
-rw-r--r--arch/x86/kernel/dumpstack.c31
-rw-r--r--arch/x86/kernel/process.c2
-rw-r--r--arch/x86/kernel/setup.c5
-rw-r--r--arch/x86/kernel/stacktrace.c2
-rw-r--r--arch/x86/kvm/svm.c19
-rw-r--r--arch/x86/kvm/vmx.c14
-rw-r--r--arch/x86/mm/dump_pagetables.c2
-rw-r--r--arch/x86/mm/init.c2
-rw-r--r--arch/x86/mm/kaslr.c32
-rw-r--r--arch/x86/mm/pti.c9
-rw-r--r--arch/x86/platform/efi/quirks.c13
-rw-r--r--crypto/af_alg.c4
-rw-r--r--crypto/algif_aead.c2
-rw-r--r--crypto/algif_skcipher.c2
-rw-r--r--crypto/chacha20poly1305.c6
-rw-r--r--crypto/pcrypt.c19
-rw-r--r--drivers/bus/sunxi-rsb.c1
-rw-r--r--drivers/crypto/chelsio/Kconfig1
-rw-r--r--drivers/crypto/inside-secure/safexcel.c1
-rw-r--r--drivers/crypto/inside-secure/safexcel_cipher.c85
-rw-r--r--drivers/crypto/inside-secure/safexcel_hash.c89
-rw-r--r--drivers/crypto/n2_core.c3
-rw-r--r--drivers/firmware/efi/capsule-loader.c45
-rw-r--r--drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h2
-rw-r--r--drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c6
-rw-r--r--drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c2
-rw-r--r--drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h2
-rw-r--r--drivers/gpu/drm/armada/armada_crtc.c47
-rw-r--r--drivers/gpu/drm/armada/armada_crtc.h2
-rw-r--r--drivers/gpu/drm/armada/armada_overlay.c38
-rw-r--r--drivers/gpu/drm/i915/i915_drv.h3
-rw-r--r--drivers/gpu/drm/i915/i915_reg.h2
-rw-r--r--drivers/gpu/drm/i915/intel_cdclk.c35
-rw-r--r--drivers/gpu/drm/i915/intel_display.c14
-rw-r--r--drivers/gpu/drm/i915/intel_psr.c16
-rw-r--r--drivers/gpu/drm/i915/intel_runtime_pm.c11
-rw-r--r--drivers/gpu/drm/omapdrm/dss/hdmi4_cec.c46
-rw-r--r--drivers/gpu/drm/ttm/ttm_page_alloc.c2
-rw-r--r--drivers/iio/adc/Kconfig37
-rw-r--r--drivers/iio/adc/Makefile3
-rw-r--r--drivers/iio/adc/sd_adc_modulator.c68
-rw-r--r--drivers/iio/adc/stm32-dfsdm-adc.c1216
-rw-r--r--drivers/iio/adc/stm32-dfsdm-core.c308
-rw-r--r--drivers/iio/adc/stm32-dfsdm.h310
-rw-r--r--drivers/iio/buffer/Kconfig10
-rw-r--r--drivers/iio/buffer/Makefile1
-rw-r--r--drivers/iio/buffer/industrialio-buffer-cb.c11
-rw-r--r--drivers/iio/buffer/industrialio-hw-consumer.c247
-rw-r--r--drivers/iio/inkern.c17
-rw-r--r--drivers/input/joystick/analog.c2
-rw-r--r--drivers/input/misc/ims-pcu.c2
-rw-r--r--drivers/input/misc/xen-kbdfront.c2
-rw-r--r--drivers/input/mouse/elantech.c2
-rw-r--r--drivers/input/touchscreen/elants_i2c.c10
-rw-r--r--drivers/input/touchscreen/hideep.c3
-rw-r--r--drivers/iommu/arm-smmu-v3.c17
-rw-r--r--drivers/leds/led-core.c3
-rw-r--r--drivers/mfd/rtsx_pcr.c3
-rw-r--r--drivers/mtd/nand/pxa3xx_nand.c1
-rw-r--r--drivers/parisc/dino.c10
-rw-r--r--drivers/parisc/eisa_eeprom.c2
-rw-r--r--drivers/s390/block/dasd_3990_erp.c10
-rw-r--r--drivers/s390/char/Makefile2
-rw-r--r--drivers/xen/pvcalls-front.c2
-rw-r--r--fs/afs/dir.c37
-rw-r--r--fs/afs/inode.c4
-rw-r--r--fs/afs/rxrpc.c2
-rw-r--r--fs/afs/write.c8
-rw-r--r--fs/btrfs/delayed-inode.c45
-rw-r--r--fs/btrfs/volumes.c1
-rw-r--r--fs/exec.c9
-rw-r--r--fs/super.c6
-rw-r--r--fs/userfaultfd.c20
-rw-r--r--fs/xfs/xfs_aops.c4
-rw-r--r--fs/xfs/xfs_iomap.c2
-rw-r--r--fs/xfs/xfs_qm.c46
-rw-r--r--include/crypto/if_alg.h5
-rw-r--r--include/linux/bpf.h10
-rw-r--r--include/linux/efi.h4
-rw-r--r--include/linux/fscache.h2
-rw-r--r--include/linux/iio/adc/stm32-dfsdm-adc.h18
-rw-r--r--include/linux/iio/consumer.h37
-rw-r--r--include/linux/iio/hw-consumer.h21
-rw-r--r--include/linux/iio/iio.h28
-rw-r--r--include/linux/iio/types.h28
-rw-r--r--include/sound/soc-acpi-intel-match.h1
-rw-r--r--include/sound/soc-acpi.h4
-rw-r--r--kernel/acct.c2
-rw-r--r--kernel/bpf/inode.c40
-rw-r--r--kernel/bpf/syscall.c2
-rw-r--r--kernel/exit.c1
-rw-r--r--kernel/pid.c8
-rw-r--r--lib/mpi/longlong.h18
-rw-r--r--mm/debug.c28
-rw-r--r--mm/mprotect.c6
-rw-r--r--mm/page_alloc.c2
-rw-r--r--mm/sparse.c2
-rw-r--r--mm/vmscan.c3
-rw-r--r--mm/zsmalloc.c1
-rw-r--r--net/netfilter/xt_bpf.c14
-rw-r--r--security/Kconfig1
-rw-r--r--security/apparmor/mount.c12
-rw-r--r--security/commoncap.c21
-rw-r--r--sound/soc/codecs/Kconfig4
-rw-r--r--sound/soc/codecs/Makefile1
-rw-r--r--sound/soc/codecs/dmic.c24
-rw-r--r--sound/soc/codecs/max98373.c41
-rw-r--r--sound/soc/codecs/rt5645.c15
-rw-r--r--sound/soc/codecs/sn95031.c936
-rw-r--r--sound/soc/codecs/sn95031.h133
-rw-r--r--sound/soc/codecs/tscs42xx.c50
-rw-r--r--sound/soc/fsl/fsl_dma.c4
-rw-r--r--sound/soc/intel/Kconfig116
-rw-r--r--sound/soc/intel/Makefile2
-rw-r--r--sound/soc/intel/atom/sst/sst_stream.c8
-rw-r--r--sound/soc/intel/boards/Kconfig194
-rw-r--r--sound/soc/intel/boards/bytcr_rt5651.c34
-rw-r--r--sound/soc/intel/boards/mfld_machine.c430
-rw-r--r--sound/soc/mediatek/mt2701/mt2701-afe-pcm.c4
-rw-r--r--sound/soc/mediatek/mt8173/mt8173-rt5650-rt5514.c2
-rw-r--r--sound/soc/mediatek/mt8173/mt8173-rt5650-rt5676.c2
-rw-r--r--sound/soc/mediatek/mt8173/mt8173-rt5650.c2
-rw-r--r--sound/soc/rockchip/rockchip_i2s.c11
-rw-r--r--sound/soc/soc-acpi.c40
-rw-r--r--sound/soc/stm/Kconfig12
-rw-r--r--sound/soc/stm/Makefile3
-rw-r--r--sound/soc/stm/stm32_adfsdm.c347
-rw-r--r--sound/soc/ux500/mop500.c4
-rw-r--r--sound/soc/ux500/ux500_pcm.c5
200 files changed, 4285 insertions, 2279 deletions
diff --git a/.mailmap b/.mailmap
index 1469ff0d3f4d..e18cab73e209 100644
--- a/.mailmap
+++ b/.mailmap
@@ -107,6 +107,7 @@ Linus Lüssing <linus.luessing@c0d3.blue> <linus.luessing@ascom.ch>
107Maciej W. Rozycki <macro@mips.com> <macro@imgtec.com> 107Maciej W. Rozycki <macro@mips.com> <macro@imgtec.com>
108Marcin Nowakowski <marcin.nowakowski@mips.com> <marcin.nowakowski@imgtec.com> 108Marcin Nowakowski <marcin.nowakowski@mips.com> <marcin.nowakowski@imgtec.com>
109Mark Brown <broonie@sirena.org.uk> 109Mark Brown <broonie@sirena.org.uk>
110Mark Yao <markyao0591@gmail.com> <mark.yao@rock-chips.com>
110Martin Kepplinger <martink@posteo.de> <martin.kepplinger@theobroma-systems.com> 111Martin Kepplinger <martink@posteo.de> <martin.kepplinger@theobroma-systems.com>
111Martin Kepplinger <martink@posteo.de> <martin.kepplinger@ginzinger.com> 112Martin Kepplinger <martink@posteo.de> <martin.kepplinger@ginzinger.com>
112Matthieu CASTET <castet.matthieu@free.fr> 113Matthieu CASTET <castet.matthieu@free.fr>
diff --git a/Documentation/ABI/testing/sysfs-bus-iio-dfsdm-adc-stm32 b/Documentation/ABI/testing/sysfs-bus-iio-dfsdm-adc-stm32
new file mode 100644
index 000000000000..da9822309f07
--- /dev/null
+++ b/Documentation/ABI/testing/sysfs-bus-iio-dfsdm-adc-stm32
@@ -0,0 +1,16 @@
1What: /sys/bus/iio/devices/iio:deviceX/in_voltage_spi_clk_freq
2KernelVersion: 4.14
3Contact: arnaud.pouliquen@st.com
4Description:
5 For audio purpose only.
6 Used by audio driver to set/get the spi input frequency.
7 This is mandatory if DFSDM is slave on SPI bus, to
8 provide information on the SPI clock frequency during runtime
9 Notice that the SPI frequency should be a multiple of sample
10 frequency to ensure the precision.
11 if DFSDM input is SPI master
12 Reading SPI clkout frequency,
13 error on writing
14 If DFSDM input is SPI Slave:
15 Reading returns value previously set.
16 Writing value before starting conversions. \ No newline at end of file
diff --git a/Documentation/devicetree/bindings/iio/adc/sigma-delta-modulator.txt b/Documentation/devicetree/bindings/iio/adc/sigma-delta-modulator.txt
new file mode 100644
index 000000000000..e9ebb8a20e0d
--- /dev/null
+++ b/Documentation/devicetree/bindings/iio/adc/sigma-delta-modulator.txt
@@ -0,0 +1,13 @@
1Device-Tree bindings for sigma delta modulator
2
3Required properties:
4- compatible: should be "ads1201", "sd-modulator". "sd-modulator" can be use
5 as a generic SD modulator if modulator not specified in compatible list.
6- #io-channel-cells = <1>: See the IIO bindings section "IIO consumers".
7
8Example node:
9
10 ads1202: adc@0 {
11 compatible = "sd-modulator";
12 #io-channel-cells = <1>;
13 };
diff --git a/Documentation/devicetree/bindings/iio/adc/st,stm32-dfsdm-adc.txt b/Documentation/devicetree/bindings/iio/adc/st,stm32-dfsdm-adc.txt
new file mode 100644
index 000000000000..911492da48f3
--- /dev/null
+++ b/Documentation/devicetree/bindings/iio/adc/st,stm32-dfsdm-adc.txt
@@ -0,0 +1,128 @@
1STMicroelectronics STM32 DFSDM ADC device driver
2
3
4STM32 DFSDM ADC is a sigma delta analog-to-digital converter dedicated to
5interface external sigma delta modulators to STM32 micro controllers.
6It is mainly targeted for:
7- Sigma delta modulators (motor control, metering...)
8- PDM microphones (audio digital microphone)
9
10It features up to 8 serial digital interfaces (SPI or Manchester) and
11up to 4 filters on stm32h7.
12
13Each child node match with a filter instance.
14
15Contents of a STM32 DFSDM root node:
16------------------------------------
17Required properties:
18- compatible: Should be "st,stm32h7-dfsdm".
19- reg: Offset and length of the DFSDM block register set.
20- clocks: IP and serial interfaces clocking. Should be set according
21 to rcc clock ID and "clock-names".
22- clock-names: Input clock name "dfsdm" must be defined,
23 "audio" is optional. If defined CLKOUT is based on the audio
24 clock, else "dfsdm" is used.
25- #interrupt-cells = <1>;
26- #address-cells = <1>;
27- #size-cells = <0>;
28
29Optional properties:
30- spi-max-frequency: Requested only for SPI master mode.
31 SPI clock OUT frequency (Hz). This clock must be set according
32 to "clock" property. Frequency must be a multiple of the rcc
33 clock frequency. If not, SPI CLKOUT frequency will not be
34 accurate.
35
36Contents of a STM32 DFSDM child nodes:
37--------------------------------------
38
39Required properties:
40- compatible: Must be:
41 "st,stm32-dfsdm-adc" for sigma delta ADCs
42 "st,stm32-dfsdm-dmic" for audio digital microphone.
43- reg: Specifies the DFSDM filter instance used.
44- interrupts: IRQ lines connected to each DFSDM filter instance.
45- st,adc-channels: List of single-ended channels muxed for this ADC.
46 valid values:
47 "st,stm32h7-dfsdm" compatibility: 0 to 7.
48- st,adc-channel-names: List of single-ended channel names.
49- st,filter-order: SinC filter order from 0 to 5.
50 0: FastSinC
51 [1-5]: order 1 to 5.
52 For audio purpose it is recommended to use order 3 to 5.
53- #io-channel-cells = <1>: See the IIO bindings section "IIO consumers".
54
55Required properties for "st,stm32-dfsdm-adc" compatibility:
56- io-channels: From common IIO binding. Used to pipe external sigma delta
57 modulator or internal ADC output to DFSDM channel.
58 This is not required for "st,stm32-dfsdm-pdm" compatibility as
59 PDM microphone is binded in Audio DT node.
60
61Required properties for "st,stm32-dfsdm-pdm" compatibility:
62- #sound-dai-cells: Must be set to 0.
63- dma: DMA controller phandle and DMA request line associated to the
64 filter instance (specified by the field "reg")
65- dma-names: Must be "rx"
66
67Optional properties:
68- st,adc-channel-types: Single-ended channel input type.
69 - "SPI_R": SPI with data on rising edge (default)
70 - "SPI_F": SPI with data on falling edge
71 - "MANCH_R": manchester codec, rising edge = logic 0
72 - "MANCH_F": manchester codec, falling edge = logic 1
73- st,adc-channel-clk-src: Conversion clock source.
74 - "CLKIN": external SPI clock (CLKIN x)
75 - "CLKOUT": internal SPI clock (CLKOUT) (default)
76 - "CLKOUT_F": internal SPI clock divided by 2 (falling edge).
77 - "CLKOUT_R": internal SPI clock divided by 2 (rising edge).
78
79- st,adc-alt-channel: Must be defined if two sigma delta modulator are
80 connected on same SPI input.
81 If not set, channel n is connected to SPI input n.
82 If set, channel n is connected to SPI input n + 1.
83
84- st,filter0-sync: Set to 1 to synchronize with DFSDM filter instance 0.
85 Used for multi microphones synchronization.
86
87Example of a sigma delta adc connected on DFSDM SPI port 0
88and a pdm microphone connected on DFSDM SPI port 1:
89
90 ads1202: simple_sd_adc@0 {
91 compatible = "ads1202";
92 #io-channel-cells = <1>;
93 };
94
95 dfsdm: dfsdm@40017000 {
96 compatible = "st,stm32h7-dfsdm";
97 reg = <0x40017000 0x400>;
98 clocks = <&rcc DFSDM1_CK>;
99 clock-names = "dfsdm";
100 #interrupt-cells = <1>;
101 #address-cells = <1>;
102 #size-cells = <0>;
103
104 dfsdm_adc0: filter@0 {
105 compatible = "st,stm32-dfsdm-adc";
106 #io-channel-cells = <1>;
107 reg = <0>;
108 interrupts = <110>;
109 st,adc-channels = <0>;
110 st,adc-channel-names = "sd_adc0";
111 st,adc-channel-types = "SPI_F";
112 st,adc-channel-clk-src = "CLKOUT";
113 io-channels = <&ads1202 0>;
114 st,filter-order = <3>;
115 };
116 dfsdm_pdm1: filter@1 {
117 compatible = "st,stm32-dfsdm-dmic";
118 reg = <1>;
119 interrupts = <111>;
120 dmas = <&dmamux1 102 0x400 0x00>;
121 dma-names = "rx";
122 st,adc-channels = <1>;
123 st,adc-channel-names = "dmic1";
124 st,adc-channel-types = "SPI_R";
125 st,adc-channel-clk-src = "CLKOUT";
126 st,filter-order = <5>;
127 };
128 }
diff --git a/Documentation/devicetree/bindings/sound/dmic.txt b/Documentation/devicetree/bindings/sound/dmic.txt
index 54c8ef6498a8..f7bf65611453 100644
--- a/Documentation/devicetree/bindings/sound/dmic.txt
+++ b/Documentation/devicetree/bindings/sound/dmic.txt
@@ -7,10 +7,12 @@ Required properties:
7 7
8Optional properties: 8Optional properties:
9 - dmicen-gpios: GPIO specifier for dmic to control start and stop 9 - dmicen-gpios: GPIO specifier for dmic to control start and stop
10 - num-channels: Number of microphones on this DAI
10 11
11Example node: 12Example node:
12 13
13 dmic_codec: dmic@0 { 14 dmic_codec: dmic@0 {
14 compatible = "dmic-codec"; 15 compatible = "dmic-codec";
15 dmicen-gpios = <&gpio4 3 GPIO_ACTIVE_HIGH>; 16 dmicen-gpios = <&gpio4 3 GPIO_ACTIVE_HIGH>;
17 num-channels = <1>;
16 }; 18 };
diff --git a/Documentation/devicetree/bindings/sound/st,stm32-adfsdm.txt b/Documentation/devicetree/bindings/sound/st,stm32-adfsdm.txt
new file mode 100644
index 000000000000..864f5b00b031
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/st,stm32-adfsdm.txt
@@ -0,0 +1,63 @@
1STMicroelectronics Audio Digital Filter Sigma Delta modulators(DFSDM)
2
3The DFSDM allows PDM microphones capture through SPI interface. The Audio
4interface is seems as a sub block of the DFSDM device.
5For details on DFSDM bindings refer to ../iio/adc/st,stm32-dfsdm-adc.txt
6
7Required properties:
8 - compatible: "st,stm32h7-dfsdm-dai".
9
10 - #sound-dai-cells : Must be equal to 0
11
12 - io-channels : phandle to iio dfsdm instance node.
13
14Example of a sound card using audio DFSDM node.
15
16 sound_card {
17 compatible = "audio-graph-card";
18
19 dais = <&cpu_port>;
20 };
21
22 dfsdm: dfsdm@40017000 {
23 compatible = "st,stm32h7-dfsdm";
24 reg = <0x40017000 0x400>;
25 clocks = <&rcc DFSDM1_CK>;
26 clock-names = "dfsdm";
27 #interrupt-cells = <1>;
28 #address-cells = <1>;
29 #size-cells = <0>;
30
31 dfsdm_adc0: filter@0 {
32 compatible = "st,stm32-dfsdm-dmic";
33 reg = <0>;
34 interrupts = <110>;
35 dmas = <&dmamux1 101 0x400 0x00>;
36 dma-names = "rx";
37 st,adc-channels = <1>;
38 st,adc-channel-names = "dmic0";
39 st,adc-channel-types = "SPI_R";
40 st,adc-channel-clk-src = "CLKOUT";
41 st,filter-order = <5>;
42
43 dfsdm_dai0: dfsdm-dai {
44 compatible = "st,stm32h7-dfsdm-dai";
45 #sound-dai-cells = <0>;
46 io-channels = <&dfsdm_adc0 0>;
47 cpu_port: port {
48 dfsdm_endpoint: endpoint {
49 remote-endpoint = <&dmic0_endpoint>;
50 };
51 };
52 };
53 };
54
55 dmic0: dmic@0 {
56 compatible = "dmic-codec";
57 #sound-dai-cells = <0>;
58 port {
59 dmic0_endpoint: endpoint {
60 remote-endpoint = <&dfsdm_endpoint>;
61 };
62 };
63 };
diff --git a/Documentation/driver-api/iio/hw-consumer.rst b/Documentation/driver-api/iio/hw-consumer.rst
new file mode 100644
index 000000000000..8facce6a6733
--- /dev/null
+++ b/Documentation/driver-api/iio/hw-consumer.rst
@@ -0,0 +1,51 @@
1===========
2HW consumer
3===========
4An IIO device can be directly connected to another device in hardware. in this
5case the buffers between IIO provider and IIO consumer are handled by hardware.
6The Industrial I/O HW consumer offers a way to bond these IIO devices without
7software buffer for data. The implementation can be found under
8:file:`drivers/iio/buffer/hw-consumer.c`
9
10
11* struct :c:type:`iio_hw_consumer` — Hardware consumer structure
12* :c:func:`iio_hw_consumer_alloc` — Allocate IIO hardware consumer
13* :c:func:`iio_hw_consumer_free` — Free IIO hardware consumer
14* :c:func:`iio_hw_consumer_enable` — Enable IIO hardware consumer
15* :c:func:`iio_hw_consumer_disable` — Disable IIO hardware consumer
16
17
18HW consumer setup
19=================
20
21As standard IIO device the implementation is based on IIO provider/consumer.
22A typical IIO HW consumer setup looks like this::
23
24 static struct iio_hw_consumer *hwc;
25
26 static const struct iio_info adc_info = {
27 .read_raw = adc_read_raw,
28 };
29
30 static int adc_read_raw(struct iio_dev *indio_dev,
31 struct iio_chan_spec const *chan, int *val,
32 int *val2, long mask)
33 {
34 ret = iio_hw_consumer_enable(hwc);
35
36 /* Acquire data */
37
38 ret = iio_hw_consumer_disable(hwc);
39 }
40
41 static int adc_probe(struct platform_device *pdev)
42 {
43 hwc = devm_iio_hw_consumer_alloc(&iio->dev);
44 }
45
46More details
47============
48.. kernel-doc:: include/linux/iio/hw-consumer.h
49.. kernel-doc:: drivers/iio/buffer/industrialio-hw-consumer.c
50 :export:
51
diff --git a/Documentation/driver-api/iio/index.rst b/Documentation/driver-api/iio/index.rst
index e5c3922d1b6f..7fba341bd8b2 100644
--- a/Documentation/driver-api/iio/index.rst
+++ b/Documentation/driver-api/iio/index.rst
@@ -15,3 +15,4 @@ Contents:
15 buffers 15 buffers
16 triggers 16 triggers
17 triggered-buffers 17 triggered-buffers
18 hw-consumer
diff --git a/Documentation/gpu/i915.rst b/Documentation/gpu/i915.rst
index 2e7ee0313c1c..e94d3ac2bdd0 100644
--- a/Documentation/gpu/i915.rst
+++ b/Documentation/gpu/i915.rst
@@ -341,10 +341,7 @@ GuC
341GuC-specific firmware loader 341GuC-specific firmware loader
342---------------------------- 342----------------------------
343 343
344.. kernel-doc:: drivers/gpu/drm/i915/intel_guc_loader.c 344.. kernel-doc:: drivers/gpu/drm/i915/intel_guc_fw.c
345 :doc: GuC-specific firmware loader
346
347.. kernel-doc:: drivers/gpu/drm/i915/intel_guc_loader.c
348 :internal: 345 :internal:
349 346
350GuC-based command submission 347GuC-based command submission
diff --git a/Documentation/x86/x86_64/mm.txt b/Documentation/x86/x86_64/mm.txt
index ad41b3813f0a..ea91cb61a602 100644
--- a/Documentation/x86/x86_64/mm.txt
+++ b/Documentation/x86/x86_64/mm.txt
@@ -12,8 +12,9 @@ ffffea0000000000 - ffffeaffffffffff (=40 bits) virtual memory map (1TB)
12... unused hole ... 12... unused hole ...
13ffffec0000000000 - fffffbffffffffff (=44 bits) kasan shadow memory (16TB) 13ffffec0000000000 - fffffbffffffffff (=44 bits) kasan shadow memory (16TB)
14... unused hole ... 14... unused hole ...
15fffffe0000000000 - fffffe7fffffffff (=39 bits) LDT remap for PTI 15 vaddr_end for KASLR
16fffffe8000000000 - fffffeffffffffff (=39 bits) cpu_entry_area mapping 16fffffe0000000000 - fffffe7fffffffff (=39 bits) cpu_entry_area mapping
17fffffe8000000000 - fffffeffffffffff (=39 bits) LDT remap for PTI
17ffffff0000000000 - ffffff7fffffffff (=39 bits) %esp fixup stacks 18ffffff0000000000 - ffffff7fffffffff (=39 bits) %esp fixup stacks
18... unused hole ... 19... unused hole ...
19ffffffef00000000 - fffffffeffffffff (=64 GB) EFI region mapping space 20ffffffef00000000 - fffffffeffffffff (=64 GB) EFI region mapping space
@@ -37,13 +38,15 @@ ffd4000000000000 - ffd5ffffffffffff (=49 bits) virtual memory map (512TB)
37... unused hole ... 38... unused hole ...
38ffdf000000000000 - fffffc0000000000 (=53 bits) kasan shadow memory (8PB) 39ffdf000000000000 - fffffc0000000000 (=53 bits) kasan shadow memory (8PB)
39... unused hole ... 40... unused hole ...
40fffffe8000000000 - fffffeffffffffff (=39 bits) cpu_entry_area mapping 41 vaddr_end for KASLR
42fffffe0000000000 - fffffe7fffffffff (=39 bits) cpu_entry_area mapping
43... unused hole ...
41ffffff0000000000 - ffffff7fffffffff (=39 bits) %esp fixup stacks 44ffffff0000000000 - ffffff7fffffffff (=39 bits) %esp fixup stacks
42... unused hole ... 45... unused hole ...
43ffffffef00000000 - fffffffeffffffff (=64 GB) EFI region mapping space 46ffffffef00000000 - fffffffeffffffff (=64 GB) EFI region mapping space
44... unused hole ... 47... unused hole ...
45ffffffff80000000 - ffffffff9fffffff (=512 MB) kernel text mapping, from phys 0 48ffffffff80000000 - ffffffff9fffffff (=512 MB) kernel text mapping, from phys 0
46ffffffffa0000000 - [fixmap start] (~1526 MB) module mapping space 49ffffffffa0000000 - fffffffffeffffff (1520 MB) module mapping space
47[fixmap start] - ffffffffff5fffff kernel-internal fixmap range 50[fixmap start] - ffffffffff5fffff kernel-internal fixmap range
48ffffffffff600000 - ffffffffff600fff (=4 kB) legacy vsyscall ABI 51ffffffffff600000 - ffffffffff600fff (=4 kB) legacy vsyscall ABI
49ffffffffffe00000 - ffffffffffffffff (=2 MB) unused hole 52ffffffffffe00000 - ffffffffffffffff (=2 MB) unused hole
@@ -67,9 +70,10 @@ memory window (this size is arbitrary, it can be raised later if needed).
67The mappings are not part of any other kernel PGD and are only available 70The mappings are not part of any other kernel PGD and are only available
68during EFI runtime calls. 71during EFI runtime calls.
69 72
70The module mapping space size changes based on the CONFIG requirements for the
71following fixmap section.
72
73Note that if CONFIG_RANDOMIZE_MEMORY is enabled, the direct mapping of all 73Note that if CONFIG_RANDOMIZE_MEMORY is enabled, the direct mapping of all
74physical memory, vmalloc/ioremap space and virtual memory map are randomized. 74physical memory, vmalloc/ioremap space and virtual memory map are randomized.
75Their order is preserved but their base will be offset early at boot time. 75Their order is preserved but their base will be offset early at boot time.
76
77Be very careful vs. KASLR when changing anything here. The KASLR address
78range must not overlap with anything except the KASAN shadow area, which is
79correct as KASAN disables KASLR.
diff --git a/MAINTAINERS b/MAINTAINERS
index 7e3178c48803..f4800a4c5065 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -5149,15 +5149,15 @@ F: sound/usb/misc/ua101.c
5149EFI TEST DRIVER 5149EFI TEST DRIVER
5150L: linux-efi@vger.kernel.org 5150L: linux-efi@vger.kernel.org
5151M: Ivan Hu <ivan.hu@canonical.com> 5151M: Ivan Hu <ivan.hu@canonical.com>
5152M: Matt Fleming <matt@codeblueprint.co.uk> 5152M: Ard Biesheuvel <ard.biesheuvel@linaro.org>
5153S: Maintained 5153S: Maintained
5154F: drivers/firmware/efi/test/ 5154F: drivers/firmware/efi/test/
5155 5155
5156EFI VARIABLE FILESYSTEM 5156EFI VARIABLE FILESYSTEM
5157M: Matthew Garrett <matthew.garrett@nebula.com> 5157M: Matthew Garrett <matthew.garrett@nebula.com>
5158M: Jeremy Kerr <jk@ozlabs.org> 5158M: Jeremy Kerr <jk@ozlabs.org>
5159M: Matt Fleming <matt@codeblueprint.co.uk> 5159M: Ard Biesheuvel <ard.biesheuvel@linaro.org>
5160T: git git://git.kernel.org/pub/scm/linux/kernel/git/mfleming/efi.git 5160T: git git://git.kernel.org/pub/scm/linux/kernel/git/efi/efi.git
5161L: linux-efi@vger.kernel.org 5161L: linux-efi@vger.kernel.org
5162S: Maintained 5162S: Maintained
5163F: fs/efivarfs/ 5163F: fs/efivarfs/
@@ -5318,7 +5318,6 @@ S: Supported
5318F: security/integrity/evm/ 5318F: security/integrity/evm/
5319 5319
5320EXTENSIBLE FIRMWARE INTERFACE (EFI) 5320EXTENSIBLE FIRMWARE INTERFACE (EFI)
5321M: Matt Fleming <matt@codeblueprint.co.uk>
5322M: Ard Biesheuvel <ard.biesheuvel@linaro.org> 5321M: Ard Biesheuvel <ard.biesheuvel@linaro.org>
5323L: linux-efi@vger.kernel.org 5322L: linux-efi@vger.kernel.org
5324T: git git://git.kernel.org/pub/scm/linux/kernel/git/efi/efi.git 5323T: git git://git.kernel.org/pub/scm/linux/kernel/git/efi/efi.git
diff --git a/Makefile b/Makefile
index eb1f5973813e..eb59638035dd 100644
--- a/Makefile
+++ b/Makefile
@@ -2,7 +2,7 @@
2VERSION = 4 2VERSION = 4
3PATCHLEVEL = 15 3PATCHLEVEL = 15
4SUBLEVEL = 0 4SUBLEVEL = 0
5EXTRAVERSION = -rc6 5EXTRAVERSION = -rc7
6NAME = Fearless Coyote 6NAME = Fearless Coyote
7 7
8# *DOCUMENTATION* 8# *DOCUMENTATION*
diff --git a/arch/arc/boot/dts/axc003.dtsi b/arch/arc/boot/dts/axc003.dtsi
index 4e6e9f57e790..dc91c663bcc0 100644
--- a/arch/arc/boot/dts/axc003.dtsi
+++ b/arch/arc/boot/dts/axc003.dtsi
@@ -35,6 +35,14 @@
35 reg = <0x80 0x10>, <0x100 0x10>; 35 reg = <0x80 0x10>, <0x100 0x10>;
36 #clock-cells = <0>; 36 #clock-cells = <0>;
37 clocks = <&input_clk>; 37 clocks = <&input_clk>;
38
39 /*
40 * Set initial core pll output frequency to 90MHz.
41 * It will be applied at the core pll driver probing
42 * on early boot.
43 */
44 assigned-clocks = <&core_clk>;
45 assigned-clock-rates = <90000000>;
38 }; 46 };
39 47
40 core_intc: archs-intc@cpu { 48 core_intc: archs-intc@cpu {
diff --git a/arch/arc/boot/dts/axc003_idu.dtsi b/arch/arc/boot/dts/axc003_idu.dtsi
index 63954a8b0100..69ff4895f2ba 100644
--- a/arch/arc/boot/dts/axc003_idu.dtsi
+++ b/arch/arc/boot/dts/axc003_idu.dtsi
@@ -35,6 +35,14 @@
35 reg = <0x80 0x10>, <0x100 0x10>; 35 reg = <0x80 0x10>, <0x100 0x10>;
36 #clock-cells = <0>; 36 #clock-cells = <0>;
37 clocks = <&input_clk>; 37 clocks = <&input_clk>;
38
39 /*
40 * Set initial core pll output frequency to 100MHz.
41 * It will be applied at the core pll driver probing
42 * on early boot.
43 */
44 assigned-clocks = <&core_clk>;
45 assigned-clock-rates = <100000000>;
38 }; 46 };
39 47
40 core_intc: archs-intc@cpu { 48 core_intc: archs-intc@cpu {
diff --git a/arch/arc/boot/dts/hsdk.dts b/arch/arc/boot/dts/hsdk.dts
index 8f627c200d60..006aa3de5348 100644
--- a/arch/arc/boot/dts/hsdk.dts
+++ b/arch/arc/boot/dts/hsdk.dts
@@ -114,6 +114,14 @@
114 reg = <0x00 0x10>, <0x14B8 0x4>; 114 reg = <0x00 0x10>, <0x14B8 0x4>;
115 #clock-cells = <0>; 115 #clock-cells = <0>;
116 clocks = <&input_clk>; 116 clocks = <&input_clk>;
117
118 /*
119 * Set initial core pll output frequency to 1GHz.
120 * It will be applied at the core pll driver probing
121 * on early boot.
122 */
123 assigned-clocks = <&core_clk>;
124 assigned-clock-rates = <1000000000>;
117 }; 125 };
118 126
119 serial: serial@5000 { 127 serial: serial@5000 {
diff --git a/arch/arc/configs/hsdk_defconfig b/arch/arc/configs/hsdk_defconfig
index 7b8f8faf8a24..ac6b0ed8341e 100644
--- a/arch/arc/configs/hsdk_defconfig
+++ b/arch/arc/configs/hsdk_defconfig
@@ -49,10 +49,11 @@ CONFIG_SERIAL_8250_DW=y
49CONFIG_SERIAL_OF_PLATFORM=y 49CONFIG_SERIAL_OF_PLATFORM=y
50# CONFIG_HW_RANDOM is not set 50# CONFIG_HW_RANDOM is not set
51# CONFIG_HWMON is not set 51# CONFIG_HWMON is not set
52CONFIG_DRM=y
53# CONFIG_DRM_FBDEV_EMULATION is not set
54CONFIG_DRM_UDL=y
52CONFIG_FB=y 55CONFIG_FB=y
53CONFIG_FB_UDL=y
54CONFIG_FRAMEBUFFER_CONSOLE=y 56CONFIG_FRAMEBUFFER_CONSOLE=y
55CONFIG_USB=y
56CONFIG_USB_EHCI_HCD=y 57CONFIG_USB_EHCI_HCD=y
57CONFIG_USB_EHCI_HCD_PLATFORM=y 58CONFIG_USB_EHCI_HCD_PLATFORM=y
58CONFIG_USB_OHCI_HCD=y 59CONFIG_USB_OHCI_HCD=y
diff --git a/arch/arc/include/asm/uaccess.h b/arch/arc/include/asm/uaccess.h
index f35974ee7264..c9173c02081c 100644
--- a/arch/arc/include/asm/uaccess.h
+++ b/arch/arc/include/asm/uaccess.h
@@ -668,6 +668,7 @@ __arc_strncpy_from_user(char *dst, const char __user *src, long count)
668 return 0; 668 return 0;
669 669
670 __asm__ __volatile__( 670 __asm__ __volatile__(
671 " mov lp_count, %5 \n"
671 " lp 3f \n" 672 " lp 3f \n"
672 "1: ldb.ab %3, [%2, 1] \n" 673 "1: ldb.ab %3, [%2, 1] \n"
673 " breq.d %3, 0, 3f \n" 674 " breq.d %3, 0, 3f \n"
@@ -684,8 +685,8 @@ __arc_strncpy_from_user(char *dst, const char __user *src, long count)
684 " .word 1b, 4b \n" 685 " .word 1b, 4b \n"
685 " .previous \n" 686 " .previous \n"
686 : "+r"(res), "+r"(dst), "+r"(src), "=r"(val) 687 : "+r"(res), "+r"(dst), "+r"(src), "=r"(val)
687 : "g"(-EFAULT), "l"(count) 688 : "g"(-EFAULT), "r"(count)
688 : "memory"); 689 : "lp_count", "lp_start", "lp_end", "memory");
689 690
690 return res; 691 return res;
691} 692}
diff --git a/arch/arc/kernel/setup.c b/arch/arc/kernel/setup.c
index 7ef7d9a8ff89..9d27331fe69a 100644
--- a/arch/arc/kernel/setup.c
+++ b/arch/arc/kernel/setup.c
@@ -199,7 +199,7 @@ static void read_arc_build_cfg_regs(void)
199 unsigned int exec_ctrl; 199 unsigned int exec_ctrl;
200 200
201 READ_BCR(AUX_EXEC_CTRL, exec_ctrl); 201 READ_BCR(AUX_EXEC_CTRL, exec_ctrl);
202 cpu->extn.dual_enb = exec_ctrl & 1; 202 cpu->extn.dual_enb = !(exec_ctrl & 1);
203 203
204 /* dual issue always present for this core */ 204 /* dual issue always present for this core */
205 cpu->extn.dual = 1; 205 cpu->extn.dual = 1;
diff --git a/arch/arc/kernel/stacktrace.c b/arch/arc/kernel/stacktrace.c
index 74315f302971..bf40e06f3fb8 100644
--- a/arch/arc/kernel/stacktrace.c
+++ b/arch/arc/kernel/stacktrace.c
@@ -163,7 +163,7 @@ arc_unwind_core(struct task_struct *tsk, struct pt_regs *regs,
163 */ 163 */
164static int __print_sym(unsigned int address, void *unused) 164static int __print_sym(unsigned int address, void *unused)
165{ 165{
166 __print_symbol(" %s\n", address); 166 printk(" %pS\n", (void *)address);
167 return 0; 167 return 0;
168} 168}
169 169
diff --git a/arch/arc/kernel/traps.c b/arch/arc/kernel/traps.c
index bcd7c9fc5d0f..133a4dae41fe 100644
--- a/arch/arc/kernel/traps.c
+++ b/arch/arc/kernel/traps.c
@@ -83,6 +83,7 @@ DO_ERROR_INFO(SIGILL, "Illegal Insn (or Seq)", insterror_is_error, ILL_ILLOPC)
83DO_ERROR_INFO(SIGBUS, "Invalid Mem Access", __weak do_memory_error, BUS_ADRERR) 83DO_ERROR_INFO(SIGBUS, "Invalid Mem Access", __weak do_memory_error, BUS_ADRERR)
84DO_ERROR_INFO(SIGTRAP, "Breakpoint Set", trap_is_brkpt, TRAP_BRKPT) 84DO_ERROR_INFO(SIGTRAP, "Breakpoint Set", trap_is_brkpt, TRAP_BRKPT)
85DO_ERROR_INFO(SIGBUS, "Misaligned Access", do_misaligned_error, BUS_ADRALN) 85DO_ERROR_INFO(SIGBUS, "Misaligned Access", do_misaligned_error, BUS_ADRALN)
86DO_ERROR_INFO(SIGSEGV, "gcc generated __builtin_trap", do_trap5_error, 0)
86 87
87/* 88/*
88 * Entry Point for Misaligned Data access Exception, for emulating in software 89 * Entry Point for Misaligned Data access Exception, for emulating in software
@@ -115,6 +116,8 @@ void do_machine_check_fault(unsigned long address, struct pt_regs *regs)
115 * Thus TRAP_S <n> can be used for specific purpose 116 * Thus TRAP_S <n> can be used for specific purpose
116 * -1 used for software breakpointing (gdb) 117 * -1 used for software breakpointing (gdb)
117 * -2 used by kprobes 118 * -2 used by kprobes
119 * -5 __builtin_trap() generated by gcc (2018.03 onwards) for toggle such as
120 * -fno-isolate-erroneous-paths-dereference
118 */ 121 */
119void do_non_swi_trap(unsigned long address, struct pt_regs *regs) 122void do_non_swi_trap(unsigned long address, struct pt_regs *regs)
120{ 123{
@@ -134,6 +137,9 @@ void do_non_swi_trap(unsigned long address, struct pt_regs *regs)
134 kgdb_trap(regs); 137 kgdb_trap(regs);
135 break; 138 break;
136 139
140 case 5:
141 do_trap5_error(address, regs);
142 break;
137 default: 143 default:
138 break; 144 break;
139 } 145 }
@@ -155,3 +161,11 @@ void do_insterror_or_kprobe(unsigned long address, struct pt_regs *regs)
155 161
156 insterror_is_error(address, regs); 162 insterror_is_error(address, regs);
157} 163}
164
165/*
166 * abort() call generated by older gcc for __builtin_trap()
167 */
168void abort(void)
169{
170 __asm__ __volatile__("trap_s 5\n");
171}
diff --git a/arch/arc/kernel/troubleshoot.c b/arch/arc/kernel/troubleshoot.c
index 7d8c1d6c2f60..6e9a0a9a6a04 100644
--- a/arch/arc/kernel/troubleshoot.c
+++ b/arch/arc/kernel/troubleshoot.c
@@ -163,6 +163,9 @@ static void show_ecr_verbose(struct pt_regs *regs)
163 else 163 else
164 pr_cont("Bus Error, check PRM\n"); 164 pr_cont("Bus Error, check PRM\n");
165#endif 165#endif
166 } else if (vec == ECR_V_TRAP) {
167 if (regs->ecr_param == 5)
168 pr_cont("gcc generated __builtin_trap\n");
166 } else { 169 } else {
167 pr_cont("Check Programmer's Manual\n"); 170 pr_cont("Check Programmer's Manual\n");
168 } 171 }
diff --git a/arch/arc/plat-axs10x/axs10x.c b/arch/arc/plat-axs10x/axs10x.c
index f1ac6790da5f..46544e88492d 100644
--- a/arch/arc/plat-axs10x/axs10x.c
+++ b/arch/arc/plat-axs10x/axs10x.c
@@ -317,25 +317,23 @@ static void __init axs103_early_init(void)
317 * Instead of duplicating defconfig/DT for SMP/QUAD, add a small hack 317 * Instead of duplicating defconfig/DT for SMP/QUAD, add a small hack
318 * of fudging the freq in DT 318 * of fudging the freq in DT
319 */ 319 */
320#define AXS103_QUAD_CORE_CPU_FREQ_HZ 50000000
321
320 unsigned int num_cores = (read_aux_reg(ARC_REG_MCIP_BCR) >> 16) & 0x3F; 322 unsigned int num_cores = (read_aux_reg(ARC_REG_MCIP_BCR) >> 16) & 0x3F;
321 if (num_cores > 2) { 323 if (num_cores > 2) {
322 u32 freq = 50, orig; 324 u32 freq;
323 /*
324 * TODO: use cpu node "cpu-freq" param instead of platform-specific
325 * "/cpu_card/core_clk" as it works only if we use fixed-clock for cpu.
326 */
327 int off = fdt_path_offset(initial_boot_params, "/cpu_card/core_clk"); 325 int off = fdt_path_offset(initial_boot_params, "/cpu_card/core_clk");
328 const struct fdt_property *prop; 326 const struct fdt_property *prop;
329 327
330 prop = fdt_get_property(initial_boot_params, off, 328 prop = fdt_get_property(initial_boot_params, off,
331 "clock-frequency", NULL); 329 "assigned-clock-rates", NULL);
332 orig = be32_to_cpu(*(u32*)(prop->data)) / 1000000; 330 freq = be32_to_cpu(*(u32 *)(prop->data));
333 331
334 /* Patching .dtb in-place with new core clock value */ 332 /* Patching .dtb in-place with new core clock value */
335 if (freq != orig ) { 333 if (freq != AXS103_QUAD_CORE_CPU_FREQ_HZ) {
336 freq = cpu_to_be32(freq * 1000000); 334 freq = cpu_to_be32(AXS103_QUAD_CORE_CPU_FREQ_HZ);
337 fdt_setprop_inplace(initial_boot_params, off, 335 fdt_setprop_inplace(initial_boot_params, off,
338 "clock-frequency", &freq, sizeof(freq)); 336 "assigned-clock-rates", &freq, sizeof(freq));
339 } 337 }
340 } 338 }
341#endif 339#endif
diff --git a/arch/arc/plat-hsdk/platform.c b/arch/arc/plat-hsdk/platform.c
index fd0ae5e38639..2958aedb649a 100644
--- a/arch/arc/plat-hsdk/platform.c
+++ b/arch/arc/plat-hsdk/platform.c
@@ -38,42 +38,6 @@ static void __init hsdk_init_per_cpu(unsigned int cpu)
38#define CREG_PAE (CREG_BASE + 0x180) 38#define CREG_PAE (CREG_BASE + 0x180)
39#define CREG_PAE_UPDATE (CREG_BASE + 0x194) 39#define CREG_PAE_UPDATE (CREG_BASE + 0x194)
40 40
41#define CREG_CORE_IF_CLK_DIV (CREG_BASE + 0x4B8)
42#define CREG_CORE_IF_CLK_DIV_2 0x1
43#define CGU_BASE ARC_PERIPHERAL_BASE
44#define CGU_PLL_STATUS (ARC_PERIPHERAL_BASE + 0x4)
45#define CGU_PLL_CTRL (ARC_PERIPHERAL_BASE + 0x0)
46#define CGU_PLL_STATUS_LOCK BIT(0)
47#define CGU_PLL_STATUS_ERR BIT(1)
48#define CGU_PLL_CTRL_1GHZ 0x3A10
49#define HSDK_PLL_LOCK_TIMEOUT 500
50
51#define HSDK_PLL_LOCKED() \
52 !!(ioread32((void __iomem *) CGU_PLL_STATUS) & CGU_PLL_STATUS_LOCK)
53
54#define HSDK_PLL_ERR() \
55 !!(ioread32((void __iomem *) CGU_PLL_STATUS) & CGU_PLL_STATUS_ERR)
56
57static void __init hsdk_set_cpu_freq_1ghz(void)
58{
59 u32 timeout = HSDK_PLL_LOCK_TIMEOUT;
60
61 /*
62 * As we set cpu clock which exceeds 500MHz, the divider for the interface
63 * clock must be programmed to div-by-2.
64 */
65 iowrite32(CREG_CORE_IF_CLK_DIV_2, (void __iomem *) CREG_CORE_IF_CLK_DIV);
66
67 /* Set cpu clock to 1GHz */
68 iowrite32(CGU_PLL_CTRL_1GHZ, (void __iomem *) CGU_PLL_CTRL);
69
70 while (!HSDK_PLL_LOCKED() && timeout--)
71 cpu_relax();
72
73 if (!HSDK_PLL_LOCKED() || HSDK_PLL_ERR())
74 pr_err("Failed to setup CPU frequency to 1GHz!");
75}
76
77#define SDIO_BASE (ARC_PERIPHERAL_BASE + 0xA000) 41#define SDIO_BASE (ARC_PERIPHERAL_BASE + 0xA000)
78#define SDIO_UHS_REG_EXT (SDIO_BASE + 0x108) 42#define SDIO_UHS_REG_EXT (SDIO_BASE + 0x108)
79#define SDIO_UHS_REG_EXT_DIV_2 (2 << 30) 43#define SDIO_UHS_REG_EXT_DIV_2 (2 << 30)
@@ -98,12 +62,6 @@ static void __init hsdk_init_early(void)
98 * minimum possible div-by-2. 62 * minimum possible div-by-2.
99 */ 63 */
100 iowrite32(SDIO_UHS_REG_EXT_DIV_2, (void __iomem *) SDIO_UHS_REG_EXT); 64 iowrite32(SDIO_UHS_REG_EXT_DIV_2, (void __iomem *) SDIO_UHS_REG_EXT);
101
102 /*
103 * Setup CPU frequency to 1GHz.
104 * TODO: remove it after smart hsdk pll driver will be introduced.
105 */
106 hsdk_set_cpu_freq_1ghz();
107} 65}
108 66
109static const char *hsdk_compat[] __initconst = { 67static const char *hsdk_compat[] __initconst = {
diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi
index 45d815a86d42..de08d9045cb8 100644
--- a/arch/arm/boot/dts/aspeed-g4.dtsi
+++ b/arch/arm/boot/dts/aspeed-g4.dtsi
@@ -219,7 +219,7 @@
219 compatible = "aspeed,ast2400-vuart"; 219 compatible = "aspeed,ast2400-vuart";
220 reg = <0x1e787000 0x40>; 220 reg = <0x1e787000 0x40>;
221 reg-shift = <2>; 221 reg-shift = <2>;
222 interrupts = <10>; 222 interrupts = <8>;
223 clocks = <&clk_uart>; 223 clocks = <&clk_uart>;
224 no-loopback-test; 224 no-loopback-test;
225 status = "disabled"; 225 status = "disabled";
diff --git a/arch/arm/boot/dts/at91-tse850-3.dts b/arch/arm/boot/dts/at91-tse850-3.dts
index 5f29010cdbd8..9b82cc8843e1 100644
--- a/arch/arm/boot/dts/at91-tse850-3.dts
+++ b/arch/arm/boot/dts/at91-tse850-3.dts
@@ -221,6 +221,7 @@
221 jc42@18 { 221 jc42@18 {
222 compatible = "nxp,se97b", "jedec,jc-42.4-temp"; 222 compatible = "nxp,se97b", "jedec,jc-42.4-temp";
223 reg = <0x18>; 223 reg = <0x18>;
224 smbus-timeout-disable;
224 }; 225 };
225 226
226 dpot: mcp4651-104@28 { 227 dpot: mcp4651-104@28 {
diff --git a/arch/arm/boot/dts/da850-lego-ev3.dts b/arch/arm/boot/dts/da850-lego-ev3.dts
index 413dbd5d9f64..81942ae83e1f 100644
--- a/arch/arm/boot/dts/da850-lego-ev3.dts
+++ b/arch/arm/boot/dts/da850-lego-ev3.dts
@@ -178,7 +178,7 @@
178 */ 178 */
179 battery { 179 battery {
180 pinctrl-names = "default"; 180 pinctrl-names = "default";
181 pintctrl-0 = <&battery_pins>; 181 pinctrl-0 = <&battery_pins>;
182 compatible = "lego,ev3-battery"; 182 compatible = "lego,ev3-battery";
183 io-channels = <&adc 4>, <&adc 3>; 183 io-channels = <&adc 4>, <&adc 3>;
184 io-channel-names = "voltage", "current"; 184 io-channel-names = "voltage", "current";
@@ -392,7 +392,7 @@
392 batt_volt_en { 392 batt_volt_en {
393 gpio-hog; 393 gpio-hog;
394 gpios = <6 GPIO_ACTIVE_HIGH>; 394 gpios = <6 GPIO_ACTIVE_HIGH>;
395 output-low; 395 output-high;
396 }; 396 };
397}; 397};
398 398
diff --git a/arch/arm/boot/dts/exynos5800-peach-pi.dts b/arch/arm/boot/dts/exynos5800-peach-pi.dts
index b2b95ff205e8..0029ec27819c 100644
--- a/arch/arm/boot/dts/exynos5800-peach-pi.dts
+++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts
@@ -664,6 +664,10 @@
664 status = "okay"; 664 status = "okay";
665}; 665};
666 666
667&mixer {
668 status = "okay";
669};
670
667/* eMMC flash */ 671/* eMMC flash */
668&mmc_0 { 672&mmc_0 {
669 status = "okay"; 673 status = "okay";
diff --git a/arch/arm/boot/dts/ls1021a-qds.dts b/arch/arm/boot/dts/ls1021a-qds.dts
index 940875316d0f..67b4de0e3439 100644
--- a/arch/arm/boot/dts/ls1021a-qds.dts
+++ b/arch/arm/boot/dts/ls1021a-qds.dts
@@ -215,7 +215,7 @@
215 reg = <0x2a>; 215 reg = <0x2a>;
216 VDDA-supply = <&reg_3p3v>; 216 VDDA-supply = <&reg_3p3v>;
217 VDDIO-supply = <&reg_3p3v>; 217 VDDIO-supply = <&reg_3p3v>;
218 clocks = <&sys_mclk 1>; 218 clocks = <&sys_mclk>;
219 }; 219 };
220 }; 220 };
221 }; 221 };
diff --git a/arch/arm/boot/dts/ls1021a-twr.dts b/arch/arm/boot/dts/ls1021a-twr.dts
index a8b148ad1dd2..44715c8ef756 100644
--- a/arch/arm/boot/dts/ls1021a-twr.dts
+++ b/arch/arm/boot/dts/ls1021a-twr.dts
@@ -187,7 +187,7 @@
187 reg = <0x0a>; 187 reg = <0x0a>;
188 VDDA-supply = <&reg_3p3v>; 188 VDDA-supply = <&reg_3p3v>;
189 VDDIO-supply = <&reg_3p3v>; 189 VDDIO-supply = <&reg_3p3v>;
190 clocks = <&sys_mclk 1>; 190 clocks = <&sys_mclk>;
191 }; 191 };
192}; 192};
193 193
diff --git a/arch/arm/boot/dts/rk3066a-marsboard.dts b/arch/arm/boot/dts/rk3066a-marsboard.dts
index c6d92c25df42..d23ee6d911ac 100644
--- a/arch/arm/boot/dts/rk3066a-marsboard.dts
+++ b/arch/arm/boot/dts/rk3066a-marsboard.dts
@@ -83,6 +83,10 @@
83 }; 83 };
84}; 84};
85 85
86&cpu0 {
87 cpu0-supply = <&vdd_arm>;
88};
89
86&i2c1 { 90&i2c1 {
87 status = "okay"; 91 status = "okay";
88 clock-frequency = <400000>; 92 clock-frequency = <400000>;
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index cd24894ee5c6..6102e4e7f35c 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -956,7 +956,7 @@
956 iep_mmu: iommu@ff900800 { 956 iep_mmu: iommu@ff900800 {
957 compatible = "rockchip,iommu"; 957 compatible = "rockchip,iommu";
958 reg = <0x0 0xff900800 0x0 0x40>; 958 reg = <0x0 0xff900800 0x0 0x40>;
959 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH 0>; 959 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
960 interrupt-names = "iep_mmu"; 960 interrupt-names = "iep_mmu";
961 #iommu-cells = <0>; 961 #iommu-cells = <0>;
962 status = "disabled"; 962 status = "disabled";
diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
index b91300d49a31..5840f5c75c3b 100644
--- a/arch/arm/boot/dts/sun4i-a10.dtsi
+++ b/arch/arm/boot/dts/sun4i-a10.dtsi
@@ -502,8 +502,8 @@
502 reg = <0x01c16000 0x1000>; 502 reg = <0x01c16000 0x1000>;
503 interrupts = <58>; 503 interrupts = <58>;
504 clocks = <&ccu CLK_AHB_HDMI0>, <&ccu CLK_HDMI>, 504 clocks = <&ccu CLK_AHB_HDMI0>, <&ccu CLK_HDMI>,
505 <&ccu 9>, 505 <&ccu CLK_PLL_VIDEO0_2X>,
506 <&ccu 18>; 506 <&ccu CLK_PLL_VIDEO1_2X>;
507 clock-names = "ahb", "mod", "pll-0", "pll-1"; 507 clock-names = "ahb", "mod", "pll-0", "pll-1";
508 dmas = <&dma SUN4I_DMA_NORMAL 16>, 508 dmas = <&dma SUN4I_DMA_NORMAL 16>,
509 <&dma SUN4I_DMA_NORMAL 16>, 509 <&dma SUN4I_DMA_NORMAL 16>,
diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi b/arch/arm/boot/dts/sun5i-a10s.dtsi
index 6ae4d95e230e..316cb8b2945b 100644
--- a/arch/arm/boot/dts/sun5i-a10s.dtsi
+++ b/arch/arm/boot/dts/sun5i-a10s.dtsi
@@ -82,8 +82,8 @@
82 reg = <0x01c16000 0x1000>; 82 reg = <0x01c16000 0x1000>;
83 interrupts = <58>; 83 interrupts = <58>;
84 clocks = <&ccu CLK_AHB_HDMI>, <&ccu CLK_HDMI>, 84 clocks = <&ccu CLK_AHB_HDMI>, <&ccu CLK_HDMI>,
85 <&ccu 9>, 85 <&ccu CLK_PLL_VIDEO0_2X>,
86 <&ccu 16>; 86 <&ccu CLK_PLL_VIDEO1_2X>;
87 clock-names = "ahb", "mod", "pll-0", "pll-1"; 87 clock-names = "ahb", "mod", "pll-0", "pll-1";
88 dmas = <&dma SUN4I_DMA_NORMAL 16>, 88 dmas = <&dma SUN4I_DMA_NORMAL 16>,
89 <&dma SUN4I_DMA_NORMAL 16>, 89 <&dma SUN4I_DMA_NORMAL 16>,
diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
index 8bfa12b548e0..72d3fe44ecaf 100644
--- a/arch/arm/boot/dts/sun6i-a31.dtsi
+++ b/arch/arm/boot/dts/sun6i-a31.dtsi
@@ -429,8 +429,8 @@
429 interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>; 429 interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
430 clocks = <&ccu CLK_AHB1_HDMI>, <&ccu CLK_HDMI>, 430 clocks = <&ccu CLK_AHB1_HDMI>, <&ccu CLK_HDMI>,
431 <&ccu CLK_HDMI_DDC>, 431 <&ccu CLK_HDMI_DDC>,
432 <&ccu 7>, 432 <&ccu CLK_PLL_VIDEO0_2X>,
433 <&ccu 13>; 433 <&ccu CLK_PLL_VIDEO1_2X>;
434 clock-names = "ahb", "mod", "ddc", "pll-0", "pll-1"; 434 clock-names = "ahb", "mod", "ddc", "pll-0", "pll-1";
435 resets = <&ccu RST_AHB1_HDMI>; 435 resets = <&ccu RST_AHB1_HDMI>;
436 reset-names = "ahb"; 436 reset-names = "ahb";
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index 68dfa82544fc..59655e42e4b0 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -581,8 +581,8 @@
581 reg = <0x01c16000 0x1000>; 581 reg = <0x01c16000 0x1000>;
582 interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>; 582 interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
583 clocks = <&ccu CLK_AHB_HDMI0>, <&ccu CLK_HDMI>, 583 clocks = <&ccu CLK_AHB_HDMI0>, <&ccu CLK_HDMI>,
584 <&ccu 9>, 584 <&ccu CLK_PLL_VIDEO0_2X>,
585 <&ccu 18>; 585 <&ccu CLK_PLL_VIDEO1_2X>;
586 clock-names = "ahb", "mod", "pll-0", "pll-1"; 586 clock-names = "ahb", "mod", "pll-0", "pll-1";
587 dmas = <&dma SUN4I_DMA_NORMAL 16>, 587 dmas = <&dma SUN4I_DMA_NORMAL 16>,
588 <&dma SUN4I_DMA_NORMAL 16>, 588 <&dma SUN4I_DMA_NORMAL 16>,
diff --git a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
index 98715538932f..a021ee6da396 100644
--- a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
+++ b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
@@ -146,6 +146,7 @@
146 status = "okay"; 146 status = "okay";
147 147
148 axp81x: pmic@3a3 { 148 axp81x: pmic@3a3 {
149 compatible = "x-powers,axp813";
149 reg = <0x3a3>; 150 reg = <0x3a3>;
150 interrupt-parent = <&r_intc>; 151 interrupt-parent = <&r_intc>;
151 interrupts = <0 IRQ_TYPE_LEVEL_LOW>; 152 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
diff --git a/arch/arm/boot/dts/tango4-common.dtsi b/arch/arm/boot/dts/tango4-common.dtsi
index 0ec1b0a317b4..ff72a8efb73d 100644
--- a/arch/arm/boot/dts/tango4-common.dtsi
+++ b/arch/arm/boot/dts/tango4-common.dtsi
@@ -156,7 +156,6 @@
156 reg = <0x6e000 0x400>; 156 reg = <0x6e000 0x400>;
157 ranges = <0 0x6e000 0x400>; 157 ranges = <0 0x6e000 0x400>;
158 interrupt-parent = <&gic>; 158 interrupt-parent = <&gic>;
159 interrupt-controller;
160 #address-cells = <1>; 159 #address-cells = <1>;
161 #size-cells = <1>; 160 #size-cells = <1>;
162 161
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
index 5cf04888c581..3e26c6f7a191 100644
--- a/arch/arm/kernel/traps.c
+++ b/arch/arm/kernel/traps.c
@@ -793,7 +793,6 @@ void abort(void)
793 /* if that doesn't kill us, halt */ 793 /* if that doesn't kill us, halt */
794 panic("Oops failed to kill thread"); 794 panic("Oops failed to kill thread");
795} 795}
796EXPORT_SYMBOL(abort);
797 796
798void __init trap_init(void) 797void __init trap_init(void)
799{ 798{
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 8be04ec95adf..5ace9380626a 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -868,10 +868,10 @@ static const struct dma_slave_map dm365_edma_map[] = {
868 { "spi_davinci.0", "rx", EDMA_FILTER_PARAM(0, 17) }, 868 { "spi_davinci.0", "rx", EDMA_FILTER_PARAM(0, 17) },
869 { "spi_davinci.3", "tx", EDMA_FILTER_PARAM(0, 18) }, 869 { "spi_davinci.3", "tx", EDMA_FILTER_PARAM(0, 18) },
870 { "spi_davinci.3", "rx", EDMA_FILTER_PARAM(0, 19) }, 870 { "spi_davinci.3", "rx", EDMA_FILTER_PARAM(0, 19) },
871 { "dm6441-mmc.0", "rx", EDMA_FILTER_PARAM(0, 26) }, 871 { "da830-mmc.0", "rx", EDMA_FILTER_PARAM(0, 26) },
872 { "dm6441-mmc.0", "tx", EDMA_FILTER_PARAM(0, 27) }, 872 { "da830-mmc.0", "tx", EDMA_FILTER_PARAM(0, 27) },
873 { "dm6441-mmc.1", "rx", EDMA_FILTER_PARAM(0, 30) }, 873 { "da830-mmc.1", "rx", EDMA_FILTER_PARAM(0, 30) },
874 { "dm6441-mmc.1", "tx", EDMA_FILTER_PARAM(0, 31) }, 874 { "da830-mmc.1", "tx", EDMA_FILTER_PARAM(0, 31) },
875}; 875};
876 876
877static struct edma_soc_info dm365_edma_pdata = { 877static struct edma_soc_info dm365_edma_pdata = {
@@ -925,12 +925,14 @@ static struct resource edma_resources[] = {
925 /* not using TC*_ERR */ 925 /* not using TC*_ERR */
926}; 926};
927 927
928static struct platform_device dm365_edma_device = { 928static const struct platform_device_info dm365_edma_device __initconst = {
929 .name = "edma", 929 .name = "edma",
930 .id = 0, 930 .id = 0,
931 .dev.platform_data = &dm365_edma_pdata, 931 .dma_mask = DMA_BIT_MASK(32),
932 .num_resources = ARRAY_SIZE(edma_resources), 932 .res = edma_resources,
933 .resource = edma_resources, 933 .num_res = ARRAY_SIZE(edma_resources),
934 .data = &dm365_edma_pdata,
935 .size_data = sizeof(dm365_edma_pdata),
934}; 936};
935 937
936static struct resource dm365_asp_resources[] = { 938static struct resource dm365_asp_resources[] = {
@@ -1428,13 +1430,18 @@ int __init dm365_init_video(struct vpfe_config *vpfe_cfg,
1428 1430
1429static int __init dm365_init_devices(void) 1431static int __init dm365_init_devices(void)
1430{ 1432{
1433 struct platform_device *edma_pdev;
1431 int ret = 0; 1434 int ret = 0;
1432 1435
1433 if (!cpu_is_davinci_dm365()) 1436 if (!cpu_is_davinci_dm365())
1434 return 0; 1437 return 0;
1435 1438
1436 davinci_cfg_reg(DM365_INT_EDMA_CC); 1439 davinci_cfg_reg(DM365_INT_EDMA_CC);
1437 platform_device_register(&dm365_edma_device); 1440 edma_pdev = platform_device_register_full(&dm365_edma_device);
1441 if (IS_ERR(edma_pdev)) {
1442 pr_warn("%s: Failed to register eDMA\n", __func__);
1443 return PTR_ERR(edma_pdev);
1444 }
1438 1445
1439 platform_device_register(&dm365_mdio_device); 1446 platform_device_register(&dm365_mdio_device);
1440 platform_device_register(&dm365_emac_device); 1447 platform_device_register(&dm365_emac_device);
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
index 45bdbfb96126..4a8d3f83a36e 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
@@ -75,6 +75,7 @@
75 pinctrl-0 = <&rgmii_pins>; 75 pinctrl-0 = <&rgmii_pins>;
76 phy-mode = "rgmii"; 76 phy-mode = "rgmii";
77 phy-handle = <&ext_rgmii_phy>; 77 phy-handle = <&ext_rgmii_phy>;
78 phy-supply = <&reg_dc1sw>;
78 status = "okay"; 79 status = "okay";
79}; 80};
80 81
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
index 806442d3e846..604cdaedac38 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
@@ -77,6 +77,7 @@
77 pinctrl-0 = <&rmii_pins>; 77 pinctrl-0 = <&rmii_pins>;
78 phy-mode = "rmii"; 78 phy-mode = "rmii";
79 phy-handle = <&ext_rmii_phy1>; 79 phy-handle = <&ext_rmii_phy1>;
80 phy-supply = <&reg_dc1sw>;
80 status = "okay"; 81 status = "okay";
81 82
82}; 83};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
index 0eb2acedf8c3..abe179de35d7 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
@@ -82,6 +82,7 @@
82 pinctrl-0 = <&rgmii_pins>; 82 pinctrl-0 = <&rgmii_pins>;
83 phy-mode = "rgmii"; 83 phy-mode = "rgmii";
84 phy-handle = <&ext_rgmii_phy>; 84 phy-handle = <&ext_rgmii_phy>;
85 phy-supply = <&reg_dc1sw>;
85 status = "okay"; 86 status = "okay";
86}; 87};
87 88
@@ -95,7 +96,7 @@
95&mmc2 { 96&mmc2 {
96 pinctrl-names = "default"; 97 pinctrl-names = "default";
97 pinctrl-0 = <&mmc2_pins>; 98 pinctrl-0 = <&mmc2_pins>;
98 vmmc-supply = <&reg_vcc3v3>; 99 vmmc-supply = <&reg_dcdc1>;
99 vqmmc-supply = <&reg_vcc1v8>; 100 vqmmc-supply = <&reg_vcc1v8>;
100 bus-width = <8>; 101 bus-width = <8>;
101 non-removable; 102 non-removable;
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine.dtsi
index a5da18a6f286..43418bd881d8 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine.dtsi
@@ -45,19 +45,10 @@
45 45
46#include "sun50i-a64.dtsi" 46#include "sun50i-a64.dtsi"
47 47
48/ {
49 reg_vcc3v3: vcc3v3 {
50 compatible = "regulator-fixed";
51 regulator-name = "vcc3v3";
52 regulator-min-microvolt = <3300000>;
53 regulator-max-microvolt = <3300000>;
54 };
55};
56
57&mmc0 { 48&mmc0 {
58 pinctrl-names = "default"; 49 pinctrl-names = "default";
59 pinctrl-0 = <&mmc0_pins>; 50 pinctrl-0 = <&mmc0_pins>;
60 vmmc-supply = <&reg_vcc3v3>; 51 vmmc-supply = <&reg_dcdc1>;
61 non-removable; 52 non-removable;
62 disable-wp; 53 disable-wp;
63 bus-width = <4>; 54 bus-width = <4>;
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts
index b6b7a561df8c..a42fd79a62a3 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts
@@ -71,7 +71,7 @@
71 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; 71 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
72 vmmc-supply = <&reg_vcc3v3>; 72 vmmc-supply = <&reg_vcc3v3>;
73 bus-width = <4>; 73 bus-width = <4>;
74 cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; 74 cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
75 status = "okay"; 75 status = "okay";
76}; 76};
77 77
diff --git a/arch/arm64/boot/dts/renesas/salvator-common.dtsi b/arch/arm64/boot/dts/renesas/salvator-common.dtsi
index a298df74ca6c..dbe2648649db 100644
--- a/arch/arm64/boot/dts/renesas/salvator-common.dtsi
+++ b/arch/arm64/boot/dts/renesas/salvator-common.dtsi
@@ -255,7 +255,6 @@
255&avb { 255&avb {
256 pinctrl-0 = <&avb_pins>; 256 pinctrl-0 = <&avb_pins>;
257 pinctrl-names = "default"; 257 pinctrl-names = "default";
258 renesas,no-ether-link;
259 phy-handle = <&phy0>; 258 phy-handle = <&phy0>;
260 status = "okay"; 259 status = "okay";
261 260
diff --git a/arch/arm64/boot/dts/renesas/ulcb.dtsi b/arch/arm64/boot/dts/renesas/ulcb.dtsi
index 0d85b315ce71..73439cf48659 100644
--- a/arch/arm64/boot/dts/renesas/ulcb.dtsi
+++ b/arch/arm64/boot/dts/renesas/ulcb.dtsi
@@ -145,7 +145,6 @@
145&avb { 145&avb {
146 pinctrl-0 = <&avb_pins>; 146 pinctrl-0 = <&avb_pins>;
147 pinctrl-names = "default"; 147 pinctrl-names = "default";
148 renesas,no-ether-link;
149 phy-handle = <&phy0>; 148 phy-handle = <&phy0>;
150 status = "okay"; 149 status = "okay";
151 150
diff --git a/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts b/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts
index d4f80786e7c2..3890468678ce 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts
@@ -132,6 +132,8 @@
132 assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; 132 assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
133 assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>; 133 assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>;
134 clock_in_out = "input"; 134 clock_in_out = "input";
135 /* shows instability at 1GBit right now */
136 max-speed = <100>;
135 phy-supply = <&vcc_io>; 137 phy-supply = <&vcc_io>;
136 phy-mode = "rgmii"; 138 phy-mode = "rgmii";
137 pinctrl-names = "default"; 139 pinctrl-names = "default";
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index 41d61840fb99..2426da631938 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -514,7 +514,7 @@
514 tsadc: tsadc@ff250000 { 514 tsadc: tsadc@ff250000 {
515 compatible = "rockchip,rk3328-tsadc"; 515 compatible = "rockchip,rk3328-tsadc";
516 reg = <0x0 0xff250000 0x0 0x100>; 516 reg = <0x0 0xff250000 0x0 0x100>;
517 interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH 0>; 517 interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
518 assigned-clocks = <&cru SCLK_TSADC>; 518 assigned-clocks = <&cru SCLK_TSADC>;
519 assigned-clock-rates = <50000>; 519 assigned-clock-rates = <50000>;
520 clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>; 520 clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi
index 910628d18add..1fc5060d7027 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi
@@ -155,17 +155,6 @@
155 regulator-min-microvolt = <5000000>; 155 regulator-min-microvolt = <5000000>;
156 regulator-max-microvolt = <5000000>; 156 regulator-max-microvolt = <5000000>;
157 }; 157 };
158
159 vdd_log: vdd-log {
160 compatible = "pwm-regulator";
161 pwms = <&pwm2 0 25000 0>;
162 regulator-name = "vdd_log";
163 regulator-min-microvolt = <800000>;
164 regulator-max-microvolt = <1400000>;
165 regulator-always-on;
166 regulator-boot-on;
167 status = "okay";
168 };
169}; 158};
170 159
171&cpu_b0 { 160&cpu_b0 {
diff --git a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
index 48e733136db4..0ac2ace82435 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
@@ -198,8 +198,8 @@
198 gpio-controller; 198 gpio-controller;
199 #gpio-cells = <2>; 199 #gpio-cells = <2>;
200 gpio-ranges = <&pinctrl 0 0 0>, 200 gpio-ranges = <&pinctrl 0 0 0>,
201 <&pinctrl 96 0 0>, 201 <&pinctrl 104 0 0>,
202 <&pinctrl 160 0 0>; 202 <&pinctrl 168 0 0>;
203 gpio-ranges-group-names = "gpio_range0", 203 gpio-ranges-group-names = "gpio_range0",
204 "gpio_range1", 204 "gpio_range1",
205 "gpio_range2"; 205 "gpio_range2";
diff --git a/arch/m32r/kernel/traps.c b/arch/m32r/kernel/traps.c
index cb79fba79d43..b88a8dd14933 100644
--- a/arch/m32r/kernel/traps.c
+++ b/arch/m32r/kernel/traps.c
@@ -122,7 +122,6 @@ void abort(void)
122 /* if that doesn't kill us, halt */ 122 /* if that doesn't kill us, halt */
123 panic("Oops failed to kill thread"); 123 panic("Oops failed to kill thread");
124} 124}
125EXPORT_SYMBOL(abort);
126 125
127void __init trap_init(void) 126void __init trap_init(void)
128{ 127{
diff --git a/arch/parisc/include/asm/ldcw.h b/arch/parisc/include/asm/ldcw.h
index dd5a08aaa4da..3eb4bfc1fb36 100644
--- a/arch/parisc/include/asm/ldcw.h
+++ b/arch/parisc/include/asm/ldcw.h
@@ -12,6 +12,7 @@
12 for the semaphore. */ 12 for the semaphore. */
13 13
14#define __PA_LDCW_ALIGNMENT 16 14#define __PA_LDCW_ALIGNMENT 16
15#define __PA_LDCW_ALIGN_ORDER 4
15#define __ldcw_align(a) ({ \ 16#define __ldcw_align(a) ({ \
16 unsigned long __ret = (unsigned long) &(a)->lock[0]; \ 17 unsigned long __ret = (unsigned long) &(a)->lock[0]; \
17 __ret = (__ret + __PA_LDCW_ALIGNMENT - 1) \ 18 __ret = (__ret + __PA_LDCW_ALIGNMENT - 1) \
@@ -29,6 +30,7 @@
29 ldcd). */ 30 ldcd). */
30 31
31#define __PA_LDCW_ALIGNMENT 4 32#define __PA_LDCW_ALIGNMENT 4
33#define __PA_LDCW_ALIGN_ORDER 2
32#define __ldcw_align(a) (&(a)->slock) 34#define __ldcw_align(a) (&(a)->slock)
33#define __LDCW "ldcw,co" 35#define __LDCW "ldcw,co"
34 36
diff --git a/arch/parisc/kernel/drivers.c b/arch/parisc/kernel/drivers.c
index d8f77358e2ba..29b99b8964aa 100644
--- a/arch/parisc/kernel/drivers.c
+++ b/arch/parisc/kernel/drivers.c
@@ -870,7 +870,7 @@ static void print_parisc_device(struct parisc_device *dev)
870 static int count; 870 static int count;
871 871
872 print_pa_hwpath(dev, hw_path); 872 print_pa_hwpath(dev, hw_path);
873 printk(KERN_INFO "%d. %s at 0x%p [%s] { %d, 0x%x, 0x%.3x, 0x%.5x }", 873 printk(KERN_INFO "%d. %s at 0x%px [%s] { %d, 0x%x, 0x%.3x, 0x%.5x }",
874 ++count, dev->name, (void*) dev->hpa.start, hw_path, dev->id.hw_type, 874 ++count, dev->name, (void*) dev->hpa.start, hw_path, dev->id.hw_type,
875 dev->id.hversion_rev, dev->id.hversion, dev->id.sversion); 875 dev->id.hversion_rev, dev->id.hversion, dev->id.sversion);
876 876
diff --git a/arch/parisc/kernel/entry.S b/arch/parisc/kernel/entry.S
index f3cecf5117cf..e95207c0565e 100644
--- a/arch/parisc/kernel/entry.S
+++ b/arch/parisc/kernel/entry.S
@@ -35,6 +35,7 @@
35#include <asm/pgtable.h> 35#include <asm/pgtable.h>
36#include <asm/signal.h> 36#include <asm/signal.h>
37#include <asm/unistd.h> 37#include <asm/unistd.h>
38#include <asm/ldcw.h>
38#include <asm/thread_info.h> 39#include <asm/thread_info.h>
39 40
40#include <linux/linkage.h> 41#include <linux/linkage.h>
@@ -46,6 +47,14 @@
46#endif 47#endif
47 48
48 .import pa_tlb_lock,data 49 .import pa_tlb_lock,data
50 .macro load_pa_tlb_lock reg
51#if __PA_LDCW_ALIGNMENT > 4
52 load32 PA(pa_tlb_lock) + __PA_LDCW_ALIGNMENT-1, \reg
53 depi 0,31,__PA_LDCW_ALIGN_ORDER, \reg
54#else
55 load32 PA(pa_tlb_lock), \reg
56#endif
57 .endm
49 58
50 /* space_to_prot macro creates a prot id from a space id */ 59 /* space_to_prot macro creates a prot id from a space id */
51 60
@@ -457,7 +466,7 @@
457 .macro tlb_lock spc,ptp,pte,tmp,tmp1,fault 466 .macro tlb_lock spc,ptp,pte,tmp,tmp1,fault
458#ifdef CONFIG_SMP 467#ifdef CONFIG_SMP
459 cmpib,COND(=),n 0,\spc,2f 468 cmpib,COND(=),n 0,\spc,2f
460 load32 PA(pa_tlb_lock),\tmp 469 load_pa_tlb_lock \tmp
4611: LDCW 0(\tmp),\tmp1 4701: LDCW 0(\tmp),\tmp1
462 cmpib,COND(=) 0,\tmp1,1b 471 cmpib,COND(=) 0,\tmp1,1b
463 nop 472 nop
@@ -480,7 +489,7 @@
480 /* Release pa_tlb_lock lock. */ 489 /* Release pa_tlb_lock lock. */
481 .macro tlb_unlock1 spc,tmp 490 .macro tlb_unlock1 spc,tmp
482#ifdef CONFIG_SMP 491#ifdef CONFIG_SMP
483 load32 PA(pa_tlb_lock),\tmp 492 load_pa_tlb_lock \tmp
484 tlb_unlock0 \spc,\tmp 493 tlb_unlock0 \spc,\tmp
485#endif 494#endif
486 .endm 495 .endm
diff --git a/arch/parisc/kernel/pacache.S b/arch/parisc/kernel/pacache.S
index adf7187f8951..2d40c4ff3f69 100644
--- a/arch/parisc/kernel/pacache.S
+++ b/arch/parisc/kernel/pacache.S
@@ -36,6 +36,7 @@
36#include <asm/assembly.h> 36#include <asm/assembly.h>
37#include <asm/pgtable.h> 37#include <asm/pgtable.h>
38#include <asm/cache.h> 38#include <asm/cache.h>
39#include <asm/ldcw.h>
39#include <linux/linkage.h> 40#include <linux/linkage.h>
40 41
41 .text 42 .text
@@ -333,8 +334,12 @@ ENDPROC_CFI(flush_data_cache_local)
333 334
334 .macro tlb_lock la,flags,tmp 335 .macro tlb_lock la,flags,tmp
335#ifdef CONFIG_SMP 336#ifdef CONFIG_SMP
336 ldil L%pa_tlb_lock,%r1 337#if __PA_LDCW_ALIGNMENT > 4
337 ldo R%pa_tlb_lock(%r1),\la 338 load32 pa_tlb_lock + __PA_LDCW_ALIGNMENT-1, \la
339 depi 0,31,__PA_LDCW_ALIGN_ORDER, \la
340#else
341 load32 pa_tlb_lock, \la
342#endif
338 rsm PSW_SM_I,\flags 343 rsm PSW_SM_I,\flags
3391: LDCW 0(\la),\tmp 3441: LDCW 0(\la),\tmp
340 cmpib,<>,n 0,\tmp,3f 345 cmpib,<>,n 0,\tmp,3f
diff --git a/arch/parisc/kernel/process.c b/arch/parisc/kernel/process.c
index 30f92391a93e..cad3e8661cd6 100644
--- a/arch/parisc/kernel/process.c
+++ b/arch/parisc/kernel/process.c
@@ -39,6 +39,7 @@
39#include <linux/kernel.h> 39#include <linux/kernel.h>
40#include <linux/mm.h> 40#include <linux/mm.h>
41#include <linux/fs.h> 41#include <linux/fs.h>
42#include <linux/cpu.h>
42#include <linux/module.h> 43#include <linux/module.h>
43#include <linux/personality.h> 44#include <linux/personality.h>
44#include <linux/ptrace.h> 45#include <linux/ptrace.h>
@@ -184,6 +185,44 @@ int dump_task_fpu (struct task_struct *tsk, elf_fpregset_t *r)
184} 185}
185 186
186/* 187/*
188 * Idle thread support
189 *
190 * Detect when running on QEMU with SeaBIOS PDC Firmware and let
191 * QEMU idle the host too.
192 */
193
194int running_on_qemu __read_mostly;
195
196void __cpuidle arch_cpu_idle_dead(void)
197{
198 /* nop on real hardware, qemu will offline CPU. */
199 asm volatile("or %%r31,%%r31,%%r31\n":::);
200}
201
202void __cpuidle arch_cpu_idle(void)
203{
204 local_irq_enable();
205
206 /* nop on real hardware, qemu will idle sleep. */
207 asm volatile("or %%r10,%%r10,%%r10\n":::);
208}
209
210static int __init parisc_idle_init(void)
211{
212 const char *marker;
213
214 /* check QEMU/SeaBIOS marker in PAGE0 */
215 marker = (char *) &PAGE0->pad0;
216 running_on_qemu = (memcmp(marker, "SeaBIOS", 8) == 0);
217
218 if (!running_on_qemu)
219 cpu_idle_poll_ctrl(1);
220
221 return 0;
222}
223arch_initcall(parisc_idle_init);
224
225/*
187 * Copy architecture-specific thread state 226 * Copy architecture-specific thread state
188 */ 227 */
189int 228int
diff --git a/arch/parisc/mm/init.c b/arch/parisc/mm/init.c
index 13f7854e0d49..48f41399fc0b 100644
--- a/arch/parisc/mm/init.c
+++ b/arch/parisc/mm/init.c
@@ -631,11 +631,11 @@ void __init mem_init(void)
631 mem_init_print_info(NULL); 631 mem_init_print_info(NULL);
632#ifdef CONFIG_DEBUG_KERNEL /* double-sanity-check paranoia */ 632#ifdef CONFIG_DEBUG_KERNEL /* double-sanity-check paranoia */
633 printk("virtual kernel memory layout:\n" 633 printk("virtual kernel memory layout:\n"
634 " vmalloc : 0x%p - 0x%p (%4ld MB)\n" 634 " vmalloc : 0x%px - 0x%px (%4ld MB)\n"
635 " memory : 0x%p - 0x%p (%4ld MB)\n" 635 " memory : 0x%px - 0x%px (%4ld MB)\n"
636 " .init : 0x%p - 0x%p (%4ld kB)\n" 636 " .init : 0x%px - 0x%px (%4ld kB)\n"
637 " .data : 0x%p - 0x%p (%4ld kB)\n" 637 " .data : 0x%px - 0x%px (%4ld kB)\n"
638 " .text : 0x%p - 0x%p (%4ld kB)\n", 638 " .text : 0x%px - 0x%px (%4ld kB)\n",
639 639
640 (void*)VMALLOC_START, (void*)VMALLOC_END, 640 (void*)VMALLOC_START, (void*)VMALLOC_END,
641 (VMALLOC_END - VMALLOC_START) >> 20, 641 (VMALLOC_END - VMALLOC_START) >> 20,
diff --git a/arch/powerpc/mm/fault.c b/arch/powerpc/mm/fault.c
index 4797d08581ce..6e1e39035380 100644
--- a/arch/powerpc/mm/fault.c
+++ b/arch/powerpc/mm/fault.c
@@ -145,6 +145,11 @@ static noinline int bad_area(struct pt_regs *regs, unsigned long address)
145 return __bad_area(regs, address, SEGV_MAPERR); 145 return __bad_area(regs, address, SEGV_MAPERR);
146} 146}
147 147
148static noinline int bad_access(struct pt_regs *regs, unsigned long address)
149{
150 return __bad_area(regs, address, SEGV_ACCERR);
151}
152
148static int do_sigbus(struct pt_regs *regs, unsigned long address, 153static int do_sigbus(struct pt_regs *regs, unsigned long address,
149 unsigned int fault) 154 unsigned int fault)
150{ 155{
@@ -490,7 +495,7 @@ retry:
490 495
491good_area: 496good_area:
492 if (unlikely(access_error(is_write, is_exec, vma))) 497 if (unlikely(access_error(is_write, is_exec, vma)))
493 return bad_area(regs, address); 498 return bad_access(regs, address);
494 499
495 /* 500 /*
496 * If for any reason at all we couldn't handle the fault, 501 * If for any reason at all we couldn't handle the fault,
diff --git a/arch/s390/kvm/kvm-s390.c b/arch/s390/kvm/kvm-s390.c
index ec8b68e97d3c..2c93cbbcd15e 100644
--- a/arch/s390/kvm/kvm-s390.c
+++ b/arch/s390/kvm/kvm-s390.c
@@ -792,11 +792,12 @@ static int kvm_s390_vm_start_migration(struct kvm *kvm)
792 792
793 if (kvm->arch.use_cmma) { 793 if (kvm->arch.use_cmma) {
794 /* 794 /*
795 * Get the last slot. They should be sorted by base_gfn, so the 795 * Get the first slot. They are reverse sorted by base_gfn, so
796 * last slot is also the one at the end of the address space. 796 * the first slot is also the one at the end of the address
797 * We have verified above that at least one slot is present. 797 * space. We have verified above that at least one slot is
798 * present.
798 */ 799 */
799 ms = slots->memslots + slots->used_slots - 1; 800 ms = slots->memslots;
800 /* round up so we only use full longs */ 801 /* round up so we only use full longs */
801 ram_pages = roundup(ms->base_gfn + ms->npages, BITS_PER_LONG); 802 ram_pages = roundup(ms->base_gfn + ms->npages, BITS_PER_LONG);
802 /* allocate enough bytes to store all the bits */ 803 /* allocate enough bytes to store all the bits */
diff --git a/arch/s390/kvm/priv.c b/arch/s390/kvm/priv.c
index 572496c688cc..0714bfa56da0 100644
--- a/arch/s390/kvm/priv.c
+++ b/arch/s390/kvm/priv.c
@@ -1006,7 +1006,7 @@ static inline int do_essa(struct kvm_vcpu *vcpu, const int orc)
1006 cbrlo[entries] = gfn << PAGE_SHIFT; 1006 cbrlo[entries] = gfn << PAGE_SHIFT;
1007 } 1007 }
1008 1008
1009 if (orc) { 1009 if (orc && gfn < ms->bitmap_size) {
1010 /* increment only if we are really flipping the bit to 1 */ 1010 /* increment only if we are really flipping the bit to 1 */
1011 if (!test_and_set_bit(gfn, ms->pgste_bitmap)) 1011 if (!test_and_set_bit(gfn, ms->pgste_bitmap))
1012 atomic64_inc(&ms->dirty_pages); 1012 atomic64_inc(&ms->dirty_pages);
diff --git a/arch/s390/lib/uaccess.c b/arch/s390/lib/uaccess.c
index cae5a1e16cbd..c4f8039a35e8 100644
--- a/arch/s390/lib/uaccess.c
+++ b/arch/s390/lib/uaccess.c
@@ -89,11 +89,11 @@ EXPORT_SYMBOL(enable_sacf_uaccess);
89 89
90void disable_sacf_uaccess(mm_segment_t old_fs) 90void disable_sacf_uaccess(mm_segment_t old_fs)
91{ 91{
92 current->thread.mm_segment = old_fs;
92 if (old_fs == USER_DS && test_facility(27)) { 93 if (old_fs == USER_DS && test_facility(27)) {
93 __ctl_load(S390_lowcore.user_asce, 1, 1); 94 __ctl_load(S390_lowcore.user_asce, 1, 1);
94 clear_cpu_flag(CIF_ASCE_PRIMARY); 95 clear_cpu_flag(CIF_ASCE_PRIMARY);
95 } 96 }
96 current->thread.mm_segment = old_fs;
97} 97}
98EXPORT_SYMBOL(disable_sacf_uaccess); 98EXPORT_SYMBOL(disable_sacf_uaccess);
99 99
diff --git a/arch/s390/pci/pci_dma.c b/arch/s390/pci/pci_dma.c
index f7aa5a77827e..2d15d84c20ed 100644
--- a/arch/s390/pci/pci_dma.c
+++ b/arch/s390/pci/pci_dma.c
@@ -181,6 +181,9 @@ out_unlock:
181static int __dma_purge_tlb(struct zpci_dev *zdev, dma_addr_t dma_addr, 181static int __dma_purge_tlb(struct zpci_dev *zdev, dma_addr_t dma_addr,
182 size_t size, int flags) 182 size_t size, int flags)
183{ 183{
184 unsigned long irqflags;
185 int ret;
186
184 /* 187 /*
185 * With zdev->tlb_refresh == 0, rpcit is not required to establish new 188 * With zdev->tlb_refresh == 0, rpcit is not required to establish new
186 * translations when previously invalid translation-table entries are 189 * translations when previously invalid translation-table entries are
@@ -196,8 +199,22 @@ static int __dma_purge_tlb(struct zpci_dev *zdev, dma_addr_t dma_addr,
196 return 0; 199 return 0;
197 } 200 }
198 201
199 return zpci_refresh_trans((u64) zdev->fh << 32, dma_addr, 202 ret = zpci_refresh_trans((u64) zdev->fh << 32, dma_addr,
200 PAGE_ALIGN(size)); 203 PAGE_ALIGN(size));
204 if (ret == -ENOMEM && !s390_iommu_strict) {
205 /* enable the hypervisor to free some resources */
206 if (zpci_refresh_global(zdev))
207 goto out;
208
209 spin_lock_irqsave(&zdev->iommu_bitmap_lock, irqflags);
210 bitmap_andnot(zdev->iommu_bitmap, zdev->iommu_bitmap,
211 zdev->lazy_bitmap, zdev->iommu_pages);
212 bitmap_zero(zdev->lazy_bitmap, zdev->iommu_pages);
213 spin_unlock_irqrestore(&zdev->iommu_bitmap_lock, irqflags);
214 ret = 0;
215 }
216out:
217 return ret;
201} 218}
202 219
203static int dma_update_trans(struct zpci_dev *zdev, unsigned long pa, 220static int dma_update_trans(struct zpci_dev *zdev, unsigned long pa,
diff --git a/arch/s390/pci/pci_insn.c b/arch/s390/pci/pci_insn.c
index 19bcb3b45a70..f069929e8211 100644
--- a/arch/s390/pci/pci_insn.c
+++ b/arch/s390/pci/pci_insn.c
@@ -89,6 +89,9 @@ int zpci_refresh_trans(u64 fn, u64 addr, u64 range)
89 if (cc) 89 if (cc)
90 zpci_err_insn(cc, status, addr, range); 90 zpci_err_insn(cc, status, addr, range);
91 91
92 if (cc == 1 && (status == 4 || status == 16))
93 return -ENOMEM;
94
92 return (cc) ? -EIO : 0; 95 return (cc) ? -EIO : 0;
93} 96}
94 97
diff --git a/arch/unicore32/kernel/traps.c b/arch/unicore32/kernel/traps.c
index 5f25b39f04d4..c4ac6043ebb0 100644
--- a/arch/unicore32/kernel/traps.c
+++ b/arch/unicore32/kernel/traps.c
@@ -298,7 +298,6 @@ void abort(void)
298 /* if that doesn't kill us, halt */ 298 /* if that doesn't kill us, halt */
299 panic("Oops failed to kill thread"); 299 panic("Oops failed to kill thread");
300} 300}
301EXPORT_SYMBOL(abort);
302 301
303void __init trap_init(void) 302void __init trap_init(void)
304{ 303{
diff --git a/arch/x86/entry/entry_64_compat.S b/arch/x86/entry/entry_64_compat.S
index 40f17009ec20..98d5358e4041 100644
--- a/arch/x86/entry/entry_64_compat.S
+++ b/arch/x86/entry/entry_64_compat.S
@@ -190,8 +190,13 @@ ENTRY(entry_SYSCALL_compat)
190 /* Interrupts are off on entry. */ 190 /* Interrupts are off on entry. */
191 swapgs 191 swapgs
192 192
193 /* Stash user ESP and switch to the kernel stack. */ 193 /* Stash user ESP */
194 movl %esp, %r8d 194 movl %esp, %r8d
195
196 /* Use %rsp as scratch reg. User ESP is stashed in r8 */
197 SWITCH_TO_KERNEL_CR3 scratch_reg=%rsp
198
199 /* Switch to the kernel stack */
195 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp 200 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
196 201
197 /* Construct struct pt_regs on stack */ 202 /* Construct struct pt_regs on stack */
@@ -220,12 +225,6 @@ GLOBAL(entry_SYSCALL_compat_after_hwframe)
220 pushq $0 /* pt_regs->r15 = 0 */ 225 pushq $0 /* pt_regs->r15 = 0 */
221 226
222 /* 227 /*
223 * We just saved %rdi so it is safe to clobber. It is not
224 * preserved during the C calls inside TRACE_IRQS_OFF anyway.
225 */
226 SWITCH_TO_KERNEL_CR3 scratch_reg=%rdi
227
228 /*
229 * User mode is traced as though IRQs are on, and SYSENTER 228 * User mode is traced as though IRQs are on, and SYSENTER
230 * turned them off. 229 * turned them off.
231 */ 230 */
diff --git a/arch/x86/events/intel/ds.c b/arch/x86/events/intel/ds.c
index 8f0aace08b87..8156e47da7ba 100644
--- a/arch/x86/events/intel/ds.c
+++ b/arch/x86/events/intel/ds.c
@@ -5,6 +5,7 @@
5 5
6#include <asm/cpu_entry_area.h> 6#include <asm/cpu_entry_area.h>
7#include <asm/perf_event.h> 7#include <asm/perf_event.h>
8#include <asm/tlbflush.h>
8#include <asm/insn.h> 9#include <asm/insn.h>
9 10
10#include "../perf_event.h" 11#include "../perf_event.h"
@@ -283,20 +284,35 @@ static DEFINE_PER_CPU(void *, insn_buffer);
283 284
284static void ds_update_cea(void *cea, void *addr, size_t size, pgprot_t prot) 285static void ds_update_cea(void *cea, void *addr, size_t size, pgprot_t prot)
285{ 286{
287 unsigned long start = (unsigned long)cea;
286 phys_addr_t pa; 288 phys_addr_t pa;
287 size_t msz = 0; 289 size_t msz = 0;
288 290
289 pa = virt_to_phys(addr); 291 pa = virt_to_phys(addr);
292
293 preempt_disable();
290 for (; msz < size; msz += PAGE_SIZE, pa += PAGE_SIZE, cea += PAGE_SIZE) 294 for (; msz < size; msz += PAGE_SIZE, pa += PAGE_SIZE, cea += PAGE_SIZE)
291 cea_set_pte(cea, pa, prot); 295 cea_set_pte(cea, pa, prot);
296
297 /*
298 * This is a cross-CPU update of the cpu_entry_area, we must shoot down
299 * all TLB entries for it.
300 */
301 flush_tlb_kernel_range(start, start + size);
302 preempt_enable();
292} 303}
293 304
294static void ds_clear_cea(void *cea, size_t size) 305static void ds_clear_cea(void *cea, size_t size)
295{ 306{
307 unsigned long start = (unsigned long)cea;
296 size_t msz = 0; 308 size_t msz = 0;
297 309
310 preempt_disable();
298 for (; msz < size; msz += PAGE_SIZE, cea += PAGE_SIZE) 311 for (; msz < size; msz += PAGE_SIZE, cea += PAGE_SIZE)
299 cea_set_pte(cea, 0, PAGE_NONE); 312 cea_set_pte(cea, 0, PAGE_NONE);
313
314 flush_tlb_kernel_range(start, start + size);
315 preempt_enable();
300} 316}
301 317
302static void *dsalloc_pages(size_t size, gfp_t flags, int cpu) 318static void *dsalloc_pages(size_t size, gfp_t flags, int cpu)
diff --git a/arch/x86/include/asm/alternative.h b/arch/x86/include/asm/alternative.h
index dbfd0854651f..cf5961ca8677 100644
--- a/arch/x86/include/asm/alternative.h
+++ b/arch/x86/include/asm/alternative.h
@@ -140,7 +140,7 @@ static inline int alternatives_text_reserved(void *start, void *end)
140 ".popsection\n" \ 140 ".popsection\n" \
141 ".pushsection .altinstr_replacement, \"ax\"\n" \ 141 ".pushsection .altinstr_replacement, \"ax\"\n" \
142 ALTINSTR_REPLACEMENT(newinstr, feature, 1) \ 142 ALTINSTR_REPLACEMENT(newinstr, feature, 1) \
143 ".popsection" 143 ".popsection\n"
144 144
145#define ALTERNATIVE_2(oldinstr, newinstr1, feature1, newinstr2, feature2)\ 145#define ALTERNATIVE_2(oldinstr, newinstr1, feature1, newinstr2, feature2)\
146 OLDINSTR_2(oldinstr, 1, 2) \ 146 OLDINSTR_2(oldinstr, 1, 2) \
@@ -151,7 +151,7 @@ static inline int alternatives_text_reserved(void *start, void *end)
151 ".pushsection .altinstr_replacement, \"ax\"\n" \ 151 ".pushsection .altinstr_replacement, \"ax\"\n" \
152 ALTINSTR_REPLACEMENT(newinstr1, feature1, 1) \ 152 ALTINSTR_REPLACEMENT(newinstr1, feature1, 1) \
153 ALTINSTR_REPLACEMENT(newinstr2, feature2, 2) \ 153 ALTINSTR_REPLACEMENT(newinstr2, feature2, 2) \
154 ".popsection" 154 ".popsection\n"
155 155
156/* 156/*
157 * Alternative instructions for different CPU types or capabilities. 157 * Alternative instructions for different CPU types or capabilities.
diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index 07cdd1715705..21ac898df2d8 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -341,6 +341,6 @@
341#define X86_BUG_SWAPGS_FENCE X86_BUG(11) /* SWAPGS without input dep on GS */ 341#define X86_BUG_SWAPGS_FENCE X86_BUG(11) /* SWAPGS without input dep on GS */
342#define X86_BUG_MONITOR X86_BUG(12) /* IPI required to wake up remote CPU */ 342#define X86_BUG_MONITOR X86_BUG(12) /* IPI required to wake up remote CPU */
343#define X86_BUG_AMD_E400 X86_BUG(13) /* CPU is among the affected by Erratum 400 */ 343#define X86_BUG_AMD_E400 X86_BUG(13) /* CPU is among the affected by Erratum 400 */
344#define X86_BUG_CPU_INSECURE X86_BUG(14) /* CPU is insecure and needs kernel page table isolation */ 344#define X86_BUG_CPU_MELTDOWN X86_BUG(14) /* CPU is affected by meltdown attack and needs kernel page table isolation */
345 345
346#endif /* _ASM_X86_CPUFEATURES_H */ 346#endif /* _ASM_X86_CPUFEATURES_H */
diff --git a/arch/x86/include/asm/pgtable_64_types.h b/arch/x86/include/asm/pgtable_64_types.h
index b97a539bcdee..6b8f73dcbc2c 100644
--- a/arch/x86/include/asm/pgtable_64_types.h
+++ b/arch/x86/include/asm/pgtable_64_types.h
@@ -75,7 +75,13 @@ typedef struct { pteval_t pte; } pte_t;
75#define PGDIR_SIZE (_AC(1, UL) << PGDIR_SHIFT) 75#define PGDIR_SIZE (_AC(1, UL) << PGDIR_SHIFT)
76#define PGDIR_MASK (~(PGDIR_SIZE - 1)) 76#define PGDIR_MASK (~(PGDIR_SIZE - 1))
77 77
78/* See Documentation/x86/x86_64/mm.txt for a description of the memory map. */ 78/*
79 * See Documentation/x86/x86_64/mm.txt for a description of the memory map.
80 *
81 * Be very careful vs. KASLR when changing anything here. The KASLR address
82 * range must not overlap with anything except the KASAN shadow area, which
83 * is correct as KASAN disables KASLR.
84 */
79#define MAXMEM _AC(__AC(1, UL) << MAX_PHYSMEM_BITS, UL) 85#define MAXMEM _AC(__AC(1, UL) << MAX_PHYSMEM_BITS, UL)
80 86
81#ifdef CONFIG_X86_5LEVEL 87#ifdef CONFIG_X86_5LEVEL
@@ -88,7 +94,7 @@ typedef struct { pteval_t pte; } pte_t;
88# define VMALLOC_SIZE_TB _AC(32, UL) 94# define VMALLOC_SIZE_TB _AC(32, UL)
89# define __VMALLOC_BASE _AC(0xffffc90000000000, UL) 95# define __VMALLOC_BASE _AC(0xffffc90000000000, UL)
90# define __VMEMMAP_BASE _AC(0xffffea0000000000, UL) 96# define __VMEMMAP_BASE _AC(0xffffea0000000000, UL)
91# define LDT_PGD_ENTRY _AC(-4, UL) 97# define LDT_PGD_ENTRY _AC(-3, UL)
92# define LDT_BASE_ADDR (LDT_PGD_ENTRY << PGDIR_SHIFT) 98# define LDT_BASE_ADDR (LDT_PGD_ENTRY << PGDIR_SHIFT)
93#endif 99#endif
94 100
@@ -104,13 +110,13 @@ typedef struct { pteval_t pte; } pte_t;
104 110
105#define MODULES_VADDR (__START_KERNEL_map + KERNEL_IMAGE_SIZE) 111#define MODULES_VADDR (__START_KERNEL_map + KERNEL_IMAGE_SIZE)
106/* The module sections ends with the start of the fixmap */ 112/* The module sections ends with the start of the fixmap */
107#define MODULES_END __fix_to_virt(__end_of_fixed_addresses + 1) 113#define MODULES_END _AC(0xffffffffff000000, UL)
108#define MODULES_LEN (MODULES_END - MODULES_VADDR) 114#define MODULES_LEN (MODULES_END - MODULES_VADDR)
109 115
110#define ESPFIX_PGD_ENTRY _AC(-2, UL) 116#define ESPFIX_PGD_ENTRY _AC(-2, UL)
111#define ESPFIX_BASE_ADDR (ESPFIX_PGD_ENTRY << P4D_SHIFT) 117#define ESPFIX_BASE_ADDR (ESPFIX_PGD_ENTRY << P4D_SHIFT)
112 118
113#define CPU_ENTRY_AREA_PGD _AC(-3, UL) 119#define CPU_ENTRY_AREA_PGD _AC(-4, UL)
114#define CPU_ENTRY_AREA_BASE (CPU_ENTRY_AREA_PGD << P4D_SHIFT) 120#define CPU_ENTRY_AREA_BASE (CPU_ENTRY_AREA_PGD << P4D_SHIFT)
115 121
116#define EFI_VA_START ( -4 * (_AC(1, UL) << 30)) 122#define EFI_VA_START ( -4 * (_AC(1, UL) << 30))
diff --git a/arch/x86/include/asm/unwind.h b/arch/x86/include/asm/unwind.h
index c1688c2d0a12..1f86e1b0a5cd 100644
--- a/arch/x86/include/asm/unwind.h
+++ b/arch/x86/include/asm/unwind.h
@@ -56,18 +56,27 @@ void unwind_start(struct unwind_state *state, struct task_struct *task,
56 56
57#if defined(CONFIG_UNWINDER_ORC) || defined(CONFIG_UNWINDER_FRAME_POINTER) 57#if defined(CONFIG_UNWINDER_ORC) || defined(CONFIG_UNWINDER_FRAME_POINTER)
58/* 58/*
59 * WARNING: The entire pt_regs may not be safe to dereference. In some cases, 59 * If 'partial' returns true, only the iret frame registers are valid.
60 * only the iret frame registers are accessible. Use with caution!
61 */ 60 */
62static inline struct pt_regs *unwind_get_entry_regs(struct unwind_state *state) 61static inline struct pt_regs *unwind_get_entry_regs(struct unwind_state *state,
62 bool *partial)
63{ 63{
64 if (unwind_done(state)) 64 if (unwind_done(state))
65 return NULL; 65 return NULL;
66 66
67 if (partial) {
68#ifdef CONFIG_UNWINDER_ORC
69 *partial = !state->full_regs;
70#else
71 *partial = false;
72#endif
73 }
74
67 return state->regs; 75 return state->regs;
68} 76}
69#else 77#else
70static inline struct pt_regs *unwind_get_entry_regs(struct unwind_state *state) 78static inline struct pt_regs *unwind_get_entry_regs(struct unwind_state *state,
79 bool *partial)
71{ 80{
72 return NULL; 81 return NULL;
73} 82}
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index c47de4ebf63a..39d7ea865207 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -923,8 +923,8 @@ static void __init early_identify_cpu(struct cpuinfo_x86 *c)
923 923
924 setup_force_cpu_cap(X86_FEATURE_ALWAYS); 924 setup_force_cpu_cap(X86_FEATURE_ALWAYS);
925 925
926 /* Assume for now that ALL x86 CPUs are insecure */ 926 if (c->x86_vendor != X86_VENDOR_AMD)
927 setup_force_cpu_bug(X86_BUG_CPU_INSECURE); 927 setup_force_cpu_bug(X86_BUG_CPU_MELTDOWN);
928 928
929 fpu__init_system(c); 929 fpu__init_system(c);
930 930
diff --git a/arch/x86/kernel/dumpstack.c b/arch/x86/kernel/dumpstack.c
index 5fa110699ed2..afbecff161d1 100644
--- a/arch/x86/kernel/dumpstack.c
+++ b/arch/x86/kernel/dumpstack.c
@@ -76,12 +76,23 @@ void show_iret_regs(struct pt_regs *regs)
76 regs->sp, regs->flags); 76 regs->sp, regs->flags);
77} 77}
78 78
79static void show_regs_safe(struct stack_info *info, struct pt_regs *regs) 79static void show_regs_if_on_stack(struct stack_info *info, struct pt_regs *regs,
80 bool partial)
80{ 81{
81 if (on_stack(info, regs, sizeof(*regs))) 82 /*
83 * These on_stack() checks aren't strictly necessary: the unwind code
84 * has already validated the 'regs' pointer. The checks are done for
85 * ordering reasons: if the registers are on the next stack, we don't
86 * want to print them out yet. Otherwise they'll be shown as part of
87 * the wrong stack. Later, when show_trace_log_lvl() switches to the
88 * next stack, this function will be called again with the same regs so
89 * they can be printed in the right context.
90 */
91 if (!partial && on_stack(info, regs, sizeof(*regs))) {
82 __show_regs(regs, 0); 92 __show_regs(regs, 0);
83 else if (on_stack(info, (void *)regs + IRET_FRAME_OFFSET, 93
84 IRET_FRAME_SIZE)) { 94 } else if (partial && on_stack(info, (void *)regs + IRET_FRAME_OFFSET,
95 IRET_FRAME_SIZE)) {
85 /* 96 /*
86 * When an interrupt or exception occurs in entry code, the 97 * When an interrupt or exception occurs in entry code, the
87 * full pt_regs might not have been saved yet. In that case 98 * full pt_regs might not have been saved yet. In that case
@@ -98,11 +109,13 @@ void show_trace_log_lvl(struct task_struct *task, struct pt_regs *regs,
98 struct stack_info stack_info = {0}; 109 struct stack_info stack_info = {0};
99 unsigned long visit_mask = 0; 110 unsigned long visit_mask = 0;
100 int graph_idx = 0; 111 int graph_idx = 0;
112 bool partial;
101 113
102 printk("%sCall Trace:\n", log_lvl); 114 printk("%sCall Trace:\n", log_lvl);
103 115
104 unwind_start(&state, task, regs, stack); 116 unwind_start(&state, task, regs, stack);
105 stack = stack ? : get_stack_pointer(task, regs); 117 stack = stack ? : get_stack_pointer(task, regs);
118 regs = unwind_get_entry_regs(&state, &partial);
106 119
107 /* 120 /*
108 * Iterate through the stacks, starting with the current stack pointer. 121 * Iterate through the stacks, starting with the current stack pointer.
@@ -120,7 +133,7 @@ void show_trace_log_lvl(struct task_struct *task, struct pt_regs *regs,
120 * - hardirq stack 133 * - hardirq stack
121 * - entry stack 134 * - entry stack
122 */ 135 */
123 for (regs = NULL; stack; stack = PTR_ALIGN(stack_info.next_sp, sizeof(long))) { 136 for ( ; stack; stack = PTR_ALIGN(stack_info.next_sp, sizeof(long))) {
124 const char *stack_name; 137 const char *stack_name;
125 138
126 if (get_stack_info(stack, task, &stack_info, &visit_mask)) { 139 if (get_stack_info(stack, task, &stack_info, &visit_mask)) {
@@ -140,7 +153,7 @@ void show_trace_log_lvl(struct task_struct *task, struct pt_regs *regs,
140 printk("%s <%s>\n", log_lvl, stack_name); 153 printk("%s <%s>\n", log_lvl, stack_name);
141 154
142 if (regs) 155 if (regs)
143 show_regs_safe(&stack_info, regs); 156 show_regs_if_on_stack(&stack_info, regs, partial);
144 157
145 /* 158 /*
146 * Scan the stack, printing any text addresses we find. At the 159 * Scan the stack, printing any text addresses we find. At the
@@ -164,7 +177,7 @@ void show_trace_log_lvl(struct task_struct *task, struct pt_regs *regs,
164 177
165 /* 178 /*
166 * Don't print regs->ip again if it was already printed 179 * Don't print regs->ip again if it was already printed
167 * by show_regs_safe() below. 180 * by show_regs_if_on_stack().
168 */ 181 */
169 if (regs && stack == &regs->ip) 182 if (regs && stack == &regs->ip)
170 goto next; 183 goto next;
@@ -199,9 +212,9 @@ next:
199 unwind_next_frame(&state); 212 unwind_next_frame(&state);
200 213
201 /* if the frame has entry regs, print them */ 214 /* if the frame has entry regs, print them */
202 regs = unwind_get_entry_regs(&state); 215 regs = unwind_get_entry_regs(&state, &partial);
203 if (regs) 216 if (regs)
204 show_regs_safe(&stack_info, regs); 217 show_regs_if_on_stack(&stack_info, regs, partial);
205 } 218 }
206 219
207 if (stack_name) 220 if (stack_name)
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
index aed9d94bd46f..832a6acd730f 100644
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -47,7 +47,7 @@
47 * section. Since TSS's are completely CPU-local, we want them 47 * section. Since TSS's are completely CPU-local, we want them
48 * on exact cacheline boundaries, to eliminate cacheline ping-pong. 48 * on exact cacheline boundaries, to eliminate cacheline ping-pong.
49 */ 49 */
50__visible DEFINE_PER_CPU_SHARED_ALIGNED(struct tss_struct, cpu_tss_rw) = { 50__visible DEFINE_PER_CPU_PAGE_ALIGNED(struct tss_struct, cpu_tss_rw) = {
51 .x86_tss = { 51 .x86_tss = {
52 /* 52 /*
53 * .sp0 is only used when entering ring 0 from a lower 53 * .sp0 is only used when entering ring 0 from a lower
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index 8af2e8d0c0a1..145810b0edf6 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -906,9 +906,6 @@ void __init setup_arch(char **cmdline_p)
906 set_bit(EFI_BOOT, &efi.flags); 906 set_bit(EFI_BOOT, &efi.flags);
907 set_bit(EFI_64BIT, &efi.flags); 907 set_bit(EFI_64BIT, &efi.flags);
908 } 908 }
909
910 if (efi_enabled(EFI_BOOT))
911 efi_memblock_x86_reserve_range();
912#endif 909#endif
913 910
914 x86_init.oem.arch_setup(); 911 x86_init.oem.arch_setup();
@@ -962,6 +959,8 @@ void __init setup_arch(char **cmdline_p)
962 959
963 parse_early_param(); 960 parse_early_param();
964 961
962 if (efi_enabled(EFI_BOOT))
963 efi_memblock_x86_reserve_range();
965#ifdef CONFIG_MEMORY_HOTPLUG 964#ifdef CONFIG_MEMORY_HOTPLUG
966 /* 965 /*
967 * Memory used by the kernel cannot be hot-removed because Linux 966 * Memory used by the kernel cannot be hot-removed because Linux
diff --git a/arch/x86/kernel/stacktrace.c b/arch/x86/kernel/stacktrace.c
index 20161ef53537..093f2ea5dd56 100644
--- a/arch/x86/kernel/stacktrace.c
+++ b/arch/x86/kernel/stacktrace.c
@@ -102,7 +102,7 @@ __save_stack_trace_reliable(struct stack_trace *trace,
102 for (unwind_start(&state, task, NULL, NULL); !unwind_done(&state); 102 for (unwind_start(&state, task, NULL, NULL); !unwind_done(&state);
103 unwind_next_frame(&state)) { 103 unwind_next_frame(&state)) {
104 104
105 regs = unwind_get_entry_regs(&state); 105 regs = unwind_get_entry_regs(&state, NULL);
106 if (regs) { 106 if (regs) {
107 /* 107 /*
108 * Kernel mode registers on the stack indicate an 108 * Kernel mode registers on the stack indicate an
diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index eb714f1cdf7e..bb31c801f1fc 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -4986,6 +4986,25 @@ static void svm_vcpu_run(struct kvm_vcpu *vcpu)
4986 "mov %%r14, %c[r14](%[svm]) \n\t" 4986 "mov %%r14, %c[r14](%[svm]) \n\t"
4987 "mov %%r15, %c[r15](%[svm]) \n\t" 4987 "mov %%r15, %c[r15](%[svm]) \n\t"
4988#endif 4988#endif
4989 /*
4990 * Clear host registers marked as clobbered to prevent
4991 * speculative use.
4992 */
4993 "xor %%" _ASM_BX ", %%" _ASM_BX " \n\t"
4994 "xor %%" _ASM_CX ", %%" _ASM_CX " \n\t"
4995 "xor %%" _ASM_DX ", %%" _ASM_DX " \n\t"
4996 "xor %%" _ASM_SI ", %%" _ASM_SI " \n\t"
4997 "xor %%" _ASM_DI ", %%" _ASM_DI " \n\t"
4998#ifdef CONFIG_X86_64
4999 "xor %%r8, %%r8 \n\t"
5000 "xor %%r9, %%r9 \n\t"
5001 "xor %%r10, %%r10 \n\t"
5002 "xor %%r11, %%r11 \n\t"
5003 "xor %%r12, %%r12 \n\t"
5004 "xor %%r13, %%r13 \n\t"
5005 "xor %%r14, %%r14 \n\t"
5006 "xor %%r15, %%r15 \n\t"
5007#endif
4989 "pop %%" _ASM_BP 5008 "pop %%" _ASM_BP
4990 : 5009 :
4991 : [svm]"a"(svm), 5010 : [svm]"a"(svm),
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index 023afa0c8887..5c14d65f676a 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -9415,6 +9415,7 @@ static void __noclone vmx_vcpu_run(struct kvm_vcpu *vcpu)
9415 /* Save guest registers, load host registers, keep flags */ 9415 /* Save guest registers, load host registers, keep flags */
9416 "mov %0, %c[wordsize](%%" _ASM_SP ") \n\t" 9416 "mov %0, %c[wordsize](%%" _ASM_SP ") \n\t"
9417 "pop %0 \n\t" 9417 "pop %0 \n\t"
9418 "setbe %c[fail](%0)\n\t"
9418 "mov %%" _ASM_AX ", %c[rax](%0) \n\t" 9419 "mov %%" _ASM_AX ", %c[rax](%0) \n\t"
9419 "mov %%" _ASM_BX ", %c[rbx](%0) \n\t" 9420 "mov %%" _ASM_BX ", %c[rbx](%0) \n\t"
9420 __ASM_SIZE(pop) " %c[rcx](%0) \n\t" 9421 __ASM_SIZE(pop) " %c[rcx](%0) \n\t"
@@ -9431,12 +9432,23 @@ static void __noclone vmx_vcpu_run(struct kvm_vcpu *vcpu)
9431 "mov %%r13, %c[r13](%0) \n\t" 9432 "mov %%r13, %c[r13](%0) \n\t"
9432 "mov %%r14, %c[r14](%0) \n\t" 9433 "mov %%r14, %c[r14](%0) \n\t"
9433 "mov %%r15, %c[r15](%0) \n\t" 9434 "mov %%r15, %c[r15](%0) \n\t"
9435 "xor %%r8d, %%r8d \n\t"
9436 "xor %%r9d, %%r9d \n\t"
9437 "xor %%r10d, %%r10d \n\t"
9438 "xor %%r11d, %%r11d \n\t"
9439 "xor %%r12d, %%r12d \n\t"
9440 "xor %%r13d, %%r13d \n\t"
9441 "xor %%r14d, %%r14d \n\t"
9442 "xor %%r15d, %%r15d \n\t"
9434#endif 9443#endif
9435 "mov %%cr2, %%" _ASM_AX " \n\t" 9444 "mov %%cr2, %%" _ASM_AX " \n\t"
9436 "mov %%" _ASM_AX ", %c[cr2](%0) \n\t" 9445 "mov %%" _ASM_AX ", %c[cr2](%0) \n\t"
9437 9446
9447 "xor %%eax, %%eax \n\t"
9448 "xor %%ebx, %%ebx \n\t"
9449 "xor %%esi, %%esi \n\t"
9450 "xor %%edi, %%edi \n\t"
9438 "pop %%" _ASM_BP "; pop %%" _ASM_DX " \n\t" 9451 "pop %%" _ASM_BP "; pop %%" _ASM_DX " \n\t"
9439 "setbe %c[fail](%0) \n\t"
9440 ".pushsection .rodata \n\t" 9452 ".pushsection .rodata \n\t"
9441 ".global vmx_return \n\t" 9453 ".global vmx_return \n\t"
9442 "vmx_return: " _ASM_PTR " 2b \n\t" 9454 "vmx_return: " _ASM_PTR " 2b \n\t"
diff --git a/arch/x86/mm/dump_pagetables.c b/arch/x86/mm/dump_pagetables.c
index f56902c1f04b..2a4849e92831 100644
--- a/arch/x86/mm/dump_pagetables.c
+++ b/arch/x86/mm/dump_pagetables.c
@@ -61,10 +61,10 @@ enum address_markers_idx {
61 KASAN_SHADOW_START_NR, 61 KASAN_SHADOW_START_NR,
62 KASAN_SHADOW_END_NR, 62 KASAN_SHADOW_END_NR,
63#endif 63#endif
64 CPU_ENTRY_AREA_NR,
64#if defined(CONFIG_MODIFY_LDT_SYSCALL) && !defined(CONFIG_X86_5LEVEL) 65#if defined(CONFIG_MODIFY_LDT_SYSCALL) && !defined(CONFIG_X86_5LEVEL)
65 LDT_NR, 66 LDT_NR,
66#endif 67#endif
67 CPU_ENTRY_AREA_NR,
68#ifdef CONFIG_X86_ESPFIX64 68#ifdef CONFIG_X86_ESPFIX64
69 ESPFIX_START_NR, 69 ESPFIX_START_NR,
70#endif 70#endif
diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c
index 8ca324d07282..82f5252c723a 100644
--- a/arch/x86/mm/init.c
+++ b/arch/x86/mm/init.c
@@ -868,7 +868,7 @@ __visible DEFINE_PER_CPU_SHARED_ALIGNED(struct tlb_state, cpu_tlbstate) = {
868 .next_asid = 1, 868 .next_asid = 1,
869 .cr4 = ~0UL, /* fail hard if we screw up cr4 shadow initialization */ 869 .cr4 = ~0UL, /* fail hard if we screw up cr4 shadow initialization */
870}; 870};
871EXPORT_SYMBOL_GPL(cpu_tlbstate); 871EXPORT_PER_CPU_SYMBOL(cpu_tlbstate);
872 872
873void update_cache_mode_entry(unsigned entry, enum page_cache_mode cache) 873void update_cache_mode_entry(unsigned entry, enum page_cache_mode cache)
874{ 874{
diff --git a/arch/x86/mm/kaslr.c b/arch/x86/mm/kaslr.c
index 879ef930e2c2..aedebd2ebf1e 100644
--- a/arch/x86/mm/kaslr.c
+++ b/arch/x86/mm/kaslr.c
@@ -34,25 +34,14 @@
34#define TB_SHIFT 40 34#define TB_SHIFT 40
35 35
36/* 36/*
37 * Virtual address start and end range for randomization. The end changes base 37 * Virtual address start and end range for randomization.
38 * on configuration to have the highest amount of space for randomization.
39 * It increases the possible random position for each randomized region.
40 * 38 *
41 * You need to add an if/def entry if you introduce a new memory region 39 * The end address could depend on more configuration options to make the
42 * compatible with KASLR. Your entry must be in logical order with memory 40 * highest amount of space for randomization available, but that's too hard
43 * layout. For example, ESPFIX is before EFI because its virtual address is 41 * to keep straight and caused issues already.
44 * before. You also need to add a BUILD_BUG_ON() in kernel_randomize_memory() to
45 * ensure that this order is correct and won't be changed.
46 */ 42 */
47static const unsigned long vaddr_start = __PAGE_OFFSET_BASE; 43static const unsigned long vaddr_start = __PAGE_OFFSET_BASE;
48 44static const unsigned long vaddr_end = CPU_ENTRY_AREA_BASE;
49#if defined(CONFIG_X86_ESPFIX64)
50static const unsigned long vaddr_end = ESPFIX_BASE_ADDR;
51#elif defined(CONFIG_EFI)
52static const unsigned long vaddr_end = EFI_VA_END;
53#else
54static const unsigned long vaddr_end = __START_KERNEL_map;
55#endif
56 45
57/* Default values */ 46/* Default values */
58unsigned long page_offset_base = __PAGE_OFFSET_BASE; 47unsigned long page_offset_base = __PAGE_OFFSET_BASE;
@@ -101,15 +90,12 @@ void __init kernel_randomize_memory(void)
101 unsigned long remain_entropy; 90 unsigned long remain_entropy;
102 91
103 /* 92 /*
104 * All these BUILD_BUG_ON checks ensures the memory layout is 93 * These BUILD_BUG_ON checks ensure the memory layout is consistent
105 * consistent with the vaddr_start/vaddr_end variables. 94 * with the vaddr_start/vaddr_end variables. These checks are very
95 * limited....
106 */ 96 */
107 BUILD_BUG_ON(vaddr_start >= vaddr_end); 97 BUILD_BUG_ON(vaddr_start >= vaddr_end);
108 BUILD_BUG_ON(IS_ENABLED(CONFIG_X86_ESPFIX64) && 98 BUILD_BUG_ON(vaddr_end != CPU_ENTRY_AREA_BASE);
109 vaddr_end >= EFI_VA_END);
110 BUILD_BUG_ON((IS_ENABLED(CONFIG_X86_ESPFIX64) ||
111 IS_ENABLED(CONFIG_EFI)) &&
112 vaddr_end >= __START_KERNEL_map);
113 BUILD_BUG_ON(vaddr_end > __START_KERNEL_map); 99 BUILD_BUG_ON(vaddr_end > __START_KERNEL_map);
114 100
115 if (!kaslr_memory_enabled()) 101 if (!kaslr_memory_enabled())
diff --git a/arch/x86/mm/pti.c b/arch/x86/mm/pti.c
index bce8aea65606..43d4a4a29037 100644
--- a/arch/x86/mm/pti.c
+++ b/arch/x86/mm/pti.c
@@ -56,13 +56,13 @@
56 56
57static void __init pti_print_if_insecure(const char *reason) 57static void __init pti_print_if_insecure(const char *reason)
58{ 58{
59 if (boot_cpu_has_bug(X86_BUG_CPU_INSECURE)) 59 if (boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
60 pr_info("%s\n", reason); 60 pr_info("%s\n", reason);
61} 61}
62 62
63static void __init pti_print_if_secure(const char *reason) 63static void __init pti_print_if_secure(const char *reason)
64{ 64{
65 if (!boot_cpu_has_bug(X86_BUG_CPU_INSECURE)) 65 if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
66 pr_info("%s\n", reason); 66 pr_info("%s\n", reason);
67} 67}
68 68
@@ -96,7 +96,7 @@ void __init pti_check_boottime_disable(void)
96 } 96 }
97 97
98autosel: 98autosel:
99 if (!boot_cpu_has_bug(X86_BUG_CPU_INSECURE)) 99 if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
100 return; 100 return;
101enable: 101enable:
102 setup_force_cpu_cap(X86_FEATURE_PTI); 102 setup_force_cpu_cap(X86_FEATURE_PTI);
@@ -367,7 +367,8 @@ static void __init pti_setup_espfix64(void)
367static void __init pti_clone_entry_text(void) 367static void __init pti_clone_entry_text(void)
368{ 368{
369 pti_clone_pmds((unsigned long) __entry_text_start, 369 pti_clone_pmds((unsigned long) __entry_text_start,
370 (unsigned long) __irqentry_text_end, _PAGE_RW); 370 (unsigned long) __irqentry_text_end,
371 _PAGE_RW | _PAGE_GLOBAL);
371} 372}
372 373
373/* 374/*
diff --git a/arch/x86/platform/efi/quirks.c b/arch/x86/platform/efi/quirks.c
index 8a99a2e96537..5b513ccffde4 100644
--- a/arch/x86/platform/efi/quirks.c
+++ b/arch/x86/platform/efi/quirks.c
@@ -592,7 +592,18 @@ static int qrk_capsule_setup_info(struct capsule_info *cap_info, void **pkbuff,
592 /* 592 /*
593 * Update the first page pointer to skip over the CSH header. 593 * Update the first page pointer to skip over the CSH header.
594 */ 594 */
595 cap_info->pages[0] += csh->headersize; 595 cap_info->phys[0] += csh->headersize;
596
597 /*
598 * cap_info->capsule should point at a virtual mapping of the entire
599 * capsule, starting at the capsule header. Our image has the Quark
600 * security header prepended, so we cannot rely on the default vmap()
601 * mapping created by the generic capsule code.
602 * Given that the Quark firmware does not appear to care about the
603 * virtual mapping, let's just point cap_info->capsule at our copy
604 * of the capsule header.
605 */
606 cap_info->capsule = &cap_info->header;
596 607
597 return 1; 608 return 1;
598} 609}
diff --git a/crypto/af_alg.c b/crypto/af_alg.c
index 444a387df219..35d4dcea381f 100644
--- a/crypto/af_alg.c
+++ b/crypto/af_alg.c
@@ -664,7 +664,7 @@ void af_alg_free_areq_sgls(struct af_alg_async_req *areq)
664 unsigned int i; 664 unsigned int i;
665 665
666 list_for_each_entry_safe(rsgl, tmp, &areq->rsgl_list, list) { 666 list_for_each_entry_safe(rsgl, tmp, &areq->rsgl_list, list) {
667 ctx->rcvused -= rsgl->sg_num_bytes; 667 atomic_sub(rsgl->sg_num_bytes, &ctx->rcvused);
668 af_alg_free_sg(&rsgl->sgl); 668 af_alg_free_sg(&rsgl->sgl);
669 list_del(&rsgl->list); 669 list_del(&rsgl->list);
670 if (rsgl != &areq->first_rsgl) 670 if (rsgl != &areq->first_rsgl)
@@ -1163,7 +1163,7 @@ int af_alg_get_rsgl(struct sock *sk, struct msghdr *msg, int flags,
1163 1163
1164 areq->last_rsgl = rsgl; 1164 areq->last_rsgl = rsgl;
1165 len += err; 1165 len += err;
1166 ctx->rcvused += err; 1166 atomic_add(err, &ctx->rcvused);
1167 rsgl->sg_num_bytes = err; 1167 rsgl->sg_num_bytes = err;
1168 iov_iter_advance(&msg->msg_iter, err); 1168 iov_iter_advance(&msg->msg_iter, err);
1169 } 1169 }
diff --git a/crypto/algif_aead.c b/crypto/algif_aead.c
index ddcc45f77edd..e9885a35ef6e 100644
--- a/crypto/algif_aead.c
+++ b/crypto/algif_aead.c
@@ -571,7 +571,7 @@ static int aead_accept_parent_nokey(void *private, struct sock *sk)
571 INIT_LIST_HEAD(&ctx->tsgl_list); 571 INIT_LIST_HEAD(&ctx->tsgl_list);
572 ctx->len = len; 572 ctx->len = len;
573 ctx->used = 0; 573 ctx->used = 0;
574 ctx->rcvused = 0; 574 atomic_set(&ctx->rcvused, 0);
575 ctx->more = 0; 575 ctx->more = 0;
576 ctx->merge = 0; 576 ctx->merge = 0;
577 ctx->enc = 0; 577 ctx->enc = 0;
diff --git a/crypto/algif_skcipher.c b/crypto/algif_skcipher.c
index baef9bfccdda..c5c47b680152 100644
--- a/crypto/algif_skcipher.c
+++ b/crypto/algif_skcipher.c
@@ -390,7 +390,7 @@ static int skcipher_accept_parent_nokey(void *private, struct sock *sk)
390 INIT_LIST_HEAD(&ctx->tsgl_list); 390 INIT_LIST_HEAD(&ctx->tsgl_list);
391 ctx->len = len; 391 ctx->len = len;
392 ctx->used = 0; 392 ctx->used = 0;
393 ctx->rcvused = 0; 393 atomic_set(&ctx->rcvused, 0);
394 ctx->more = 0; 394 ctx->more = 0;
395 ctx->merge = 0; 395 ctx->merge = 0;
396 ctx->enc = 0; 396 ctx->enc = 0;
diff --git a/crypto/chacha20poly1305.c b/crypto/chacha20poly1305.c
index db1bc3147bc4..600afa99941f 100644
--- a/crypto/chacha20poly1305.c
+++ b/crypto/chacha20poly1305.c
@@ -610,6 +610,11 @@ static int chachapoly_create(struct crypto_template *tmpl, struct rtattr **tb,
610 algt->mask)); 610 algt->mask));
611 if (IS_ERR(poly)) 611 if (IS_ERR(poly))
612 return PTR_ERR(poly); 612 return PTR_ERR(poly);
613 poly_hash = __crypto_hash_alg_common(poly);
614
615 err = -EINVAL;
616 if (poly_hash->digestsize != POLY1305_DIGEST_SIZE)
617 goto out_put_poly;
613 618
614 err = -ENOMEM; 619 err = -ENOMEM;
615 inst = kzalloc(sizeof(*inst) + sizeof(*ctx), GFP_KERNEL); 620 inst = kzalloc(sizeof(*inst) + sizeof(*ctx), GFP_KERNEL);
@@ -618,7 +623,6 @@ static int chachapoly_create(struct crypto_template *tmpl, struct rtattr **tb,
618 623
619 ctx = aead_instance_ctx(inst); 624 ctx = aead_instance_ctx(inst);
620 ctx->saltlen = CHACHAPOLY_IV_SIZE - ivsize; 625 ctx->saltlen = CHACHAPOLY_IV_SIZE - ivsize;
621 poly_hash = __crypto_hash_alg_common(poly);
622 err = crypto_init_ahash_spawn(&ctx->poly, poly_hash, 626 err = crypto_init_ahash_spawn(&ctx->poly, poly_hash,
623 aead_crypto_instance(inst)); 627 aead_crypto_instance(inst));
624 if (err) 628 if (err)
diff --git a/crypto/pcrypt.c b/crypto/pcrypt.c
index ee9cfb99fe25..f8ec3d4ba4a8 100644
--- a/crypto/pcrypt.c
+++ b/crypto/pcrypt.c
@@ -254,6 +254,14 @@ static void pcrypt_aead_exit_tfm(struct crypto_aead *tfm)
254 crypto_free_aead(ctx->child); 254 crypto_free_aead(ctx->child);
255} 255}
256 256
257static void pcrypt_free(struct aead_instance *inst)
258{
259 struct pcrypt_instance_ctx *ctx = aead_instance_ctx(inst);
260
261 crypto_drop_aead(&ctx->spawn);
262 kfree(inst);
263}
264
257static int pcrypt_init_instance(struct crypto_instance *inst, 265static int pcrypt_init_instance(struct crypto_instance *inst,
258 struct crypto_alg *alg) 266 struct crypto_alg *alg)
259{ 267{
@@ -319,6 +327,8 @@ static int pcrypt_create_aead(struct crypto_template *tmpl, struct rtattr **tb,
319 inst->alg.encrypt = pcrypt_aead_encrypt; 327 inst->alg.encrypt = pcrypt_aead_encrypt;
320 inst->alg.decrypt = pcrypt_aead_decrypt; 328 inst->alg.decrypt = pcrypt_aead_decrypt;
321 329
330 inst->free = pcrypt_free;
331
322 err = aead_register_instance(tmpl, inst); 332 err = aead_register_instance(tmpl, inst);
323 if (err) 333 if (err)
324 goto out_drop_aead; 334 goto out_drop_aead;
@@ -349,14 +359,6 @@ static int pcrypt_create(struct crypto_template *tmpl, struct rtattr **tb)
349 return -EINVAL; 359 return -EINVAL;
350} 360}
351 361
352static void pcrypt_free(struct crypto_instance *inst)
353{
354 struct pcrypt_instance_ctx *ctx = crypto_instance_ctx(inst);
355
356 crypto_drop_aead(&ctx->spawn);
357 kfree(inst);
358}
359
360static int pcrypt_cpumask_change_notify(struct notifier_block *self, 362static int pcrypt_cpumask_change_notify(struct notifier_block *self,
361 unsigned long val, void *data) 363 unsigned long val, void *data)
362{ 364{
@@ -469,7 +471,6 @@ static void pcrypt_fini_padata(struct padata_pcrypt *pcrypt)
469static struct crypto_template pcrypt_tmpl = { 471static struct crypto_template pcrypt_tmpl = {
470 .name = "pcrypt", 472 .name = "pcrypt",
471 .create = pcrypt_create, 473 .create = pcrypt_create,
472 .free = pcrypt_free,
473 .module = THIS_MODULE, 474 .module = THIS_MODULE,
474}; 475};
475 476
diff --git a/drivers/bus/sunxi-rsb.c b/drivers/bus/sunxi-rsb.c
index 328ca93781cf..1b76d9585902 100644
--- a/drivers/bus/sunxi-rsb.c
+++ b/drivers/bus/sunxi-rsb.c
@@ -178,6 +178,7 @@ static struct bus_type sunxi_rsb_bus = {
178 .match = sunxi_rsb_device_match, 178 .match = sunxi_rsb_device_match,
179 .probe = sunxi_rsb_device_probe, 179 .probe = sunxi_rsb_device_probe,
180 .remove = sunxi_rsb_device_remove, 180 .remove = sunxi_rsb_device_remove,
181 .uevent = of_device_uevent_modalias,
181}; 182};
182 183
183static void sunxi_rsb_dev_release(struct device *dev) 184static void sunxi_rsb_dev_release(struct device *dev)
diff --git a/drivers/crypto/chelsio/Kconfig b/drivers/crypto/chelsio/Kconfig
index 3e104f5aa0c2..b56b3f711d94 100644
--- a/drivers/crypto/chelsio/Kconfig
+++ b/drivers/crypto/chelsio/Kconfig
@@ -5,6 +5,7 @@ config CRYPTO_DEV_CHELSIO
5 select CRYPTO_SHA256 5 select CRYPTO_SHA256
6 select CRYPTO_SHA512 6 select CRYPTO_SHA512
7 select CRYPTO_AUTHENC 7 select CRYPTO_AUTHENC
8 select CRYPTO_GF128MUL
8 ---help--- 9 ---help---
9 The Chelsio Crypto Co-processor driver for T6 adapters. 10 The Chelsio Crypto Co-processor driver for T6 adapters.
10 11
diff --git a/drivers/crypto/inside-secure/safexcel.c b/drivers/crypto/inside-secure/safexcel.c
index 89ba9e85c0f3..4bcef78a08aa 100644
--- a/drivers/crypto/inside-secure/safexcel.c
+++ b/drivers/crypto/inside-secure/safexcel.c
@@ -607,6 +607,7 @@ static inline void safexcel_handle_result_descriptor(struct safexcel_crypto_priv
607 ndesc = ctx->handle_result(priv, ring, sreq->req, 607 ndesc = ctx->handle_result(priv, ring, sreq->req,
608 &should_complete, &ret); 608 &should_complete, &ret);
609 if (ndesc < 0) { 609 if (ndesc < 0) {
610 kfree(sreq);
610 dev_err(priv->dev, "failed to handle result (%d)", ndesc); 611 dev_err(priv->dev, "failed to handle result (%d)", ndesc);
611 return; 612 return;
612 } 613 }
diff --git a/drivers/crypto/inside-secure/safexcel_cipher.c b/drivers/crypto/inside-secure/safexcel_cipher.c
index 5438552bc6d7..fcc0a606d748 100644
--- a/drivers/crypto/inside-secure/safexcel_cipher.c
+++ b/drivers/crypto/inside-secure/safexcel_cipher.c
@@ -14,6 +14,7 @@
14 14
15#include <crypto/aes.h> 15#include <crypto/aes.h>
16#include <crypto/skcipher.h> 16#include <crypto/skcipher.h>
17#include <crypto/internal/skcipher.h>
17 18
18#include "safexcel.h" 19#include "safexcel.h"
19 20
@@ -33,6 +34,10 @@ struct safexcel_cipher_ctx {
33 unsigned int key_len; 34 unsigned int key_len;
34}; 35};
35 36
37struct safexcel_cipher_req {
38 bool needs_inv;
39};
40
36static void safexcel_cipher_token(struct safexcel_cipher_ctx *ctx, 41static void safexcel_cipher_token(struct safexcel_cipher_ctx *ctx,
37 struct crypto_async_request *async, 42 struct crypto_async_request *async,
38 struct safexcel_command_desc *cdesc, 43 struct safexcel_command_desc *cdesc,
@@ -126,9 +131,9 @@ static int safexcel_context_control(struct safexcel_cipher_ctx *ctx,
126 return 0; 131 return 0;
127} 132}
128 133
129static int safexcel_handle_result(struct safexcel_crypto_priv *priv, int ring, 134static int safexcel_handle_req_result(struct safexcel_crypto_priv *priv, int ring,
130 struct crypto_async_request *async, 135 struct crypto_async_request *async,
131 bool *should_complete, int *ret) 136 bool *should_complete, int *ret)
132{ 137{
133 struct skcipher_request *req = skcipher_request_cast(async); 138 struct skcipher_request *req = skcipher_request_cast(async);
134 struct safexcel_result_desc *rdesc; 139 struct safexcel_result_desc *rdesc;
@@ -265,7 +270,6 @@ static int safexcel_aes_send(struct crypto_async_request *async,
265 spin_unlock_bh(&priv->ring[ring].egress_lock); 270 spin_unlock_bh(&priv->ring[ring].egress_lock);
266 271
267 request->req = &req->base; 272 request->req = &req->base;
268 ctx->base.handle_result = safexcel_handle_result;
269 273
270 *commands = n_cdesc; 274 *commands = n_cdesc;
271 *results = n_rdesc; 275 *results = n_rdesc;
@@ -341,8 +345,6 @@ static int safexcel_handle_inv_result(struct safexcel_crypto_priv *priv,
341 345
342 ring = safexcel_select_ring(priv); 346 ring = safexcel_select_ring(priv);
343 ctx->base.ring = ring; 347 ctx->base.ring = ring;
344 ctx->base.needs_inv = false;
345 ctx->base.send = safexcel_aes_send;
346 348
347 spin_lock_bh(&priv->ring[ring].queue_lock); 349 spin_lock_bh(&priv->ring[ring].queue_lock);
348 enq_ret = crypto_enqueue_request(&priv->ring[ring].queue, async); 350 enq_ret = crypto_enqueue_request(&priv->ring[ring].queue, async);
@@ -359,6 +361,26 @@ static int safexcel_handle_inv_result(struct safexcel_crypto_priv *priv,
359 return ndesc; 361 return ndesc;
360} 362}
361 363
364static int safexcel_handle_result(struct safexcel_crypto_priv *priv, int ring,
365 struct crypto_async_request *async,
366 bool *should_complete, int *ret)
367{
368 struct skcipher_request *req = skcipher_request_cast(async);
369 struct safexcel_cipher_req *sreq = skcipher_request_ctx(req);
370 int err;
371
372 if (sreq->needs_inv) {
373 sreq->needs_inv = false;
374 err = safexcel_handle_inv_result(priv, ring, async,
375 should_complete, ret);
376 } else {
377 err = safexcel_handle_req_result(priv, ring, async,
378 should_complete, ret);
379 }
380
381 return err;
382}
383
362static int safexcel_cipher_send_inv(struct crypto_async_request *async, 384static int safexcel_cipher_send_inv(struct crypto_async_request *async,
363 int ring, struct safexcel_request *request, 385 int ring, struct safexcel_request *request,
364 int *commands, int *results) 386 int *commands, int *results)
@@ -368,8 +390,6 @@ static int safexcel_cipher_send_inv(struct crypto_async_request *async,
368 struct safexcel_crypto_priv *priv = ctx->priv; 390 struct safexcel_crypto_priv *priv = ctx->priv;
369 int ret; 391 int ret;
370 392
371 ctx->base.handle_result = safexcel_handle_inv_result;
372
373 ret = safexcel_invalidate_cache(async, &ctx->base, priv, 393 ret = safexcel_invalidate_cache(async, &ctx->base, priv,
374 ctx->base.ctxr_dma, ring, request); 394 ctx->base.ctxr_dma, ring, request);
375 if (unlikely(ret)) 395 if (unlikely(ret))
@@ -381,28 +401,46 @@ static int safexcel_cipher_send_inv(struct crypto_async_request *async,
381 return 0; 401 return 0;
382} 402}
383 403
404static int safexcel_send(struct crypto_async_request *async,
405 int ring, struct safexcel_request *request,
406 int *commands, int *results)
407{
408 struct skcipher_request *req = skcipher_request_cast(async);
409 struct safexcel_cipher_req *sreq = skcipher_request_ctx(req);
410 int ret;
411
412 if (sreq->needs_inv)
413 ret = safexcel_cipher_send_inv(async, ring, request,
414 commands, results);
415 else
416 ret = safexcel_aes_send(async, ring, request,
417 commands, results);
418 return ret;
419}
420
384static int safexcel_cipher_exit_inv(struct crypto_tfm *tfm) 421static int safexcel_cipher_exit_inv(struct crypto_tfm *tfm)
385{ 422{
386 struct safexcel_cipher_ctx *ctx = crypto_tfm_ctx(tfm); 423 struct safexcel_cipher_ctx *ctx = crypto_tfm_ctx(tfm);
387 struct safexcel_crypto_priv *priv = ctx->priv; 424 struct safexcel_crypto_priv *priv = ctx->priv;
388 struct skcipher_request req; 425 SKCIPHER_REQUEST_ON_STACK(req, __crypto_skcipher_cast(tfm));
426 struct safexcel_cipher_req *sreq = skcipher_request_ctx(req);
389 struct safexcel_inv_result result = {}; 427 struct safexcel_inv_result result = {};
390 int ring = ctx->base.ring; 428 int ring = ctx->base.ring;
391 429
392 memset(&req, 0, sizeof(struct skcipher_request)); 430 memset(req, 0, sizeof(struct skcipher_request));
393 431
394 /* create invalidation request */ 432 /* create invalidation request */
395 init_completion(&result.completion); 433 init_completion(&result.completion);
396 skcipher_request_set_callback(&req, CRYPTO_TFM_REQ_MAY_BACKLOG, 434 skcipher_request_set_callback(req, CRYPTO_TFM_REQ_MAY_BACKLOG,
397 safexcel_inv_complete, &result); 435 safexcel_inv_complete, &result);
398 436
399 skcipher_request_set_tfm(&req, __crypto_skcipher_cast(tfm)); 437 skcipher_request_set_tfm(req, __crypto_skcipher_cast(tfm));
400 ctx = crypto_tfm_ctx(req.base.tfm); 438 ctx = crypto_tfm_ctx(req->base.tfm);
401 ctx->base.exit_inv = true; 439 ctx->base.exit_inv = true;
402 ctx->base.send = safexcel_cipher_send_inv; 440 sreq->needs_inv = true;
403 441
404 spin_lock_bh(&priv->ring[ring].queue_lock); 442 spin_lock_bh(&priv->ring[ring].queue_lock);
405 crypto_enqueue_request(&priv->ring[ring].queue, &req.base); 443 crypto_enqueue_request(&priv->ring[ring].queue, &req->base);
406 spin_unlock_bh(&priv->ring[ring].queue_lock); 444 spin_unlock_bh(&priv->ring[ring].queue_lock);
407 445
408 if (!priv->ring[ring].need_dequeue) 446 if (!priv->ring[ring].need_dequeue)
@@ -424,19 +462,21 @@ static int safexcel_aes(struct skcipher_request *req,
424 enum safexcel_cipher_direction dir, u32 mode) 462 enum safexcel_cipher_direction dir, u32 mode)
425{ 463{
426 struct safexcel_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm); 464 struct safexcel_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
465 struct safexcel_cipher_req *sreq = skcipher_request_ctx(req);
427 struct safexcel_crypto_priv *priv = ctx->priv; 466 struct safexcel_crypto_priv *priv = ctx->priv;
428 int ret, ring; 467 int ret, ring;
429 468
469 sreq->needs_inv = false;
430 ctx->direction = dir; 470 ctx->direction = dir;
431 ctx->mode = mode; 471 ctx->mode = mode;
432 472
433 if (ctx->base.ctxr) { 473 if (ctx->base.ctxr) {
434 if (ctx->base.needs_inv) 474 if (ctx->base.needs_inv) {
435 ctx->base.send = safexcel_cipher_send_inv; 475 sreq->needs_inv = true;
476 ctx->base.needs_inv = false;
477 }
436 } else { 478 } else {
437 ctx->base.ring = safexcel_select_ring(priv); 479 ctx->base.ring = safexcel_select_ring(priv);
438 ctx->base.send = safexcel_aes_send;
439
440 ctx->base.ctxr = dma_pool_zalloc(priv->context_pool, 480 ctx->base.ctxr = dma_pool_zalloc(priv->context_pool,
441 EIP197_GFP_FLAGS(req->base), 481 EIP197_GFP_FLAGS(req->base),
442 &ctx->base.ctxr_dma); 482 &ctx->base.ctxr_dma);
@@ -476,6 +516,11 @@ static int safexcel_skcipher_cra_init(struct crypto_tfm *tfm)
476 alg.skcipher.base); 516 alg.skcipher.base);
477 517
478 ctx->priv = tmpl->priv; 518 ctx->priv = tmpl->priv;
519 ctx->base.send = safexcel_send;
520 ctx->base.handle_result = safexcel_handle_result;
521
522 crypto_skcipher_set_reqsize(__crypto_skcipher_cast(tfm),
523 sizeof(struct safexcel_cipher_req));
479 524
480 return 0; 525 return 0;
481} 526}
diff --git a/drivers/crypto/inside-secure/safexcel_hash.c b/drivers/crypto/inside-secure/safexcel_hash.c
index 74feb6227101..0c5a5820b06e 100644
--- a/drivers/crypto/inside-secure/safexcel_hash.c
+++ b/drivers/crypto/inside-secure/safexcel_hash.c
@@ -32,9 +32,10 @@ struct safexcel_ahash_req {
32 bool last_req; 32 bool last_req;
33 bool finish; 33 bool finish;
34 bool hmac; 34 bool hmac;
35 bool needs_inv;
35 36
36 u8 state_sz; /* expected sate size, only set once */ 37 u8 state_sz; /* expected sate size, only set once */
37 u32 state[SHA256_DIGEST_SIZE / sizeof(u32)]; 38 u32 state[SHA256_DIGEST_SIZE / sizeof(u32)] __aligned(sizeof(u32));
38 39
39 u64 len; 40 u64 len;
40 u64 processed; 41 u64 processed;
@@ -119,15 +120,15 @@ static void safexcel_context_control(struct safexcel_ahash_ctx *ctx,
119 } 120 }
120} 121}
121 122
122static int safexcel_handle_result(struct safexcel_crypto_priv *priv, int ring, 123static int safexcel_handle_req_result(struct safexcel_crypto_priv *priv, int ring,
123 struct crypto_async_request *async, 124 struct crypto_async_request *async,
124 bool *should_complete, int *ret) 125 bool *should_complete, int *ret)
125{ 126{
126 struct safexcel_result_desc *rdesc; 127 struct safexcel_result_desc *rdesc;
127 struct ahash_request *areq = ahash_request_cast(async); 128 struct ahash_request *areq = ahash_request_cast(async);
128 struct crypto_ahash *ahash = crypto_ahash_reqtfm(areq); 129 struct crypto_ahash *ahash = crypto_ahash_reqtfm(areq);
129 struct safexcel_ahash_req *sreq = ahash_request_ctx(areq); 130 struct safexcel_ahash_req *sreq = ahash_request_ctx(areq);
130 int cache_len, result_sz = sreq->state_sz; 131 int cache_len;
131 132
132 *ret = 0; 133 *ret = 0;
133 134
@@ -148,8 +149,8 @@ static int safexcel_handle_result(struct safexcel_crypto_priv *priv, int ring,
148 spin_unlock_bh(&priv->ring[ring].egress_lock); 149 spin_unlock_bh(&priv->ring[ring].egress_lock);
149 150
150 if (sreq->finish) 151 if (sreq->finish)
151 result_sz = crypto_ahash_digestsize(ahash); 152 memcpy(areq->result, sreq->state,
152 memcpy(sreq->state, areq->result, result_sz); 153 crypto_ahash_digestsize(ahash));
153 154
154 dma_unmap_sg(priv->dev, areq->src, 155 dma_unmap_sg(priv->dev, areq->src,
155 sg_nents_for_len(areq->src, areq->nbytes), DMA_TO_DEVICE); 156 sg_nents_for_len(areq->src, areq->nbytes), DMA_TO_DEVICE);
@@ -165,9 +166,9 @@ static int safexcel_handle_result(struct safexcel_crypto_priv *priv, int ring,
165 return 1; 166 return 1;
166} 167}
167 168
168static int safexcel_ahash_send(struct crypto_async_request *async, int ring, 169static int safexcel_ahash_send_req(struct crypto_async_request *async, int ring,
169 struct safexcel_request *request, int *commands, 170 struct safexcel_request *request,
170 int *results) 171 int *commands, int *results)
171{ 172{
172 struct ahash_request *areq = ahash_request_cast(async); 173 struct ahash_request *areq = ahash_request_cast(async);
173 struct crypto_ahash *ahash = crypto_ahash_reqtfm(areq); 174 struct crypto_ahash *ahash = crypto_ahash_reqtfm(areq);
@@ -273,7 +274,7 @@ send_command:
273 /* Add the token */ 274 /* Add the token */
274 safexcel_hash_token(first_cdesc, len, req->state_sz); 275 safexcel_hash_token(first_cdesc, len, req->state_sz);
275 276
276 ctx->base.result_dma = dma_map_single(priv->dev, areq->result, 277 ctx->base.result_dma = dma_map_single(priv->dev, req->state,
277 req->state_sz, DMA_FROM_DEVICE); 278 req->state_sz, DMA_FROM_DEVICE);
278 if (dma_mapping_error(priv->dev, ctx->base.result_dma)) { 279 if (dma_mapping_error(priv->dev, ctx->base.result_dma)) {
279 ret = -EINVAL; 280 ret = -EINVAL;
@@ -292,7 +293,6 @@ send_command:
292 293
293 req->processed += len; 294 req->processed += len;
294 request->req = &areq->base; 295 request->req = &areq->base;
295 ctx->base.handle_result = safexcel_handle_result;
296 296
297 *commands = n_cdesc; 297 *commands = n_cdesc;
298 *results = 1; 298 *results = 1;
@@ -374,8 +374,6 @@ static int safexcel_handle_inv_result(struct safexcel_crypto_priv *priv,
374 374
375 ring = safexcel_select_ring(priv); 375 ring = safexcel_select_ring(priv);
376 ctx->base.ring = ring; 376 ctx->base.ring = ring;
377 ctx->base.needs_inv = false;
378 ctx->base.send = safexcel_ahash_send;
379 377
380 spin_lock_bh(&priv->ring[ring].queue_lock); 378 spin_lock_bh(&priv->ring[ring].queue_lock);
381 enq_ret = crypto_enqueue_request(&priv->ring[ring].queue, async); 379 enq_ret = crypto_enqueue_request(&priv->ring[ring].queue, async);
@@ -392,6 +390,26 @@ static int safexcel_handle_inv_result(struct safexcel_crypto_priv *priv,
392 return 1; 390 return 1;
393} 391}
394 392
393static int safexcel_handle_result(struct safexcel_crypto_priv *priv, int ring,
394 struct crypto_async_request *async,
395 bool *should_complete, int *ret)
396{
397 struct ahash_request *areq = ahash_request_cast(async);
398 struct safexcel_ahash_req *req = ahash_request_ctx(areq);
399 int err;
400
401 if (req->needs_inv) {
402 req->needs_inv = false;
403 err = safexcel_handle_inv_result(priv, ring, async,
404 should_complete, ret);
405 } else {
406 err = safexcel_handle_req_result(priv, ring, async,
407 should_complete, ret);
408 }
409
410 return err;
411}
412
395static int safexcel_ahash_send_inv(struct crypto_async_request *async, 413static int safexcel_ahash_send_inv(struct crypto_async_request *async,
396 int ring, struct safexcel_request *request, 414 int ring, struct safexcel_request *request,
397 int *commands, int *results) 415 int *commands, int *results)
@@ -400,7 +418,6 @@ static int safexcel_ahash_send_inv(struct crypto_async_request *async,
400 struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq)); 418 struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
401 int ret; 419 int ret;
402 420
403 ctx->base.handle_result = safexcel_handle_inv_result;
404 ret = safexcel_invalidate_cache(async, &ctx->base, ctx->priv, 421 ret = safexcel_invalidate_cache(async, &ctx->base, ctx->priv,
405 ctx->base.ctxr_dma, ring, request); 422 ctx->base.ctxr_dma, ring, request);
406 if (unlikely(ret)) 423 if (unlikely(ret))
@@ -412,28 +429,46 @@ static int safexcel_ahash_send_inv(struct crypto_async_request *async,
412 return 0; 429 return 0;
413} 430}
414 431
432static int safexcel_ahash_send(struct crypto_async_request *async,
433 int ring, struct safexcel_request *request,
434 int *commands, int *results)
435{
436 struct ahash_request *areq = ahash_request_cast(async);
437 struct safexcel_ahash_req *req = ahash_request_ctx(areq);
438 int ret;
439
440 if (req->needs_inv)
441 ret = safexcel_ahash_send_inv(async, ring, request,
442 commands, results);
443 else
444 ret = safexcel_ahash_send_req(async, ring, request,
445 commands, results);
446 return ret;
447}
448
415static int safexcel_ahash_exit_inv(struct crypto_tfm *tfm) 449static int safexcel_ahash_exit_inv(struct crypto_tfm *tfm)
416{ 450{
417 struct safexcel_ahash_ctx *ctx = crypto_tfm_ctx(tfm); 451 struct safexcel_ahash_ctx *ctx = crypto_tfm_ctx(tfm);
418 struct safexcel_crypto_priv *priv = ctx->priv; 452 struct safexcel_crypto_priv *priv = ctx->priv;
419 struct ahash_request req; 453 AHASH_REQUEST_ON_STACK(req, __crypto_ahash_cast(tfm));
454 struct safexcel_ahash_req *rctx = ahash_request_ctx(req);
420 struct safexcel_inv_result result = {}; 455 struct safexcel_inv_result result = {};
421 int ring = ctx->base.ring; 456 int ring = ctx->base.ring;
422 457
423 memset(&req, 0, sizeof(struct ahash_request)); 458 memset(req, 0, sizeof(struct ahash_request));
424 459
425 /* create invalidation request */ 460 /* create invalidation request */
426 init_completion(&result.completion); 461 init_completion(&result.completion);
427 ahash_request_set_callback(&req, CRYPTO_TFM_REQ_MAY_BACKLOG, 462 ahash_request_set_callback(req, CRYPTO_TFM_REQ_MAY_BACKLOG,
428 safexcel_inv_complete, &result); 463 safexcel_inv_complete, &result);
429 464
430 ahash_request_set_tfm(&req, __crypto_ahash_cast(tfm)); 465 ahash_request_set_tfm(req, __crypto_ahash_cast(tfm));
431 ctx = crypto_tfm_ctx(req.base.tfm); 466 ctx = crypto_tfm_ctx(req->base.tfm);
432 ctx->base.exit_inv = true; 467 ctx->base.exit_inv = true;
433 ctx->base.send = safexcel_ahash_send_inv; 468 rctx->needs_inv = true;
434 469
435 spin_lock_bh(&priv->ring[ring].queue_lock); 470 spin_lock_bh(&priv->ring[ring].queue_lock);
436 crypto_enqueue_request(&priv->ring[ring].queue, &req.base); 471 crypto_enqueue_request(&priv->ring[ring].queue, &req->base);
437 spin_unlock_bh(&priv->ring[ring].queue_lock); 472 spin_unlock_bh(&priv->ring[ring].queue_lock);
438 473
439 if (!priv->ring[ring].need_dequeue) 474 if (!priv->ring[ring].need_dequeue)
@@ -481,14 +516,16 @@ static int safexcel_ahash_enqueue(struct ahash_request *areq)
481 struct safexcel_crypto_priv *priv = ctx->priv; 516 struct safexcel_crypto_priv *priv = ctx->priv;
482 int ret, ring; 517 int ret, ring;
483 518
484 ctx->base.send = safexcel_ahash_send; 519 req->needs_inv = false;
485 520
486 if (req->processed && ctx->digest == CONTEXT_CONTROL_DIGEST_PRECOMPUTED) 521 if (req->processed && ctx->digest == CONTEXT_CONTROL_DIGEST_PRECOMPUTED)
487 ctx->base.needs_inv = safexcel_ahash_needs_inv_get(areq); 522 ctx->base.needs_inv = safexcel_ahash_needs_inv_get(areq);
488 523
489 if (ctx->base.ctxr) { 524 if (ctx->base.ctxr) {
490 if (ctx->base.needs_inv) 525 if (ctx->base.needs_inv) {
491 ctx->base.send = safexcel_ahash_send_inv; 526 ctx->base.needs_inv = false;
527 req->needs_inv = true;
528 }
492 } else { 529 } else {
493 ctx->base.ring = safexcel_select_ring(priv); 530 ctx->base.ring = safexcel_select_ring(priv);
494 ctx->base.ctxr = dma_pool_zalloc(priv->context_pool, 531 ctx->base.ctxr = dma_pool_zalloc(priv->context_pool,
@@ -622,6 +659,8 @@ static int safexcel_ahash_cra_init(struct crypto_tfm *tfm)
622 struct safexcel_alg_template, alg.ahash); 659 struct safexcel_alg_template, alg.ahash);
623 660
624 ctx->priv = tmpl->priv; 661 ctx->priv = tmpl->priv;
662 ctx->base.send = safexcel_ahash_send;
663 ctx->base.handle_result = safexcel_handle_result;
625 664
626 crypto_ahash_set_reqsize(__crypto_ahash_cast(tfm), 665 crypto_ahash_set_reqsize(__crypto_ahash_cast(tfm),
627 sizeof(struct safexcel_ahash_req)); 666 sizeof(struct safexcel_ahash_req));
diff --git a/drivers/crypto/n2_core.c b/drivers/crypto/n2_core.c
index 48de52cf2ecc..662e709812cc 100644
--- a/drivers/crypto/n2_core.c
+++ b/drivers/crypto/n2_core.c
@@ -1625,6 +1625,7 @@ static int queue_cache_init(void)
1625 CWQ_ENTRY_SIZE, 0, NULL); 1625 CWQ_ENTRY_SIZE, 0, NULL);
1626 if (!queue_cache[HV_NCS_QTYPE_CWQ - 1]) { 1626 if (!queue_cache[HV_NCS_QTYPE_CWQ - 1]) {
1627 kmem_cache_destroy(queue_cache[HV_NCS_QTYPE_MAU - 1]); 1627 kmem_cache_destroy(queue_cache[HV_NCS_QTYPE_MAU - 1]);
1628 queue_cache[HV_NCS_QTYPE_MAU - 1] = NULL;
1628 return -ENOMEM; 1629 return -ENOMEM;
1629 } 1630 }
1630 return 0; 1631 return 0;
@@ -1634,6 +1635,8 @@ static void queue_cache_destroy(void)
1634{ 1635{
1635 kmem_cache_destroy(queue_cache[HV_NCS_QTYPE_MAU - 1]); 1636 kmem_cache_destroy(queue_cache[HV_NCS_QTYPE_MAU - 1]);
1636 kmem_cache_destroy(queue_cache[HV_NCS_QTYPE_CWQ - 1]); 1637 kmem_cache_destroy(queue_cache[HV_NCS_QTYPE_CWQ - 1]);
1638 queue_cache[HV_NCS_QTYPE_MAU - 1] = NULL;
1639 queue_cache[HV_NCS_QTYPE_CWQ - 1] = NULL;
1637} 1640}
1638 1641
1639static long spu_queue_register_workfn(void *arg) 1642static long spu_queue_register_workfn(void *arg)
diff --git a/drivers/firmware/efi/capsule-loader.c b/drivers/firmware/efi/capsule-loader.c
index ec8ac5c4dd84..055e2e8f985a 100644
--- a/drivers/firmware/efi/capsule-loader.c
+++ b/drivers/firmware/efi/capsule-loader.c
@@ -20,10 +20,6 @@
20 20
21#define NO_FURTHER_WRITE_ACTION -1 21#define NO_FURTHER_WRITE_ACTION -1
22 22
23#ifndef phys_to_page
24#define phys_to_page(x) pfn_to_page((x) >> PAGE_SHIFT)
25#endif
26
27/** 23/**
28 * efi_free_all_buff_pages - free all previous allocated buffer pages 24 * efi_free_all_buff_pages - free all previous allocated buffer pages
29 * @cap_info: pointer to current instance of capsule_info structure 25 * @cap_info: pointer to current instance of capsule_info structure
@@ -35,7 +31,7 @@
35static void efi_free_all_buff_pages(struct capsule_info *cap_info) 31static void efi_free_all_buff_pages(struct capsule_info *cap_info)
36{ 32{
37 while (cap_info->index > 0) 33 while (cap_info->index > 0)
38 __free_page(phys_to_page(cap_info->pages[--cap_info->index])); 34 __free_page(cap_info->pages[--cap_info->index]);
39 35
40 cap_info->index = NO_FURTHER_WRITE_ACTION; 36 cap_info->index = NO_FURTHER_WRITE_ACTION;
41} 37}
@@ -71,6 +67,14 @@ int __efi_capsule_setup_info(struct capsule_info *cap_info)
71 67
72 cap_info->pages = temp_page; 68 cap_info->pages = temp_page;
73 69
70 temp_page = krealloc(cap_info->phys,
71 pages_needed * sizeof(phys_addr_t *),
72 GFP_KERNEL | __GFP_ZERO);
73 if (!temp_page)
74 return -ENOMEM;
75
76 cap_info->phys = temp_page;
77
74 return 0; 78 return 0;
75} 79}
76 80
@@ -105,9 +109,24 @@ int __weak efi_capsule_setup_info(struct capsule_info *cap_info, void *kbuff,
105 **/ 109 **/
106static ssize_t efi_capsule_submit_update(struct capsule_info *cap_info) 110static ssize_t efi_capsule_submit_update(struct capsule_info *cap_info)
107{ 111{
112 bool do_vunmap = false;
108 int ret; 113 int ret;
109 114
110 ret = efi_capsule_update(&cap_info->header, cap_info->pages); 115 /*
116 * cap_info->capsule may have been assigned already by a quirk
117 * handler, so only overwrite it if it is NULL
118 */
119 if (!cap_info->capsule) {
120 cap_info->capsule = vmap(cap_info->pages, cap_info->index,
121 VM_MAP, PAGE_KERNEL);
122 if (!cap_info->capsule)
123 return -ENOMEM;
124 do_vunmap = true;
125 }
126
127 ret = efi_capsule_update(cap_info->capsule, cap_info->phys);
128 if (do_vunmap)
129 vunmap(cap_info->capsule);
111 if (ret) { 130 if (ret) {
112 pr_err("capsule update failed\n"); 131 pr_err("capsule update failed\n");
113 return ret; 132 return ret;
@@ -165,10 +184,12 @@ static ssize_t efi_capsule_write(struct file *file, const char __user *buff,
165 goto failed; 184 goto failed;
166 } 185 }
167 186
168 cap_info->pages[cap_info->index++] = page_to_phys(page); 187 cap_info->pages[cap_info->index] = page;
188 cap_info->phys[cap_info->index] = page_to_phys(page);
169 cap_info->page_bytes_remain = PAGE_SIZE; 189 cap_info->page_bytes_remain = PAGE_SIZE;
190 cap_info->index++;
170 } else { 191 } else {
171 page = phys_to_page(cap_info->pages[cap_info->index - 1]); 192 page = cap_info->pages[cap_info->index - 1];
172 } 193 }
173 194
174 kbuff = kmap(page); 195 kbuff = kmap(page);
@@ -252,6 +273,7 @@ static int efi_capsule_release(struct inode *inode, struct file *file)
252 struct capsule_info *cap_info = file->private_data; 273 struct capsule_info *cap_info = file->private_data;
253 274
254 kfree(cap_info->pages); 275 kfree(cap_info->pages);
276 kfree(cap_info->phys);
255 kfree(file->private_data); 277 kfree(file->private_data);
256 file->private_data = NULL; 278 file->private_data = NULL;
257 return 0; 279 return 0;
@@ -281,6 +303,13 @@ static int efi_capsule_open(struct inode *inode, struct file *file)
281 return -ENOMEM; 303 return -ENOMEM;
282 } 304 }
283 305
306 cap_info->phys = kzalloc(sizeof(void *), GFP_KERNEL);
307 if (!cap_info->phys) {
308 kfree(cap_info->pages);
309 kfree(cap_info);
310 return -ENOMEM;
311 }
312
284 file->private_data = cap_info; 313 file->private_data = cap_info;
285 314
286 return 0; 315 return 0;
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h
index a9782b1aba47..34daf895f848 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h
@@ -1360,7 +1360,7 @@ void dpp1_cm_set_output_csc_adjustment(
1360 1360
1361void dpp1_cm_set_output_csc_default( 1361void dpp1_cm_set_output_csc_default(
1362 struct dpp *dpp_base, 1362 struct dpp *dpp_base,
1363 const struct default_adjustment *default_adjust); 1363 enum dc_color_space colorspace);
1364 1364
1365void dpp1_cm_set_gamut_remap( 1365void dpp1_cm_set_gamut_remap(
1366 struct dpp *dpp, 1366 struct dpp *dpp,
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c
index 40627c244bf5..ed1216b53465 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c
@@ -225,14 +225,13 @@ void dpp1_cm_set_gamut_remap(
225 225
226void dpp1_cm_set_output_csc_default( 226void dpp1_cm_set_output_csc_default(
227 struct dpp *dpp_base, 227 struct dpp *dpp_base,
228 const struct default_adjustment *default_adjust) 228 enum dc_color_space colorspace)
229{ 229{
230 230
231 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); 231 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);
232 uint32_t ocsc_mode = 0; 232 uint32_t ocsc_mode = 0;
233 233
234 if (default_adjust != NULL) { 234 switch (colorspace) {
235 switch (default_adjust->out_color_space) {
236 case COLOR_SPACE_SRGB: 235 case COLOR_SPACE_SRGB:
237 case COLOR_SPACE_2020_RGB_FULLRANGE: 236 case COLOR_SPACE_2020_RGB_FULLRANGE:
238 ocsc_mode = 0; 237 ocsc_mode = 0;
@@ -253,7 +252,6 @@ void dpp1_cm_set_output_csc_default(
253 case COLOR_SPACE_UNKNOWN: 252 case COLOR_SPACE_UNKNOWN:
254 default: 253 default:
255 break; 254 break;
256 }
257 } 255 }
258 256
259 REG_SET(CM_OCSC_CONTROL, 0, CM_OCSC_MODE, ocsc_mode); 257 REG_SET(CM_OCSC_CONTROL, 0, CM_OCSC_MODE, ocsc_mode);
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
index 961ad5c3b454..05dc01e54531 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
@@ -2097,6 +2097,8 @@ static void program_csc_matrix(struct pipe_ctx *pipe_ctx,
2097 tbl_entry.color_space = color_space; 2097 tbl_entry.color_space = color_space;
2098 //tbl_entry.regval = matrix; 2098 //tbl_entry.regval = matrix;
2099 pipe_ctx->plane_res.dpp->funcs->opp_set_csc_adjustment(pipe_ctx->plane_res.dpp, &tbl_entry); 2099 pipe_ctx->plane_res.dpp->funcs->opp_set_csc_adjustment(pipe_ctx->plane_res.dpp, &tbl_entry);
2100 } else {
2101 pipe_ctx->plane_res.dpp->funcs->opp_set_csc_default(pipe_ctx->plane_res.dpp, colorspace);
2100 } 2102 }
2101} 2103}
2102static bool is_lower_pipe_tree_visible(struct pipe_ctx *pipe_ctx) 2104static bool is_lower_pipe_tree_visible(struct pipe_ctx *pipe_ctx)
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h b/drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h
index 83a68460edcd..9420dfb94d39 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h
@@ -64,7 +64,7 @@ struct dpp_funcs {
64 64
65 void (*opp_set_csc_default)( 65 void (*opp_set_csc_default)(
66 struct dpp *dpp, 66 struct dpp *dpp,
67 const struct default_adjustment *default_adjust); 67 enum dc_color_space colorspace);
68 68
69 void (*opp_set_csc_adjustment)( 69 void (*opp_set_csc_adjustment)(
70 struct dpp *dpp, 70 struct dpp *dpp,
diff --git a/drivers/gpu/drm/armada/armada_crtc.c b/drivers/gpu/drm/armada/armada_crtc.c
index 2e065facdce7..a0f4d2a2a481 100644
--- a/drivers/gpu/drm/armada/armada_crtc.c
+++ b/drivers/gpu/drm/armada/armada_crtc.c
@@ -168,16 +168,23 @@ static void armada_drm_crtc_update(struct armada_crtc *dcrtc)
168void armada_drm_plane_calc_addrs(u32 *addrs, struct drm_framebuffer *fb, 168void armada_drm_plane_calc_addrs(u32 *addrs, struct drm_framebuffer *fb,
169 int x, int y) 169 int x, int y)
170{ 170{
171 const struct drm_format_info *format = fb->format;
172 unsigned int num_planes = format->num_planes;
171 u32 addr = drm_fb_obj(fb)->dev_addr; 173 u32 addr = drm_fb_obj(fb)->dev_addr;
172 int num_planes = fb->format->num_planes;
173 int i; 174 int i;
174 175
175 if (num_planes > 3) 176 if (num_planes > 3)
176 num_planes = 3; 177 num_planes = 3;
177 178
178 for (i = 0; i < num_planes; i++) 179 addrs[0] = addr + fb->offsets[0] + y * fb->pitches[0] +
180 x * format->cpp[0];
181
182 y /= format->vsub;
183 x /= format->hsub;
184
185 for (i = 1; i < num_planes; i++)
179 addrs[i] = addr + fb->offsets[i] + y * fb->pitches[i] + 186 addrs[i] = addr + fb->offsets[i] + y * fb->pitches[i] +
180 x * fb->format->cpp[i]; 187 x * format->cpp[i];
181 for (; i < 3; i++) 188 for (; i < 3; i++)
182 addrs[i] = 0; 189 addrs[i] = 0;
183} 190}
@@ -744,15 +751,14 @@ void armada_drm_crtc_plane_disable(struct armada_crtc *dcrtc,
744 if (plane->fb) 751 if (plane->fb)
745 drm_framebuffer_put(plane->fb); 752 drm_framebuffer_put(plane->fb);
746 753
747 /* Power down the Y/U/V FIFOs */
748 sram_para1 = CFG_PDWN16x66 | CFG_PDWN32x66;
749
750 /* Power down most RAMs and FIFOs if this is the primary plane */ 754 /* Power down most RAMs and FIFOs if this is the primary plane */
751 if (plane->type == DRM_PLANE_TYPE_PRIMARY) { 755 if (plane->type == DRM_PLANE_TYPE_PRIMARY) {
752 sram_para1 |= CFG_PDWN256x32 | CFG_PDWN256x24 | CFG_PDWN256x8 | 756 sram_para1 = CFG_PDWN256x32 | CFG_PDWN256x24 | CFG_PDWN256x8 |
753 CFG_PDWN32x32 | CFG_PDWN64x66; 757 CFG_PDWN32x32 | CFG_PDWN64x66;
754 dma_ctrl0_mask = CFG_GRA_ENA; 758 dma_ctrl0_mask = CFG_GRA_ENA;
755 } else { 759 } else {
760 /* Power down the Y/U/V FIFOs */
761 sram_para1 = CFG_PDWN16x66 | CFG_PDWN32x66;
756 dma_ctrl0_mask = CFG_DMA_ENA; 762 dma_ctrl0_mask = CFG_DMA_ENA;
757 } 763 }
758 764
@@ -1225,17 +1231,13 @@ static int armada_drm_crtc_create(struct drm_device *drm, struct device *dev,
1225 1231
1226 ret = devm_request_irq(dev, irq, armada_drm_irq, 0, "armada_drm_crtc", 1232 ret = devm_request_irq(dev, irq, armada_drm_irq, 0, "armada_drm_crtc",
1227 dcrtc); 1233 dcrtc);
1228 if (ret < 0) { 1234 if (ret < 0)
1229 kfree(dcrtc); 1235 goto err_crtc;
1230 return ret;
1231 }
1232 1236
1233 if (dcrtc->variant->init) { 1237 if (dcrtc->variant->init) {
1234 ret = dcrtc->variant->init(dcrtc, dev); 1238 ret = dcrtc->variant->init(dcrtc, dev);
1235 if (ret) { 1239 if (ret)
1236 kfree(dcrtc); 1240 goto err_crtc;
1237 return ret;
1238 }
1239 } 1241 }
1240 1242
1241 /* Ensure AXI pipeline is enabled */ 1243 /* Ensure AXI pipeline is enabled */
@@ -1246,13 +1248,15 @@ static int armada_drm_crtc_create(struct drm_device *drm, struct device *dev,
1246 dcrtc->crtc.port = port; 1248 dcrtc->crtc.port = port;
1247 1249
1248 primary = kzalloc(sizeof(*primary), GFP_KERNEL); 1250 primary = kzalloc(sizeof(*primary), GFP_KERNEL);
1249 if (!primary) 1251 if (!primary) {
1250 return -ENOMEM; 1252 ret = -ENOMEM;
1253 goto err_crtc;
1254 }
1251 1255
1252 ret = armada_drm_plane_init(primary); 1256 ret = armada_drm_plane_init(primary);
1253 if (ret) { 1257 if (ret) {
1254 kfree(primary); 1258 kfree(primary);
1255 return ret; 1259 goto err_crtc;
1256 } 1260 }
1257 1261
1258 ret = drm_universal_plane_init(drm, &primary->base, 0, 1262 ret = drm_universal_plane_init(drm, &primary->base, 0,
@@ -1263,7 +1267,7 @@ static int armada_drm_crtc_create(struct drm_device *drm, struct device *dev,
1263 DRM_PLANE_TYPE_PRIMARY, NULL); 1267 DRM_PLANE_TYPE_PRIMARY, NULL);
1264 if (ret) { 1268 if (ret) {
1265 kfree(primary); 1269 kfree(primary);
1266 return ret; 1270 goto err_crtc;
1267 } 1271 }
1268 1272
1269 ret = drm_crtc_init_with_planes(drm, &dcrtc->crtc, &primary->base, NULL, 1273 ret = drm_crtc_init_with_planes(drm, &dcrtc->crtc, &primary->base, NULL,
@@ -1282,6 +1286,9 @@ static int armada_drm_crtc_create(struct drm_device *drm, struct device *dev,
1282 1286
1283err_crtc_init: 1287err_crtc_init:
1284 primary->base.funcs->destroy(&primary->base); 1288 primary->base.funcs->destroy(&primary->base);
1289err_crtc:
1290 kfree(dcrtc);
1291
1285 return ret; 1292 return ret;
1286} 1293}
1287 1294
diff --git a/drivers/gpu/drm/armada/armada_crtc.h b/drivers/gpu/drm/armada/armada_crtc.h
index bab11f483575..bfd3514fbe9b 100644
--- a/drivers/gpu/drm/armada/armada_crtc.h
+++ b/drivers/gpu/drm/armada/armada_crtc.h
@@ -42,6 +42,8 @@ struct armada_plane_work {
42}; 42};
43 43
44struct armada_plane_state { 44struct armada_plane_state {
45 u16 src_x;
46 u16 src_y;
45 u32 src_hw; 47 u32 src_hw;
46 u32 dst_hw; 48 u32 dst_hw;
47 u32 dst_yx; 49 u32 dst_yx;
diff --git a/drivers/gpu/drm/armada/armada_overlay.c b/drivers/gpu/drm/armada/armada_overlay.c
index b411b608821a..aba947696178 100644
--- a/drivers/gpu/drm/armada/armada_overlay.c
+++ b/drivers/gpu/drm/armada/armada_overlay.c
@@ -99,6 +99,7 @@ armada_ovl_plane_update(struct drm_plane *plane, struct drm_crtc *crtc,
99{ 99{
100 struct armada_ovl_plane *dplane = drm_to_armada_ovl_plane(plane); 100 struct armada_ovl_plane *dplane = drm_to_armada_ovl_plane(plane);
101 struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc); 101 struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc);
102 const struct drm_format_info *format;
102 struct drm_rect src = { 103 struct drm_rect src = {
103 .x1 = src_x, 104 .x1 = src_x,
104 .y1 = src_y, 105 .y1 = src_y,
@@ -117,7 +118,7 @@ armada_ovl_plane_update(struct drm_plane *plane, struct drm_crtc *crtc,
117 }; 118 };
118 uint32_t val, ctrl0; 119 uint32_t val, ctrl0;
119 unsigned idx = 0; 120 unsigned idx = 0;
120 bool visible; 121 bool visible, fb_changed;
121 int ret; 122 int ret;
122 123
123 trace_armada_ovl_plane_update(plane, crtc, fb, 124 trace_armada_ovl_plane_update(plane, crtc, fb,
@@ -138,6 +139,18 @@ armada_ovl_plane_update(struct drm_plane *plane, struct drm_crtc *crtc,
138 if (!visible) 139 if (!visible)
139 ctrl0 &= ~CFG_DMA_ENA; 140 ctrl0 &= ~CFG_DMA_ENA;
140 141
142 /*
143 * Shifting a YUV packed format image by one pixel causes the U/V
144 * planes to swap. Compensate for it by also toggling the UV swap.
145 */
146 format = fb->format;
147 if (format->num_planes == 1 && src.x1 >> 16 & (format->hsub - 1))
148 ctrl0 ^= CFG_DMA_MOD(CFG_SWAPUV);
149
150 fb_changed = plane->fb != fb ||
151 dplane->base.state.src_x != src.x1 >> 16 ||
152 dplane->base.state.src_y != src.y1 >> 16;
153
141 if (!dcrtc->plane) { 154 if (!dcrtc->plane) {
142 dcrtc->plane = plane; 155 dcrtc->plane = plane;
143 armada_ovl_update_attr(&dplane->prop, dcrtc); 156 armada_ovl_update_attr(&dplane->prop, dcrtc);
@@ -145,7 +158,7 @@ armada_ovl_plane_update(struct drm_plane *plane, struct drm_crtc *crtc,
145 158
146 /* FIXME: overlay on an interlaced display */ 159 /* FIXME: overlay on an interlaced display */
147 /* Just updating the position/size? */ 160 /* Just updating the position/size? */
148 if (plane->fb == fb && dplane->base.state.ctrl0 == ctrl0) { 161 if (!fb_changed && dplane->base.state.ctrl0 == ctrl0) {
149 val = (drm_rect_height(&src) & 0xffff0000) | 162 val = (drm_rect_height(&src) & 0xffff0000) |
150 drm_rect_width(&src) >> 16; 163 drm_rect_width(&src) >> 16;
151 dplane->base.state.src_hw = val; 164 dplane->base.state.src_hw = val;
@@ -169,9 +182,8 @@ armada_ovl_plane_update(struct drm_plane *plane, struct drm_crtc *crtc,
169 if (armada_drm_plane_work_wait(&dplane->base, HZ / 25) == 0) 182 if (armada_drm_plane_work_wait(&dplane->base, HZ / 25) == 0)
170 armada_drm_plane_work_cancel(dcrtc, &dplane->base); 183 armada_drm_plane_work_cancel(dcrtc, &dplane->base);
171 184
172 if (plane->fb != fb) { 185 if (fb_changed) {
173 u32 addrs[3], pixel_format; 186 u32 addrs[3];
174 int num_planes, hsub;
175 187
176 /* 188 /*
177 * Take a reference on the new framebuffer - we want to 189 * Take a reference on the new framebuffer - we want to
@@ -182,23 +194,11 @@ armada_ovl_plane_update(struct drm_plane *plane, struct drm_crtc *crtc,
182 if (plane->fb) 194 if (plane->fb)
183 armada_ovl_retire_fb(dplane, plane->fb); 195 armada_ovl_retire_fb(dplane, plane->fb);
184 196
185 src_y = src.y1 >> 16; 197 dplane->base.state.src_y = src_y = src.y1 >> 16;
186 src_x = src.x1 >> 16; 198 dplane->base.state.src_x = src_x = src.x1 >> 16;
187 199
188 armada_drm_plane_calc_addrs(addrs, fb, src_x, src_y); 200 armada_drm_plane_calc_addrs(addrs, fb, src_x, src_y);
189 201
190 pixel_format = fb->format->format;
191 hsub = drm_format_horz_chroma_subsampling(pixel_format);
192 num_planes = fb->format->num_planes;
193
194 /*
195 * Annoyingly, shifting a YUYV-format image by one pixel
196 * causes the U/V planes to toggle. Toggle the UV swap.
197 * (Unfortunately, this causes momentary colour flickering.)
198 */
199 if (src_x & (hsub - 1) && num_planes == 1)
200 ctrl0 ^= CFG_DMA_MOD(CFG_SWAPUV);
201
202 armada_reg_queue_set(dplane->vbl.regs, idx, addrs[0], 202 armada_reg_queue_set(dplane->vbl.regs, idx, addrs[0],
203 LCD_SPU_DMA_START_ADDR_Y0); 203 LCD_SPU_DMA_START_ADDR_Y0);
204 armada_reg_queue_set(dplane->vbl.regs, idx, addrs[1], 204 armada_reg_queue_set(dplane->vbl.regs, idx, addrs[1],
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 54b5d4c582b6..e143004e66d5 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2368,6 +2368,9 @@ struct drm_i915_private {
2368 */ 2368 */
2369 struct workqueue_struct *wq; 2369 struct workqueue_struct *wq;
2370 2370
2371 /* ordered wq for modesets */
2372 struct workqueue_struct *modeset_wq;
2373
2371 /* Display functions */ 2374 /* Display functions */
2372 struct drm_i915_display_funcs display; 2375 struct drm_i915_display_funcs display;
2373 2376
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 3866c49bc390..333f40bc03bb 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -6977,6 +6977,7 @@ enum {
6977#define RESET_PCH_HANDSHAKE_ENABLE (1<<4) 6977#define RESET_PCH_HANDSHAKE_ENABLE (1<<4)
6978 6978
6979#define GEN8_CHICKEN_DCPR_1 _MMIO(0x46430) 6979#define GEN8_CHICKEN_DCPR_1 _MMIO(0x46430)
6980#define SKL_SELECT_ALTERNATE_DC_EXIT (1<<30)
6980#define MASK_WAKEMEM (1<<13) 6981#define MASK_WAKEMEM (1<<13)
6981 6982
6982#define SKL_DFSM _MMIO(0x51000) 6983#define SKL_DFSM _MMIO(0x51000)
@@ -8522,6 +8523,7 @@ enum skl_power_gate {
8522#define BXT_CDCLK_CD2X_DIV_SEL_2 (2<<22) 8523#define BXT_CDCLK_CD2X_DIV_SEL_2 (2<<22)
8523#define BXT_CDCLK_CD2X_DIV_SEL_4 (3<<22) 8524#define BXT_CDCLK_CD2X_DIV_SEL_4 (3<<22)
8524#define BXT_CDCLK_CD2X_PIPE(pipe) ((pipe)<<20) 8525#define BXT_CDCLK_CD2X_PIPE(pipe) ((pipe)<<20)
8526#define CDCLK_DIVMUX_CD_OVERRIDE (1<<19)
8525#define BXT_CDCLK_CD2X_PIPE_NONE BXT_CDCLK_CD2X_PIPE(3) 8527#define BXT_CDCLK_CD2X_PIPE_NONE BXT_CDCLK_CD2X_PIPE(3)
8526#define BXT_CDCLK_SSA_PRECHARGE_ENABLE (1<<16) 8528#define BXT_CDCLK_SSA_PRECHARGE_ENABLE (1<<16)
8527#define CDCLK_FREQ_DECIMAL_MASK (0x7ff) 8529#define CDCLK_FREQ_DECIMAL_MASK (0x7ff)
diff --git a/drivers/gpu/drm/i915/intel_cdclk.c b/drivers/gpu/drm/i915/intel_cdclk.c
index b2a6d62b71c0..60cf4e58389a 100644
--- a/drivers/gpu/drm/i915/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/intel_cdclk.c
@@ -860,16 +860,10 @@ static void skl_set_preferred_cdclk_vco(struct drm_i915_private *dev_priv,
860 860
861static void skl_dpll0_enable(struct drm_i915_private *dev_priv, int vco) 861static void skl_dpll0_enable(struct drm_i915_private *dev_priv, int vco)
862{ 862{
863 int min_cdclk = skl_calc_cdclk(0, vco);
864 u32 val; 863 u32 val;
865 864
866 WARN_ON(vco != 8100000 && vco != 8640000); 865 WARN_ON(vco != 8100000 && vco != 8640000);
867 866
868 /* select the minimum CDCLK before enabling DPLL 0 */
869 val = CDCLK_FREQ_337_308 | skl_cdclk_decimal(min_cdclk);
870 I915_WRITE(CDCLK_CTL, val);
871 POSTING_READ(CDCLK_CTL);
872
873 /* 867 /*
874 * We always enable DPLL0 with the lowest link rate possible, but still 868 * We always enable DPLL0 with the lowest link rate possible, but still
875 * taking into account the VCO required to operate the eDP panel at the 869 * taking into account the VCO required to operate the eDP panel at the
@@ -923,7 +917,7 @@ static void skl_set_cdclk(struct drm_i915_private *dev_priv,
923{ 917{
924 int cdclk = cdclk_state->cdclk; 918 int cdclk = cdclk_state->cdclk;
925 int vco = cdclk_state->vco; 919 int vco = cdclk_state->vco;
926 u32 freq_select, pcu_ack; 920 u32 freq_select, pcu_ack, cdclk_ctl;
927 int ret; 921 int ret;
928 922
929 WARN_ON((cdclk == 24000) != (vco == 0)); 923 WARN_ON((cdclk == 24000) != (vco == 0));
@@ -940,7 +934,7 @@ static void skl_set_cdclk(struct drm_i915_private *dev_priv,
940 return; 934 return;
941 } 935 }
942 936
943 /* set CDCLK_CTL */ 937 /* Choose frequency for this cdclk */
944 switch (cdclk) { 938 switch (cdclk) {
945 case 450000: 939 case 450000:
946 case 432000: 940 case 432000:
@@ -968,10 +962,33 @@ static void skl_set_cdclk(struct drm_i915_private *dev_priv,
968 dev_priv->cdclk.hw.vco != vco) 962 dev_priv->cdclk.hw.vco != vco)
969 skl_dpll0_disable(dev_priv); 963 skl_dpll0_disable(dev_priv);
970 964
965 cdclk_ctl = I915_READ(CDCLK_CTL);
966
967 if (dev_priv->cdclk.hw.vco != vco) {
968 /* Wa Display #1183: skl,kbl,cfl */
969 cdclk_ctl &= ~(CDCLK_FREQ_SEL_MASK | CDCLK_FREQ_DECIMAL_MASK);
970 cdclk_ctl |= freq_select | skl_cdclk_decimal(cdclk);
971 I915_WRITE(CDCLK_CTL, cdclk_ctl);
972 }
973
974 /* Wa Display #1183: skl,kbl,cfl */
975 cdclk_ctl |= CDCLK_DIVMUX_CD_OVERRIDE;
976 I915_WRITE(CDCLK_CTL, cdclk_ctl);
977 POSTING_READ(CDCLK_CTL);
978
971 if (dev_priv->cdclk.hw.vco != vco) 979 if (dev_priv->cdclk.hw.vco != vco)
972 skl_dpll0_enable(dev_priv, vco); 980 skl_dpll0_enable(dev_priv, vco);
973 981
974 I915_WRITE(CDCLK_CTL, freq_select | skl_cdclk_decimal(cdclk)); 982 /* Wa Display #1183: skl,kbl,cfl */
983 cdclk_ctl &= ~(CDCLK_FREQ_SEL_MASK | CDCLK_FREQ_DECIMAL_MASK);
984 I915_WRITE(CDCLK_CTL, cdclk_ctl);
985
986 cdclk_ctl |= freq_select | skl_cdclk_decimal(cdclk);
987 I915_WRITE(CDCLK_CTL, cdclk_ctl);
988
989 /* Wa Display #1183: skl,kbl,cfl */
990 cdclk_ctl &= ~CDCLK_DIVMUX_CD_OVERRIDE;
991 I915_WRITE(CDCLK_CTL, cdclk_ctl);
975 POSTING_READ(CDCLK_CTL); 992 POSTING_READ(CDCLK_CTL);
976 993
977 /* inform PCU of the change */ 994 /* inform PCU of the change */
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 30cf273d57aa..123585eeb87d 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -12544,11 +12544,15 @@ static int intel_atomic_commit(struct drm_device *dev,
12544 INIT_WORK(&state->commit_work, intel_atomic_commit_work); 12544 INIT_WORK(&state->commit_work, intel_atomic_commit_work);
12545 12545
12546 i915_sw_fence_commit(&intel_state->commit_ready); 12546 i915_sw_fence_commit(&intel_state->commit_ready);
12547 if (nonblock) 12547 if (nonblock && intel_state->modeset) {
12548 queue_work(dev_priv->modeset_wq, &state->commit_work);
12549 } else if (nonblock) {
12548 queue_work(system_unbound_wq, &state->commit_work); 12550 queue_work(system_unbound_wq, &state->commit_work);
12549 else 12551 } else {
12552 if (intel_state->modeset)
12553 flush_workqueue(dev_priv->modeset_wq);
12550 intel_atomic_commit_tail(state); 12554 intel_atomic_commit_tail(state);
12551 12555 }
12552 12556
12553 return 0; 12557 return 0;
12554} 12558}
@@ -14462,6 +14466,8 @@ int intel_modeset_init(struct drm_device *dev)
14462 enum pipe pipe; 14466 enum pipe pipe;
14463 struct intel_crtc *crtc; 14467 struct intel_crtc *crtc;
14464 14468
14469 dev_priv->modeset_wq = alloc_ordered_workqueue("i915_modeset", 0);
14470
14465 drm_mode_config_init(dev); 14471 drm_mode_config_init(dev);
14466 14472
14467 dev->mode_config.min_width = 0; 14473 dev->mode_config.min_width = 0;
@@ -15270,6 +15276,8 @@ void intel_modeset_cleanup(struct drm_device *dev)
15270 intel_cleanup_gt_powersave(dev_priv); 15276 intel_cleanup_gt_powersave(dev_priv);
15271 15277
15272 intel_teardown_gmbus(dev_priv); 15278 intel_teardown_gmbus(dev_priv);
15279
15280 destroy_workqueue(dev_priv->modeset_wq);
15273} 15281}
15274 15282
15275void intel_connector_attach_encoder(struct intel_connector *connector, 15283void intel_connector_attach_encoder(struct intel_connector *connector,
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 6e3b430fccdc..55ea5eb3b7df 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -590,7 +590,7 @@ static void hsw_psr_disable(struct intel_dp *intel_dp,
590 struct drm_i915_private *dev_priv = to_i915(dev); 590 struct drm_i915_private *dev_priv = to_i915(dev);
591 591
592 if (dev_priv->psr.active) { 592 if (dev_priv->psr.active) {
593 i915_reg_t psr_ctl; 593 i915_reg_t psr_status;
594 u32 psr_status_mask; 594 u32 psr_status_mask;
595 595
596 if (dev_priv->psr.aux_frame_sync) 596 if (dev_priv->psr.aux_frame_sync)
@@ -599,24 +599,24 @@ static void hsw_psr_disable(struct intel_dp *intel_dp,
599 0); 599 0);
600 600
601 if (dev_priv->psr.psr2_support) { 601 if (dev_priv->psr.psr2_support) {
602 psr_ctl = EDP_PSR2_CTL; 602 psr_status = EDP_PSR2_STATUS_CTL;
603 psr_status_mask = EDP_PSR2_STATUS_STATE_MASK; 603 psr_status_mask = EDP_PSR2_STATUS_STATE_MASK;
604 604
605 I915_WRITE(psr_ctl, 605 I915_WRITE(EDP_PSR2_CTL,
606 I915_READ(psr_ctl) & 606 I915_READ(EDP_PSR2_CTL) &
607 ~(EDP_PSR2_ENABLE | EDP_SU_TRACK_ENABLE)); 607 ~(EDP_PSR2_ENABLE | EDP_SU_TRACK_ENABLE));
608 608
609 } else { 609 } else {
610 psr_ctl = EDP_PSR_STATUS_CTL; 610 psr_status = EDP_PSR_STATUS_CTL;
611 psr_status_mask = EDP_PSR_STATUS_STATE_MASK; 611 psr_status_mask = EDP_PSR_STATUS_STATE_MASK;
612 612
613 I915_WRITE(psr_ctl, 613 I915_WRITE(EDP_PSR_CTL,
614 I915_READ(psr_ctl) & ~EDP_PSR_ENABLE); 614 I915_READ(EDP_PSR_CTL) & ~EDP_PSR_ENABLE);
615 } 615 }
616 616
617 /* Wait till PSR is idle */ 617 /* Wait till PSR is idle */
618 if (intel_wait_for_register(dev_priv, 618 if (intel_wait_for_register(dev_priv,
619 psr_ctl, psr_status_mask, 0, 619 psr_status, psr_status_mask, 0,
620 2000)) 620 2000))
621 DRM_ERROR("Timed out waiting for PSR Idle State\n"); 621 DRM_ERROR("Timed out waiting for PSR Idle State\n");
622 622
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
index 8af286c63d3b..7e115f3927f6 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -598,6 +598,11 @@ void gen9_enable_dc5(struct drm_i915_private *dev_priv)
598 598
599 DRM_DEBUG_KMS("Enabling DC5\n"); 599 DRM_DEBUG_KMS("Enabling DC5\n");
600 600
601 /* Wa Display #1183: skl,kbl,cfl */
602 if (IS_GEN9_BC(dev_priv))
603 I915_WRITE(GEN8_CHICKEN_DCPR_1, I915_READ(GEN8_CHICKEN_DCPR_1) |
604 SKL_SELECT_ALTERNATE_DC_EXIT);
605
601 gen9_set_dc_state(dev_priv, DC_STATE_EN_UPTO_DC5); 606 gen9_set_dc_state(dev_priv, DC_STATE_EN_UPTO_DC5);
602} 607}
603 608
@@ -625,6 +630,11 @@ void skl_disable_dc6(struct drm_i915_private *dev_priv)
625{ 630{
626 DRM_DEBUG_KMS("Disabling DC6\n"); 631 DRM_DEBUG_KMS("Disabling DC6\n");
627 632
633 /* Wa Display #1183: skl,kbl,cfl */
634 if (IS_GEN9_BC(dev_priv))
635 I915_WRITE(GEN8_CHICKEN_DCPR_1, I915_READ(GEN8_CHICKEN_DCPR_1) |
636 SKL_SELECT_ALTERNATE_DC_EXIT);
637
628 gen9_set_dc_state(dev_priv, DC_STATE_DISABLE); 638 gen9_set_dc_state(dev_priv, DC_STATE_DISABLE);
629} 639}
630 640
@@ -1786,6 +1796,7 @@ void intel_display_power_put(struct drm_i915_private *dev_priv,
1786 GLK_DISPLAY_POWERWELL_2_POWER_DOMAINS | \ 1796 GLK_DISPLAY_POWERWELL_2_POWER_DOMAINS | \
1787 BIT_ULL(POWER_DOMAIN_MODESET) | \ 1797 BIT_ULL(POWER_DOMAIN_MODESET) | \
1788 BIT_ULL(POWER_DOMAIN_AUX_A) | \ 1798 BIT_ULL(POWER_DOMAIN_AUX_A) | \
1799 BIT_ULL(POWER_DOMAIN_GMBUS) | \
1789 BIT_ULL(POWER_DOMAIN_INIT)) 1800 BIT_ULL(POWER_DOMAIN_INIT))
1790 1801
1791#define CNL_DISPLAY_POWERWELL_2_POWER_DOMAINS ( \ 1802#define CNL_DISPLAY_POWERWELL_2_POWER_DOMAINS ( \
diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi4_cec.c b/drivers/gpu/drm/omapdrm/dss/hdmi4_cec.c
index e626eddf24d5..23db74ae1826 100644
--- a/drivers/gpu/drm/omapdrm/dss/hdmi4_cec.c
+++ b/drivers/gpu/drm/omapdrm/dss/hdmi4_cec.c
@@ -78,6 +78,8 @@ static void hdmi_cec_received_msg(struct hdmi_core_data *core)
78 78
79 /* then read the message */ 79 /* then read the message */
80 msg.len = cnt & 0xf; 80 msg.len = cnt & 0xf;
81 if (msg.len > CEC_MAX_MSG_SIZE - 2)
82 msg.len = CEC_MAX_MSG_SIZE - 2;
81 msg.msg[0] = hdmi_read_reg(core->base, 83 msg.msg[0] = hdmi_read_reg(core->base,
82 HDMI_CEC_RX_CMD_HEADER); 84 HDMI_CEC_RX_CMD_HEADER);
83 msg.msg[1] = hdmi_read_reg(core->base, 85 msg.msg[1] = hdmi_read_reg(core->base,
@@ -104,26 +106,6 @@ static void hdmi_cec_received_msg(struct hdmi_core_data *core)
104 } 106 }
105} 107}
106 108
107static void hdmi_cec_transmit_fifo_empty(struct hdmi_core_data *core, u32 stat1)
108{
109 if (stat1 & 2) {
110 u32 dbg3 = hdmi_read_reg(core->base, HDMI_CEC_DBG_3);
111
112 cec_transmit_done(core->adap,
113 CEC_TX_STATUS_NACK |
114 CEC_TX_STATUS_MAX_RETRIES,
115 0, (dbg3 >> 4) & 7, 0, 0);
116 } else if (stat1 & 1) {
117 cec_transmit_done(core->adap,
118 CEC_TX_STATUS_ARB_LOST |
119 CEC_TX_STATUS_MAX_RETRIES,
120 0, 0, 0, 0);
121 } else if (stat1 == 0) {
122 cec_transmit_done(core->adap, CEC_TX_STATUS_OK,
123 0, 0, 0, 0);
124 }
125}
126
127void hdmi4_cec_irq(struct hdmi_core_data *core) 109void hdmi4_cec_irq(struct hdmi_core_data *core)
128{ 110{
129 u32 stat0 = hdmi_read_reg(core->base, HDMI_CEC_INT_STATUS_0); 111 u32 stat0 = hdmi_read_reg(core->base, HDMI_CEC_INT_STATUS_0);
@@ -132,27 +114,21 @@ void hdmi4_cec_irq(struct hdmi_core_data *core)
132 hdmi_write_reg(core->base, HDMI_CEC_INT_STATUS_0, stat0); 114 hdmi_write_reg(core->base, HDMI_CEC_INT_STATUS_0, stat0);
133 hdmi_write_reg(core->base, HDMI_CEC_INT_STATUS_1, stat1); 115 hdmi_write_reg(core->base, HDMI_CEC_INT_STATUS_1, stat1);
134 116
135 if (stat0 & 0x40) 117 if (stat0 & 0x20) {
118 cec_transmit_done(core->adap, CEC_TX_STATUS_OK,
119 0, 0, 0, 0);
136 REG_FLD_MOD(core->base, HDMI_CEC_DBG_3, 0x1, 7, 7); 120 REG_FLD_MOD(core->base, HDMI_CEC_DBG_3, 0x1, 7, 7);
137 else if (stat0 & 0x24) 121 } else if (stat1 & 0x02) {
138 hdmi_cec_transmit_fifo_empty(core, stat1);
139 if (stat1 & 2) {
140 u32 dbg3 = hdmi_read_reg(core->base, HDMI_CEC_DBG_3); 122 u32 dbg3 = hdmi_read_reg(core->base, HDMI_CEC_DBG_3);
141 123
142 cec_transmit_done(core->adap, 124 cec_transmit_done(core->adap,
143 CEC_TX_STATUS_NACK | 125 CEC_TX_STATUS_NACK |
144 CEC_TX_STATUS_MAX_RETRIES, 126 CEC_TX_STATUS_MAX_RETRIES,
145 0, (dbg3 >> 4) & 7, 0, 0); 127 0, (dbg3 >> 4) & 7, 0, 0);
146 } else if (stat1 & 1) { 128 REG_FLD_MOD(core->base, HDMI_CEC_DBG_3, 0x1, 7, 7);
147 cec_transmit_done(core->adap,
148 CEC_TX_STATUS_ARB_LOST |
149 CEC_TX_STATUS_MAX_RETRIES,
150 0, 0, 0, 0);
151 } 129 }
152 if (stat0 & 0x02) 130 if (stat0 & 0x02)
153 hdmi_cec_received_msg(core); 131 hdmi_cec_received_msg(core);
154 if (stat1 & 0x3)
155 REG_FLD_MOD(core->base, HDMI_CEC_DBG_3, 0x1, 7, 7);
156} 132}
157 133
158static bool hdmi_cec_clear_tx_fifo(struct cec_adapter *adap) 134static bool hdmi_cec_clear_tx_fifo(struct cec_adapter *adap)
@@ -231,18 +207,14 @@ static int hdmi_cec_adap_enable(struct cec_adapter *adap, bool enable)
231 /* 207 /*
232 * Enable CEC interrupts: 208 * Enable CEC interrupts:
233 * Transmit Buffer Full/Empty Change event 209 * Transmit Buffer Full/Empty Change event
234 * Transmitter FIFO Empty event
235 * Receiver FIFO Not Empty event 210 * Receiver FIFO Not Empty event
236 */ 211 */
237 hdmi_write_reg(core->base, HDMI_CEC_INT_ENABLE_0, 0x26); 212 hdmi_write_reg(core->base, HDMI_CEC_INT_ENABLE_0, 0x22);
238 /* 213 /*
239 * Enable CEC interrupts: 214 * Enable CEC interrupts:
240 * RX FIFO Overrun Error event
241 * Short Pulse Detected event
242 * Frame Retransmit Count Exceeded event 215 * Frame Retransmit Count Exceeded event
243 * Start Bit Irregularity event
244 */ 216 */
245 hdmi_write_reg(core->base, HDMI_CEC_INT_ENABLE_1, 0x0f); 217 hdmi_write_reg(core->base, HDMI_CEC_INT_ENABLE_1, 0x02);
246 218
247 /* cec calibration enable (self clearing) */ 219 /* cec calibration enable (self clearing) */
248 hdmi_write_reg(core->base, HDMI_CEC_SETUP, 0x03); 220 hdmi_write_reg(core->base, HDMI_CEC_SETUP, 0x03);
diff --git a/drivers/gpu/drm/ttm/ttm_page_alloc.c b/drivers/gpu/drm/ttm/ttm_page_alloc.c
index b5ba6441489f..5d252fb27a82 100644
--- a/drivers/gpu/drm/ttm/ttm_page_alloc.c
+++ b/drivers/gpu/drm/ttm/ttm_page_alloc.c
@@ -1007,6 +1007,8 @@ int ttm_page_alloc_init(struct ttm_mem_global *glob, unsigned max_pages)
1007 pr_info("Initializing pool allocator\n"); 1007 pr_info("Initializing pool allocator\n");
1008 1008
1009 _manager = kzalloc(sizeof(*_manager), GFP_KERNEL); 1009 _manager = kzalloc(sizeof(*_manager), GFP_KERNEL);
1010 if (!_manager)
1011 return -ENOMEM;
1010 1012
1011 ttm_page_pool_init_locked(&_manager->wc_pool, GFP_HIGHUSER, "wc", 0); 1013 ttm_page_pool_init_locked(&_manager->wc_pool, GFP_HIGHUSER, "wc", 0);
1012 1014
diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig
index ef86296b8b0d..39e3b345a6c8 100644
--- a/drivers/iio/adc/Kconfig
+++ b/drivers/iio/adc/Kconfig
@@ -629,6 +629,18 @@ config SPEAR_ADC
629 To compile this driver as a module, choose M here: the 629 To compile this driver as a module, choose M here: the
630 module will be called spear_adc. 630 module will be called spear_adc.
631 631
632config SD_ADC_MODULATOR
633 tristate "Generic sigma delta modulator"
634 depends on OF
635 select IIO_BUFFER
636 select IIO_TRIGGERED_BUFFER
637 help
638 Select this option to enables sigma delta modulator. This driver can
639 support generic sigma delta modulators.
640
641 This driver can also be built as a module. If so, the module
642 will be called sd_adc_modulator.
643
632config STM32_ADC_CORE 644config STM32_ADC_CORE
633 tristate "STMicroelectronics STM32 adc core" 645 tristate "STMicroelectronics STM32 adc core"
634 depends on ARCH_STM32 || COMPILE_TEST 646 depends on ARCH_STM32 || COMPILE_TEST
@@ -656,6 +668,31 @@ config STM32_ADC
656 This driver can also be built as a module. If so, the module 668 This driver can also be built as a module. If so, the module
657 will be called stm32-adc. 669 will be called stm32-adc.
658 670
671config STM32_DFSDM_CORE
672 tristate "STMicroelectronics STM32 DFSDM core"
673 depends on (ARCH_STM32 && OF) || COMPILE_TEST
674 select REGMAP
675 select REGMAP_MMIO
676 help
677 Select this option to enable the driver for STMicroelectronics
678 STM32 digital filter for sigma delta converter.
679
680 This driver can also be built as a module. If so, the module
681 will be called stm32-dfsdm-core.
682
683config STM32_DFSDM_ADC
684 tristate "STMicroelectronics STM32 dfsdm adc"
685 depends on (ARCH_STM32 && OF) || COMPILE_TEST
686 select STM32_DFSDM_CORE
687 select REGMAP_MMIO
688 select IIO_BUFFER_HW_CONSUMER
689 help
690 Select this option to support ADCSigma delta modulator for
691 STMicroelectronics STM32 digital filter for sigma delta converter.
692
693 This driver can also be built as a module. If so, the module
694 will be called stm32-dfsdm-adc.
695
659config STX104 696config STX104
660 tristate "Apex Embedded Systems STX104 driver" 697 tristate "Apex Embedded Systems STX104 driver"
661 depends on PC104 && X86 && ISA_BUS_API 698 depends on PC104 && X86 && ISA_BUS_API
diff --git a/drivers/iio/adc/Makefile b/drivers/iio/adc/Makefile
index 9572c1090f35..28a9423997f3 100644
--- a/drivers/iio/adc/Makefile
+++ b/drivers/iio/adc/Makefile
@@ -64,6 +64,8 @@ obj-$(CONFIG_STX104) += stx104.o
64obj-$(CONFIG_SUN4I_GPADC) += sun4i-gpadc-iio.o 64obj-$(CONFIG_SUN4I_GPADC) += sun4i-gpadc-iio.o
65obj-$(CONFIG_STM32_ADC_CORE) += stm32-adc-core.o 65obj-$(CONFIG_STM32_ADC_CORE) += stm32-adc-core.o
66obj-$(CONFIG_STM32_ADC) += stm32-adc.o 66obj-$(CONFIG_STM32_ADC) += stm32-adc.o
67obj-$(CONFIG_STM32_DFSDM_CORE) += stm32-dfsdm-core.o
68obj-$(CONFIG_STM32_DFSDM_ADC) += stm32-dfsdm-adc.o
67obj-$(CONFIG_TI_ADC081C) += ti-adc081c.o 69obj-$(CONFIG_TI_ADC081C) += ti-adc081c.o
68obj-$(CONFIG_TI_ADC0832) += ti-adc0832.o 70obj-$(CONFIG_TI_ADC0832) += ti-adc0832.o
69obj-$(CONFIG_TI_ADC084S021) += ti-adc084s021.o 71obj-$(CONFIG_TI_ADC084S021) += ti-adc084s021.o
@@ -82,3 +84,4 @@ obj-$(CONFIG_VF610_ADC) += vf610_adc.o
82obj-$(CONFIG_VIPERBOARD_ADC) += viperboard_adc.o 84obj-$(CONFIG_VIPERBOARD_ADC) += viperboard_adc.o
83xilinx-xadc-y := xilinx-xadc-core.o xilinx-xadc-events.o 85xilinx-xadc-y := xilinx-xadc-core.o xilinx-xadc-events.o
84obj-$(CONFIG_XILINX_XADC) += xilinx-xadc.o 86obj-$(CONFIG_XILINX_XADC) += xilinx-xadc.o
87obj-$(CONFIG_SD_ADC_MODULATOR) += sd_adc_modulator.o
diff --git a/drivers/iio/adc/sd_adc_modulator.c b/drivers/iio/adc/sd_adc_modulator.c
new file mode 100644
index 000000000000..560d8c7d9d86
--- /dev/null
+++ b/drivers/iio/adc/sd_adc_modulator.c
@@ -0,0 +1,68 @@
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Generic sigma delta modulator driver
4 *
5 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
6 * Author: Arnaud Pouliquen <arnaud.pouliquen@st.com>.
7 */
8
9#include <linux/iio/iio.h>
10#include <linux/iio/triggered_buffer.h>
11#include <linux/module.h>
12#include <linux/of_device.h>
13
14static const struct iio_info iio_sd_mod_iio_info;
15
16static const struct iio_chan_spec iio_sd_mod_ch = {
17 .type = IIO_VOLTAGE,
18 .indexed = 1,
19 .scan_type = {
20 .sign = 'u',
21 .realbits = 1,
22 .shift = 0,
23 },
24};
25
26static int iio_sd_mod_probe(struct platform_device *pdev)
27{
28 struct device *dev = &pdev->dev;
29 struct iio_dev *iio;
30
31 iio = devm_iio_device_alloc(dev, 0);
32 if (!iio)
33 return -ENOMEM;
34
35 iio->dev.parent = dev;
36 iio->dev.of_node = dev->of_node;
37 iio->name = dev_name(dev);
38 iio->info = &iio_sd_mod_iio_info;
39 iio->modes = INDIO_BUFFER_HARDWARE;
40
41 iio->num_channels = 1;
42 iio->channels = &iio_sd_mod_ch;
43
44 platform_set_drvdata(pdev, iio);
45
46 return devm_iio_device_register(&pdev->dev, iio);
47}
48
49static const struct of_device_id sd_adc_of_match[] = {
50 { .compatible = "sd-modulator" },
51 { .compatible = "ads1201" },
52 { }
53};
54MODULE_DEVICE_TABLE(of, sd_adc_of_match);
55
56static struct platform_driver iio_sd_mod_adc = {
57 .driver = {
58 .name = "iio_sd_adc_mod",
59 .of_match_table = of_match_ptr(sd_adc_of_match),
60 },
61 .probe = iio_sd_mod_probe,
62};
63
64module_platform_driver(iio_sd_mod_adc);
65
66MODULE_DESCRIPTION("Basic sigma delta modulator");
67MODULE_AUTHOR("Arnaud Pouliquen <arnaud.pouliquen@st.com>");
68MODULE_LICENSE("GPL v2");
diff --git a/drivers/iio/adc/stm32-dfsdm-adc.c b/drivers/iio/adc/stm32-dfsdm-adc.c
new file mode 100644
index 000000000000..5e871404f565
--- /dev/null
+++ b/drivers/iio/adc/stm32-dfsdm-adc.c
@@ -0,0 +1,1216 @@
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * This file is the ADC part of the STM32 DFSDM driver
4 *
5 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
6 * Author: Arnaud Pouliquen <arnaud.pouliquen@st.com>.
7 */
8
9#include <linux/dmaengine.h>
10#include <linux/dma-mapping.h>
11#include <linux/interrupt.h>
12#include <linux/iio/buffer.h>
13#include <linux/iio/hw-consumer.h>
14#include <linux/iio/iio.h>
15#include <linux/iio/sysfs.h>
16#include <linux/module.h>
17#include <linux/of_device.h>
18#include <linux/platform_device.h>
19#include <linux/regmap.h>
20#include <linux/slab.h>
21
22#include "stm32-dfsdm.h"
23
24#define DFSDM_DMA_BUFFER_SIZE (4 * PAGE_SIZE)
25
26/* Conversion timeout */
27#define DFSDM_TIMEOUT_US 100000
28#define DFSDM_TIMEOUT (msecs_to_jiffies(DFSDM_TIMEOUT_US / 1000))
29
30/* Oversampling attribute default */
31#define DFSDM_DEFAULT_OVERSAMPLING 100
32
33/* Oversampling max values */
34#define DFSDM_MAX_INT_OVERSAMPLING 256
35#define DFSDM_MAX_FL_OVERSAMPLING 1024
36
37/* Max sample resolutions */
38#define DFSDM_MAX_RES BIT(31)
39#define DFSDM_DATA_RES BIT(23)
40
41enum sd_converter_type {
42 DFSDM_AUDIO,
43 DFSDM_IIO,
44};
45
46struct stm32_dfsdm_dev_data {
47 int type;
48 int (*init)(struct iio_dev *indio_dev);
49 unsigned int num_channels;
50 const struct regmap_config *regmap_cfg;
51};
52
53struct stm32_dfsdm_adc {
54 struct stm32_dfsdm *dfsdm;
55 const struct stm32_dfsdm_dev_data *dev_data;
56 unsigned int fl_id;
57 unsigned int ch_id;
58
59 /* ADC specific */
60 unsigned int oversamp;
61 struct iio_hw_consumer *hwc;
62 struct completion completion;
63 u32 *buffer;
64
65 /* Audio specific */
66 unsigned int spi_freq; /* SPI bus clock frequency */
67 unsigned int sample_freq; /* Sample frequency after filter decimation */
68 int (*cb)(const void *data, size_t size, void *cb_priv);
69 void *cb_priv;
70
71 /* DMA */
72 u8 *rx_buf;
73 unsigned int bufi; /* Buffer current position */
74 unsigned int buf_sz; /* Buffer size */
75 struct dma_chan *dma_chan;
76 dma_addr_t dma_buf;
77};
78
79struct stm32_dfsdm_str2field {
80 const char *name;
81 unsigned int val;
82};
83
84/* DFSDM channel serial interface type */
85static const struct stm32_dfsdm_str2field stm32_dfsdm_chan_type[] = {
86 { "SPI_R", 0 }, /* SPI with data on rising edge */
87 { "SPI_F", 1 }, /* SPI with data on falling edge */
88 { "MANCH_R", 2 }, /* Manchester codec, rising edge = logic 0 */
89 { "MANCH_F", 3 }, /* Manchester codec, falling edge = logic 1 */
90 {},
91};
92
93/* DFSDM channel clock source */
94static const struct stm32_dfsdm_str2field stm32_dfsdm_chan_src[] = {
95 /* External SPI clock (CLKIN x) */
96 { "CLKIN", DFSDM_CHANNEL_SPI_CLOCK_EXTERNAL },
97 /* Internal SPI clock (CLKOUT) */
98 { "CLKOUT", DFSDM_CHANNEL_SPI_CLOCK_INTERNAL },
99 /* Internal SPI clock divided by 2 (falling edge) */
100 { "CLKOUT_F", DFSDM_CHANNEL_SPI_CLOCK_INTERNAL_DIV2_FALLING },
101 /* Internal SPI clock divided by 2 (falling edge) */
102 { "CLKOUT_R", DFSDM_CHANNEL_SPI_CLOCK_INTERNAL_DIV2_RISING },
103 {},
104};
105
106static int stm32_dfsdm_str2val(const char *str,
107 const struct stm32_dfsdm_str2field *list)
108{
109 const struct stm32_dfsdm_str2field *p = list;
110
111 for (p = list; p && p->name; p++)
112 if (!strcmp(p->name, str))
113 return p->val;
114
115 return -EINVAL;
116}
117
118static int stm32_dfsdm_set_osrs(struct stm32_dfsdm_filter *fl,
119 unsigned int fast, unsigned int oversamp)
120{
121 unsigned int i, d, fosr, iosr;
122 u64 res;
123 s64 delta;
124 unsigned int m = 1; /* multiplication factor */
125 unsigned int p = fl->ford; /* filter order (ford) */
126
127 pr_debug("%s: Requested oversampling: %d\n", __func__, oversamp);
128 /*
129 * This function tries to compute filter oversampling and integrator
130 * oversampling, base on oversampling ratio requested by user.
131 *
132 * Decimation d depends on the filter order and the oversampling ratios.
133 * ford: filter order
134 * fosr: filter over sampling ratio
135 * iosr: integrator over sampling ratio
136 */
137 if (fl->ford == DFSDM_FASTSINC_ORDER) {
138 m = 2;
139 p = 2;
140 }
141
142 /*
143 * Look for filter and integrator oversampling ratios which allows
144 * to reach 24 bits data output resolution.
145 * Leave as soon as if exact resolution if reached.
146 * Otherwise the higher resolution below 32 bits is kept.
147 */
148 for (fosr = 1; fosr <= DFSDM_MAX_FL_OVERSAMPLING; fosr++) {
149 for (iosr = 1; iosr <= DFSDM_MAX_INT_OVERSAMPLING; iosr++) {
150 if (fast)
151 d = fosr * iosr;
152 else if (fl->ford == DFSDM_FASTSINC_ORDER)
153 d = fosr * (iosr + 3) + 2;
154 else
155 d = fosr * (iosr - 1 + p) + p;
156
157 if (d > oversamp)
158 break;
159 else if (d != oversamp)
160 continue;
161 /*
162 * Check resolution (limited to signed 32 bits)
163 * res <= 2^31
164 * Sincx filters:
165 * res = m * fosr^p x iosr (with m=1, p=ford)
166 * FastSinc filter
167 * res = m * fosr^p x iosr (with m=2, p=2)
168 */
169 res = fosr;
170 for (i = p - 1; i > 0; i--) {
171 res = res * (u64)fosr;
172 if (res > DFSDM_MAX_RES)
173 break;
174 }
175 if (res > DFSDM_MAX_RES)
176 continue;
177 res = res * (u64)m * (u64)iosr;
178 if (res > DFSDM_MAX_RES)
179 continue;
180
181 delta = res - DFSDM_DATA_RES;
182
183 if (res >= fl->res) {
184 fl->res = res;
185 fl->fosr = fosr;
186 fl->iosr = iosr;
187 fl->fast = fast;
188 pr_debug("%s: fosr = %d, iosr = %d\n",
189 __func__, fl->fosr, fl->iosr);
190 }
191
192 if (!delta)
193 return 0;
194 }
195 }
196
197 if (!fl->fosr)
198 return -EINVAL;
199
200 return 0;
201}
202
203static int stm32_dfsdm_start_channel(struct stm32_dfsdm *dfsdm,
204 unsigned int ch_id)
205{
206 return regmap_update_bits(dfsdm->regmap, DFSDM_CHCFGR1(ch_id),
207 DFSDM_CHCFGR1_CHEN_MASK,
208 DFSDM_CHCFGR1_CHEN(1));
209}
210
211static void stm32_dfsdm_stop_channel(struct stm32_dfsdm *dfsdm,
212 unsigned int ch_id)
213{
214 regmap_update_bits(dfsdm->regmap, DFSDM_CHCFGR1(ch_id),
215 DFSDM_CHCFGR1_CHEN_MASK, DFSDM_CHCFGR1_CHEN(0));
216}
217
218static int stm32_dfsdm_chan_configure(struct stm32_dfsdm *dfsdm,
219 struct stm32_dfsdm_channel *ch)
220{
221 unsigned int id = ch->id;
222 struct regmap *regmap = dfsdm->regmap;
223 int ret;
224
225 ret = regmap_update_bits(regmap, DFSDM_CHCFGR1(id),
226 DFSDM_CHCFGR1_SITP_MASK,
227 DFSDM_CHCFGR1_SITP(ch->type));
228 if (ret < 0)
229 return ret;
230 ret = regmap_update_bits(regmap, DFSDM_CHCFGR1(id),
231 DFSDM_CHCFGR1_SPICKSEL_MASK,
232 DFSDM_CHCFGR1_SPICKSEL(ch->src));
233 if (ret < 0)
234 return ret;
235 return regmap_update_bits(regmap, DFSDM_CHCFGR1(id),
236 DFSDM_CHCFGR1_CHINSEL_MASK,
237 DFSDM_CHCFGR1_CHINSEL(ch->alt_si));
238}
239
240static int stm32_dfsdm_start_filter(struct stm32_dfsdm *dfsdm,
241 unsigned int fl_id)
242{
243 int ret;
244
245 /* Enable filter */
246 ret = regmap_update_bits(dfsdm->regmap, DFSDM_CR1(fl_id),
247 DFSDM_CR1_DFEN_MASK, DFSDM_CR1_DFEN(1));
248 if (ret < 0)
249 return ret;
250
251 /* Start conversion */
252 return regmap_update_bits(dfsdm->regmap, DFSDM_CR1(fl_id),
253 DFSDM_CR1_RSWSTART_MASK,
254 DFSDM_CR1_RSWSTART(1));
255}
256
257static void stm32_dfsdm_stop_filter(struct stm32_dfsdm *dfsdm, unsigned int fl_id)
258{
259 /* Disable conversion */
260 regmap_update_bits(dfsdm->regmap, DFSDM_CR1(fl_id),
261 DFSDM_CR1_DFEN_MASK, DFSDM_CR1_DFEN(0));
262}
263
264static int stm32_dfsdm_filter_configure(struct stm32_dfsdm *dfsdm,
265 unsigned int fl_id, unsigned int ch_id)
266{
267 struct regmap *regmap = dfsdm->regmap;
268 struct stm32_dfsdm_filter *fl = &dfsdm->fl_list[fl_id];
269 int ret;
270
271 /* Average integrator oversampling */
272 ret = regmap_update_bits(regmap, DFSDM_FCR(fl_id), DFSDM_FCR_IOSR_MASK,
273 DFSDM_FCR_IOSR(fl->iosr - 1));
274 if (ret)
275 return ret;
276
277 /* Filter order and Oversampling */
278 ret = regmap_update_bits(regmap, DFSDM_FCR(fl_id), DFSDM_FCR_FOSR_MASK,
279 DFSDM_FCR_FOSR(fl->fosr - 1));
280 if (ret)
281 return ret;
282
283 ret = regmap_update_bits(regmap, DFSDM_FCR(fl_id), DFSDM_FCR_FORD_MASK,
284 DFSDM_FCR_FORD(fl->ford));
285 if (ret)
286 return ret;
287
288 /* No scan mode supported for the moment */
289 ret = regmap_update_bits(regmap, DFSDM_CR1(fl_id), DFSDM_CR1_RCH_MASK,
290 DFSDM_CR1_RCH(ch_id));
291 if (ret)
292 return ret;
293
294 return regmap_update_bits(regmap, DFSDM_CR1(fl_id),
295 DFSDM_CR1_RSYNC_MASK,
296 DFSDM_CR1_RSYNC(fl->sync_mode));
297}
298
299static int stm32_dfsdm_channel_parse_of(struct stm32_dfsdm *dfsdm,
300 struct iio_dev *indio_dev,
301 struct iio_chan_spec *ch)
302{
303 struct stm32_dfsdm_channel *df_ch;
304 const char *of_str;
305 int chan_idx = ch->scan_index;
306 int ret, val;
307
308 ret = of_property_read_u32_index(indio_dev->dev.of_node,
309 "st,adc-channels", chan_idx,
310 &ch->channel);
311 if (ret < 0) {
312 dev_err(&indio_dev->dev,
313 " Error parsing 'st,adc-channels' for idx %d\n",
314 chan_idx);
315 return ret;
316 }
317 if (ch->channel >= dfsdm->num_chs) {
318 dev_err(&indio_dev->dev,
319 " Error bad channel number %d (max = %d)\n",
320 ch->channel, dfsdm->num_chs);
321 return -EINVAL;
322 }
323
324 ret = of_property_read_string_index(indio_dev->dev.of_node,
325 "st,adc-channel-names", chan_idx,
326 &ch->datasheet_name);
327 if (ret < 0) {
328 dev_err(&indio_dev->dev,
329 " Error parsing 'st,adc-channel-names' for idx %d\n",
330 chan_idx);
331 return ret;
332 }
333
334 df_ch = &dfsdm->ch_list[ch->channel];
335 df_ch->id = ch->channel;
336
337 ret = of_property_read_string_index(indio_dev->dev.of_node,
338 "st,adc-channel-types", chan_idx,
339 &of_str);
340 if (!ret) {
341 val = stm32_dfsdm_str2val(of_str, stm32_dfsdm_chan_type);
342 if (val < 0)
343 return val;
344 } else {
345 val = 0;
346 }
347 df_ch->type = val;
348
349 ret = of_property_read_string_index(indio_dev->dev.of_node,
350 "st,adc-channel-clk-src", chan_idx,
351 &of_str);
352 if (!ret) {
353 val = stm32_dfsdm_str2val(of_str, stm32_dfsdm_chan_src);
354 if (val < 0)
355 return val;
356 } else {
357 val = 0;
358 }
359 df_ch->src = val;
360
361 ret = of_property_read_u32_index(indio_dev->dev.of_node,
362 "st,adc-alt-channel", chan_idx,
363 &df_ch->alt_si);
364 if (ret < 0)
365 df_ch->alt_si = 0;
366
367 return 0;
368}
369
370static ssize_t dfsdm_adc_audio_get_spiclk(struct iio_dev *indio_dev,
371 uintptr_t priv,
372 const struct iio_chan_spec *chan,
373 char *buf)
374{
375 struct stm32_dfsdm_adc *adc = iio_priv(indio_dev);
376
377 return snprintf(buf, PAGE_SIZE, "%d\n", adc->spi_freq);
378}
379
380static ssize_t dfsdm_adc_audio_set_spiclk(struct iio_dev *indio_dev,
381 uintptr_t priv,
382 const struct iio_chan_spec *chan,
383 const char *buf, size_t len)
384{
385 struct stm32_dfsdm_adc *adc = iio_priv(indio_dev);
386 struct stm32_dfsdm_filter *fl = &adc->dfsdm->fl_list[adc->fl_id];
387 struct stm32_dfsdm_channel *ch = &adc->dfsdm->ch_list[adc->ch_id];
388 unsigned int sample_freq = adc->sample_freq;
389 unsigned int spi_freq;
390 int ret;
391
392 dev_err(&indio_dev->dev, "enter %s\n", __func__);
393 /* If DFSDM is master on SPI, SPI freq can not be updated */
394 if (ch->src != DFSDM_CHANNEL_SPI_CLOCK_EXTERNAL)
395 return -EPERM;
396
397 ret = kstrtoint(buf, 0, &spi_freq);
398 if (ret)
399 return ret;
400
401 if (!spi_freq)
402 return -EINVAL;
403
404 if (sample_freq) {
405 if (spi_freq % sample_freq)
406 dev_warn(&indio_dev->dev,
407 "Sampling rate not accurate (%d)\n",
408 spi_freq / (spi_freq / sample_freq));
409
410 ret = stm32_dfsdm_set_osrs(fl, 0, (spi_freq / sample_freq));
411 if (ret < 0) {
412 dev_err(&indio_dev->dev,
413 "No filter parameters that match!\n");
414 return ret;
415 }
416 }
417 adc->spi_freq = spi_freq;
418
419 return len;
420}
421
422static int stm32_dfsdm_start_conv(struct stm32_dfsdm_adc *adc, bool dma)
423{
424 struct regmap *regmap = adc->dfsdm->regmap;
425 int ret;
426 unsigned int dma_en = 0, cont_en = 0;
427
428 ret = stm32_dfsdm_start_channel(adc->dfsdm, adc->ch_id);
429 if (ret < 0)
430 return ret;
431
432 ret = stm32_dfsdm_filter_configure(adc->dfsdm, adc->fl_id,
433 adc->ch_id);
434 if (ret < 0)
435 goto stop_channels;
436
437 if (dma) {
438 /* Enable DMA transfer*/
439 dma_en = DFSDM_CR1_RDMAEN(1);
440 /* Enable conversion triggered by SPI clock*/
441 cont_en = DFSDM_CR1_RCONT(1);
442 }
443 /* Enable DMA transfer*/
444 ret = regmap_update_bits(regmap, DFSDM_CR1(adc->fl_id),
445 DFSDM_CR1_RDMAEN_MASK, dma_en);
446 if (ret < 0)
447 goto stop_channels;
448
449 /* Enable conversion triggered by SPI clock*/
450 ret = regmap_update_bits(regmap, DFSDM_CR1(adc->fl_id),
451 DFSDM_CR1_RCONT_MASK, cont_en);
452 if (ret < 0)
453 goto stop_channels;
454
455 ret = stm32_dfsdm_start_filter(adc->dfsdm, adc->fl_id);
456 if (ret < 0)
457 goto stop_channels;
458
459 return 0;
460
461stop_channels:
462 regmap_update_bits(regmap, DFSDM_CR1(adc->fl_id),
463 DFSDM_CR1_RDMAEN_MASK, 0);
464
465 regmap_update_bits(regmap, DFSDM_CR1(adc->fl_id),
466 DFSDM_CR1_RCONT_MASK, 0);
467 stm32_dfsdm_stop_channel(adc->dfsdm, adc->fl_id);
468
469 return ret;
470}
471
472static void stm32_dfsdm_stop_conv(struct stm32_dfsdm_adc *adc)
473{
474 struct regmap *regmap = adc->dfsdm->regmap;
475
476 stm32_dfsdm_stop_filter(adc->dfsdm, adc->fl_id);
477
478 /* Clean conversion options */
479 regmap_update_bits(regmap, DFSDM_CR1(adc->fl_id),
480 DFSDM_CR1_RDMAEN_MASK, 0);
481
482 regmap_update_bits(regmap, DFSDM_CR1(adc->fl_id),
483 DFSDM_CR1_RCONT_MASK, 0);
484
485 stm32_dfsdm_stop_channel(adc->dfsdm, adc->ch_id);
486}
487
488static int stm32_dfsdm_set_watermark(struct iio_dev *indio_dev,
489 unsigned int val)
490{
491 struct stm32_dfsdm_adc *adc = iio_priv(indio_dev);
492 unsigned int watermark = DFSDM_DMA_BUFFER_SIZE / 2;
493
494 /*
495 * DMA cyclic transfers are used, buffer is split into two periods.
496 * There should be :
497 * - always one buffer (period) DMA is working on
498 * - one buffer (period) driver pushed to ASoC side.
499 */
500 watermark = min(watermark, val * (unsigned int)(sizeof(u32)));
501 adc->buf_sz = watermark * 2;
502
503 return 0;
504}
505
506static unsigned int stm32_dfsdm_adc_dma_residue(struct stm32_dfsdm_adc *adc)
507{
508 struct dma_tx_state state;
509 enum dma_status status;
510
511 status = dmaengine_tx_status(adc->dma_chan,
512 adc->dma_chan->cookie,
513 &state);
514 if (status == DMA_IN_PROGRESS) {
515 /* Residue is size in bytes from end of buffer */
516 unsigned int i = adc->buf_sz - state.residue;
517 unsigned int size;
518
519 /* Return available bytes */
520 if (i >= adc->bufi)
521 size = i - adc->bufi;
522 else
523 size = adc->buf_sz + i - adc->bufi;
524
525 return size;
526 }
527
528 return 0;
529}
530
531static void stm32_dfsdm_audio_dma_buffer_done(void *data)
532{
533 struct iio_dev *indio_dev = data;
534 struct stm32_dfsdm_adc *adc = iio_priv(indio_dev);
535 int available = stm32_dfsdm_adc_dma_residue(adc);
536 size_t old_pos;
537
538 /*
539 * FIXME: In Kernel interface does not support cyclic DMA buffer,and
540 * offers only an interface to push data samples per samples.
541 * For this reason IIO buffer interface is not used and interface is
542 * bypassed using a private callback registered by ASoC.
543 * This should be a temporary solution waiting a cyclic DMA engine
544 * support in IIO.
545 */
546
547 dev_dbg(&indio_dev->dev, "%s: pos = %d, available = %d\n", __func__,
548 adc->bufi, available);
549 old_pos = adc->bufi;
550
551 while (available >= indio_dev->scan_bytes) {
552 u32 *buffer = (u32 *)&adc->rx_buf[adc->bufi];
553
554 /* Mask 8 LSB that contains the channel ID */
555 *buffer = (*buffer & 0xFFFFFF00) << 8;
556 available -= indio_dev->scan_bytes;
557 adc->bufi += indio_dev->scan_bytes;
558 if (adc->bufi >= adc->buf_sz) {
559 if (adc->cb)
560 adc->cb(&adc->rx_buf[old_pos],
561 adc->buf_sz - old_pos, adc->cb_priv);
562 adc->bufi = 0;
563 old_pos = 0;
564 }
565 }
566 if (adc->cb)
567 adc->cb(&adc->rx_buf[old_pos], adc->bufi - old_pos,
568 adc->cb_priv);
569}
570
571static int stm32_dfsdm_adc_dma_start(struct iio_dev *indio_dev)
572{
573 struct stm32_dfsdm_adc *adc = iio_priv(indio_dev);
574 struct dma_async_tx_descriptor *desc;
575 dma_cookie_t cookie;
576 int ret;
577
578 if (!adc->dma_chan)
579 return -EINVAL;
580
581 dev_dbg(&indio_dev->dev, "%s size=%d watermark=%d\n", __func__,
582 adc->buf_sz, adc->buf_sz / 2);
583
584 /* Prepare a DMA cyclic transaction */
585 desc = dmaengine_prep_dma_cyclic(adc->dma_chan,
586 adc->dma_buf,
587 adc->buf_sz, adc->buf_sz / 2,
588 DMA_DEV_TO_MEM,
589 DMA_PREP_INTERRUPT);
590 if (!desc)
591 return -EBUSY;
592
593 desc->callback = stm32_dfsdm_audio_dma_buffer_done;
594 desc->callback_param = indio_dev;
595
596 cookie = dmaengine_submit(desc);
597 ret = dma_submit_error(cookie);
598 if (ret) {
599 dmaengine_terminate_all(adc->dma_chan);
600 return ret;
601 }
602
603 /* Issue pending DMA requests */
604 dma_async_issue_pending(adc->dma_chan);
605
606 return 0;
607}
608
609static int stm32_dfsdm_postenable(struct iio_dev *indio_dev)
610{
611 struct stm32_dfsdm_adc *adc = iio_priv(indio_dev);
612 int ret;
613
614 /* Reset adc buffer index */
615 adc->bufi = 0;
616
617 ret = stm32_dfsdm_start_dfsdm(adc->dfsdm);
618 if (ret < 0)
619 return ret;
620
621 ret = stm32_dfsdm_start_conv(adc, true);
622 if (ret) {
623 dev_err(&indio_dev->dev, "Can't start conversion\n");
624 goto stop_dfsdm;
625 }
626
627 if (adc->dma_chan) {
628 ret = stm32_dfsdm_adc_dma_start(indio_dev);
629 if (ret) {
630 dev_err(&indio_dev->dev, "Can't start DMA\n");
631 goto err_stop_conv;
632 }
633 }
634
635 return 0;
636
637err_stop_conv:
638 stm32_dfsdm_stop_conv(adc);
639stop_dfsdm:
640 stm32_dfsdm_stop_dfsdm(adc->dfsdm);
641
642 return ret;
643}
644
645static int stm32_dfsdm_predisable(struct iio_dev *indio_dev)
646{
647 struct stm32_dfsdm_adc *adc = iio_priv(indio_dev);
648
649 if (adc->dma_chan)
650 dmaengine_terminate_all(adc->dma_chan);
651
652 stm32_dfsdm_stop_conv(adc);
653
654 stm32_dfsdm_stop_dfsdm(adc->dfsdm);
655
656 return 0;
657}
658
659static const struct iio_buffer_setup_ops stm32_dfsdm_buffer_setup_ops = {
660 .postenable = &stm32_dfsdm_postenable,
661 .predisable = &stm32_dfsdm_predisable,
662};
663
664/**
665 * stm32_dfsdm_get_buff_cb() - register a callback that will be called when
666 * DMA transfer period is achieved.
667 *
668 * @iio_dev: Handle to IIO device.
669 * @cb: Pointer to callback function:
670 * - data: pointer to data buffer
671 * - size: size in byte of the data buffer
672 * - private: pointer to consumer private structure.
673 * @private: Pointer to consumer private structure.
674 */
675int stm32_dfsdm_get_buff_cb(struct iio_dev *iio_dev,
676 int (*cb)(const void *data, size_t size,
677 void *private),
678 void *private)
679{
680 struct stm32_dfsdm_adc *adc;
681
682 if (!iio_dev)
683 return -EINVAL;
684 adc = iio_priv(iio_dev);
685
686 adc->cb = cb;
687 adc->cb_priv = private;
688
689 return 0;
690}
691EXPORT_SYMBOL_GPL(stm32_dfsdm_get_buff_cb);
692
693/**
694 * stm32_dfsdm_release_buff_cb - unregister buffer callback
695 *
696 * @iio_dev: Handle to IIO device.
697 */
698int stm32_dfsdm_release_buff_cb(struct iio_dev *iio_dev)
699{
700 struct stm32_dfsdm_adc *adc;
701
702 if (!iio_dev)
703 return -EINVAL;
704 adc = iio_priv(iio_dev);
705
706 adc->cb = NULL;
707 adc->cb_priv = NULL;
708
709 return 0;
710}
711EXPORT_SYMBOL_GPL(stm32_dfsdm_release_buff_cb);
712
713static int stm32_dfsdm_single_conv(struct iio_dev *indio_dev,
714 const struct iio_chan_spec *chan, int *res)
715{
716 struct stm32_dfsdm_adc *adc = iio_priv(indio_dev);
717 long timeout;
718 int ret;
719
720 reinit_completion(&adc->completion);
721
722 adc->buffer = res;
723
724 ret = stm32_dfsdm_start_dfsdm(adc->dfsdm);
725 if (ret < 0)
726 return ret;
727
728 ret = regmap_update_bits(adc->dfsdm->regmap, DFSDM_CR2(adc->fl_id),
729 DFSDM_CR2_REOCIE_MASK, DFSDM_CR2_REOCIE(1));
730 if (ret < 0)
731 goto stop_dfsdm;
732
733 ret = stm32_dfsdm_start_conv(adc, false);
734 if (ret < 0) {
735 regmap_update_bits(adc->dfsdm->regmap, DFSDM_CR2(adc->fl_id),
736 DFSDM_CR2_REOCIE_MASK, DFSDM_CR2_REOCIE(0));
737 goto stop_dfsdm;
738 }
739
740 timeout = wait_for_completion_interruptible_timeout(&adc->completion,
741 DFSDM_TIMEOUT);
742
743 /* Mask IRQ for regular conversion achievement*/
744 regmap_update_bits(adc->dfsdm->regmap, DFSDM_CR2(adc->fl_id),
745 DFSDM_CR2_REOCIE_MASK, DFSDM_CR2_REOCIE(0));
746
747 if (timeout == 0)
748 ret = -ETIMEDOUT;
749 else if (timeout < 0)
750 ret = timeout;
751 else
752 ret = IIO_VAL_INT;
753
754 stm32_dfsdm_stop_conv(adc);
755
756stop_dfsdm:
757 stm32_dfsdm_stop_dfsdm(adc->dfsdm);
758
759 return ret;
760}
761
762static int stm32_dfsdm_write_raw(struct iio_dev *indio_dev,
763 struct iio_chan_spec const *chan,
764 int val, int val2, long mask)
765{
766 struct stm32_dfsdm_adc *adc = iio_priv(indio_dev);
767 struct stm32_dfsdm_filter *fl = &adc->dfsdm->fl_list[adc->fl_id];
768 struct stm32_dfsdm_channel *ch = &adc->dfsdm->ch_list[adc->ch_id];
769 unsigned int spi_freq = adc->spi_freq;
770 int ret = -EINVAL;
771
772 switch (mask) {
773 case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
774 ret = stm32_dfsdm_set_osrs(fl, 0, val);
775 if (!ret)
776 adc->oversamp = val;
777
778 return ret;
779
780 case IIO_CHAN_INFO_SAMP_FREQ:
781 if (!val)
782 return -EINVAL;
783 if (ch->src != DFSDM_CHANNEL_SPI_CLOCK_EXTERNAL)
784 spi_freq = adc->dfsdm->spi_master_freq;
785
786 if (spi_freq % val)
787 dev_warn(&indio_dev->dev,
788 "Sampling rate not accurate (%d)\n",
789 spi_freq / (spi_freq / val));
790
791 ret = stm32_dfsdm_set_osrs(fl, 0, (spi_freq / val));
792 if (ret < 0) {
793 dev_err(&indio_dev->dev,
794 "Not able to find parameter that match!\n");
795 return ret;
796 }
797 adc->sample_freq = val;
798
799 return 0;
800 }
801
802 return -EINVAL;
803}
804
805static int stm32_dfsdm_read_raw(struct iio_dev *indio_dev,
806 struct iio_chan_spec const *chan, int *val,
807 int *val2, long mask)
808{
809 struct stm32_dfsdm_adc *adc = iio_priv(indio_dev);
810 int ret;
811
812 switch (mask) {
813 case IIO_CHAN_INFO_RAW:
814 ret = iio_hw_consumer_enable(adc->hwc);
815 if (ret < 0) {
816 dev_err(&indio_dev->dev,
817 "%s: IIO enable failed (channel %d)\n",
818 __func__, chan->channel);
819 return ret;
820 }
821 ret = stm32_dfsdm_single_conv(indio_dev, chan, val);
822 iio_hw_consumer_disable(adc->hwc);
823 if (ret < 0) {
824 dev_err(&indio_dev->dev,
825 "%s: Conversion failed (channel %d)\n",
826 __func__, chan->channel);
827 return ret;
828 }
829 return IIO_VAL_INT;
830
831 case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
832 *val = adc->oversamp;
833
834 return IIO_VAL_INT;
835
836 case IIO_CHAN_INFO_SAMP_FREQ:
837 *val = adc->sample_freq;
838
839 return IIO_VAL_INT;
840 }
841
842 return -EINVAL;
843}
844
845static const struct iio_info stm32_dfsdm_info_audio = {
846 .hwfifo_set_watermark = stm32_dfsdm_set_watermark,
847 .read_raw = stm32_dfsdm_read_raw,
848 .write_raw = stm32_dfsdm_write_raw,
849};
850
851static const struct iio_info stm32_dfsdm_info_adc = {
852 .read_raw = stm32_dfsdm_read_raw,
853 .write_raw = stm32_dfsdm_write_raw,
854};
855
856static irqreturn_t stm32_dfsdm_irq(int irq, void *arg)
857{
858 struct stm32_dfsdm_adc *adc = arg;
859 struct iio_dev *indio_dev = iio_priv_to_dev(adc);
860 struct regmap *regmap = adc->dfsdm->regmap;
861 unsigned int status, int_en;
862
863 regmap_read(regmap, DFSDM_ISR(adc->fl_id), &status);
864 regmap_read(regmap, DFSDM_CR2(adc->fl_id), &int_en);
865
866 if (status & DFSDM_ISR_REOCF_MASK) {
867 /* Read the data register clean the IRQ status */
868 regmap_read(regmap, DFSDM_RDATAR(adc->fl_id), adc->buffer);
869 complete(&adc->completion);
870 }
871
872 if (status & DFSDM_ISR_ROVRF_MASK) {
873 if (int_en & DFSDM_CR2_ROVRIE_MASK)
874 dev_warn(&indio_dev->dev, "Overrun detected\n");
875 regmap_update_bits(regmap, DFSDM_ICR(adc->fl_id),
876 DFSDM_ICR_CLRROVRF_MASK,
877 DFSDM_ICR_CLRROVRF_MASK);
878 }
879
880 return IRQ_HANDLED;
881}
882
883/*
884 * Define external info for SPI Frequency and audio sampling rate that can be
885 * configured by ASoC driver through consumer.h API
886 */
887static const struct iio_chan_spec_ext_info dfsdm_adc_audio_ext_info[] = {
888 /* spi_clk_freq : clock freq on SPI/manchester bus used by channel */
889 {
890 .name = "spi_clk_freq",
891 .shared = IIO_SHARED_BY_TYPE,
892 .read = dfsdm_adc_audio_get_spiclk,
893 .write = dfsdm_adc_audio_set_spiclk,
894 },
895 {},
896};
897
898static void stm32_dfsdm_dma_release(struct iio_dev *indio_dev)
899{
900 struct stm32_dfsdm_adc *adc = iio_priv(indio_dev);
901
902 if (adc->dma_chan) {
903 dma_free_coherent(adc->dma_chan->device->dev,
904 DFSDM_DMA_BUFFER_SIZE,
905 adc->rx_buf, adc->dma_buf);
906 dma_release_channel(adc->dma_chan);
907 }
908}
909
910static int stm32_dfsdm_dma_request(struct iio_dev *indio_dev)
911{
912 struct stm32_dfsdm_adc *adc = iio_priv(indio_dev);
913 struct dma_slave_config config = {
914 .src_addr = (dma_addr_t)adc->dfsdm->phys_base +
915 DFSDM_RDATAR(adc->fl_id),
916 .src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES,
917 };
918 int ret;
919
920 adc->dma_chan = dma_request_slave_channel(&indio_dev->dev, "rx");
921 if (!adc->dma_chan)
922 return -EINVAL;
923
924 adc->rx_buf = dma_alloc_coherent(adc->dma_chan->device->dev,
925 DFSDM_DMA_BUFFER_SIZE,
926 &adc->dma_buf, GFP_KERNEL);
927 if (!adc->rx_buf) {
928 ret = -ENOMEM;
929 goto err_release;
930 }
931
932 ret = dmaengine_slave_config(adc->dma_chan, &config);
933 if (ret)
934 goto err_free;
935
936 return 0;
937
938err_free:
939 dma_free_coherent(adc->dma_chan->device->dev, DFSDM_DMA_BUFFER_SIZE,
940 adc->rx_buf, adc->dma_buf);
941err_release:
942 dma_release_channel(adc->dma_chan);
943
944 return ret;
945}
946
947static int stm32_dfsdm_adc_chan_init_one(struct iio_dev *indio_dev,
948 struct iio_chan_spec *ch)
949{
950 struct stm32_dfsdm_adc *adc = iio_priv(indio_dev);
951 int ret;
952
953 ret = stm32_dfsdm_channel_parse_of(adc->dfsdm, indio_dev, ch);
954 if (ret < 0)
955 return ret;
956
957 ch->type = IIO_VOLTAGE;
958 ch->indexed = 1;
959
960 /*
961 * IIO_CHAN_INFO_RAW: used to compute regular conversion
962 * IIO_CHAN_INFO_OVERSAMPLING_RATIO: used to set oversampling
963 */
964 ch->info_mask_separate = BIT(IIO_CHAN_INFO_RAW);
965 ch->info_mask_shared_by_all = BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO);
966
967 if (adc->dev_data->type == DFSDM_AUDIO) {
968 ch->scan_type.sign = 's';
969 ch->ext_info = dfsdm_adc_audio_ext_info;
970 } else {
971 ch->scan_type.sign = 'u';
972 }
973 ch->scan_type.realbits = 24;
974 ch->scan_type.storagebits = 32;
975 adc->ch_id = ch->channel;
976
977 return stm32_dfsdm_chan_configure(adc->dfsdm,
978 &adc->dfsdm->ch_list[ch->channel]);
979}
980
981static int stm32_dfsdm_audio_init(struct iio_dev *indio_dev)
982{
983 struct iio_chan_spec *ch;
984 struct stm32_dfsdm_adc *adc = iio_priv(indio_dev);
985 struct stm32_dfsdm_channel *d_ch;
986 int ret;
987
988 indio_dev->modes |= INDIO_BUFFER_SOFTWARE;
989 indio_dev->setup_ops = &stm32_dfsdm_buffer_setup_ops;
990
991 ch = devm_kzalloc(&indio_dev->dev, sizeof(*ch), GFP_KERNEL);
992 if (!ch)
993 return -ENOMEM;
994
995 ch->scan_index = 0;
996
997 ret = stm32_dfsdm_adc_chan_init_one(indio_dev, ch);
998 if (ret < 0) {
999 dev_err(&indio_dev->dev, "Channels init failed\n");
1000 return ret;
1001 }
1002 ch->info_mask_separate = BIT(IIO_CHAN_INFO_SAMP_FREQ);
1003
1004 d_ch = &adc->dfsdm->ch_list[adc->ch_id];
1005 if (d_ch->src != DFSDM_CHANNEL_SPI_CLOCK_EXTERNAL)
1006 adc->spi_freq = adc->dfsdm->spi_master_freq;
1007
1008 indio_dev->num_channels = 1;
1009 indio_dev->channels = ch;
1010
1011 return stm32_dfsdm_dma_request(indio_dev);
1012}
1013
1014static int stm32_dfsdm_adc_init(struct iio_dev *indio_dev)
1015{
1016 struct iio_chan_spec *ch;
1017 struct stm32_dfsdm_adc *adc = iio_priv(indio_dev);
1018 int num_ch;
1019 int ret, chan_idx;
1020
1021 adc->oversamp = DFSDM_DEFAULT_OVERSAMPLING;
1022 ret = stm32_dfsdm_set_osrs(&adc->dfsdm->fl_list[adc->fl_id], 0,
1023 adc->oversamp);
1024 if (ret < 0)
1025 return ret;
1026
1027 num_ch = of_property_count_u32_elems(indio_dev->dev.of_node,
1028 "st,adc-channels");
1029 if (num_ch < 0 || num_ch > adc->dfsdm->num_chs) {
1030 dev_err(&indio_dev->dev, "Bad st,adc-channels\n");
1031 return num_ch < 0 ? num_ch : -EINVAL;
1032 }
1033
1034 /* Bind to SD modulator IIO device */
1035 adc->hwc = devm_iio_hw_consumer_alloc(&indio_dev->dev);
1036 if (IS_ERR(adc->hwc))
1037 return -EPROBE_DEFER;
1038
1039 ch = devm_kcalloc(&indio_dev->dev, num_ch, sizeof(*ch),
1040 GFP_KERNEL);
1041 if (!ch)
1042 return -ENOMEM;
1043
1044 for (chan_idx = 0; chan_idx < num_ch; chan_idx++) {
1045 ch->scan_index = chan_idx;
1046 ret = stm32_dfsdm_adc_chan_init_one(indio_dev, ch);
1047 if (ret < 0) {
1048 dev_err(&indio_dev->dev, "Channels init failed\n");
1049 return ret;
1050 }
1051 }
1052
1053 indio_dev->num_channels = num_ch;
1054 indio_dev->channels = ch;
1055
1056 init_completion(&adc->completion);
1057
1058 return 0;
1059}
1060
1061static const struct stm32_dfsdm_dev_data stm32h7_dfsdm_adc_data = {
1062 .type = DFSDM_IIO,
1063 .init = stm32_dfsdm_adc_init,
1064};
1065
1066static const struct stm32_dfsdm_dev_data stm32h7_dfsdm_audio_data = {
1067 .type = DFSDM_AUDIO,
1068 .init = stm32_dfsdm_audio_init,
1069};
1070
1071static const struct of_device_id stm32_dfsdm_adc_match[] = {
1072 {
1073 .compatible = "st,stm32-dfsdm-adc",
1074 .data = &stm32h7_dfsdm_adc_data,
1075 },
1076 {
1077 .compatible = "st,stm32-dfsdm-dmic",
1078 .data = &stm32h7_dfsdm_audio_data,
1079 },
1080 {}
1081};
1082
1083static int stm32_dfsdm_adc_probe(struct platform_device *pdev)
1084{
1085 struct device *dev = &pdev->dev;
1086 struct stm32_dfsdm_adc *adc;
1087 struct device_node *np = dev->of_node;
1088 const struct stm32_dfsdm_dev_data *dev_data;
1089 struct iio_dev *iio;
1090 const struct of_device_id *of_id;
1091 char *name;
1092 int ret, irq, val;
1093
1094 of_id = of_match_node(stm32_dfsdm_adc_match, np);
1095 if (!of_id->data) {
1096 dev_err(&pdev->dev, "Data associated to device is missing\n");
1097 return -EINVAL;
1098 }
1099
1100 dev_data = (const struct stm32_dfsdm_dev_data *)of_id->data;
1101
1102 iio = devm_iio_device_alloc(dev, sizeof(*adc));
1103 if (!iio) {
1104 dev_err(dev, "%s: Failed to allocate IIO\n", __func__);
1105 return -ENOMEM;
1106 }
1107
1108 adc = iio_priv(iio);
1109 if (IS_ERR(adc)) {
1110 dev_err(dev, "%s: Failed to allocate ADC\n", __func__);
1111 return PTR_ERR(adc);
1112 }
1113 adc->dfsdm = dev_get_drvdata(dev->parent);
1114
1115 iio->dev.parent = dev;
1116 iio->dev.of_node = np;
1117 iio->modes = INDIO_DIRECT_MODE | INDIO_BUFFER_SOFTWARE;
1118
1119 platform_set_drvdata(pdev, adc);
1120
1121 ret = of_property_read_u32(dev->of_node, "reg", &adc->fl_id);
1122 if (ret != 0) {
1123 dev_err(dev, "Missing reg property\n");
1124 return -EINVAL;
1125 }
1126
1127 name = devm_kzalloc(dev, sizeof("dfsdm-adc0"), GFP_KERNEL);
1128 if (!name)
1129 return -ENOMEM;
1130 if (dev_data->type == DFSDM_AUDIO) {
1131 iio->info = &stm32_dfsdm_info_audio;
1132 snprintf(name, sizeof("dfsdm-pdm0"), "dfsdm-pdm%d", adc->fl_id);
1133 } else {
1134 iio->info = &stm32_dfsdm_info_adc;
1135 snprintf(name, sizeof("dfsdm-adc0"), "dfsdm-adc%d", adc->fl_id);
1136 }
1137 iio->name = name;
1138
1139 /*
1140 * In a first step IRQs generated for channels are not treated.
1141 * So IRQ associated to filter instance 0 is dedicated to the Filter 0.
1142 */
1143 irq = platform_get_irq(pdev, 0);
1144 ret = devm_request_irq(dev, irq, stm32_dfsdm_irq,
1145 0, pdev->name, adc);
1146 if (ret < 0) {
1147 dev_err(dev, "Failed to request IRQ\n");
1148 return ret;
1149 }
1150
1151 ret = of_property_read_u32(dev->of_node, "st,filter-order", &val);
1152 if (ret < 0) {
1153 dev_err(dev, "Failed to set filter order\n");
1154 return ret;
1155 }
1156
1157 adc->dfsdm->fl_list[adc->fl_id].ford = val;
1158
1159 ret = of_property_read_u32(dev->of_node, "st,filter0-sync", &val);
1160 if (!ret)
1161 adc->dfsdm->fl_list[adc->fl_id].sync_mode = val;
1162
1163 adc->dev_data = dev_data;
1164 ret = dev_data->init(iio);
1165 if (ret < 0)
1166 return ret;
1167
1168 ret = iio_device_register(iio);
1169 if (ret < 0)
1170 goto err_cleanup;
1171
1172 dev_err(dev, "of_platform_populate\n");
1173 if (dev_data->type == DFSDM_AUDIO) {
1174 ret = of_platform_populate(np, NULL, NULL, dev);
1175 if (ret < 0) {
1176 dev_err(dev, "Failed to find an audio DAI\n");
1177 goto err_unregister;
1178 }
1179 }
1180
1181 return 0;
1182
1183err_unregister:
1184 iio_device_unregister(iio);
1185err_cleanup:
1186 stm32_dfsdm_dma_release(iio);
1187
1188 return ret;
1189}
1190
1191static int stm32_dfsdm_adc_remove(struct platform_device *pdev)
1192{
1193 struct stm32_dfsdm_adc *adc = platform_get_drvdata(pdev);
1194 struct iio_dev *indio_dev = iio_priv_to_dev(adc);
1195
1196 if (adc->dev_data->type == DFSDM_AUDIO)
1197 of_platform_depopulate(&pdev->dev);
1198 iio_device_unregister(indio_dev);
1199 stm32_dfsdm_dma_release(indio_dev);
1200
1201 return 0;
1202}
1203
1204static struct platform_driver stm32_dfsdm_adc_driver = {
1205 .driver = {
1206 .name = "stm32-dfsdm-adc",
1207 .of_match_table = stm32_dfsdm_adc_match,
1208 },
1209 .probe = stm32_dfsdm_adc_probe,
1210 .remove = stm32_dfsdm_adc_remove,
1211};
1212module_platform_driver(stm32_dfsdm_adc_driver);
1213
1214MODULE_DESCRIPTION("STM32 sigma delta ADC");
1215MODULE_AUTHOR("Arnaud Pouliquen <arnaud.pouliquen@st.com>");
1216MODULE_LICENSE("GPL v2");
diff --git a/drivers/iio/adc/stm32-dfsdm-core.c b/drivers/iio/adc/stm32-dfsdm-core.c
new file mode 100644
index 000000000000..6cd655f8239b
--- /dev/null
+++ b/drivers/iio/adc/stm32-dfsdm-core.c
@@ -0,0 +1,308 @@
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * This file is part the core part STM32 DFSDM driver
4 *
5 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
6 * Author(s): Arnaud Pouliquen <arnaud.pouliquen@st.com> for STMicroelectronics.
7 */
8
9#include <linux/clk.h>
10#include <linux/iio/iio.h>
11#include <linux/iio/sysfs.h>
12#include <linux/interrupt.h>
13#include <linux/module.h>
14#include <linux/of_device.h>
15#include <linux/regmap.h>
16#include <linux/slab.h>
17
18#include "stm32-dfsdm.h"
19
20struct stm32_dfsdm_dev_data {
21 unsigned int num_filters;
22 unsigned int num_channels;
23 const struct regmap_config *regmap_cfg;
24};
25
26#define STM32H7_DFSDM_NUM_FILTERS 4
27#define STM32H7_DFSDM_NUM_CHANNELS 8
28
29static bool stm32_dfsdm_volatile_reg(struct device *dev, unsigned int reg)
30{
31 if (reg < DFSDM_FILTER_BASE_ADR)
32 return false;
33
34 /*
35 * Mask is done on register to avoid to list registers of all
36 * filter instances.
37 */
38 switch (reg & DFSDM_FILTER_REG_MASK) {
39 case DFSDM_CR1(0) & DFSDM_FILTER_REG_MASK:
40 case DFSDM_ISR(0) & DFSDM_FILTER_REG_MASK:
41 case DFSDM_JDATAR(0) & DFSDM_FILTER_REG_MASK:
42 case DFSDM_RDATAR(0) & DFSDM_FILTER_REG_MASK:
43 return true;
44 }
45
46 return false;
47}
48
49static const struct regmap_config stm32h7_dfsdm_regmap_cfg = {
50 .reg_bits = 32,
51 .val_bits = 32,
52 .reg_stride = sizeof(u32),
53 .max_register = 0x2B8,
54 .volatile_reg = stm32_dfsdm_volatile_reg,
55 .fast_io = true,
56};
57
58static const struct stm32_dfsdm_dev_data stm32h7_dfsdm_data = {
59 .num_filters = STM32H7_DFSDM_NUM_FILTERS,
60 .num_channels = STM32H7_DFSDM_NUM_CHANNELS,
61 .regmap_cfg = &stm32h7_dfsdm_regmap_cfg,
62};
63
64struct dfsdm_priv {
65 struct platform_device *pdev; /* platform device */
66
67 struct stm32_dfsdm dfsdm; /* common data exported for all instances */
68
69 unsigned int spi_clk_out_div; /* SPI clkout divider value */
70 atomic_t n_active_ch; /* number of current active channels */
71
72 struct clk *clk; /* DFSDM clock */
73 struct clk *aclk; /* audio clock */
74};
75
76/**
77 * stm32_dfsdm_start_dfsdm - start global dfsdm interface.
78 *
79 * Enable interface if n_active_ch is not null.
80 * @dfsdm: Handle used to retrieve dfsdm context.
81 */
82int stm32_dfsdm_start_dfsdm(struct stm32_dfsdm *dfsdm)
83{
84 struct dfsdm_priv *priv = container_of(dfsdm, struct dfsdm_priv, dfsdm);
85 struct device *dev = &priv->pdev->dev;
86 unsigned int clk_div = priv->spi_clk_out_div;
87 int ret;
88
89 if (atomic_inc_return(&priv->n_active_ch) == 1) {
90 ret = clk_prepare_enable(priv->clk);
91 if (ret < 0) {
92 dev_err(dev, "Failed to start clock\n");
93 goto error_ret;
94 }
95 if (priv->aclk) {
96 ret = clk_prepare_enable(priv->aclk);
97 if (ret < 0) {
98 dev_err(dev, "Failed to start audio clock\n");
99 goto disable_clk;
100 }
101 }
102
103 /* Output the SPI CLKOUT (if clk_div == 0 clock if OFF) */
104 ret = regmap_update_bits(dfsdm->regmap, DFSDM_CHCFGR1(0),
105 DFSDM_CHCFGR1_CKOUTDIV_MASK,
106 DFSDM_CHCFGR1_CKOUTDIV(clk_div));
107 if (ret < 0)
108 goto disable_aclk;
109
110 /* Global enable of DFSDM interface */
111 ret = regmap_update_bits(dfsdm->regmap, DFSDM_CHCFGR1(0),
112 DFSDM_CHCFGR1_DFSDMEN_MASK,
113 DFSDM_CHCFGR1_DFSDMEN(1));
114 if (ret < 0)
115 goto disable_aclk;
116 }
117
118 dev_dbg(dev, "%s: n_active_ch %d\n", __func__,
119 atomic_read(&priv->n_active_ch));
120
121 return 0;
122
123disable_aclk:
124 clk_disable_unprepare(priv->aclk);
125disable_clk:
126 clk_disable_unprepare(priv->clk);
127
128error_ret:
129 atomic_dec(&priv->n_active_ch);
130
131 return ret;
132}
133EXPORT_SYMBOL_GPL(stm32_dfsdm_start_dfsdm);
134
135/**
136 * stm32_dfsdm_stop_dfsdm - stop global DFSDM interface.
137 *
138 * Disable interface if n_active_ch is null
139 * @dfsdm: Handle used to retrieve dfsdm context.
140 */
141int stm32_dfsdm_stop_dfsdm(struct stm32_dfsdm *dfsdm)
142{
143 struct dfsdm_priv *priv = container_of(dfsdm, struct dfsdm_priv, dfsdm);
144 int ret;
145
146 if (atomic_dec_and_test(&priv->n_active_ch)) {
147 /* Global disable of DFSDM interface */
148 ret = regmap_update_bits(dfsdm->regmap, DFSDM_CHCFGR1(0),
149 DFSDM_CHCFGR1_DFSDMEN_MASK,
150 DFSDM_CHCFGR1_DFSDMEN(0));
151 if (ret < 0)
152 return ret;
153
154 /* Stop SPI CLKOUT */
155 ret = regmap_update_bits(dfsdm->regmap, DFSDM_CHCFGR1(0),
156 DFSDM_CHCFGR1_CKOUTDIV_MASK,
157 DFSDM_CHCFGR1_CKOUTDIV(0));
158 if (ret < 0)
159 return ret;
160
161 clk_disable_unprepare(priv->clk);
162 if (priv->aclk)
163 clk_disable_unprepare(priv->aclk);
164 }
165 dev_dbg(&priv->pdev->dev, "%s: n_active_ch %d\n", __func__,
166 atomic_read(&priv->n_active_ch));
167
168 return 0;
169}
170EXPORT_SYMBOL_GPL(stm32_dfsdm_stop_dfsdm);
171
172static int stm32_dfsdm_parse_of(struct platform_device *pdev,
173 struct dfsdm_priv *priv)
174{
175 struct device_node *node = pdev->dev.of_node;
176 struct resource *res;
177 unsigned long clk_freq;
178 unsigned int spi_freq, rem;
179 int ret;
180
181 if (!node)
182 return -EINVAL;
183
184 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
185 if (!res) {
186 dev_err(&pdev->dev, "Failed to get memory resource\n");
187 return -ENODEV;
188 }
189 priv->dfsdm.phys_base = res->start;
190 priv->dfsdm.base = devm_ioremap_resource(&pdev->dev, res);
191
192 /*
193 * "dfsdm" clock is mandatory for DFSDM peripheral clocking.
194 * "dfsdm" or "audio" clocks can be used as source clock for
195 * the SPI clock out signal and internal processing, depending
196 * on use case.
197 */
198 priv->clk = devm_clk_get(&pdev->dev, "dfsdm");
199 if (IS_ERR(priv->clk)) {
200 dev_err(&pdev->dev, "No stm32_dfsdm_clk clock found\n");
201 return -EINVAL;
202 }
203
204 priv->aclk = devm_clk_get(&pdev->dev, "audio");
205 if (IS_ERR(priv->aclk))
206 priv->aclk = NULL;
207
208 if (priv->aclk)
209 clk_freq = clk_get_rate(priv->aclk);
210 else
211 clk_freq = clk_get_rate(priv->clk);
212
213 /* SPI clock out frequency */
214 ret = of_property_read_u32(pdev->dev.of_node, "spi-max-frequency",
215 &spi_freq);
216 if (ret < 0) {
217 /* No SPI master mode */
218 return 0;
219 }
220
221 priv->spi_clk_out_div = div_u64_rem(clk_freq, spi_freq, &rem) - 1;
222 priv->dfsdm.spi_master_freq = spi_freq;
223
224 if (rem) {
225 dev_warn(&pdev->dev, "SPI clock not accurate\n");
226 dev_warn(&pdev->dev, "%ld = %d * %d + %d\n",
227 clk_freq, spi_freq, priv->spi_clk_out_div + 1, rem);
228 }
229
230 return 0;
231};
232
233static const struct of_device_id stm32_dfsdm_of_match[] = {
234 {
235 .compatible = "st,stm32h7-dfsdm",
236 .data = &stm32h7_dfsdm_data,
237 },
238 {}
239};
240MODULE_DEVICE_TABLE(of, stm32_dfsdm_of_match);
241
242static int stm32_dfsdm_probe(struct platform_device *pdev)
243{
244 struct dfsdm_priv *priv;
245 const struct of_device_id *of_id;
246 const struct stm32_dfsdm_dev_data *dev_data;
247 struct stm32_dfsdm *dfsdm;
248 int ret;
249
250 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
251 if (!priv)
252 return -ENOMEM;
253
254 priv->pdev = pdev;
255
256 of_id = of_match_node(stm32_dfsdm_of_match, pdev->dev.of_node);
257 if (!of_id->data) {
258 dev_err(&pdev->dev, "Data associated to device is missing\n");
259 return -EINVAL;
260 }
261
262 dev_data = (const struct stm32_dfsdm_dev_data *)of_id->data;
263 dfsdm = &priv->dfsdm;
264 dfsdm->fl_list = devm_kcalloc(&pdev->dev, dev_data->num_filters,
265 sizeof(*dfsdm->fl_list), GFP_KERNEL);
266 if (!dfsdm->fl_list)
267 return -ENOMEM;
268
269 dfsdm->num_fls = dev_data->num_filters;
270 dfsdm->ch_list = devm_kcalloc(&pdev->dev, dev_data->num_channels,
271 sizeof(*dfsdm->ch_list),
272 GFP_KERNEL);
273 if (!dfsdm->ch_list)
274 return -ENOMEM;
275 dfsdm->num_chs = dev_data->num_channels;
276
277 ret = stm32_dfsdm_parse_of(pdev, priv);
278 if (ret < 0)
279 return ret;
280
281 dfsdm->regmap = devm_regmap_init_mmio_clk(&pdev->dev, "dfsdm",
282 dfsdm->base,
283 &stm32h7_dfsdm_regmap_cfg);
284 if (IS_ERR(dfsdm->regmap)) {
285 ret = PTR_ERR(dfsdm->regmap);
286 dev_err(&pdev->dev, "%s: Failed to allocate regmap: %d\n",
287 __func__, ret);
288 return ret;
289 }
290
291 platform_set_drvdata(pdev, dfsdm);
292
293 return devm_of_platform_populate(&pdev->dev);
294}
295
296static struct platform_driver stm32_dfsdm_driver = {
297 .probe = stm32_dfsdm_probe,
298 .driver = {
299 .name = "stm32-dfsdm",
300 .of_match_table = stm32_dfsdm_of_match,
301 },
302};
303
304module_platform_driver(stm32_dfsdm_driver);
305
306MODULE_AUTHOR("Arnaud Pouliquen <arnaud.pouliquen@st.com>");
307MODULE_DESCRIPTION("STMicroelectronics STM32 dfsdm driver");
308MODULE_LICENSE("GPL v2");
diff --git a/drivers/iio/adc/stm32-dfsdm.h b/drivers/iio/adc/stm32-dfsdm.h
new file mode 100644
index 000000000000..8708394b0725
--- /dev/null
+++ b/drivers/iio/adc/stm32-dfsdm.h
@@ -0,0 +1,310 @@
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * This file is part of STM32 DFSDM driver
4 *
5 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
6 * Author(s): Arnaud Pouliquen <arnaud.pouliquen@st.com>.
7 */
8
9#ifndef MDF_STM32_DFSDM__H
10#define MDF_STM32_DFSDM__H
11
12#include <linux/bitfield.h>
13
14/*
15 * STM32 DFSDM - global register map
16 * ________________________________________________________
17 * | Offset | Registers block |
18 * --------------------------------------------------------
19 * | 0x000 | CHANNEL 0 + COMMON CHANNEL FIELDS |
20 * --------------------------------------------------------
21 * | 0x020 | CHANNEL 1 |
22 * --------------------------------------------------------
23 * | ... | ..... |
24 * --------------------------------------------------------
25 * | 0x0E0 | CHANNEL 7 |
26 * --------------------------------------------------------
27 * | 0x100 | FILTER 0 + COMMON FILTER FIELDs |
28 * --------------------------------------------------------
29 * | 0x200 | FILTER 1 |
30 * --------------------------------------------------------
31 * | 0x300 | FILTER 2 |
32 * --------------------------------------------------------
33 * | 0x400 | FILTER 3 |
34 * --------------------------------------------------------
35 */
36
37/*
38 * Channels register definitions
39 */
40#define DFSDM_CHCFGR1(y) ((y) * 0x20 + 0x00)
41#define DFSDM_CHCFGR2(y) ((y) * 0x20 + 0x04)
42#define DFSDM_AWSCDR(y) ((y) * 0x20 + 0x08)
43#define DFSDM_CHWDATR(y) ((y) * 0x20 + 0x0C)
44#define DFSDM_CHDATINR(y) ((y) * 0x20 + 0x10)
45
46/* CHCFGR1: Channel configuration register 1 */
47#define DFSDM_CHCFGR1_SITP_MASK GENMASK(1, 0)
48#define DFSDM_CHCFGR1_SITP(v) FIELD_PREP(DFSDM_CHCFGR1_SITP_MASK, v)
49#define DFSDM_CHCFGR1_SPICKSEL_MASK GENMASK(3, 2)
50#define DFSDM_CHCFGR1_SPICKSEL(v) FIELD_PREP(DFSDM_CHCFGR1_SPICKSEL_MASK, v)
51#define DFSDM_CHCFGR1_SCDEN_MASK BIT(5)
52#define DFSDM_CHCFGR1_SCDEN(v) FIELD_PREP(DFSDM_CHCFGR1_SCDEN_MASK, v)
53#define DFSDM_CHCFGR1_CKABEN_MASK BIT(6)
54#define DFSDM_CHCFGR1_CKABEN(v) FIELD_PREP(DFSDM_CHCFGR1_CKABEN_MASK, v)
55#define DFSDM_CHCFGR1_CHEN_MASK BIT(7)
56#define DFSDM_CHCFGR1_CHEN(v) FIELD_PREP(DFSDM_CHCFGR1_CHEN_MASK, v)
57#define DFSDM_CHCFGR1_CHINSEL_MASK BIT(8)
58#define DFSDM_CHCFGR1_CHINSEL(v) FIELD_PREP(DFSDM_CHCFGR1_CHINSEL_MASK, v)
59#define DFSDM_CHCFGR1_DATMPX_MASK GENMASK(13, 12)
60#define DFSDM_CHCFGR1_DATMPX(v) FIELD_PREP(DFSDM_CHCFGR1_DATMPX_MASK, v)
61#define DFSDM_CHCFGR1_DATPACK_MASK GENMASK(15, 14)
62#define DFSDM_CHCFGR1_DATPACK(v) FIELD_PREP(DFSDM_CHCFGR1_DATPACK_MASK, v)
63#define DFSDM_CHCFGR1_CKOUTDIV_MASK GENMASK(23, 16)
64#define DFSDM_CHCFGR1_CKOUTDIV(v) FIELD_PREP(DFSDM_CHCFGR1_CKOUTDIV_MASK, v)
65#define DFSDM_CHCFGR1_CKOUTSRC_MASK BIT(30)
66#define DFSDM_CHCFGR1_CKOUTSRC(v) FIELD_PREP(DFSDM_CHCFGR1_CKOUTSRC_MASK, v)
67#define DFSDM_CHCFGR1_DFSDMEN_MASK BIT(31)
68#define DFSDM_CHCFGR1_DFSDMEN(v) FIELD_PREP(DFSDM_CHCFGR1_DFSDMEN_MASK, v)
69
70/* CHCFGR2: Channel configuration register 2 */
71#define DFSDM_CHCFGR2_DTRBS_MASK GENMASK(7, 3)
72#define DFSDM_CHCFGR2_DTRBS(v) FIELD_PREP(DFSDM_CHCFGR2_DTRBS_MASK, v)
73#define DFSDM_CHCFGR2_OFFSET_MASK GENMASK(31, 8)
74#define DFSDM_CHCFGR2_OFFSET(v) FIELD_PREP(DFSDM_CHCFGR2_OFFSET_MASK, v)
75
76/* AWSCDR: Channel analog watchdog and short circuit detector */
77#define DFSDM_AWSCDR_SCDT_MASK GENMASK(7, 0)
78#define DFSDM_AWSCDR_SCDT(v) FIELD_PREP(DFSDM_AWSCDR_SCDT_MASK, v)
79#define DFSDM_AWSCDR_BKSCD_MASK GENMASK(15, 12)
80#define DFSDM_AWSCDR_BKSCD(v) FIELD_PREP(DFSDM_AWSCDR_BKSCD_MASK, v)
81#define DFSDM_AWSCDR_AWFOSR_MASK GENMASK(20, 16)
82#define DFSDM_AWSCDR_AWFOSR(v) FIELD_PREP(DFSDM_AWSCDR_AWFOSR_MASK, v)
83#define DFSDM_AWSCDR_AWFORD_MASK GENMASK(23, 22)
84#define DFSDM_AWSCDR_AWFORD(v) FIELD_PREP(DFSDM_AWSCDR_AWFORD_MASK, v)
85
86/*
87 * Filters register definitions
88 */
89#define DFSDM_FILTER_BASE_ADR 0x100
90#define DFSDM_FILTER_REG_MASK 0x7F
91#define DFSDM_FILTER_X_BASE_ADR(x) ((x) * 0x80 + DFSDM_FILTER_BASE_ADR)
92
93#define DFSDM_CR1(x) (DFSDM_FILTER_X_BASE_ADR(x) + 0x00)
94#define DFSDM_CR2(x) (DFSDM_FILTER_X_BASE_ADR(x) + 0x04)
95#define DFSDM_ISR(x) (DFSDM_FILTER_X_BASE_ADR(x) + 0x08)
96#define DFSDM_ICR(x) (DFSDM_FILTER_X_BASE_ADR(x) + 0x0C)
97#define DFSDM_JCHGR(x) (DFSDM_FILTER_X_BASE_ADR(x) + 0x10)
98#define DFSDM_FCR(x) (DFSDM_FILTER_X_BASE_ADR(x) + 0x14)
99#define DFSDM_JDATAR(x) (DFSDM_FILTER_X_BASE_ADR(x) + 0x18)
100#define DFSDM_RDATAR(x) (DFSDM_FILTER_X_BASE_ADR(x) + 0x1C)
101#define DFSDM_AWHTR(x) (DFSDM_FILTER_X_BASE_ADR(x) + 0x20)
102#define DFSDM_AWLTR(x) (DFSDM_FILTER_X_BASE_ADR(x) + 0x24)
103#define DFSDM_AWSR(x) (DFSDM_FILTER_X_BASE_ADR(x) + 0x28)
104#define DFSDM_AWCFR(x) (DFSDM_FILTER_X_BASE_ADR(x) + 0x2C)
105#define DFSDM_EXMAX(x) (DFSDM_FILTER_X_BASE_ADR(x) + 0x30)
106#define DFSDM_EXMIN(x) (DFSDM_FILTER_X_BASE_ADR(x) + 0x34)
107#define DFSDM_CNVTIMR(x) (DFSDM_FILTER_X_BASE_ADR(x) + 0x38)
108
109/* CR1 Control register 1 */
110#define DFSDM_CR1_DFEN_MASK BIT(0)
111#define DFSDM_CR1_DFEN(v) FIELD_PREP(DFSDM_CR1_DFEN_MASK, v)
112#define DFSDM_CR1_JSWSTART_MASK BIT(1)
113#define DFSDM_CR1_JSWSTART(v) FIELD_PREP(DFSDM_CR1_JSWSTART_MASK, v)
114#define DFSDM_CR1_JSYNC_MASK BIT(3)
115#define DFSDM_CR1_JSYNC(v) FIELD_PREP(DFSDM_CR1_JSYNC_MASK, v)
116#define DFSDM_CR1_JSCAN_MASK BIT(4)
117#define DFSDM_CR1_JSCAN(v) FIELD_PREP(DFSDM_CR1_JSCAN_MASK, v)
118#define DFSDM_CR1_JDMAEN_MASK BIT(5)
119#define DFSDM_CR1_JDMAEN(v) FIELD_PREP(DFSDM_CR1_JDMAEN_MASK, v)
120#define DFSDM_CR1_JEXTSEL_MASK GENMASK(12, 8)
121#define DFSDM_CR1_JEXTSEL(v) FIELD_PREP(DFSDM_CR1_JEXTSEL_MASK, v)
122#define DFSDM_CR1_JEXTEN_MASK GENMASK(14, 13)
123#define DFSDM_CR1_JEXTEN(v) FIELD_PREP(DFSDM_CR1_JEXTEN_MASK, v)
124#define DFSDM_CR1_RSWSTART_MASK BIT(17)
125#define DFSDM_CR1_RSWSTART(v) FIELD_PREP(DFSDM_CR1_RSWSTART_MASK, v)
126#define DFSDM_CR1_RCONT_MASK BIT(18)
127#define DFSDM_CR1_RCONT(v) FIELD_PREP(DFSDM_CR1_RCONT_MASK, v)
128#define DFSDM_CR1_RSYNC_MASK BIT(19)
129#define DFSDM_CR1_RSYNC(v) FIELD_PREP(DFSDM_CR1_RSYNC_MASK, v)
130#define DFSDM_CR1_RDMAEN_MASK BIT(21)
131#define DFSDM_CR1_RDMAEN(v) FIELD_PREP(DFSDM_CR1_RDMAEN_MASK, v)
132#define DFSDM_CR1_RCH_MASK GENMASK(26, 24)
133#define DFSDM_CR1_RCH(v) FIELD_PREP(DFSDM_CR1_RCH_MASK, v)
134#define DFSDM_CR1_FAST_MASK BIT(29)
135#define DFSDM_CR1_FAST(v) FIELD_PREP(DFSDM_CR1_FAST_MASK, v)
136#define DFSDM_CR1_AWFSEL_MASK BIT(30)
137#define DFSDM_CR1_AWFSEL(v) FIELD_PREP(DFSDM_CR1_AWFSEL_MASK, v)
138
139/* CR2: Control register 2 */
140#define DFSDM_CR2_IE_MASK GENMASK(6, 0)
141#define DFSDM_CR2_IE(v) FIELD_PREP(DFSDM_CR2_IE_MASK, v)
142#define DFSDM_CR2_JEOCIE_MASK BIT(0)
143#define DFSDM_CR2_JEOCIE(v) FIELD_PREP(DFSDM_CR2_JEOCIE_MASK, v)
144#define DFSDM_CR2_REOCIE_MASK BIT(1)
145#define DFSDM_CR2_REOCIE(v) FIELD_PREP(DFSDM_CR2_REOCIE_MASK, v)
146#define DFSDM_CR2_JOVRIE_MASK BIT(2)
147#define DFSDM_CR2_JOVRIE(v) FIELD_PREP(DFSDM_CR2_JOVRIE_MASK, v)
148#define DFSDM_CR2_ROVRIE_MASK BIT(3)
149#define DFSDM_CR2_ROVRIE(v) FIELD_PREP(DFSDM_CR2_ROVRIE_MASK, v)
150#define DFSDM_CR2_AWDIE_MASK BIT(4)
151#define DFSDM_CR2_AWDIE(v) FIELD_PREP(DFSDM_CR2_AWDIE_MASK, v)
152#define DFSDM_CR2_SCDIE_MASK BIT(5)
153#define DFSDM_CR2_SCDIE(v) FIELD_PREP(DFSDM_CR2_SCDIE_MASK, v)
154#define DFSDM_CR2_CKABIE_MASK BIT(6)
155#define DFSDM_CR2_CKABIE(v) FIELD_PREP(DFSDM_CR2_CKABIE_MASK, v)
156#define DFSDM_CR2_EXCH_MASK GENMASK(15, 8)
157#define DFSDM_CR2_EXCH(v) FIELD_PREP(DFSDM_CR2_EXCH_MASK, v)
158#define DFSDM_CR2_AWDCH_MASK GENMASK(23, 16)
159#define DFSDM_CR2_AWDCH(v) FIELD_PREP(DFSDM_CR2_AWDCH_MASK, v)
160
161/* ISR: Interrupt status register */
162#define DFSDM_ISR_JEOCF_MASK BIT(0)
163#define DFSDM_ISR_JEOCF(v) FIELD_PREP(DFSDM_ISR_JEOCF_MASK, v)
164#define DFSDM_ISR_REOCF_MASK BIT(1)
165#define DFSDM_ISR_REOCF(v) FIELD_PREP(DFSDM_ISR_REOCF_MASK, v)
166#define DFSDM_ISR_JOVRF_MASK BIT(2)
167#define DFSDM_ISR_JOVRF(v) FIELD_PREP(DFSDM_ISR_JOVRF_MASK, v)
168#define DFSDM_ISR_ROVRF_MASK BIT(3)
169#define DFSDM_ISR_ROVRF(v) FIELD_PREP(DFSDM_ISR_ROVRF_MASK, v)
170#define DFSDM_ISR_AWDF_MASK BIT(4)
171#define DFSDM_ISR_AWDF(v) FIELD_PREP(DFSDM_ISR_AWDF_MASK, v)
172#define DFSDM_ISR_JCIP_MASK BIT(13)
173#define DFSDM_ISR_JCIP(v) FIELD_PREP(DFSDM_ISR_JCIP_MASK, v)
174#define DFSDM_ISR_RCIP_MASK BIT(14)
175#define DFSDM_ISR_RCIP(v) FIELD_PREP(DFSDM_ISR_RCIP, v)
176#define DFSDM_ISR_CKABF_MASK GENMASK(23, 16)
177#define DFSDM_ISR_CKABF(v) FIELD_PREP(DFSDM_ISR_CKABF_MASK, v)
178#define DFSDM_ISR_SCDF_MASK GENMASK(31, 24)
179#define DFSDM_ISR_SCDF(v) FIELD_PREP(DFSDM_ISR_SCDF_MASK, v)
180
181/* ICR: Interrupt flag clear register */
182#define DFSDM_ICR_CLRJOVRF_MASK BIT(2)
183#define DFSDM_ICR_CLRJOVRF(v) FIELD_PREP(DFSDM_ICR_CLRJOVRF_MASK, v)
184#define DFSDM_ICR_CLRROVRF_MASK BIT(3)
185#define DFSDM_ICR_CLRROVRF(v) FIELD_PREP(DFSDM_ICR_CLRROVRF_MASK, v)
186#define DFSDM_ICR_CLRCKABF_MASK GENMASK(23, 16)
187#define DFSDM_ICR_CLRCKABF(v) FIELD_PREP(DFSDM_ICR_CLRCKABF_MASK, v)
188#define DFSDM_ICR_CLRCKABF_CH_MASK(y) BIT(16 + (y))
189#define DFSDM_ICR_CLRCKABF_CH(v, y) \
190 (((v) << (16 + (y))) & DFSDM_ICR_CLRCKABF_CH_MASK(y))
191#define DFSDM_ICR_CLRSCDF_MASK GENMASK(31, 24)
192#define DFSDM_ICR_CLRSCDF(v) FIELD_PREP(DFSDM_ICR_CLRSCDF_MASK, v)
193#define DFSDM_ICR_CLRSCDF_CH_MASK(y) BIT(24 + (y))
194#define DFSDM_ICR_CLRSCDF_CH(v, y) \
195 (((v) << (24 + (y))) & DFSDM_ICR_CLRSCDF_MASK(y))
196
197/* FCR: Filter control register */
198#define DFSDM_FCR_IOSR_MASK GENMASK(7, 0)
199#define DFSDM_FCR_IOSR(v) FIELD_PREP(DFSDM_FCR_IOSR_MASK, v)
200#define DFSDM_FCR_FOSR_MASK GENMASK(25, 16)
201#define DFSDM_FCR_FOSR(v) FIELD_PREP(DFSDM_FCR_FOSR_MASK, v)
202#define DFSDM_FCR_FORD_MASK GENMASK(31, 29)
203#define DFSDM_FCR_FORD(v) FIELD_PREP(DFSDM_FCR_FORD_MASK, v)
204
205/* RDATAR: Filter data register for regular channel */
206#define DFSDM_DATAR_CH_MASK GENMASK(2, 0)
207#define DFSDM_DATAR_DATA_OFFSET 8
208#define DFSDM_DATAR_DATA_MASK GENMASK(31, DFSDM_DATAR_DATA_OFFSET)
209
210/* AWLTR: Filter analog watchdog low threshold register */
211#define DFSDM_AWLTR_BKAWL_MASK GENMASK(3, 0)
212#define DFSDM_AWLTR_BKAWL(v) FIELD_PREP(DFSDM_AWLTR_BKAWL_MASK, v)
213#define DFSDM_AWLTR_AWLT_MASK GENMASK(31, 8)
214#define DFSDM_AWLTR_AWLT(v) FIELD_PREP(DFSDM_AWLTR_AWLT_MASK, v)
215
216/* AWHTR: Filter analog watchdog low threshold register */
217#define DFSDM_AWHTR_BKAWH_MASK GENMASK(3, 0)
218#define DFSDM_AWHTR_BKAWH(v) FIELD_PREP(DFSDM_AWHTR_BKAWH_MASK, v)
219#define DFSDM_AWHTR_AWHT_MASK GENMASK(31, 8)
220#define DFSDM_AWHTR_AWHT(v) FIELD_PREP(DFSDM_AWHTR_AWHT_MASK, v)
221
222/* AWSR: Filter watchdog status register */
223#define DFSDM_AWSR_AWLTF_MASK GENMASK(7, 0)
224#define DFSDM_AWSR_AWLTF(v) FIELD_PREP(DFSDM_AWSR_AWLTF_MASK, v)
225#define DFSDM_AWSR_AWHTF_MASK GENMASK(15, 8)
226#define DFSDM_AWSR_AWHTF(v) FIELD_PREP(DFSDM_AWSR_AWHTF_MASK, v)
227
228/* AWCFR: Filter watchdog status register */
229#define DFSDM_AWCFR_AWLTF_MASK GENMASK(7, 0)
230#define DFSDM_AWCFR_AWLTF(v) FIELD_PREP(DFSDM_AWCFR_AWLTF_MASK, v)
231#define DFSDM_AWCFR_AWHTF_MASK GENMASK(15, 8)
232#define DFSDM_AWCFR_AWHTF(v) FIELD_PREP(DFSDM_AWCFR_AWHTF_MASK, v)
233
234/* DFSDM filter order */
235enum stm32_dfsdm_sinc_order {
236 DFSDM_FASTSINC_ORDER, /* FastSinc filter type */
237 DFSDM_SINC1_ORDER, /* Sinc 1 filter type */
238 DFSDM_SINC2_ORDER, /* Sinc 2 filter type */
239 DFSDM_SINC3_ORDER, /* Sinc 3 filter type */
240 DFSDM_SINC4_ORDER, /* Sinc 4 filter type (N.A. for watchdog) */
241 DFSDM_SINC5_ORDER, /* Sinc 5 filter type (N.A. for watchdog) */
242 DFSDM_NB_SINC_ORDER,
243};
244
245/**
246 * struct stm32_dfsdm_filter - structure relative to stm32 FDSDM filter
247 * @iosr: integrator oversampling
248 * @fosr: filter oversampling
249 * @ford: filter order
250 * @res: output sample resolution
251 * @sync_mode: filter synchronized with filter 0
252 * @fast: filter fast mode
253 */
254struct stm32_dfsdm_filter {
255 unsigned int iosr;
256 unsigned int fosr;
257 enum stm32_dfsdm_sinc_order ford;
258 u64 res;
259 unsigned int sync_mode;
260 unsigned int fast;
261};
262
263/**
264 * struct stm32_dfsdm_channel - structure relative to stm32 FDSDM channel
265 * @id: id of the channel
266 * @type: interface type linked to stm32_dfsdm_chan_type
267 * @src: interface type linked to stm32_dfsdm_chan_src
268 * @alt_si: alternative serial input interface
269 */
270struct stm32_dfsdm_channel {
271 unsigned int id;
272 unsigned int type;
273 unsigned int src;
274 unsigned int alt_si;
275};
276
277/**
278 * struct stm32_dfsdm - stm32 FDSDM driver common data (for all instances)
279 * @base: control registers base cpu addr
280 * @phys_base: DFSDM IP register physical address
281 * @regmap: regmap for register read/write
282 * @fl_list: filter resources list
283 * @num_fls: number of filter resources available
284 * @ch_list: channel resources list
285 * @num_chs: number of channel resources available
286 * @spi_master_freq: SPI clock out frequency
287 */
288struct stm32_dfsdm {
289 void __iomem *base;
290 phys_addr_t phys_base;
291 struct regmap *regmap;
292 struct stm32_dfsdm_filter *fl_list;
293 unsigned int num_fls;
294 struct stm32_dfsdm_channel *ch_list;
295 unsigned int num_chs;
296 unsigned int spi_master_freq;
297};
298
299/* DFSDM channel serial spi clock source */
300enum stm32_dfsdm_spi_clk_src {
301 DFSDM_CHANNEL_SPI_CLOCK_EXTERNAL,
302 DFSDM_CHANNEL_SPI_CLOCK_INTERNAL,
303 DFSDM_CHANNEL_SPI_CLOCK_INTERNAL_DIV2_FALLING,
304 DFSDM_CHANNEL_SPI_CLOCK_INTERNAL_DIV2_RISING
305};
306
307int stm32_dfsdm_start_dfsdm(struct stm32_dfsdm *dfsdm);
308int stm32_dfsdm_stop_dfsdm(struct stm32_dfsdm *dfsdm);
309
310#endif
diff --git a/drivers/iio/buffer/Kconfig b/drivers/iio/buffer/Kconfig
index 4ffd3db7817f..338774cba19b 100644
--- a/drivers/iio/buffer/Kconfig
+++ b/drivers/iio/buffer/Kconfig
@@ -29,6 +29,16 @@ config IIO_BUFFER_DMAENGINE
29 29
30 Should be selected by drivers that want to use this functionality. 30 Should be selected by drivers that want to use this functionality.
31 31
32config IIO_BUFFER_HW_CONSUMER
33 tristate "Industrial I/O HW buffering"
34 help
35 Provides a way to bonding when an IIO device has a direct connection
36 to another device in hardware. In this case buffers for data transfers
37 are handled by hardware.
38
39 Should be selected by drivers that want to use the generic Hw consumer
40 interface.
41
32config IIO_KFIFO_BUF 42config IIO_KFIFO_BUF
33 tristate "Industrial I/O buffering based on kfifo" 43 tristate "Industrial I/O buffering based on kfifo"
34 help 44 help
diff --git a/drivers/iio/buffer/Makefile b/drivers/iio/buffer/Makefile
index 95f9f41c58b7..1403eb2f9409 100644
--- a/drivers/iio/buffer/Makefile
+++ b/drivers/iio/buffer/Makefile
@@ -7,5 +7,6 @@
7obj-$(CONFIG_IIO_BUFFER_CB) += industrialio-buffer-cb.o 7obj-$(CONFIG_IIO_BUFFER_CB) += industrialio-buffer-cb.o
8obj-$(CONFIG_IIO_BUFFER_DMA) += industrialio-buffer-dma.o 8obj-$(CONFIG_IIO_BUFFER_DMA) += industrialio-buffer-dma.o
9obj-$(CONFIG_IIO_BUFFER_DMAENGINE) += industrialio-buffer-dmaengine.o 9obj-$(CONFIG_IIO_BUFFER_DMAENGINE) += industrialio-buffer-dmaengine.o
10obj-$(CONFIG_IIO_BUFFER_HW_CONSUMER) += industrialio-hw-consumer.o
10obj-$(CONFIG_IIO_TRIGGERED_BUFFER) += industrialio-triggered-buffer.o 11obj-$(CONFIG_IIO_TRIGGERED_BUFFER) += industrialio-triggered-buffer.o
11obj-$(CONFIG_IIO_KFIFO_BUF) += kfifo_buf.o 12obj-$(CONFIG_IIO_KFIFO_BUF) += kfifo_buf.o
diff --git a/drivers/iio/buffer/industrialio-buffer-cb.c b/drivers/iio/buffer/industrialio-buffer-cb.c
index 4847534700e7..ea63c838eeae 100644
--- a/drivers/iio/buffer/industrialio-buffer-cb.c
+++ b/drivers/iio/buffer/industrialio-buffer-cb.c
@@ -104,6 +104,17 @@ error_free_cb_buff:
104} 104}
105EXPORT_SYMBOL_GPL(iio_channel_get_all_cb); 105EXPORT_SYMBOL_GPL(iio_channel_get_all_cb);
106 106
107int iio_channel_cb_set_buffer_watermark(struct iio_cb_buffer *cb_buff,
108 size_t watermark)
109{
110 if (!watermark)
111 return -EINVAL;
112 cb_buff->buffer.watermark = watermark;
113
114 return 0;
115}
116EXPORT_SYMBOL_GPL(iio_channel_cb_set_buffer_watermark);
117
107int iio_channel_start_all_cb(struct iio_cb_buffer *cb_buff) 118int iio_channel_start_all_cb(struct iio_cb_buffer *cb_buff)
108{ 119{
109 return iio_update_buffers(cb_buff->indio_dev, &cb_buff->buffer, 120 return iio_update_buffers(cb_buff->indio_dev, &cb_buff->buffer,
diff --git a/drivers/iio/buffer/industrialio-hw-consumer.c b/drivers/iio/buffer/industrialio-hw-consumer.c
new file mode 100644
index 000000000000..95165697d8ae
--- /dev/null
+++ b/drivers/iio/buffer/industrialio-hw-consumer.c
@@ -0,0 +1,247 @@
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright 2017 Analog Devices Inc.
4 * Author: Lars-Peter Clausen <lars@metafoo.de>
5 */
6
7#include <linux/err.h>
8#include <linux/export.h>
9#include <linux/slab.h>
10#include <linux/module.h>
11
12#include <linux/iio/iio.h>
13#include <linux/iio/consumer.h>
14#include <linux/iio/hw-consumer.h>
15#include <linux/iio/buffer_impl.h>
16
17/**
18 * struct iio_hw_consumer - IIO hw consumer block
19 * @buffers: hardware buffers list head.
20 * @channels: IIO provider channels.
21 */
22struct iio_hw_consumer {
23 struct list_head buffers;
24 struct iio_channel *channels;
25};
26
27struct hw_consumer_buffer {
28 struct list_head head;
29 struct iio_dev *indio_dev;
30 struct iio_buffer buffer;
31 long scan_mask[];
32};
33
34static struct hw_consumer_buffer *iio_buffer_to_hw_consumer_buffer(
35 struct iio_buffer *buffer)
36{
37 return container_of(buffer, struct hw_consumer_buffer, buffer);
38}
39
40static void iio_hw_buf_release(struct iio_buffer *buffer)
41{
42 struct hw_consumer_buffer *hw_buf =
43 iio_buffer_to_hw_consumer_buffer(buffer);
44 kfree(hw_buf);
45}
46
47static const struct iio_buffer_access_funcs iio_hw_buf_access = {
48 .release = &iio_hw_buf_release,
49 .modes = INDIO_BUFFER_HARDWARE,
50};
51
52static struct hw_consumer_buffer *iio_hw_consumer_get_buffer(
53 struct iio_hw_consumer *hwc, struct iio_dev *indio_dev)
54{
55 size_t mask_size = BITS_TO_LONGS(indio_dev->masklength) * sizeof(long);
56 struct hw_consumer_buffer *buf;
57
58 list_for_each_entry(buf, &hwc->buffers, head) {
59 if (buf->indio_dev == indio_dev)
60 return buf;
61 }
62
63 buf = kzalloc(sizeof(*buf) + mask_size, GFP_KERNEL);
64 if (!buf)
65 return NULL;
66
67 buf->buffer.access = &iio_hw_buf_access;
68 buf->indio_dev = indio_dev;
69 buf->buffer.scan_mask = buf->scan_mask;
70
71 iio_buffer_init(&buf->buffer);
72 list_add_tail(&buf->head, &hwc->buffers);
73
74 return buf;
75}
76
77/**
78 * iio_hw_consumer_alloc() - Allocate IIO hardware consumer
79 * @dev: Pointer to consumer device.
80 *
81 * Returns a valid iio_hw_consumer on success or a ERR_PTR() on failure.
82 */
83struct iio_hw_consumer *iio_hw_consumer_alloc(struct device *dev)
84{
85 struct hw_consumer_buffer *buf;
86 struct iio_hw_consumer *hwc;
87 struct iio_channel *chan;
88 int ret;
89
90 hwc = kzalloc(sizeof(*hwc), GFP_KERNEL);
91 if (!hwc)
92 return ERR_PTR(-ENOMEM);
93
94 INIT_LIST_HEAD(&hwc->buffers);
95
96 hwc->channels = iio_channel_get_all(dev);
97 if (IS_ERR(hwc->channels)) {
98 ret = PTR_ERR(hwc->channels);
99 goto err_free_hwc;
100 }
101
102 chan = &hwc->channels[0];
103 while (chan->indio_dev) {
104 buf = iio_hw_consumer_get_buffer(hwc, chan->indio_dev);
105 if (!buf) {
106 ret = -ENOMEM;
107 goto err_put_buffers;
108 }
109 set_bit(chan->channel->scan_index, buf->buffer.scan_mask);
110 chan++;
111 }
112
113 return hwc;
114
115err_put_buffers:
116 list_for_each_entry(buf, &hwc->buffers, head)
117 iio_buffer_put(&buf->buffer);
118 iio_channel_release_all(hwc->channels);
119err_free_hwc:
120 kfree(hwc);
121 return ERR_PTR(ret);
122}
123EXPORT_SYMBOL_GPL(iio_hw_consumer_alloc);
124
125/**
126 * iio_hw_consumer_free() - Free IIO hardware consumer
127 * @hwc: hw consumer to free.
128 */
129void iio_hw_consumer_free(struct iio_hw_consumer *hwc)
130{
131 struct hw_consumer_buffer *buf, *n;
132
133 iio_channel_release_all(hwc->channels);
134 list_for_each_entry_safe(buf, n, &hwc->buffers, head)
135 iio_buffer_put(&buf->buffer);
136 kfree(hwc);
137}
138EXPORT_SYMBOL_GPL(iio_hw_consumer_free);
139
140static void devm_iio_hw_consumer_release(struct device *dev, void *res)
141{
142 iio_hw_consumer_free(*(struct iio_hw_consumer **)res);
143}
144
145static int devm_iio_hw_consumer_match(struct device *dev, void *res, void *data)
146{
147 struct iio_hw_consumer **r = res;
148
149 if (!r || !*r) {
150 WARN_ON(!r || !*r);
151 return 0;
152 }
153 return *r == data;
154}
155
156/**
157 * devm_iio_hw_consumer_alloc - Resource-managed iio_hw_consumer_alloc()
158 * @dev: Pointer to consumer device.
159 *
160 * Managed iio_hw_consumer_alloc. iio_hw_consumer allocated with this function
161 * is automatically freed on driver detach.
162 *
163 * If an iio_hw_consumer allocated with this function needs to be freed
164 * separately, devm_iio_hw_consumer_free() must be used.
165 *
166 * returns pointer to allocated iio_hw_consumer on success, NULL on failure.
167 */
168struct iio_hw_consumer *devm_iio_hw_consumer_alloc(struct device *dev)
169{
170 struct iio_hw_consumer **ptr, *iio_hwc;
171
172 ptr = devres_alloc(devm_iio_hw_consumer_release, sizeof(*ptr),
173 GFP_KERNEL);
174 if (!ptr)
175 return NULL;
176
177 iio_hwc = iio_hw_consumer_alloc(dev);
178 if (IS_ERR(iio_hwc)) {
179 devres_free(ptr);
180 } else {
181 *ptr = iio_hwc;
182 devres_add(dev, ptr);
183 }
184
185 return iio_hwc;
186}
187EXPORT_SYMBOL_GPL(devm_iio_hw_consumer_alloc);
188
189/**
190 * devm_iio_hw_consumer_free - Resource-managed iio_hw_consumer_free()
191 * @dev: Pointer to consumer device.
192 * @hwc: iio_hw_consumer to free.
193 *
194 * Free iio_hw_consumer allocated with devm_iio_hw_consumer_alloc().
195 */
196void devm_iio_hw_consumer_free(struct device *dev, struct iio_hw_consumer *hwc)
197{
198 int rc;
199
200 rc = devres_release(dev, devm_iio_hw_consumer_release,
201 devm_iio_hw_consumer_match, hwc);
202 WARN_ON(rc);
203}
204EXPORT_SYMBOL_GPL(devm_iio_hw_consumer_free);
205
206/**
207 * iio_hw_consumer_enable() - Enable IIO hardware consumer
208 * @hwc: iio_hw_consumer to enable.
209 *
210 * Returns 0 on success.
211 */
212int iio_hw_consumer_enable(struct iio_hw_consumer *hwc)
213{
214 struct hw_consumer_buffer *buf;
215 int ret;
216
217 list_for_each_entry(buf, &hwc->buffers, head) {
218 ret = iio_update_buffers(buf->indio_dev, &buf->buffer, NULL);
219 if (ret)
220 goto err_disable_buffers;
221 }
222
223 return 0;
224
225err_disable_buffers:
226 list_for_each_entry_continue_reverse(buf, &hwc->buffers, head)
227 iio_update_buffers(buf->indio_dev, NULL, &buf->buffer);
228 return ret;
229}
230EXPORT_SYMBOL_GPL(iio_hw_consumer_enable);
231
232/**
233 * iio_hw_consumer_disable() - Disable IIO hardware consumer
234 * @hwc: iio_hw_consumer to disable.
235 */
236void iio_hw_consumer_disable(struct iio_hw_consumer *hwc)
237{
238 struct hw_consumer_buffer *buf;
239
240 list_for_each_entry(buf, &hwc->buffers, head)
241 iio_update_buffers(buf->indio_dev, NULL, &buf->buffer);
242}
243EXPORT_SYMBOL_GPL(iio_hw_consumer_disable);
244
245MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
246MODULE_DESCRIPTION("Hardware consumer buffer the IIO framework");
247MODULE_LICENSE("GPL v2");
diff --git a/drivers/iio/inkern.c b/drivers/iio/inkern.c
index 069defcc6d9b..ec98790e2a28 100644
--- a/drivers/iio/inkern.c
+++ b/drivers/iio/inkern.c
@@ -664,9 +664,8 @@ err_unlock:
664} 664}
665EXPORT_SYMBOL_GPL(iio_convert_raw_to_processed); 665EXPORT_SYMBOL_GPL(iio_convert_raw_to_processed);
666 666
667static int iio_read_channel_attribute(struct iio_channel *chan, 667int iio_read_channel_attribute(struct iio_channel *chan, int *val, int *val2,
668 int *val, int *val2, 668 enum iio_chan_info_enum attribute)
669 enum iio_chan_info_enum attribute)
670{ 669{
671 int ret; 670 int ret;
672 671
@@ -682,6 +681,7 @@ err_unlock:
682 681
683 return ret; 682 return ret;
684} 683}
684EXPORT_SYMBOL_GPL(iio_read_channel_attribute);
685 685
686int iio_read_channel_offset(struct iio_channel *chan, int *val, int *val2) 686int iio_read_channel_offset(struct iio_channel *chan, int *val, int *val2)
687{ 687{
@@ -850,7 +850,8 @@ static int iio_channel_write(struct iio_channel *chan, int val, int val2,
850 chan->channel, val, val2, info); 850 chan->channel, val, val2, info);
851} 851}
852 852
853int iio_write_channel_raw(struct iio_channel *chan, int val) 853int iio_write_channel_attribute(struct iio_channel *chan, int val, int val2,
854 enum iio_chan_info_enum attribute)
854{ 855{
855 int ret; 856 int ret;
856 857
@@ -860,12 +861,18 @@ int iio_write_channel_raw(struct iio_channel *chan, int val)
860 goto err_unlock; 861 goto err_unlock;
861 } 862 }
862 863
863 ret = iio_channel_write(chan, val, 0, IIO_CHAN_INFO_RAW); 864 ret = iio_channel_write(chan, val, val2, attribute);
864err_unlock: 865err_unlock:
865 mutex_unlock(&chan->indio_dev->info_exist_lock); 866 mutex_unlock(&chan->indio_dev->info_exist_lock);
866 867
867 return ret; 868 return ret;
868} 869}
870EXPORT_SYMBOL_GPL(iio_write_channel_attribute);
871
872int iio_write_channel_raw(struct iio_channel *chan, int val)
873{
874 return iio_write_channel_attribute(chan, val, 0, IIO_CHAN_INFO_RAW);
875}
869EXPORT_SYMBOL_GPL(iio_write_channel_raw); 876EXPORT_SYMBOL_GPL(iio_write_channel_raw);
870 877
871unsigned int iio_get_channel_ext_info_count(struct iio_channel *chan) 878unsigned int iio_get_channel_ext_info_count(struct iio_channel *chan)
diff --git a/drivers/input/joystick/analog.c b/drivers/input/joystick/analog.c
index 3d8ff09eba57..c868a878c84f 100644
--- a/drivers/input/joystick/analog.c
+++ b/drivers/input/joystick/analog.c
@@ -163,7 +163,7 @@ static unsigned int get_time_pit(void)
163#define GET_TIME(x) do { x = (unsigned int)rdtsc(); } while (0) 163#define GET_TIME(x) do { x = (unsigned int)rdtsc(); } while (0)
164#define DELTA(x,y) ((y)-(x)) 164#define DELTA(x,y) ((y)-(x))
165#define TIME_NAME "TSC" 165#define TIME_NAME "TSC"
166#elif defined(__alpha__) || defined(CONFIG_MN10300) || defined(CONFIG_ARM) || defined(CONFIG_ARM64) || defined(CONFIG_TILE) 166#elif defined(__alpha__) || defined(CONFIG_MN10300) || defined(CONFIG_ARM) || defined(CONFIG_ARM64) || defined(CONFIG_RISCV) || defined(CONFIG_TILE)
167#define GET_TIME(x) do { x = get_cycles(); } while (0) 167#define GET_TIME(x) do { x = get_cycles(); } while (0)
168#define DELTA(x,y) ((y)-(x)) 168#define DELTA(x,y) ((y)-(x))
169#define TIME_NAME "get_cycles" 169#define TIME_NAME "get_cycles"
diff --git a/drivers/input/misc/ims-pcu.c b/drivers/input/misc/ims-pcu.c
index ae473123583b..3d51175c4d72 100644
--- a/drivers/input/misc/ims-pcu.c
+++ b/drivers/input/misc/ims-pcu.c
@@ -1651,7 +1651,7 @@ ims_pcu_get_cdc_union_desc(struct usb_interface *intf)
1651 return union_desc; 1651 return union_desc;
1652 1652
1653 dev_err(&intf->dev, 1653 dev_err(&intf->dev,
1654 "Union descriptor to short (%d vs %zd\n)", 1654 "Union descriptor too short (%d vs %zd)\n",
1655 union_desc->bLength, sizeof(*union_desc)); 1655 union_desc->bLength, sizeof(*union_desc));
1656 return NULL; 1656 return NULL;
1657 } 1657 }
diff --git a/drivers/input/misc/xen-kbdfront.c b/drivers/input/misc/xen-kbdfront.c
index 6bf56bb5f8d9..d91f3b1c5375 100644
--- a/drivers/input/misc/xen-kbdfront.c
+++ b/drivers/input/misc/xen-kbdfront.c
@@ -326,8 +326,6 @@ static int xenkbd_probe(struct xenbus_device *dev,
326 0, width, 0, 0); 326 0, width, 0, 0);
327 input_set_abs_params(mtouch, ABS_MT_POSITION_Y, 327 input_set_abs_params(mtouch, ABS_MT_POSITION_Y,
328 0, height, 0, 0); 328 0, height, 0, 0);
329 input_set_abs_params(mtouch, ABS_MT_PRESSURE,
330 0, 255, 0, 0);
331 329
332 ret = input_mt_init_slots(mtouch, num_cont, INPUT_MT_DIRECT); 330 ret = input_mt_init_slots(mtouch, num_cont, INPUT_MT_DIRECT);
333 if (ret) { 331 if (ret) {
diff --git a/drivers/input/mouse/elantech.c b/drivers/input/mouse/elantech.c
index b84cd978fce2..a4aaa748e987 100644
--- a/drivers/input/mouse/elantech.c
+++ b/drivers/input/mouse/elantech.c
@@ -1613,7 +1613,7 @@ static int elantech_set_properties(struct elantech_data *etd)
1613 case 5: 1613 case 5:
1614 etd->hw_version = 3; 1614 etd->hw_version = 3;
1615 break; 1615 break;
1616 case 6 ... 14: 1616 case 6 ... 15:
1617 etd->hw_version = 4; 1617 etd->hw_version = 4;
1618 break; 1618 break;
1619 default: 1619 default:
diff --git a/drivers/input/touchscreen/elants_i2c.c b/drivers/input/touchscreen/elants_i2c.c
index e102d7764bc2..a458e5ec9e41 100644
--- a/drivers/input/touchscreen/elants_i2c.c
+++ b/drivers/input/touchscreen/elants_i2c.c
@@ -27,6 +27,7 @@
27#include <linux/module.h> 27#include <linux/module.h>
28#include <linux/input.h> 28#include <linux/input.h>
29#include <linux/interrupt.h> 29#include <linux/interrupt.h>
30#include <linux/irq.h>
30#include <linux/platform_device.h> 31#include <linux/platform_device.h>
31#include <linux/async.h> 32#include <linux/async.h>
32#include <linux/i2c.h> 33#include <linux/i2c.h>
@@ -1261,10 +1262,13 @@ static int elants_i2c_probe(struct i2c_client *client,
1261 } 1262 }
1262 1263
1263 /* 1264 /*
1264 * Systems using device tree should set up interrupt via DTS, 1265 * Platform code (ACPI, DTS) should normally set up interrupt
1265 * the rest will use the default falling edge interrupts. 1266 * for us, but in case it did not let's fall back to using falling
1267 * edge to be compatible with older Chromebooks.
1266 */ 1268 */
1267 irqflags = client->dev.of_node ? 0 : IRQF_TRIGGER_FALLING; 1269 irqflags = irq_get_trigger_type(client->irq);
1270 if (!irqflags)
1271 irqflags = IRQF_TRIGGER_FALLING;
1268 1272
1269 error = devm_request_threaded_irq(&client->dev, client->irq, 1273 error = devm_request_threaded_irq(&client->dev, client->irq,
1270 NULL, elants_i2c_irq, 1274 NULL, elants_i2c_irq,
diff --git a/drivers/input/touchscreen/hideep.c b/drivers/input/touchscreen/hideep.c
index fc080a7c2e1f..f1cd4dd9a4a3 100644
--- a/drivers/input/touchscreen/hideep.c
+++ b/drivers/input/touchscreen/hideep.c
@@ -10,8 +10,7 @@
10#include <linux/of.h> 10#include <linux/of.h>
11#include <linux/firmware.h> 11#include <linux/firmware.h>
12#include <linux/delay.h> 12#include <linux/delay.h>
13#include <linux/gpio.h> 13#include <linux/gpio/consumer.h>
14#include <linux/gpio/machine.h>
15#include <linux/i2c.h> 14#include <linux/i2c.h>
16#include <linux/acpi.h> 15#include <linux/acpi.h>
17#include <linux/interrupt.h> 16#include <linux/interrupt.h>
diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c
index f122071688fd..744592d330ca 100644
--- a/drivers/iommu/arm-smmu-v3.c
+++ b/drivers/iommu/arm-smmu-v3.c
@@ -1698,13 +1698,15 @@ static int arm_smmu_domain_finalise(struct iommu_domain *domain)
1698 domain->pgsize_bitmap = pgtbl_cfg.pgsize_bitmap; 1698 domain->pgsize_bitmap = pgtbl_cfg.pgsize_bitmap;
1699 domain->geometry.aperture_end = (1UL << ias) - 1; 1699 domain->geometry.aperture_end = (1UL << ias) - 1;
1700 domain->geometry.force_aperture = true; 1700 domain->geometry.force_aperture = true;
1701 smmu_domain->pgtbl_ops = pgtbl_ops;
1702 1701
1703 ret = finalise_stage_fn(smmu_domain, &pgtbl_cfg); 1702 ret = finalise_stage_fn(smmu_domain, &pgtbl_cfg);
1704 if (ret < 0) 1703 if (ret < 0) {
1705 free_io_pgtable_ops(pgtbl_ops); 1704 free_io_pgtable_ops(pgtbl_ops);
1705 return ret;
1706 }
1706 1707
1707 return ret; 1708 smmu_domain->pgtbl_ops = pgtbl_ops;
1709 return 0;
1708} 1710}
1709 1711
1710static __le64 *arm_smmu_get_step_for_sid(struct arm_smmu_device *smmu, u32 sid) 1712static __le64 *arm_smmu_get_step_for_sid(struct arm_smmu_device *smmu, u32 sid)
@@ -1731,7 +1733,7 @@ static __le64 *arm_smmu_get_step_for_sid(struct arm_smmu_device *smmu, u32 sid)
1731 1733
1732static void arm_smmu_install_ste_for_dev(struct iommu_fwspec *fwspec) 1734static void arm_smmu_install_ste_for_dev(struct iommu_fwspec *fwspec)
1733{ 1735{
1734 int i; 1736 int i, j;
1735 struct arm_smmu_master_data *master = fwspec->iommu_priv; 1737 struct arm_smmu_master_data *master = fwspec->iommu_priv;
1736 struct arm_smmu_device *smmu = master->smmu; 1738 struct arm_smmu_device *smmu = master->smmu;
1737 1739
@@ -1739,6 +1741,13 @@ static void arm_smmu_install_ste_for_dev(struct iommu_fwspec *fwspec)
1739 u32 sid = fwspec->ids[i]; 1741 u32 sid = fwspec->ids[i];
1740 __le64 *step = arm_smmu_get_step_for_sid(smmu, sid); 1742 __le64 *step = arm_smmu_get_step_for_sid(smmu, sid);
1741 1743
1744 /* Bridged PCI devices may end up with duplicated IDs */
1745 for (j = 0; j < i; j++)
1746 if (fwspec->ids[j] == sid)
1747 break;
1748 if (j < i)
1749 continue;
1750
1742 arm_smmu_write_strtab_ent(smmu, sid, step, &master->ste); 1751 arm_smmu_write_strtab_ent(smmu, sid, step, &master->ste);
1743 } 1752 }
1744} 1753}
diff --git a/drivers/leds/led-core.c b/drivers/leds/led-core.c
index f3654fd2eaf3..ede4fa0ac2cc 100644
--- a/drivers/leds/led-core.c
+++ b/drivers/leds/led-core.c
@@ -186,8 +186,9 @@ void led_blink_set(struct led_classdev *led_cdev,
186 unsigned long *delay_on, 186 unsigned long *delay_on,
187 unsigned long *delay_off) 187 unsigned long *delay_off)
188{ 188{
189 led_stop_software_blink(led_cdev); 189 del_timer_sync(&led_cdev->blink_timer);
190 190
191 clear_bit(LED_BLINK_SW, &led_cdev->work_flags);
191 clear_bit(LED_BLINK_ONESHOT, &led_cdev->work_flags); 192 clear_bit(LED_BLINK_ONESHOT, &led_cdev->work_flags);
192 clear_bit(LED_BLINK_ONESHOT_STOP, &led_cdev->work_flags); 193 clear_bit(LED_BLINK_ONESHOT_STOP, &led_cdev->work_flags);
193 194
diff --git a/drivers/mfd/rtsx_pcr.c b/drivers/mfd/rtsx_pcr.c
index 590fb9aad77d..c3ed885c155c 100644
--- a/drivers/mfd/rtsx_pcr.c
+++ b/drivers/mfd/rtsx_pcr.c
@@ -1543,6 +1543,9 @@ static void rtsx_pci_shutdown(struct pci_dev *pcidev)
1543 rtsx_pci_power_off(pcr, HOST_ENTER_S1); 1543 rtsx_pci_power_off(pcr, HOST_ENTER_S1);
1544 1544
1545 pci_disable_device(pcidev); 1545 pci_disable_device(pcidev);
1546 free_irq(pcr->irq, (void *)pcr);
1547 if (pcr->msi_en)
1548 pci_disable_msi(pcr->pci);
1546} 1549}
1547 1550
1548#else /* CONFIG_PM */ 1551#else /* CONFIG_PM */
diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
index 90b9a9ccbe60..9285f60e5783 100644
--- a/drivers/mtd/nand/pxa3xx_nand.c
+++ b/drivers/mtd/nand/pxa3xx_nand.c
@@ -963,6 +963,7 @@ static void prepare_start_command(struct pxa3xx_nand_info *info, int command)
963 963
964 switch (command) { 964 switch (command) {
965 case NAND_CMD_READ0: 965 case NAND_CMD_READ0:
966 case NAND_CMD_READOOB:
966 case NAND_CMD_PAGEPROG: 967 case NAND_CMD_PAGEPROG:
967 info->use_ecc = 1; 968 info->use_ecc = 1;
968 break; 969 break;
diff --git a/drivers/parisc/dino.c b/drivers/parisc/dino.c
index 0b3fb99d9b89..7390fb8ca9d1 100644
--- a/drivers/parisc/dino.c
+++ b/drivers/parisc/dino.c
@@ -303,7 +303,7 @@ static void dino_mask_irq(struct irq_data *d)
303 struct dino_device *dino_dev = irq_data_get_irq_chip_data(d); 303 struct dino_device *dino_dev = irq_data_get_irq_chip_data(d);
304 int local_irq = gsc_find_local_irq(d->irq, dino_dev->global_irq, DINO_LOCAL_IRQS); 304 int local_irq = gsc_find_local_irq(d->irq, dino_dev->global_irq, DINO_LOCAL_IRQS);
305 305
306 DBG(KERN_WARNING "%s(0x%p, %d)\n", __func__, dino_dev, d->irq); 306 DBG(KERN_WARNING "%s(0x%px, %d)\n", __func__, dino_dev, d->irq);
307 307
308 /* Clear the matching bit in the IMR register */ 308 /* Clear the matching bit in the IMR register */
309 dino_dev->imr &= ~(DINO_MASK_IRQ(local_irq)); 309 dino_dev->imr &= ~(DINO_MASK_IRQ(local_irq));
@@ -316,7 +316,7 @@ static void dino_unmask_irq(struct irq_data *d)
316 int local_irq = gsc_find_local_irq(d->irq, dino_dev->global_irq, DINO_LOCAL_IRQS); 316 int local_irq = gsc_find_local_irq(d->irq, dino_dev->global_irq, DINO_LOCAL_IRQS);
317 u32 tmp; 317 u32 tmp;
318 318
319 DBG(KERN_WARNING "%s(0x%p, %d)\n", __func__, dino_dev, d->irq); 319 DBG(KERN_WARNING "%s(0x%px, %d)\n", __func__, dino_dev, d->irq);
320 320
321 /* 321 /*
322 ** clear pending IRQ bits 322 ** clear pending IRQ bits
@@ -396,7 +396,7 @@ ilr_again:
396 if (mask) { 396 if (mask) {
397 if (--ilr_loop > 0) 397 if (--ilr_loop > 0)
398 goto ilr_again; 398 goto ilr_again;
399 printk(KERN_ERR "Dino 0x%p: stuck interrupt %d\n", 399 printk(KERN_ERR "Dino 0x%px: stuck interrupt %d\n",
400 dino_dev->hba.base_addr, mask); 400 dino_dev->hba.base_addr, mask);
401 return IRQ_NONE; 401 return IRQ_NONE;
402 } 402 }
@@ -553,7 +553,7 @@ dino_fixup_bus(struct pci_bus *bus)
553 struct pci_dev *dev; 553 struct pci_dev *dev;
554 struct dino_device *dino_dev = DINO_DEV(parisc_walk_tree(bus->bridge)); 554 struct dino_device *dino_dev = DINO_DEV(parisc_walk_tree(bus->bridge));
555 555
556 DBG(KERN_WARNING "%s(0x%p) bus %d platform_data 0x%p\n", 556 DBG(KERN_WARNING "%s(0x%px) bus %d platform_data 0x%px\n",
557 __func__, bus, bus->busn_res.start, 557 __func__, bus, bus->busn_res.start,
558 bus->bridge->platform_data); 558 bus->bridge->platform_data);
559 559
@@ -854,7 +854,7 @@ static int __init dino_common_init(struct parisc_device *dev,
854 res->flags = IORESOURCE_IO; /* do not mark it busy ! */ 854 res->flags = IORESOURCE_IO; /* do not mark it busy ! */
855 if (request_resource(&ioport_resource, res) < 0) { 855 if (request_resource(&ioport_resource, res) < 0) {
856 printk(KERN_ERR "%s: request I/O Port region failed " 856 printk(KERN_ERR "%s: request I/O Port region failed "
857 "0x%lx/%lx (hpa 0x%p)\n", 857 "0x%lx/%lx (hpa 0x%px)\n",
858 name, (unsigned long)res->start, (unsigned long)res->end, 858 name, (unsigned long)res->start, (unsigned long)res->end,
859 dino_dev->hba.base_addr); 859 dino_dev->hba.base_addr);
860 return 1; 860 return 1;
diff --git a/drivers/parisc/eisa_eeprom.c b/drivers/parisc/eisa_eeprom.c
index 4dd9b1308128..99a80da6fd2e 100644
--- a/drivers/parisc/eisa_eeprom.c
+++ b/drivers/parisc/eisa_eeprom.c
@@ -106,7 +106,7 @@ static int __init eisa_eeprom_init(void)
106 return retval; 106 return retval;
107 } 107 }
108 108
109 printk(KERN_INFO "EISA EEPROM at 0x%p\n", eisa_eeprom_addr); 109 printk(KERN_INFO "EISA EEPROM at 0x%px\n", eisa_eeprom_addr);
110 return 0; 110 return 0;
111} 111}
112 112
diff --git a/drivers/s390/block/dasd_3990_erp.c b/drivers/s390/block/dasd_3990_erp.c
index c94b606e0df8..ee14d8e45c97 100644
--- a/drivers/s390/block/dasd_3990_erp.c
+++ b/drivers/s390/block/dasd_3990_erp.c
@@ -2803,6 +2803,16 @@ dasd_3990_erp_action(struct dasd_ccw_req * cqr)
2803 erp = dasd_3990_erp_handle_match_erp(cqr, erp); 2803 erp = dasd_3990_erp_handle_match_erp(cqr, erp);
2804 } 2804 }
2805 2805
2806
2807 /*
2808 * For path verification work we need to stick with the path that was
2809 * originally chosen so that the per path configuration data is
2810 * assigned correctly.
2811 */
2812 if (test_bit(DASD_CQR_VERIFY_PATH, &erp->flags) && cqr->lpm) {
2813 erp->lpm = cqr->lpm;
2814 }
2815
2806 if (device->features & DASD_FEATURE_ERPLOG) { 2816 if (device->features & DASD_FEATURE_ERPLOG) {
2807 /* print current erp_chain */ 2817 /* print current erp_chain */
2808 dev_err(&device->cdev->dev, 2818 dev_err(&device->cdev->dev,
diff --git a/drivers/s390/char/Makefile b/drivers/s390/char/Makefile
index 05ac6ba15a53..614b44e70a28 100644
--- a/drivers/s390/char/Makefile
+++ b/drivers/s390/char/Makefile
@@ -17,6 +17,8 @@ CFLAGS_REMOVE_sclp_early_core.o += $(CC_FLAGS_MARCH)
17CFLAGS_sclp_early_core.o += -march=z900 17CFLAGS_sclp_early_core.o += -march=z900
18endif 18endif
19 19
20CFLAGS_sclp_early_core.o += -D__NO_FORTIFY
21
20obj-y += ctrlchar.o keyboard.o defkeymap.o sclp.o sclp_rw.o sclp_quiesce.o \ 22obj-y += ctrlchar.o keyboard.o defkeymap.o sclp.o sclp_rw.o sclp_quiesce.o \
21 sclp_cmd.o sclp_config.o sclp_cpi_sys.o sclp_ocf.o sclp_ctl.o \ 23 sclp_cmd.o sclp_config.o sclp_cpi_sys.o sclp_ocf.o sclp_ctl.o \
22 sclp_early.o sclp_early_core.o 24 sclp_early.o sclp_early_core.o
diff --git a/drivers/xen/pvcalls-front.c b/drivers/xen/pvcalls-front.c
index d1e1d8d2b9d5..4c789e61554b 100644
--- a/drivers/xen/pvcalls-front.c
+++ b/drivers/xen/pvcalls-front.c
@@ -805,7 +805,7 @@ int pvcalls_front_accept(struct socket *sock, struct socket *newsock, int flags)
805 pvcalls_exit(); 805 pvcalls_exit();
806 return ret; 806 return ret;
807 } 807 }
808 map2 = kzalloc(sizeof(*map2), GFP_KERNEL); 808 map2 = kzalloc(sizeof(*map2), GFP_ATOMIC);
809 if (map2 == NULL) { 809 if (map2 == NULL) {
810 clear_bit(PVCALLS_FLAG_ACCEPT_INFLIGHT, 810 clear_bit(PVCALLS_FLAG_ACCEPT_INFLIGHT,
811 (void *)&map->passive.flags); 811 (void *)&map->passive.flags);
diff --git a/fs/afs/dir.c b/fs/afs/dir.c
index ff8d5bf4354f..23c7f395d718 100644
--- a/fs/afs/dir.c
+++ b/fs/afs/dir.c
@@ -895,20 +895,38 @@ error:
895 * However, if we didn't have a callback promise outstanding, or it was 895 * However, if we didn't have a callback promise outstanding, or it was
896 * outstanding on a different server, then it won't break it either... 896 * outstanding on a different server, then it won't break it either...
897 */ 897 */
898static int afs_dir_remove_link(struct dentry *dentry, struct key *key) 898static int afs_dir_remove_link(struct dentry *dentry, struct key *key,
899 unsigned long d_version_before,
900 unsigned long d_version_after)
899{ 901{
902 bool dir_valid;
900 int ret = 0; 903 int ret = 0;
901 904
905 /* There were no intervening changes on the server if the version
906 * number we got back was incremented by exactly 1.
907 */
908 dir_valid = (d_version_after == d_version_before + 1);
909
902 if (d_really_is_positive(dentry)) { 910 if (d_really_is_positive(dentry)) {
903 struct afs_vnode *vnode = AFS_FS_I(d_inode(dentry)); 911 struct afs_vnode *vnode = AFS_FS_I(d_inode(dentry));
904 912
905 if (test_bit(AFS_VNODE_DELETED, &vnode->flags)) 913 if (dir_valid) {
906 kdebug("AFS_VNODE_DELETED"); 914 drop_nlink(&vnode->vfs_inode);
907 clear_bit(AFS_VNODE_CB_PROMISED, &vnode->flags); 915 if (vnode->vfs_inode.i_nlink == 0) {
908 916 set_bit(AFS_VNODE_DELETED, &vnode->flags);
909 ret = afs_validate(vnode, key); 917 clear_bit(AFS_VNODE_CB_PROMISED, &vnode->flags);
910 if (ret == -ESTALE) 918 }
911 ret = 0; 919 ret = 0;
920 } else {
921 clear_bit(AFS_VNODE_CB_PROMISED, &vnode->flags);
922
923 if (test_bit(AFS_VNODE_DELETED, &vnode->flags))
924 kdebug("AFS_VNODE_DELETED");
925
926 ret = afs_validate(vnode, key);
927 if (ret == -ESTALE)
928 ret = 0;
929 }
912 _debug("nlink %d [val %d]", vnode->vfs_inode.i_nlink, ret); 930 _debug("nlink %d [val %d]", vnode->vfs_inode.i_nlink, ret);
913 } 931 }
914 932
@@ -923,6 +941,7 @@ static int afs_unlink(struct inode *dir, struct dentry *dentry)
923 struct afs_fs_cursor fc; 941 struct afs_fs_cursor fc;
924 struct afs_vnode *dvnode = AFS_FS_I(dir), *vnode; 942 struct afs_vnode *dvnode = AFS_FS_I(dir), *vnode;
925 struct key *key; 943 struct key *key;
944 unsigned long d_version = (unsigned long)dentry->d_fsdata;
926 int ret; 945 int ret;
927 946
928 _enter("{%x:%u},{%pd}", 947 _enter("{%x:%u},{%pd}",
@@ -955,7 +974,9 @@ static int afs_unlink(struct inode *dir, struct dentry *dentry)
955 afs_vnode_commit_status(&fc, dvnode, fc.cb_break); 974 afs_vnode_commit_status(&fc, dvnode, fc.cb_break);
956 ret = afs_end_vnode_operation(&fc); 975 ret = afs_end_vnode_operation(&fc);
957 if (ret == 0) 976 if (ret == 0)
958 ret = afs_dir_remove_link(dentry, key); 977 ret = afs_dir_remove_link(
978 dentry, key, d_version,
979 (unsigned long)dvnode->status.data_version);
959 } 980 }
960 981
961error_key: 982error_key:
diff --git a/fs/afs/inode.c b/fs/afs/inode.c
index 3415eb7484f6..1e81864ef0b2 100644
--- a/fs/afs/inode.c
+++ b/fs/afs/inode.c
@@ -377,6 +377,10 @@ int afs_validate(struct afs_vnode *vnode, struct key *key)
377 } 377 }
378 378
379 read_sequnlock_excl(&vnode->cb_lock); 379 read_sequnlock_excl(&vnode->cb_lock);
380
381 if (test_bit(AFS_VNODE_DELETED, &vnode->flags))
382 clear_nlink(&vnode->vfs_inode);
383
380 if (valid) 384 if (valid)
381 goto valid; 385 goto valid;
382 386
diff --git a/fs/afs/rxrpc.c b/fs/afs/rxrpc.c
index ea1460b9b71a..e1126659f043 100644
--- a/fs/afs/rxrpc.c
+++ b/fs/afs/rxrpc.c
@@ -885,7 +885,7 @@ int afs_extract_data(struct afs_call *call, void *buf, size_t count,
885{ 885{
886 struct afs_net *net = call->net; 886 struct afs_net *net = call->net;
887 enum afs_call_state state; 887 enum afs_call_state state;
888 u32 remote_abort; 888 u32 remote_abort = 0;
889 int ret; 889 int ret;
890 890
891 _enter("{%s,%zu},,%zu,%d", 891 _enter("{%s,%zu},,%zu,%d",
diff --git a/fs/afs/write.c b/fs/afs/write.c
index cb5f8a3df577..9370e2feb999 100644
--- a/fs/afs/write.c
+++ b/fs/afs/write.c
@@ -198,7 +198,7 @@ int afs_write_end(struct file *file, struct address_space *mapping,
198 ret = afs_fill_page(vnode, key, pos + copied, 198 ret = afs_fill_page(vnode, key, pos + copied,
199 len - copied, page); 199 len - copied, page);
200 if (ret < 0) 200 if (ret < 0)
201 return ret; 201 goto out;
202 } 202 }
203 SetPageUptodate(page); 203 SetPageUptodate(page);
204 } 204 }
@@ -206,10 +206,12 @@ int afs_write_end(struct file *file, struct address_space *mapping,
206 set_page_dirty(page); 206 set_page_dirty(page);
207 if (PageDirty(page)) 207 if (PageDirty(page))
208 _debug("dirtied"); 208 _debug("dirtied");
209 ret = copied;
210
211out:
209 unlock_page(page); 212 unlock_page(page);
210 put_page(page); 213 put_page(page);
211 214 return ret;
212 return copied;
213} 215}
214 216
215/* 217/*
diff --git a/fs/btrfs/delayed-inode.c b/fs/btrfs/delayed-inode.c
index 5d73f79ded8b..056276101c63 100644
--- a/fs/btrfs/delayed-inode.c
+++ b/fs/btrfs/delayed-inode.c
@@ -87,6 +87,7 @@ static struct btrfs_delayed_node *btrfs_get_delayed_node(
87 87
88 spin_lock(&root->inode_lock); 88 spin_lock(&root->inode_lock);
89 node = radix_tree_lookup(&root->delayed_nodes_tree, ino); 89 node = radix_tree_lookup(&root->delayed_nodes_tree, ino);
90
90 if (node) { 91 if (node) {
91 if (btrfs_inode->delayed_node) { 92 if (btrfs_inode->delayed_node) {
92 refcount_inc(&node->refs); /* can be accessed */ 93 refcount_inc(&node->refs); /* can be accessed */
@@ -94,9 +95,30 @@ static struct btrfs_delayed_node *btrfs_get_delayed_node(
94 spin_unlock(&root->inode_lock); 95 spin_unlock(&root->inode_lock);
95 return node; 96 return node;
96 } 97 }
97 btrfs_inode->delayed_node = node; 98
98 /* can be accessed and cached in the inode */ 99 /*
99 refcount_add(2, &node->refs); 100 * It's possible that we're racing into the middle of removing
101 * this node from the radix tree. In this case, the refcount
102 * was zero and it should never go back to one. Just return
103 * NULL like it was never in the radix at all; our release
104 * function is in the process of removing it.
105 *
106 * Some implementations of refcount_inc refuse to bump the
107 * refcount once it has hit zero. If we don't do this dance
108 * here, refcount_inc() may decide to just WARN_ONCE() instead
109 * of actually bumping the refcount.
110 *
111 * If this node is properly in the radix, we want to bump the
112 * refcount twice, once for the inode and once for this get
113 * operation.
114 */
115 if (refcount_inc_not_zero(&node->refs)) {
116 refcount_inc(&node->refs);
117 btrfs_inode->delayed_node = node;
118 } else {
119 node = NULL;
120 }
121
100 spin_unlock(&root->inode_lock); 122 spin_unlock(&root->inode_lock);
101 return node; 123 return node;
102 } 124 }
@@ -254,17 +276,18 @@ static void __btrfs_release_delayed_node(
254 mutex_unlock(&delayed_node->mutex); 276 mutex_unlock(&delayed_node->mutex);
255 277
256 if (refcount_dec_and_test(&delayed_node->refs)) { 278 if (refcount_dec_and_test(&delayed_node->refs)) {
257 bool free = false;
258 struct btrfs_root *root = delayed_node->root; 279 struct btrfs_root *root = delayed_node->root;
280
259 spin_lock(&root->inode_lock); 281 spin_lock(&root->inode_lock);
260 if (refcount_read(&delayed_node->refs) == 0) { 282 /*
261 radix_tree_delete(&root->delayed_nodes_tree, 283 * Once our refcount goes to zero, nobody is allowed to bump it
262 delayed_node->inode_id); 284 * back up. We can delete it now.
263 free = true; 285 */
264 } 286 ASSERT(refcount_read(&delayed_node->refs) == 0);
287 radix_tree_delete(&root->delayed_nodes_tree,
288 delayed_node->inode_id);
265 spin_unlock(&root->inode_lock); 289 spin_unlock(&root->inode_lock);
266 if (free) 290 kmem_cache_free(delayed_node_cache, delayed_node);
267 kmem_cache_free(delayed_node_cache, delayed_node);
268 } 291 }
269} 292}
270 293
diff --git a/fs/btrfs/volumes.c b/fs/btrfs/volumes.c
index 49810b70afd3..a25684287501 100644
--- a/fs/btrfs/volumes.c
+++ b/fs/btrfs/volumes.c
@@ -237,7 +237,6 @@ static struct btrfs_device *__alloc_device(void)
237 kfree(dev); 237 kfree(dev);
238 return ERR_PTR(-ENOMEM); 238 return ERR_PTR(-ENOMEM);
239 } 239 }
240 bio_get(dev->flush_bio);
241 240
242 INIT_LIST_HEAD(&dev->dev_list); 241 INIT_LIST_HEAD(&dev->dev_list);
243 INIT_LIST_HEAD(&dev->dev_alloc_list); 242 INIT_LIST_HEAD(&dev->dev_alloc_list);
diff --git a/fs/exec.c b/fs/exec.c
index 5688b5e1b937..7eb8d21bcab9 100644
--- a/fs/exec.c
+++ b/fs/exec.c
@@ -1349,9 +1349,14 @@ void setup_new_exec(struct linux_binprm * bprm)
1349 1349
1350 current->sas_ss_sp = current->sas_ss_size = 0; 1350 current->sas_ss_sp = current->sas_ss_size = 0;
1351 1351
1352 /* Figure out dumpability. */ 1352 /*
1353 * Figure out dumpability. Note that this checking only of current
1354 * is wrong, but userspace depends on it. This should be testing
1355 * bprm->secureexec instead.
1356 */
1353 if (bprm->interp_flags & BINPRM_FLAGS_ENFORCE_NONDUMP || 1357 if (bprm->interp_flags & BINPRM_FLAGS_ENFORCE_NONDUMP ||
1354 bprm->secureexec) 1358 !(uid_eq(current_euid(), current_uid()) &&
1359 gid_eq(current_egid(), current_gid())))
1355 set_dumpable(current->mm, suid_dumpable); 1360 set_dumpable(current->mm, suid_dumpable);
1356 else 1361 else
1357 set_dumpable(current->mm, SUID_DUMP_USER); 1362 set_dumpable(current->mm, SUID_DUMP_USER);
diff --git a/fs/super.c b/fs/super.c
index 7ff1349609e4..06bd25d90ba5 100644
--- a/fs/super.c
+++ b/fs/super.c
@@ -517,7 +517,11 @@ retry:
517 hlist_add_head(&s->s_instances, &type->fs_supers); 517 hlist_add_head(&s->s_instances, &type->fs_supers);
518 spin_unlock(&sb_lock); 518 spin_unlock(&sb_lock);
519 get_filesystem(type); 519 get_filesystem(type);
520 register_shrinker(&s->s_shrink); 520 err = register_shrinker(&s->s_shrink);
521 if (err) {
522 deactivate_locked_super(s);
523 s = ERR_PTR(err);
524 }
521 return s; 525 return s;
522} 526}
523 527
diff --git a/fs/userfaultfd.c b/fs/userfaultfd.c
index ac9a4e65ca49..41a75f9f23fd 100644
--- a/fs/userfaultfd.c
+++ b/fs/userfaultfd.c
@@ -570,11 +570,14 @@ out:
570static void userfaultfd_event_wait_completion(struct userfaultfd_ctx *ctx, 570static void userfaultfd_event_wait_completion(struct userfaultfd_ctx *ctx,
571 struct userfaultfd_wait_queue *ewq) 571 struct userfaultfd_wait_queue *ewq)
572{ 572{
573 struct userfaultfd_ctx *release_new_ctx;
574
573 if (WARN_ON_ONCE(current->flags & PF_EXITING)) 575 if (WARN_ON_ONCE(current->flags & PF_EXITING))
574 goto out; 576 goto out;
575 577
576 ewq->ctx = ctx; 578 ewq->ctx = ctx;
577 init_waitqueue_entry(&ewq->wq, current); 579 init_waitqueue_entry(&ewq->wq, current);
580 release_new_ctx = NULL;
578 581
579 spin_lock(&ctx->event_wqh.lock); 582 spin_lock(&ctx->event_wqh.lock);
580 /* 583 /*
@@ -601,8 +604,7 @@ static void userfaultfd_event_wait_completion(struct userfaultfd_ctx *ctx,
601 new = (struct userfaultfd_ctx *) 604 new = (struct userfaultfd_ctx *)
602 (unsigned long) 605 (unsigned long)
603 ewq->msg.arg.reserved.reserved1; 606 ewq->msg.arg.reserved.reserved1;
604 607 release_new_ctx = new;
605 userfaultfd_ctx_put(new);
606 } 608 }
607 break; 609 break;
608 } 610 }
@@ -617,6 +619,20 @@ static void userfaultfd_event_wait_completion(struct userfaultfd_ctx *ctx,
617 __set_current_state(TASK_RUNNING); 619 __set_current_state(TASK_RUNNING);
618 spin_unlock(&ctx->event_wqh.lock); 620 spin_unlock(&ctx->event_wqh.lock);
619 621
622 if (release_new_ctx) {
623 struct vm_area_struct *vma;
624 struct mm_struct *mm = release_new_ctx->mm;
625
626 /* the various vma->vm_userfaultfd_ctx still points to it */
627 down_write(&mm->mmap_sem);
628 for (vma = mm->mmap; vma; vma = vma->vm_next)
629 if (vma->vm_userfaultfd_ctx.ctx == release_new_ctx)
630 vma->vm_userfaultfd_ctx = NULL_VM_UFFD_CTX;
631 up_write(&mm->mmap_sem);
632
633 userfaultfd_ctx_put(release_new_ctx);
634 }
635
620 /* 636 /*
621 * ctx may go away after this if the userfault pseudo fd is 637 * ctx may go away after this if the userfault pseudo fd is
622 * already released. 638 * already released.
diff --git a/fs/xfs/xfs_aops.c b/fs/xfs/xfs_aops.c
index 21e2d70884e1..4fc526a27a94 100644
--- a/fs/xfs/xfs_aops.c
+++ b/fs/xfs/xfs_aops.c
@@ -399,7 +399,7 @@ xfs_map_blocks(
399 (ip->i_df.if_flags & XFS_IFEXTENTS)); 399 (ip->i_df.if_flags & XFS_IFEXTENTS));
400 ASSERT(offset <= mp->m_super->s_maxbytes); 400 ASSERT(offset <= mp->m_super->s_maxbytes);
401 401
402 if ((xfs_ufsize_t)offset + count > mp->m_super->s_maxbytes) 402 if (offset > mp->m_super->s_maxbytes - count)
403 count = mp->m_super->s_maxbytes - offset; 403 count = mp->m_super->s_maxbytes - offset;
404 end_fsb = XFS_B_TO_FSB(mp, (xfs_ufsize_t)offset + count); 404 end_fsb = XFS_B_TO_FSB(mp, (xfs_ufsize_t)offset + count);
405 offset_fsb = XFS_B_TO_FSBT(mp, offset); 405 offset_fsb = XFS_B_TO_FSBT(mp, offset);
@@ -1312,7 +1312,7 @@ xfs_get_blocks(
1312 lockmode = xfs_ilock_data_map_shared(ip); 1312 lockmode = xfs_ilock_data_map_shared(ip);
1313 1313
1314 ASSERT(offset <= mp->m_super->s_maxbytes); 1314 ASSERT(offset <= mp->m_super->s_maxbytes);
1315 if ((xfs_ufsize_t)offset + size > mp->m_super->s_maxbytes) 1315 if (offset > mp->m_super->s_maxbytes - size)
1316 size = mp->m_super->s_maxbytes - offset; 1316 size = mp->m_super->s_maxbytes - offset;
1317 end_fsb = XFS_B_TO_FSB(mp, (xfs_ufsize_t)offset + size); 1317 end_fsb = XFS_B_TO_FSB(mp, (xfs_ufsize_t)offset + size);
1318 offset_fsb = XFS_B_TO_FSBT(mp, offset); 1318 offset_fsb = XFS_B_TO_FSBT(mp, offset);
diff --git a/fs/xfs/xfs_iomap.c b/fs/xfs/xfs_iomap.c
index 7ab52a8bc0a9..66e1edbfb2b2 100644
--- a/fs/xfs/xfs_iomap.c
+++ b/fs/xfs/xfs_iomap.c
@@ -1006,7 +1006,7 @@ xfs_file_iomap_begin(
1006 } 1006 }
1007 1007
1008 ASSERT(offset <= mp->m_super->s_maxbytes); 1008 ASSERT(offset <= mp->m_super->s_maxbytes);
1009 if ((xfs_fsize_t)offset + length > mp->m_super->s_maxbytes) 1009 if (offset > mp->m_super->s_maxbytes - length)
1010 length = mp->m_super->s_maxbytes - offset; 1010 length = mp->m_super->s_maxbytes - offset;
1011 offset_fsb = XFS_B_TO_FSBT(mp, offset); 1011 offset_fsb = XFS_B_TO_FSBT(mp, offset);
1012 end_fsb = XFS_B_TO_FSB(mp, offset + length); 1012 end_fsb = XFS_B_TO_FSB(mp, offset + length);
diff --git a/fs/xfs/xfs_qm.c b/fs/xfs/xfs_qm.c
index ec952dfad359..b897b11afb2c 100644
--- a/fs/xfs/xfs_qm.c
+++ b/fs/xfs/xfs_qm.c
@@ -48,7 +48,7 @@
48STATIC int xfs_qm_init_quotainos(xfs_mount_t *); 48STATIC int xfs_qm_init_quotainos(xfs_mount_t *);
49STATIC int xfs_qm_init_quotainfo(xfs_mount_t *); 49STATIC int xfs_qm_init_quotainfo(xfs_mount_t *);
50 50
51 51STATIC void xfs_qm_destroy_quotainos(xfs_quotainfo_t *qi);
52STATIC void xfs_qm_dqfree_one(struct xfs_dquot *dqp); 52STATIC void xfs_qm_dqfree_one(struct xfs_dquot *dqp);
53/* 53/*
54 * We use the batch lookup interface to iterate over the dquots as it 54 * We use the batch lookup interface to iterate over the dquots as it
@@ -695,9 +695,17 @@ xfs_qm_init_quotainfo(
695 qinf->qi_shrinker.scan_objects = xfs_qm_shrink_scan; 695 qinf->qi_shrinker.scan_objects = xfs_qm_shrink_scan;
696 qinf->qi_shrinker.seeks = DEFAULT_SEEKS; 696 qinf->qi_shrinker.seeks = DEFAULT_SEEKS;
697 qinf->qi_shrinker.flags = SHRINKER_NUMA_AWARE; 697 qinf->qi_shrinker.flags = SHRINKER_NUMA_AWARE;
698 register_shrinker(&qinf->qi_shrinker); 698
699 error = register_shrinker(&qinf->qi_shrinker);
700 if (error)
701 goto out_free_inos;
702
699 return 0; 703 return 0;
700 704
705out_free_inos:
706 mutex_destroy(&qinf->qi_quotaofflock);
707 mutex_destroy(&qinf->qi_tree_lock);
708 xfs_qm_destroy_quotainos(qinf);
701out_free_lru: 709out_free_lru:
702 list_lru_destroy(&qinf->qi_lru); 710 list_lru_destroy(&qinf->qi_lru);
703out_free_qinf: 711out_free_qinf:
@@ -706,7 +714,6 @@ out_free_qinf:
706 return error; 714 return error;
707} 715}
708 716
709
710/* 717/*
711 * Gets called when unmounting a filesystem or when all quotas get 718 * Gets called when unmounting a filesystem or when all quotas get
712 * turned off. 719 * turned off.
@@ -723,19 +730,8 @@ xfs_qm_destroy_quotainfo(
723 730
724 unregister_shrinker(&qi->qi_shrinker); 731 unregister_shrinker(&qi->qi_shrinker);
725 list_lru_destroy(&qi->qi_lru); 732 list_lru_destroy(&qi->qi_lru);
726 733 xfs_qm_destroy_quotainos(qi);
727 if (qi->qi_uquotaip) { 734 mutex_destroy(&qi->qi_tree_lock);
728 IRELE(qi->qi_uquotaip);
729 qi->qi_uquotaip = NULL; /* paranoia */
730 }
731 if (qi->qi_gquotaip) {
732 IRELE(qi->qi_gquotaip);
733 qi->qi_gquotaip = NULL;
734 }
735 if (qi->qi_pquotaip) {
736 IRELE(qi->qi_pquotaip);
737 qi->qi_pquotaip = NULL;
738 }
739 mutex_destroy(&qi->qi_quotaofflock); 735 mutex_destroy(&qi->qi_quotaofflock);
740 kmem_free(qi); 736 kmem_free(qi);
741 mp->m_quotainfo = NULL; 737 mp->m_quotainfo = NULL;
@@ -1600,6 +1596,24 @@ error_rele:
1600} 1596}
1601 1597
1602STATIC void 1598STATIC void
1599xfs_qm_destroy_quotainos(
1600 xfs_quotainfo_t *qi)
1601{
1602 if (qi->qi_uquotaip) {
1603 IRELE(qi->qi_uquotaip);
1604 qi->qi_uquotaip = NULL; /* paranoia */
1605 }
1606 if (qi->qi_gquotaip) {
1607 IRELE(qi->qi_gquotaip);
1608 qi->qi_gquotaip = NULL;
1609 }
1610 if (qi->qi_pquotaip) {
1611 IRELE(qi->qi_pquotaip);
1612 qi->qi_pquotaip = NULL;
1613 }
1614}
1615
1616STATIC void
1603xfs_qm_dqfree_one( 1617xfs_qm_dqfree_one(
1604 struct xfs_dquot *dqp) 1618 struct xfs_dquot *dqp)
1605{ 1619{
diff --git a/include/crypto/if_alg.h b/include/crypto/if_alg.h
index 38d9c5861ed8..f38227a78eae 100644
--- a/include/crypto/if_alg.h
+++ b/include/crypto/if_alg.h
@@ -18,6 +18,7 @@
18#include <linux/if_alg.h> 18#include <linux/if_alg.h>
19#include <linux/scatterlist.h> 19#include <linux/scatterlist.h>
20#include <linux/types.h> 20#include <linux/types.h>
21#include <linux/atomic.h>
21#include <net/sock.h> 22#include <net/sock.h>
22 23
23#include <crypto/aead.h> 24#include <crypto/aead.h>
@@ -150,7 +151,7 @@ struct af_alg_ctx {
150 struct crypto_wait wait; 151 struct crypto_wait wait;
151 152
152 size_t used; 153 size_t used;
153 size_t rcvused; 154 atomic_t rcvused;
154 155
155 bool more; 156 bool more;
156 bool merge; 157 bool merge;
@@ -215,7 +216,7 @@ static inline int af_alg_rcvbuf(struct sock *sk)
215 struct af_alg_ctx *ctx = ask->private; 216 struct af_alg_ctx *ctx = ask->private;
216 217
217 return max_t(int, max_t(int, sk->sk_rcvbuf & PAGE_MASK, PAGE_SIZE) - 218 return max_t(int, max_t(int, sk->sk_rcvbuf & PAGE_MASK, PAGE_SIZE) -
218 ctx->rcvused, 0); 219 atomic_read(&ctx->rcvused), 0);
219} 220}
220 221
221/** 222/**
diff --git a/include/linux/bpf.h b/include/linux/bpf.h
index e55e4255a210..b63a592ad29d 100644
--- a/include/linux/bpf.h
+++ b/include/linux/bpf.h
@@ -419,6 +419,8 @@ static inline int bpf_map_attr_numa_node(const union bpf_attr *attr)
419 attr->numa_node : NUMA_NO_NODE; 419 attr->numa_node : NUMA_NO_NODE;
420} 420}
421 421
422struct bpf_prog *bpf_prog_get_type_path(const char *name, enum bpf_prog_type type);
423
422#else /* !CONFIG_BPF_SYSCALL */ 424#else /* !CONFIG_BPF_SYSCALL */
423static inline struct bpf_prog *bpf_prog_get(u32 ufd) 425static inline struct bpf_prog *bpf_prog_get(u32 ufd)
424{ 426{
@@ -506,6 +508,12 @@ static inline int cpu_map_enqueue(struct bpf_cpu_map_entry *rcpu,
506{ 508{
507 return 0; 509 return 0;
508} 510}
511
512static inline struct bpf_prog *bpf_prog_get_type_path(const char *name,
513 enum bpf_prog_type type)
514{
515 return ERR_PTR(-EOPNOTSUPP);
516}
509#endif /* CONFIG_BPF_SYSCALL */ 517#endif /* CONFIG_BPF_SYSCALL */
510 518
511static inline struct bpf_prog *bpf_prog_get_type(u32 ufd, 519static inline struct bpf_prog *bpf_prog_get_type(u32 ufd,
@@ -514,6 +522,8 @@ static inline struct bpf_prog *bpf_prog_get_type(u32 ufd,
514 return bpf_prog_get_type_dev(ufd, type, false); 522 return bpf_prog_get_type_dev(ufd, type, false);
515} 523}
516 524
525bool bpf_prog_get_ok(struct bpf_prog *, enum bpf_prog_type *, bool);
526
517int bpf_prog_offload_compile(struct bpf_prog *prog); 527int bpf_prog_offload_compile(struct bpf_prog *prog);
518void bpf_prog_offload_destroy(struct bpf_prog *prog); 528void bpf_prog_offload_destroy(struct bpf_prog *prog);
519 529
diff --git a/include/linux/efi.h b/include/linux/efi.h
index d813f7b04da7..29fdf8029cf6 100644
--- a/include/linux/efi.h
+++ b/include/linux/efi.h
@@ -140,11 +140,13 @@ struct efi_boot_memmap {
140 140
141struct capsule_info { 141struct capsule_info {
142 efi_capsule_header_t header; 142 efi_capsule_header_t header;
143 efi_capsule_header_t *capsule;
143 int reset_type; 144 int reset_type;
144 long index; 145 long index;
145 size_t count; 146 size_t count;
146 size_t total_size; 147 size_t total_size;
147 phys_addr_t *pages; 148 struct page **pages;
149 phys_addr_t *phys;
148 size_t page_bytes_remain; 150 size_t page_bytes_remain;
149}; 151};
150 152
diff --git a/include/linux/fscache.h b/include/linux/fscache.h
index f4ff47d4a893..fe0c349684fa 100644
--- a/include/linux/fscache.h
+++ b/include/linux/fscache.h
@@ -755,7 +755,7 @@ bool fscache_maybe_release_page(struct fscache_cookie *cookie,
755{ 755{
756 if (fscache_cookie_valid(cookie) && PageFsCache(page)) 756 if (fscache_cookie_valid(cookie) && PageFsCache(page))
757 return __fscache_maybe_release_page(cookie, page, gfp); 757 return __fscache_maybe_release_page(cookie, page, gfp);
758 return false; 758 return true;
759} 759}
760 760
761/** 761/**
diff --git a/include/linux/iio/adc/stm32-dfsdm-adc.h b/include/linux/iio/adc/stm32-dfsdm-adc.h
new file mode 100644
index 000000000000..e7dc7a542a4e
--- /dev/null
+++ b/include/linux/iio/adc/stm32-dfsdm-adc.h
@@ -0,0 +1,18 @@
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * This file discribe the STM32 DFSDM IIO driver API for audio part
4 *
5 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
6 * Author(s): Arnaud Pouliquen <arnaud.pouliquen@st.com>.
7 */
8
9#ifndef STM32_DFSDM_ADC_H
10#define STM32_DFSDM_ADC_H
11
12int stm32_dfsdm_get_buff_cb(struct iio_dev *iio_dev,
13 int (*cb)(const void *data, size_t size,
14 void *private),
15 void *private);
16int stm32_dfsdm_release_buff_cb(struct iio_dev *iio_dev);
17
18#endif
diff --git a/include/linux/iio/consumer.h b/include/linux/iio/consumer.h
index 5e347a9805fd..9887f4f8e2a8 100644
--- a/include/linux/iio/consumer.h
+++ b/include/linux/iio/consumer.h
@@ -134,6 +134,17 @@ struct iio_cb_buffer *iio_channel_get_all_cb(struct device *dev,
134 void *private), 134 void *private),
135 void *private); 135 void *private);
136/** 136/**
137 * iio_channel_cb_set_buffer_watermark() - set the buffer watermark.
138 * @cb_buffer: The callback buffer from whom we want the channel
139 * information.
140 * @watermark: buffer watermark in bytes.
141 *
142 * This function allows to configure the buffer watermark.
143 */
144int iio_channel_cb_set_buffer_watermark(struct iio_cb_buffer *cb_buffer,
145 size_t watermark);
146
147/**
137 * iio_channel_release_all_cb() - release and unregister the callback. 148 * iio_channel_release_all_cb() - release and unregister the callback.
138 * @cb_buffer: The callback buffer that was allocated. 149 * @cb_buffer: The callback buffer that was allocated.
139 */ 150 */
@@ -216,6 +227,32 @@ int iio_read_channel_average_raw(struct iio_channel *chan, int *val);
216int iio_read_channel_processed(struct iio_channel *chan, int *val); 227int iio_read_channel_processed(struct iio_channel *chan, int *val);
217 228
218/** 229/**
230 * iio_write_channel_attribute() - Write values to the device attribute.
231 * @chan: The channel being queried.
232 * @val: Value being written.
233 * @val2: Value being written.val2 use depends on attribute type.
234 * @attribute: info attribute to be read.
235 *
236 * Returns an error code or 0.
237 */
238int iio_write_channel_attribute(struct iio_channel *chan, int val,
239 int val2, enum iio_chan_info_enum attribute);
240
241/**
242 * iio_read_channel_attribute() - Read values from the device attribute.
243 * @chan: The channel being queried.
244 * @val: Value being written.
245 * @val2: Value being written.Val2 use depends on attribute type.
246 * @attribute: info attribute to be written.
247 *
248 * Returns an error code if failed. Else returns a description of what is in val
249 * and val2, such as IIO_VAL_INT_PLUS_MICRO telling us we have a value of val
250 * + val2/1e6
251 */
252int iio_read_channel_attribute(struct iio_channel *chan, int *val,
253 int *val2, enum iio_chan_info_enum attribute);
254
255/**
219 * iio_write_channel_raw() - write to a given channel 256 * iio_write_channel_raw() - write to a given channel
220 * @chan: The channel being queried. 257 * @chan: The channel being queried.
221 * @val: Value being written. 258 * @val: Value being written.
diff --git a/include/linux/iio/hw-consumer.h b/include/linux/iio/hw-consumer.h
new file mode 100644
index 000000000000..44d48bb1d39f
--- /dev/null
+++ b/include/linux/iio/hw-consumer.h
@@ -0,0 +1,21 @@
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Industrial I/O in kernel hardware consumer interface
4 *
5 * Copyright 2017 Analog Devices Inc.
6 * Author: Lars-Peter Clausen <lars@metafoo.de>
7 */
8
9#ifndef LINUX_IIO_HW_CONSUMER_H
10#define LINUX_IIO_HW_CONSUMER_H
11
12struct iio_hw_consumer;
13
14struct iio_hw_consumer *iio_hw_consumer_alloc(struct device *dev);
15void iio_hw_consumer_free(struct iio_hw_consumer *hwc);
16struct iio_hw_consumer *devm_iio_hw_consumer_alloc(struct device *dev);
17void devm_iio_hw_consumer_free(struct device *dev, struct iio_hw_consumer *hwc);
18int iio_hw_consumer_enable(struct iio_hw_consumer *hwc);
19void iio_hw_consumer_disable(struct iio_hw_consumer *hwc);
20
21#endif
diff --git a/include/linux/iio/iio.h b/include/linux/iio/iio.h
index 20b61347ea58..f12a61be1ede 100644
--- a/include/linux/iio/iio.h
+++ b/include/linux/iio/iio.h
@@ -20,34 +20,6 @@
20 * Currently assumes nano seconds. 20 * Currently assumes nano seconds.
21 */ 21 */
22 22
23enum iio_chan_info_enum {
24 IIO_CHAN_INFO_RAW = 0,
25 IIO_CHAN_INFO_PROCESSED,
26 IIO_CHAN_INFO_SCALE,
27 IIO_CHAN_INFO_OFFSET,
28 IIO_CHAN_INFO_CALIBSCALE,
29 IIO_CHAN_INFO_CALIBBIAS,
30 IIO_CHAN_INFO_PEAK,
31 IIO_CHAN_INFO_PEAK_SCALE,
32 IIO_CHAN_INFO_QUADRATURE_CORRECTION_RAW,
33 IIO_CHAN_INFO_AVERAGE_RAW,
34 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY,
35 IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY,
36 IIO_CHAN_INFO_SAMP_FREQ,
37 IIO_CHAN_INFO_FREQUENCY,
38 IIO_CHAN_INFO_PHASE,
39 IIO_CHAN_INFO_HARDWAREGAIN,
40 IIO_CHAN_INFO_HYSTERESIS,
41 IIO_CHAN_INFO_INT_TIME,
42 IIO_CHAN_INFO_ENABLE,
43 IIO_CHAN_INFO_CALIBHEIGHT,
44 IIO_CHAN_INFO_CALIBWEIGHT,
45 IIO_CHAN_INFO_DEBOUNCE_COUNT,
46 IIO_CHAN_INFO_DEBOUNCE_TIME,
47 IIO_CHAN_INFO_CALIBEMISSIVITY,
48 IIO_CHAN_INFO_OVERSAMPLING_RATIO,
49};
50
51enum iio_shared_by { 23enum iio_shared_by {
52 IIO_SEPARATE, 24 IIO_SEPARATE,
53 IIO_SHARED_BY_TYPE, 25 IIO_SHARED_BY_TYPE,
diff --git a/include/linux/iio/types.h b/include/linux/iio/types.h
index 2aa7b6384d64..6eb3d683ef62 100644
--- a/include/linux/iio/types.h
+++ b/include/linux/iio/types.h
@@ -34,4 +34,32 @@ enum iio_available_type {
34 IIO_AVAIL_RANGE, 34 IIO_AVAIL_RANGE,
35}; 35};
36 36
37enum iio_chan_info_enum {
38 IIO_CHAN_INFO_RAW = 0,
39 IIO_CHAN_INFO_PROCESSED,
40 IIO_CHAN_INFO_SCALE,
41 IIO_CHAN_INFO_OFFSET,
42 IIO_CHAN_INFO_CALIBSCALE,
43 IIO_CHAN_INFO_CALIBBIAS,
44 IIO_CHAN_INFO_PEAK,
45 IIO_CHAN_INFO_PEAK_SCALE,
46 IIO_CHAN_INFO_QUADRATURE_CORRECTION_RAW,
47 IIO_CHAN_INFO_AVERAGE_RAW,
48 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY,
49 IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY,
50 IIO_CHAN_INFO_SAMP_FREQ,
51 IIO_CHAN_INFO_FREQUENCY,
52 IIO_CHAN_INFO_PHASE,
53 IIO_CHAN_INFO_HARDWAREGAIN,
54 IIO_CHAN_INFO_HYSTERESIS,
55 IIO_CHAN_INFO_INT_TIME,
56 IIO_CHAN_INFO_ENABLE,
57 IIO_CHAN_INFO_CALIBHEIGHT,
58 IIO_CHAN_INFO_CALIBWEIGHT,
59 IIO_CHAN_INFO_DEBOUNCE_COUNT,
60 IIO_CHAN_INFO_DEBOUNCE_TIME,
61 IIO_CHAN_INFO_CALIBEMISSIVITY,
62 IIO_CHAN_INFO_OVERSAMPLING_RATIO,
63};
64
37#endif /* _IIO_TYPES_H_ */ 65#endif /* _IIO_TYPES_H_ */
diff --git a/include/sound/soc-acpi-intel-match.h b/include/sound/soc-acpi-intel-match.h
index 1a9191cd4bb3..9da6388c20a1 100644
--- a/include/sound/soc-acpi-intel-match.h
+++ b/include/sound/soc-acpi-intel-match.h
@@ -16,6 +16,7 @@
16#ifndef __LINUX_SND_SOC_ACPI_INTEL_MATCH_H 16#ifndef __LINUX_SND_SOC_ACPI_INTEL_MATCH_H
17#define __LINUX_SND_SOC_ACPI_INTEL_MATCH_H 17#define __LINUX_SND_SOC_ACPI_INTEL_MATCH_H
18 18
19#include <linux/module.h>
19#include <linux/stddef.h> 20#include <linux/stddef.h>
20#include <linux/acpi.h> 21#include <linux/acpi.h>
21 22
diff --git a/include/sound/soc-acpi.h b/include/sound/soc-acpi.h
index a7d8d335b043..d1aaf876cd26 100644
--- a/include/sound/soc-acpi.h
+++ b/include/sound/soc-acpi.h
@@ -17,6 +17,7 @@
17 17
18#include <linux/stddef.h> 18#include <linux/stddef.h>
19#include <linux/acpi.h> 19#include <linux/acpi.h>
20#include <linux/mod_devicetable.h>
20 21
21struct snd_soc_acpi_package_context { 22struct snd_soc_acpi_package_context {
22 char *name; /* package name */ 23 char *name; /* package name */
@@ -49,9 +50,6 @@ snd_soc_acpi_find_package_from_hid(const u8 hid[ACPI_ID_LEN],
49struct snd_soc_acpi_mach * 50struct snd_soc_acpi_mach *
50snd_soc_acpi_find_machine(struct snd_soc_acpi_mach *machines); 51snd_soc_acpi_find_machine(struct snd_soc_acpi_mach *machines);
51 52
52/* acpi check hid */
53bool snd_soc_acpi_check_hid(const u8 hid[ACPI_ID_LEN]);
54
55/** 53/**
56 * snd_soc_acpi_mach: ACPI-based machine descriptor. Most of the fields are 54 * snd_soc_acpi_mach: ACPI-based machine descriptor. Most of the fields are
57 * related to the hardware, except for the firmware and topology file names. 55 * related to the hardware, except for the firmware and topology file names.
diff --git a/kernel/acct.c b/kernel/acct.c
index d15c0ee4d955..addf7732fb56 100644
--- a/kernel/acct.c
+++ b/kernel/acct.c
@@ -102,7 +102,7 @@ static int check_free_space(struct bsd_acct_struct *acct)
102{ 102{
103 struct kstatfs sbuf; 103 struct kstatfs sbuf;
104 104
105 if (time_is_before_jiffies(acct->needcheck)) 105 if (time_is_after_jiffies(acct->needcheck))
106 goto out; 106 goto out;
107 107
108 /* May block */ 108 /* May block */
diff --git a/kernel/bpf/inode.c b/kernel/bpf/inode.c
index 01aaef1a77c5..5bb5e49ef4c3 100644
--- a/kernel/bpf/inode.c
+++ b/kernel/bpf/inode.c
@@ -368,7 +368,45 @@ out:
368 putname(pname); 368 putname(pname);
369 return ret; 369 return ret;
370} 370}
371EXPORT_SYMBOL_GPL(bpf_obj_get_user); 371
372static struct bpf_prog *__get_prog_inode(struct inode *inode, enum bpf_prog_type type)
373{
374 struct bpf_prog *prog;
375 int ret = inode_permission(inode, MAY_READ | MAY_WRITE);
376 if (ret)
377 return ERR_PTR(ret);
378
379 if (inode->i_op == &bpf_map_iops)
380 return ERR_PTR(-EINVAL);
381 if (inode->i_op != &bpf_prog_iops)
382 return ERR_PTR(-EACCES);
383
384 prog = inode->i_private;
385
386 ret = security_bpf_prog(prog);
387 if (ret < 0)
388 return ERR_PTR(ret);
389
390 if (!bpf_prog_get_ok(prog, &type, false))
391 return ERR_PTR(-EINVAL);
392
393 return bpf_prog_inc(prog);
394}
395
396struct bpf_prog *bpf_prog_get_type_path(const char *name, enum bpf_prog_type type)
397{
398 struct bpf_prog *prog;
399 struct path path;
400 int ret = kern_path(name, LOOKUP_FOLLOW, &path);
401 if (ret)
402 return ERR_PTR(ret);
403 prog = __get_prog_inode(d_backing_inode(path.dentry), type);
404 if (!IS_ERR(prog))
405 touch_atime(&path);
406 path_put(&path);
407 return prog;
408}
409EXPORT_SYMBOL(bpf_prog_get_type_path);
372 410
373static void bpf_evict_inode(struct inode *inode) 411static void bpf_evict_inode(struct inode *inode)
374{ 412{
diff --git a/kernel/bpf/syscall.c b/kernel/bpf/syscall.c
index 2c4cfeaa8d5e..5cb783fc8224 100644
--- a/kernel/bpf/syscall.c
+++ b/kernel/bpf/syscall.c
@@ -1057,7 +1057,7 @@ struct bpf_prog *bpf_prog_inc_not_zero(struct bpf_prog *prog)
1057} 1057}
1058EXPORT_SYMBOL_GPL(bpf_prog_inc_not_zero); 1058EXPORT_SYMBOL_GPL(bpf_prog_inc_not_zero);
1059 1059
1060static bool bpf_prog_get_ok(struct bpf_prog *prog, 1060bool bpf_prog_get_ok(struct bpf_prog *prog,
1061 enum bpf_prog_type *attach_type, bool attach_drv) 1061 enum bpf_prog_type *attach_type, bool attach_drv)
1062{ 1062{
1063 /* not an attachment, just a refcount inc, always allow */ 1063 /* not an attachment, just a refcount inc, always allow */
diff --git a/kernel/exit.c b/kernel/exit.c
index df0c91d5606c..995453d9fb55 100644
--- a/kernel/exit.c
+++ b/kernel/exit.c
@@ -1763,3 +1763,4 @@ __weak void abort(void)
1763 /* if that doesn't kill us, halt */ 1763 /* if that doesn't kill us, halt */
1764 panic("Oops failed to kill thread"); 1764 panic("Oops failed to kill thread");
1765} 1765}
1766EXPORT_SYMBOL(abort);
diff --git a/kernel/pid.c b/kernel/pid.c
index b13b624e2c49..1e8bb6550ec4 100644
--- a/kernel/pid.c
+++ b/kernel/pid.c
@@ -193,10 +193,8 @@ struct pid *alloc_pid(struct pid_namespace *ns)
193 } 193 }
194 194
195 if (unlikely(is_child_reaper(pid))) { 195 if (unlikely(is_child_reaper(pid))) {
196 if (pid_ns_prepare_proc(ns)) { 196 if (pid_ns_prepare_proc(ns))
197 disable_pid_allocation(ns);
198 goto out_free; 197 goto out_free;
199 }
200 } 198 }
201 199
202 get_pid_ns(ns); 200 get_pid_ns(ns);
@@ -226,6 +224,10 @@ out_free:
226 while (++i <= ns->level) 224 while (++i <= ns->level)
227 idr_remove(&ns->idr, (pid->numbers + i)->nr); 225 idr_remove(&ns->idr, (pid->numbers + i)->nr);
228 226
227 /* On failure to allocate the first pid, reset the state */
228 if (ns->pid_allocated == PIDNS_ADDING)
229 idr_set_cursor(&ns->idr, 0);
230
229 spin_unlock_irq(&pidmap_lock); 231 spin_unlock_irq(&pidmap_lock);
230 232
231 kmem_cache_free(ns->pid_cachep, pid); 233 kmem_cache_free(ns->pid_cachep, pid);
diff --git a/lib/mpi/longlong.h b/lib/mpi/longlong.h
index 57fd45ab7af1..08c60d10747f 100644
--- a/lib/mpi/longlong.h
+++ b/lib/mpi/longlong.h
@@ -671,7 +671,23 @@ do { \
671 ************** MIPS/64 ************** 671 ************** MIPS/64 **************
672 ***************************************/ 672 ***************************************/
673#if (defined(__mips) && __mips >= 3) && W_TYPE_SIZE == 64 673#if (defined(__mips) && __mips >= 3) && W_TYPE_SIZE == 64
674#if (__GNUC__ >= 5) || (__GNUC__ >= 4 && __GNUC_MINOR__ >= 4) 674#if defined(__mips_isa_rev) && __mips_isa_rev >= 6
675/*
676 * GCC ends up emitting a __multi3 intrinsic call for MIPS64r6 with the plain C
677 * code below, so we special case MIPS64r6 until the compiler can do better.
678 */
679#define umul_ppmm(w1, w0, u, v) \
680do { \
681 __asm__ ("dmulu %0,%1,%2" \
682 : "=d" ((UDItype)(w0)) \
683 : "d" ((UDItype)(u)), \
684 "d" ((UDItype)(v))); \
685 __asm__ ("dmuhu %0,%1,%2" \
686 : "=d" ((UDItype)(w1)) \
687 : "d" ((UDItype)(u)), \
688 "d" ((UDItype)(v))); \
689} while (0)
690#elif (__GNUC__ >= 5) || (__GNUC__ >= 4 && __GNUC_MINOR__ >= 4)
675#define umul_ppmm(w1, w0, u, v) \ 691#define umul_ppmm(w1, w0, u, v) \
676do { \ 692do { \
677 typedef unsigned int __ll_UTItype __attribute__((mode(TI))); \ 693 typedef unsigned int __ll_UTItype __attribute__((mode(TI))); \
diff --git a/mm/debug.c b/mm/debug.c
index d947f3e03b0d..56e2d9125ea5 100644
--- a/mm/debug.c
+++ b/mm/debug.c
@@ -50,7 +50,7 @@ void __dump_page(struct page *page, const char *reason)
50 */ 50 */
51 int mapcount = PageSlab(page) ? 0 : page_mapcount(page); 51 int mapcount = PageSlab(page) ? 0 : page_mapcount(page);
52 52
53 pr_emerg("page:%p count:%d mapcount:%d mapping:%p index:%#lx", 53 pr_emerg("page:%px count:%d mapcount:%d mapping:%px index:%#lx",
54 page, page_ref_count(page), mapcount, 54 page, page_ref_count(page), mapcount,
55 page->mapping, page_to_pgoff(page)); 55 page->mapping, page_to_pgoff(page));
56 if (PageCompound(page)) 56 if (PageCompound(page))
@@ -69,7 +69,7 @@ void __dump_page(struct page *page, const char *reason)
69 69
70#ifdef CONFIG_MEMCG 70#ifdef CONFIG_MEMCG
71 if (page->mem_cgroup) 71 if (page->mem_cgroup)
72 pr_alert("page->mem_cgroup:%p\n", page->mem_cgroup); 72 pr_alert("page->mem_cgroup:%px\n", page->mem_cgroup);
73#endif 73#endif
74} 74}
75 75
@@ -84,10 +84,10 @@ EXPORT_SYMBOL(dump_page);
84 84
85void dump_vma(const struct vm_area_struct *vma) 85void dump_vma(const struct vm_area_struct *vma)
86{ 86{
87 pr_emerg("vma %p start %p end %p\n" 87 pr_emerg("vma %px start %px end %px\n"
88 "next %p prev %p mm %p\n" 88 "next %px prev %px mm %px\n"
89 "prot %lx anon_vma %p vm_ops %p\n" 89 "prot %lx anon_vma %px vm_ops %px\n"
90 "pgoff %lx file %p private_data %p\n" 90 "pgoff %lx file %px private_data %px\n"
91 "flags: %#lx(%pGv)\n", 91 "flags: %#lx(%pGv)\n",
92 vma, (void *)vma->vm_start, (void *)vma->vm_end, vma->vm_next, 92 vma, (void *)vma->vm_start, (void *)vma->vm_end, vma->vm_next,
93 vma->vm_prev, vma->vm_mm, 93 vma->vm_prev, vma->vm_mm,
@@ -100,27 +100,27 @@ EXPORT_SYMBOL(dump_vma);
100 100
101void dump_mm(const struct mm_struct *mm) 101void dump_mm(const struct mm_struct *mm)
102{ 102{
103 pr_emerg("mm %p mmap %p seqnum %d task_size %lu\n" 103 pr_emerg("mm %px mmap %px seqnum %d task_size %lu\n"
104#ifdef CONFIG_MMU 104#ifdef CONFIG_MMU
105 "get_unmapped_area %p\n" 105 "get_unmapped_area %px\n"
106#endif 106#endif
107 "mmap_base %lu mmap_legacy_base %lu highest_vm_end %lu\n" 107 "mmap_base %lu mmap_legacy_base %lu highest_vm_end %lu\n"
108 "pgd %p mm_users %d mm_count %d pgtables_bytes %lu map_count %d\n" 108 "pgd %px mm_users %d mm_count %d pgtables_bytes %lu map_count %d\n"
109 "hiwater_rss %lx hiwater_vm %lx total_vm %lx locked_vm %lx\n" 109 "hiwater_rss %lx hiwater_vm %lx total_vm %lx locked_vm %lx\n"
110 "pinned_vm %lx data_vm %lx exec_vm %lx stack_vm %lx\n" 110 "pinned_vm %lx data_vm %lx exec_vm %lx stack_vm %lx\n"
111 "start_code %lx end_code %lx start_data %lx end_data %lx\n" 111 "start_code %lx end_code %lx start_data %lx end_data %lx\n"
112 "start_brk %lx brk %lx start_stack %lx\n" 112 "start_brk %lx brk %lx start_stack %lx\n"
113 "arg_start %lx arg_end %lx env_start %lx env_end %lx\n" 113 "arg_start %lx arg_end %lx env_start %lx env_end %lx\n"
114 "binfmt %p flags %lx core_state %p\n" 114 "binfmt %px flags %lx core_state %px\n"
115#ifdef CONFIG_AIO 115#ifdef CONFIG_AIO
116 "ioctx_table %p\n" 116 "ioctx_table %px\n"
117#endif 117#endif
118#ifdef CONFIG_MEMCG 118#ifdef CONFIG_MEMCG
119 "owner %p " 119 "owner %px "
120#endif 120#endif
121 "exe_file %p\n" 121 "exe_file %px\n"
122#ifdef CONFIG_MMU_NOTIFIER 122#ifdef CONFIG_MMU_NOTIFIER
123 "mmu_notifier_mm %p\n" 123 "mmu_notifier_mm %px\n"
124#endif 124#endif
125#ifdef CONFIG_NUMA_BALANCING 125#ifdef CONFIG_NUMA_BALANCING
126 "numa_next_scan %lu numa_scan_offset %lu numa_scan_seq %d\n" 126 "numa_next_scan %lu numa_scan_offset %lu numa_scan_seq %d\n"
diff --git a/mm/mprotect.c b/mm/mprotect.c
index ec39f730a0bf..58b629bb70de 100644
--- a/mm/mprotect.c
+++ b/mm/mprotect.c
@@ -166,7 +166,7 @@ static inline unsigned long change_pmd_range(struct vm_area_struct *vma,
166 next = pmd_addr_end(addr, end); 166 next = pmd_addr_end(addr, end);
167 if (!is_swap_pmd(*pmd) && !pmd_trans_huge(*pmd) && !pmd_devmap(*pmd) 167 if (!is_swap_pmd(*pmd) && !pmd_trans_huge(*pmd) && !pmd_devmap(*pmd)
168 && pmd_none_or_clear_bad(pmd)) 168 && pmd_none_or_clear_bad(pmd))
169 continue; 169 goto next;
170 170
171 /* invoke the mmu notifier if the pmd is populated */ 171 /* invoke the mmu notifier if the pmd is populated */
172 if (!mni_start) { 172 if (!mni_start) {
@@ -188,7 +188,7 @@ static inline unsigned long change_pmd_range(struct vm_area_struct *vma,
188 } 188 }
189 189
190 /* huge pmd was handled */ 190 /* huge pmd was handled */
191 continue; 191 goto next;
192 } 192 }
193 } 193 }
194 /* fall through, the trans huge pmd just split */ 194 /* fall through, the trans huge pmd just split */
@@ -196,6 +196,8 @@ static inline unsigned long change_pmd_range(struct vm_area_struct *vma,
196 this_pages = change_pte_range(vma, pmd, addr, next, newprot, 196 this_pages = change_pte_range(vma, pmd, addr, next, newprot,
197 dirty_accountable, prot_numa); 197 dirty_accountable, prot_numa);
198 pages += this_pages; 198 pages += this_pages;
199next:
200 cond_resched();
199 } while (pmd++, addr = next, addr != end); 201 } while (pmd++, addr = next, addr != end);
200 202
201 if (mni_start) 203 if (mni_start)
diff --git a/mm/page_alloc.c b/mm/page_alloc.c
index 7e5e775e97f4..76c9688b6a0a 100644
--- a/mm/page_alloc.c
+++ b/mm/page_alloc.c
@@ -6260,6 +6260,8 @@ void __paginginit zero_resv_unavail(void)
6260 pgcnt = 0; 6260 pgcnt = 0;
6261 for_each_resv_unavail_range(i, &start, &end) { 6261 for_each_resv_unavail_range(i, &start, &end) {
6262 for (pfn = PFN_DOWN(start); pfn < PFN_UP(end); pfn++) { 6262 for (pfn = PFN_DOWN(start); pfn < PFN_UP(end); pfn++) {
6263 if (!pfn_valid(ALIGN_DOWN(pfn, pageblock_nr_pages)))
6264 continue;
6263 mm_zero_struct_page(pfn_to_page(pfn)); 6265 mm_zero_struct_page(pfn_to_page(pfn));
6264 pgcnt++; 6266 pgcnt++;
6265 } 6267 }
diff --git a/mm/sparse.c b/mm/sparse.c
index 7a5dacaa06e3..2609aba121e8 100644
--- a/mm/sparse.c
+++ b/mm/sparse.c
@@ -211,7 +211,7 @@ void __init memory_present(int nid, unsigned long start, unsigned long end)
211 if (unlikely(!mem_section)) { 211 if (unlikely(!mem_section)) {
212 unsigned long size, align; 212 unsigned long size, align;
213 213
214 size = sizeof(struct mem_section) * NR_SECTION_ROOTS; 214 size = sizeof(struct mem_section*) * NR_SECTION_ROOTS;
215 align = 1 << (INTERNODE_CACHE_SHIFT); 215 align = 1 << (INTERNODE_CACHE_SHIFT);
216 mem_section = memblock_virt_alloc(size, align); 216 mem_section = memblock_virt_alloc(size, align);
217 } 217 }
diff --git a/mm/vmscan.c b/mm/vmscan.c
index c02c850ea349..47d5ced51f2d 100644
--- a/mm/vmscan.c
+++ b/mm/vmscan.c
@@ -297,10 +297,13 @@ EXPORT_SYMBOL(register_shrinker);
297 */ 297 */
298void unregister_shrinker(struct shrinker *shrinker) 298void unregister_shrinker(struct shrinker *shrinker)
299{ 299{
300 if (!shrinker->nr_deferred)
301 return;
300 down_write(&shrinker_rwsem); 302 down_write(&shrinker_rwsem);
301 list_del(&shrinker->list); 303 list_del(&shrinker->list);
302 up_write(&shrinker_rwsem); 304 up_write(&shrinker_rwsem);
303 kfree(shrinker->nr_deferred); 305 kfree(shrinker->nr_deferred);
306 shrinker->nr_deferred = NULL;
304} 307}
305EXPORT_SYMBOL(unregister_shrinker); 308EXPORT_SYMBOL(unregister_shrinker);
306 309
diff --git a/mm/zsmalloc.c b/mm/zsmalloc.c
index 685049a9048d..683c0651098c 100644
--- a/mm/zsmalloc.c
+++ b/mm/zsmalloc.c
@@ -53,6 +53,7 @@
53#include <linux/mount.h> 53#include <linux/mount.h>
54#include <linux/migrate.h> 54#include <linux/migrate.h>
55#include <linux/pagemap.h> 55#include <linux/pagemap.h>
56#include <linux/fs.h>
56 57
57#define ZSPAGE_MAGIC 0x58 58#define ZSPAGE_MAGIC 0x58
58 59
diff --git a/net/netfilter/xt_bpf.c b/net/netfilter/xt_bpf.c
index 1f7fbd3c7e5a..06b090d8e901 100644
--- a/net/netfilter/xt_bpf.c
+++ b/net/netfilter/xt_bpf.c
@@ -55,21 +55,11 @@ static int __bpf_mt_check_fd(int fd, struct bpf_prog **ret)
55 55
56static int __bpf_mt_check_path(const char *path, struct bpf_prog **ret) 56static int __bpf_mt_check_path(const char *path, struct bpf_prog **ret)
57{ 57{
58 mm_segment_t oldfs = get_fs();
59 int retval, fd;
60
61 if (strnlen(path, XT_BPF_PATH_MAX) == XT_BPF_PATH_MAX) 58 if (strnlen(path, XT_BPF_PATH_MAX) == XT_BPF_PATH_MAX)
62 return -EINVAL; 59 return -EINVAL;
63 60
64 set_fs(KERNEL_DS); 61 *ret = bpf_prog_get_type_path(path, BPF_PROG_TYPE_SOCKET_FILTER);
65 fd = bpf_obj_get_user(path, 0); 62 return PTR_ERR_OR_ZERO(*ret);
66 set_fs(oldfs);
67 if (fd < 0)
68 return fd;
69
70 retval = __bpf_mt_check_fd(fd, ret);
71 sys_close(fd);
72 return retval;
73} 63}
74 64
75static int bpf_mt_check(const struct xt_mtchk_param *par) 65static int bpf_mt_check(const struct xt_mtchk_param *par)
diff --git a/security/Kconfig b/security/Kconfig
index a623d13bf288..3d4debd0257e 100644
--- a/security/Kconfig
+++ b/security/Kconfig
@@ -56,6 +56,7 @@ config SECURITY_NETWORK
56 56
57config PAGE_TABLE_ISOLATION 57config PAGE_TABLE_ISOLATION
58 bool "Remove the kernel mapping in user mode" 58 bool "Remove the kernel mapping in user mode"
59 default y
59 depends on X86_64 && !UML 60 depends on X86_64 && !UML
60 help 61 help
61 This feature reduces the number of hardware side channels by 62 This feature reduces the number of hardware side channels by
diff --git a/security/apparmor/mount.c b/security/apparmor/mount.c
index ed9b4d0f9f7e..8c558cbce930 100644
--- a/security/apparmor/mount.c
+++ b/security/apparmor/mount.c
@@ -329,6 +329,9 @@ static int match_mnt_path_str(struct aa_profile *profile,
329 AA_BUG(!mntpath); 329 AA_BUG(!mntpath);
330 AA_BUG(!buffer); 330 AA_BUG(!buffer);
331 331
332 if (!PROFILE_MEDIATES(profile, AA_CLASS_MOUNT))
333 return 0;
334
332 error = aa_path_name(mntpath, path_flags(profile, mntpath), buffer, 335 error = aa_path_name(mntpath, path_flags(profile, mntpath), buffer,
333 &mntpnt, &info, profile->disconnected); 336 &mntpnt, &info, profile->disconnected);
334 if (error) 337 if (error)
@@ -380,6 +383,9 @@ static int match_mnt(struct aa_profile *profile, const struct path *path,
380 AA_BUG(!profile); 383 AA_BUG(!profile);
381 AA_BUG(devpath && !devbuffer); 384 AA_BUG(devpath && !devbuffer);
382 385
386 if (!PROFILE_MEDIATES(profile, AA_CLASS_MOUNT))
387 return 0;
388
383 if (devpath) { 389 if (devpath) {
384 error = aa_path_name(devpath, path_flags(profile, devpath), 390 error = aa_path_name(devpath, path_flags(profile, devpath),
385 devbuffer, &devname, &info, 391 devbuffer, &devname, &info,
@@ -558,6 +564,9 @@ static int profile_umount(struct aa_profile *profile, struct path *path,
558 AA_BUG(!profile); 564 AA_BUG(!profile);
559 AA_BUG(!path); 565 AA_BUG(!path);
560 566
567 if (!PROFILE_MEDIATES(profile, AA_CLASS_MOUNT))
568 return 0;
569
561 error = aa_path_name(path, path_flags(profile, path), buffer, &name, 570 error = aa_path_name(path, path_flags(profile, path), buffer, &name,
562 &info, profile->disconnected); 571 &info, profile->disconnected);
563 if (error) 572 if (error)
@@ -613,7 +622,8 @@ static struct aa_label *build_pivotroot(struct aa_profile *profile,
613 AA_BUG(!new_path); 622 AA_BUG(!new_path);
614 AA_BUG(!old_path); 623 AA_BUG(!old_path);
615 624
616 if (profile_unconfined(profile)) 625 if (profile_unconfined(profile) ||
626 !PROFILE_MEDIATES(profile, AA_CLASS_MOUNT))
617 return aa_get_newest_label(&profile->label); 627 return aa_get_newest_label(&profile->label);
618 628
619 error = aa_path_name(old_path, path_flags(profile, old_path), 629 error = aa_path_name(old_path, path_flags(profile, old_path),
diff --git a/security/commoncap.c b/security/commoncap.c
index 4f8e09340956..48620c93d697 100644
--- a/security/commoncap.c
+++ b/security/commoncap.c
@@ -348,21 +348,18 @@ static __u32 sansflags(__u32 m)
348 return m & ~VFS_CAP_FLAGS_EFFECTIVE; 348 return m & ~VFS_CAP_FLAGS_EFFECTIVE;
349} 349}
350 350
351static bool is_v2header(size_t size, __le32 magic) 351static bool is_v2header(size_t size, const struct vfs_cap_data *cap)
352{ 352{
353 __u32 m = le32_to_cpu(magic);
354 if (size != XATTR_CAPS_SZ_2) 353 if (size != XATTR_CAPS_SZ_2)
355 return false; 354 return false;
356 return sansflags(m) == VFS_CAP_REVISION_2; 355 return sansflags(le32_to_cpu(cap->magic_etc)) == VFS_CAP_REVISION_2;
357} 356}
358 357
359static bool is_v3header(size_t size, __le32 magic) 358static bool is_v3header(size_t size, const struct vfs_cap_data *cap)
360{ 359{
361 __u32 m = le32_to_cpu(magic);
362
363 if (size != XATTR_CAPS_SZ_3) 360 if (size != XATTR_CAPS_SZ_3)
364 return false; 361 return false;
365 return sansflags(m) == VFS_CAP_REVISION_3; 362 return sansflags(le32_to_cpu(cap->magic_etc)) == VFS_CAP_REVISION_3;
366} 363}
367 364
368/* 365/*
@@ -405,7 +402,7 @@ int cap_inode_getsecurity(struct inode *inode, const char *name, void **buffer,
405 402
406 fs_ns = inode->i_sb->s_user_ns; 403 fs_ns = inode->i_sb->s_user_ns;
407 cap = (struct vfs_cap_data *) tmpbuf; 404 cap = (struct vfs_cap_data *) tmpbuf;
408 if (is_v2header((size_t) ret, cap->magic_etc)) { 405 if (is_v2header((size_t) ret, cap)) {
409 /* If this is sizeof(vfs_cap_data) then we're ok with the 406 /* If this is sizeof(vfs_cap_data) then we're ok with the
410 * on-disk value, so return that. */ 407 * on-disk value, so return that. */
411 if (alloc) 408 if (alloc)
@@ -413,7 +410,7 @@ int cap_inode_getsecurity(struct inode *inode, const char *name, void **buffer,
413 else 410 else
414 kfree(tmpbuf); 411 kfree(tmpbuf);
415 return ret; 412 return ret;
416 } else if (!is_v3header((size_t) ret, cap->magic_etc)) { 413 } else if (!is_v3header((size_t) ret, cap)) {
417 kfree(tmpbuf); 414 kfree(tmpbuf);
418 return -EINVAL; 415 return -EINVAL;
419 } 416 }
@@ -470,9 +467,9 @@ static kuid_t rootid_from_xattr(const void *value, size_t size,
470 return make_kuid(task_ns, rootid); 467 return make_kuid(task_ns, rootid);
471} 468}
472 469
473static bool validheader(size_t size, __le32 magic) 470static bool validheader(size_t size, const struct vfs_cap_data *cap)
474{ 471{
475 return is_v2header(size, magic) || is_v3header(size, magic); 472 return is_v2header(size, cap) || is_v3header(size, cap);
476} 473}
477 474
478/* 475/*
@@ -495,7 +492,7 @@ int cap_convert_nscap(struct dentry *dentry, void **ivalue, size_t size)
495 492
496 if (!*ivalue) 493 if (!*ivalue)
497 return -EINVAL; 494 return -EINVAL;
498 if (!validheader(size, cap->magic_etc)) 495 if (!validheader(size, cap))
499 return -EINVAL; 496 return -EINVAL;
500 if (!capable_wrt_inode_uidgid(inode, CAP_SETFCAP)) 497 if (!capable_wrt_inode_uidgid(inode, CAP_SETFCAP))
501 return -EPERM; 498 return -EPERM;
diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig
index b228cc13191a..2b331f7266ab 100644
--- a/sound/soc/codecs/Kconfig
+++ b/sound/soc/codecs/Kconfig
@@ -136,7 +136,6 @@ config SND_SOC_ALL_CODECS
136 select SND_SOC_SGTL5000 if I2C 136 select SND_SOC_SGTL5000 if I2C
137 select SND_SOC_SI476X if MFD_SI476X_CORE 137 select SND_SOC_SI476X if MFD_SI476X_CORE
138 select SND_SOC_SIRF_AUDIO_CODEC 138 select SND_SOC_SIRF_AUDIO_CODEC
139 select SND_SOC_SN95031 if INTEL_SCU_IPC
140 select SND_SOC_SPDIF 139 select SND_SOC_SPDIF
141 select SND_SOC_SSM2518 if I2C 140 select SND_SOC_SSM2518 if I2C
142 select SND_SOC_SSM2602_SPI if SPI_MASTER 141 select SND_SOC_SSM2602_SPI if SPI_MASTER
@@ -842,9 +841,6 @@ config SND_SOC_SIRF_AUDIO_CODEC
842 tristate "SiRF SoC internal audio codec" 841 tristate "SiRF SoC internal audio codec"
843 select REGMAP_MMIO 842 select REGMAP_MMIO
844 843
845config SND_SOC_SN95031
846 tristate
847
848config SND_SOC_SPDIF 844config SND_SOC_SPDIF
849 tristate "S/PDIF CODEC" 845 tristate "S/PDIF CODEC"
850 846
diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile
index fcc5073f6d61..da1571336f1e 100644
--- a/sound/soc/codecs/Makefile
+++ b/sound/soc/codecs/Makefile
@@ -144,7 +144,6 @@ snd-soc-sigmadsp-i2c-objs := sigmadsp-i2c.o
144snd-soc-sigmadsp-regmap-objs := sigmadsp-regmap.o 144snd-soc-sigmadsp-regmap-objs := sigmadsp-regmap.o
145snd-soc-si476x-objs := si476x.o 145snd-soc-si476x-objs := si476x.o
146snd-soc-sirf-audio-codec-objs := sirf-audio-codec.o 146snd-soc-sirf-audio-codec-objs := sirf-audio-codec.o
147snd-soc-sn95031-objs := sn95031.o
148snd-soc-spdif-tx-objs := spdif_transmitter.o 147snd-soc-spdif-tx-objs := spdif_transmitter.o
149snd-soc-spdif-rx-objs := spdif_receiver.o 148snd-soc-spdif-rx-objs := spdif_receiver.o
150snd-soc-ssm2518-objs := ssm2518.o 149snd-soc-ssm2518-objs := ssm2518.o
diff --git a/sound/soc/codecs/dmic.c b/sound/soc/codecs/dmic.c
index b88a1ee66f80..c88f974ebe3e 100644
--- a/sound/soc/codecs/dmic.c
+++ b/sound/soc/codecs/dmic.c
@@ -107,8 +107,30 @@ static const struct snd_soc_codec_driver soc_dmic = {
107 107
108static int dmic_dev_probe(struct platform_device *pdev) 108static int dmic_dev_probe(struct platform_device *pdev)
109{ 109{
110 int err;
111 u32 chans;
112 struct snd_soc_dai_driver *dai_drv = &dmic_dai;
113
114 if (pdev->dev.of_node) {
115 err = of_property_read_u32(pdev->dev.of_node, "num-channels", &chans);
116 if (err && (err != -ENOENT))
117 return err;
118
119 if (!err) {
120 if (chans < 1 || chans > 8)
121 return -EINVAL;
122
123 dai_drv = devm_kzalloc(&pdev->dev, sizeof(*dai_drv), GFP_KERNEL);
124 if (!dai_drv)
125 return -ENOMEM;
126
127 memcpy(dai_drv, &dmic_dai, sizeof(*dai_drv));
128 dai_drv->capture.channels_max = chans;
129 }
130 }
131
110 return snd_soc_register_codec(&pdev->dev, 132 return snd_soc_register_codec(&pdev->dev,
111 &soc_dmic, &dmic_dai, 1); 133 &soc_dmic, dai_drv, 1);
112} 134}
113 135
114static int dmic_dev_remove(struct platform_device *pdev) 136static int dmic_dev_remove(struct platform_device *pdev)
diff --git a/sound/soc/codecs/max98373.c b/sound/soc/codecs/max98373.c
index 9af0d985d6e9..31b0864583e8 100644
--- a/sound/soc/codecs/max98373.c
+++ b/sound/soc/codecs/max98373.c
@@ -176,6 +176,7 @@ static int max98373_get_bclk_sel(int bclk)
176 } 176 }
177 return 0; 177 return 0;
178} 178}
179
179static int max98373_set_clock(struct snd_soc_codec *codec, 180static int max98373_set_clock(struct snd_soc_codec *codec,
180 struct snd_pcm_hw_params *params) 181 struct snd_pcm_hw_params *params)
181{ 182{
@@ -270,6 +271,7 @@ static int max98373_dai_hw_params(struct snd_pcm_substream *substream,
270 params_rate(params)); 271 params_rate(params));
271 goto err; 272 goto err;
272 } 273 }
274
273 /* set DAI_SR to correct LRCLK frequency */ 275 /* set DAI_SR to correct LRCLK frequency */
274 regmap_update_bits(max98373->regmap, 276 regmap_update_bits(max98373->regmap,
275 MAX98373_R2027_PCM_SR_SETUP_1, 277 MAX98373_R2027_PCM_SR_SETUP_1,
@@ -309,7 +311,10 @@ static int max98373_dai_tdm_slot(struct snd_soc_dai *dai,
309 unsigned int mask; 311 unsigned int mask;
310 int x, slot_found; 312 int x, slot_found;
311 313
312 max98373->tdm_mode = true; 314 if (!tx_mask && !rx_mask && !slots && !slot_width)
315 max98373->tdm_mode = false;
316 else
317 max98373->tdm_mode = true;
313 318
314 /* BCLK configuration */ 319 /* BCLK configuration */
315 bsel = max98373_get_bclk_sel(slots * slot_width); 320 bsel = max98373_get_bclk_sel(slots * slot_width);
@@ -606,13 +611,13 @@ SOC_ENUM("Output Voltage", max98373_out_volt_enum),
606/* Dynamic Headroom Tracking */ 611/* Dynamic Headroom Tracking */
607SOC_SINGLE("DHT Switch", MAX98373_R20D4_DHT_EN, 612SOC_SINGLE("DHT Switch", MAX98373_R20D4_DHT_EN,
608 MAX98373_DHT_EN_SHIFT, 1, 0), 613 MAX98373_DHT_EN_SHIFT, 1, 0),
609SOC_SINGLE_TLV("DHT Gain Min", MAX98373_R20D1_DHT_CFG, 614SOC_SINGLE_TLV("DHT Min Volume", MAX98373_R20D1_DHT_CFG,
610 MAX98373_DHT_SPK_GAIN_MIN_SHIFT, 9, 0, max98373_dht_spkgain_min_tlv), 615 MAX98373_DHT_SPK_GAIN_MIN_SHIFT, 9, 0, max98373_dht_spkgain_min_tlv),
611SOC_SINGLE_TLV("DHT Rot Pnt", MAX98373_R20D1_DHT_CFG, 616SOC_SINGLE_TLV("DHT Rot Pnt Volume", MAX98373_R20D1_DHT_CFG,
612 MAX98373_DHT_ROT_PNT_SHIFT, 15, 0, max98373_dht_rotation_point_tlv), 617 MAX98373_DHT_ROT_PNT_SHIFT, 15, 0, max98373_dht_rotation_point_tlv),
613SOC_SINGLE_TLV("DHT Attack Step", MAX98373_R20D2_DHT_ATTACK_CFG, 618SOC_SINGLE_TLV("DHT Attack Step Volume", MAX98373_R20D2_DHT_ATTACK_CFG,
614 MAX98373_DHT_ATTACK_STEP_SHIFT, 4, 0, max98373_dht_step_size_tlv), 619 MAX98373_DHT_ATTACK_STEP_SHIFT, 4, 0, max98373_dht_step_size_tlv),
615SOC_SINGLE_TLV("DHT Release Step", MAX98373_R20D3_DHT_RELEASE_CFG, 620SOC_SINGLE_TLV("DHT Release Step Volume", MAX98373_R20D3_DHT_RELEASE_CFG,
616 MAX98373_DHT_RELEASE_STEP_SHIFT, 4, 0, max98373_dht_step_size_tlv), 621 MAX98373_DHT_RELEASE_STEP_SHIFT, 4, 0, max98373_dht_step_size_tlv),
617SOC_ENUM("DHT Attack Rate", max98373_dht_attack_rate_enum), 622SOC_ENUM("DHT Attack Rate", max98373_dht_attack_rate_enum),
618SOC_ENUM("DHT Release Rate", max98373_dht_release_rate_enum), 623SOC_ENUM("DHT Release Rate", max98373_dht_release_rate_enum),
@@ -645,36 +650,36 @@ SOC_SINGLE("BDE Thresh Hysteresis", MAX98373_R209B_BDE_THRESH_HYST, 0, 0xFF, 0),
645SOC_SINGLE("BDE Hold Time", MAX98373_R2090_BDE_LVL_HOLD, 0, 0xFF, 0), 650SOC_SINGLE("BDE Hold Time", MAX98373_R2090_BDE_LVL_HOLD, 0, 0xFF, 0),
646SOC_SINGLE("BDE Attack Rate", MAX98373_R2091_BDE_GAIN_ATK_REL_RATE, 4, 0xF, 0), 651SOC_SINGLE("BDE Attack Rate", MAX98373_R2091_BDE_GAIN_ATK_REL_RATE, 4, 0xF, 0),
647SOC_SINGLE("BDE Release Rate", MAX98373_R2091_BDE_GAIN_ATK_REL_RATE, 0, 0xF, 0), 652SOC_SINGLE("BDE Release Rate", MAX98373_R2091_BDE_GAIN_ATK_REL_RATE, 0, 0xF, 0),
648SOC_SINGLE_TLV("BDE LVL1 Clip Thresh", MAX98373_R20A9_BDE_L1_CFG_2, 653SOC_SINGLE_TLV("BDE LVL1 Clip Thresh Volume", MAX98373_R20A9_BDE_L1_CFG_2,
649 0, 0x3C, 0, max98373_bde_gain_tlv), 654 0, 0x3C, 0, max98373_bde_gain_tlv),
650SOC_SINGLE_TLV("BDE LVL2 Clip Thresh", MAX98373_R20AC_BDE_L2_CFG_2, 655SOC_SINGLE_TLV("BDE LVL2 Clip Thresh Volume", MAX98373_R20AC_BDE_L2_CFG_2,
651 0, 0x3C, 0, max98373_bde_gain_tlv), 656 0, 0x3C, 0, max98373_bde_gain_tlv),
652SOC_SINGLE_TLV("BDE LVL3 Clip Thresh", MAX98373_R20AF_BDE_L3_CFG_2, 657SOC_SINGLE_TLV("BDE LVL3 Clip Thresh Volume", MAX98373_R20AF_BDE_L3_CFG_2,
653 0, 0x3C, 0, max98373_bde_gain_tlv), 658 0, 0x3C, 0, max98373_bde_gain_tlv),
654SOC_SINGLE_TLV("BDE LVL4 Clip Thresh", MAX98373_R20B2_BDE_L4_CFG_2, 659SOC_SINGLE_TLV("BDE LVL4 Clip Thresh Volume", MAX98373_R20B2_BDE_L4_CFG_2,
655 0, 0x3C, 0, max98373_bde_gain_tlv), 660 0, 0x3C, 0, max98373_bde_gain_tlv),
656SOC_SINGLE_TLV("BDE LVL1 Clip Gain Reduct", MAX98373_R20AA_BDE_L1_CFG_3, 661SOC_SINGLE_TLV("BDE LVL1 Clip Reduction Volume", MAX98373_R20AA_BDE_L1_CFG_3,
657 0, 0x3C, 0, max98373_bde_gain_tlv), 662 0, 0x3C, 0, max98373_bde_gain_tlv),
658SOC_SINGLE_TLV("BDE LVL2 Clip Gain Reduct", MAX98373_R20AD_BDE_L2_CFG_3, 663SOC_SINGLE_TLV("BDE LVL2 Clip Reduction Volume", MAX98373_R20AD_BDE_L2_CFG_3,
659 0, 0x3C, 0, max98373_bde_gain_tlv), 664 0, 0x3C, 0, max98373_bde_gain_tlv),
660SOC_SINGLE_TLV("BDE LVL3 Clip Gain Reduct", MAX98373_R20B0_BDE_L3_CFG_3, 665SOC_SINGLE_TLV("BDE LVL3 Clip Reduction Volume", MAX98373_R20B0_BDE_L3_CFG_3,
661 0, 0x3C, 0, max98373_bde_gain_tlv), 666 0, 0x3C, 0, max98373_bde_gain_tlv),
662SOC_SINGLE_TLV("BDE LVL4 Clip Gain Reduct", MAX98373_R20B3_BDE_L4_CFG_3, 667SOC_SINGLE_TLV("BDE LVL4 Clip Reduction Volume", MAX98373_R20B3_BDE_L4_CFG_3,
663 0, 0x3C, 0, max98373_bde_gain_tlv), 668 0, 0x3C, 0, max98373_bde_gain_tlv),
664SOC_SINGLE_TLV("BDE LVL1 Limiter Thresh", MAX98373_R20A8_BDE_L1_CFG_1, 669SOC_SINGLE_TLV("BDE LVL1 Limiter Thresh Volume", MAX98373_R20A8_BDE_L1_CFG_1,
665 0, 0xF, 0, max98373_limiter_thresh_tlv), 670 0, 0xF, 0, max98373_limiter_thresh_tlv),
666SOC_SINGLE_TLV("BDE LVL2 Limiter Thresh", MAX98373_R20AB_BDE_L2_CFG_1, 671SOC_SINGLE_TLV("BDE LVL2 Limiter Thresh Volume", MAX98373_R20AB_BDE_L2_CFG_1,
667 0, 0xF, 0, max98373_limiter_thresh_tlv), 672 0, 0xF, 0, max98373_limiter_thresh_tlv),
668SOC_SINGLE_TLV("BDE LVL3 Limiter Thresh", MAX98373_R20AE_BDE_L3_CFG_1, 673SOC_SINGLE_TLV("BDE LVL3 Limiter Thresh Volume", MAX98373_R20AE_BDE_L3_CFG_1,
669 0, 0xF, 0, max98373_limiter_thresh_tlv), 674 0, 0xF, 0, max98373_limiter_thresh_tlv),
670SOC_SINGLE_TLV("BDE LVL4 Limiter Thresh", MAX98373_R20B1_BDE_L4_CFG_1, 675SOC_SINGLE_TLV("BDE LVL4 Limiter Thresh Volume", MAX98373_R20B1_BDE_L4_CFG_1,
671 0, 0xF, 0, max98373_limiter_thresh_tlv), 676 0, 0xF, 0, max98373_limiter_thresh_tlv),
672/* Limiter */ 677/* Limiter */
673SOC_SINGLE("Limiter Switch", MAX98373_R20E2_LIMITER_EN, 678SOC_SINGLE("Limiter Switch", MAX98373_R20E2_LIMITER_EN,
674 MAX98373_LIMITER_EN_SHIFT, 1, 0), 679 MAX98373_LIMITER_EN_SHIFT, 1, 0),
675SOC_SINGLE("Limiter Src Switch", MAX98373_R20E0_LIMITER_THRESH_CFG, 680SOC_SINGLE("Limiter Src Switch", MAX98373_R20E0_LIMITER_THRESH_CFG,
676 MAX98373_LIMITER_THRESH_SRC_SHIFT, 1, 0), 681 MAX98373_LIMITER_THRESH_SRC_SHIFT, 1, 0),
677SOC_SINGLE_TLV("Limiter Thresh", MAX98373_R20E0_LIMITER_THRESH_CFG, 682SOC_SINGLE_TLV("Limiter Thresh Volume", MAX98373_R20E0_LIMITER_THRESH_CFG,
678 MAX98373_LIMITER_THRESH_SHIFT, 15, 0, max98373_limiter_thresh_tlv), 683 MAX98373_LIMITER_THRESH_SHIFT, 15, 0, max98373_limiter_thresh_tlv),
679SOC_ENUM("Limiter Attack Rate", max98373_limiter_attack_rate_enum), 684SOC_ENUM("Limiter Attack Rate", max98373_limiter_attack_rate_enum),
680SOC_ENUM("Limiter Release Rate", max98373_limiter_release_rate_enum), 685SOC_ENUM("Limiter Release Rate", max98373_limiter_release_rate_enum),
diff --git a/sound/soc/codecs/rt5645.c b/sound/soc/codecs/rt5645.c
index 789346cb30b9..8f140c8b93ac 100644
--- a/sound/soc/codecs/rt5645.c
+++ b/sound/soc/codecs/rt5645.c
@@ -3739,6 +3739,17 @@ static const struct dmi_system_id dmi_platform_data[] = {
3739 { } 3739 { }
3740}; 3740};
3741 3741
3742static bool rt5645_check_dp(struct device *dev)
3743{
3744 if (device_property_present(dev, "realtek,in2-differential") ||
3745 device_property_present(dev, "realtek,dmic1-data-pin") ||
3746 device_property_present(dev, "realtek,dmic2-data-pin") ||
3747 device_property_present(dev, "realtek,jd-mode"))
3748 return true;
3749
3750 return false;
3751}
3752
3742static int rt5645_parse_dt(struct rt5645_priv *rt5645, struct device *dev) 3753static int rt5645_parse_dt(struct rt5645_priv *rt5645, struct device *dev)
3743{ 3754{
3744 rt5645->pdata.in2_diff = device_property_read_bool(dev, 3755 rt5645->pdata.in2_diff = device_property_read_bool(dev,
@@ -3779,8 +3790,10 @@ static int rt5645_i2c_probe(struct i2c_client *i2c,
3779 3790
3780 if (pdata) 3791 if (pdata)
3781 rt5645->pdata = *pdata; 3792 rt5645->pdata = *pdata;
3782 else 3793 else if (rt5645_check_dp(&i2c->dev))
3783 rt5645_parse_dt(rt5645, &i2c->dev); 3794 rt5645_parse_dt(rt5645, &i2c->dev);
3795 else
3796 rt5645->pdata = jd_mode3_platform_data;
3784 3797
3785 if (quirk != -1) { 3798 if (quirk != -1) {
3786 rt5645->pdata.in2_diff = QUIRK_IN2_DIFF(quirk); 3799 rt5645->pdata.in2_diff = QUIRK_IN2_DIFF(quirk);
diff --git a/sound/soc/codecs/sn95031.c b/sound/soc/codecs/sn95031.c
deleted file mode 100644
index 887923e68849..000000000000
--- a/sound/soc/codecs/sn95031.c
+++ /dev/null
@@ -1,936 +0,0 @@
1/*
2 * sn95031.c - TI sn95031 Codec driver
3 *
4 * Copyright (C) 2010 Intel Corp
5 * Author: Vinod Koul <vinod.koul@intel.com>
6 * Author: Harsha Priya <priya.harsha@intel.com>
7 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; version 2 of the License.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License along
19 * with this program; if not, write to the Free Software Foundation, Inc.,
20 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
21 *
22 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
23 *
24 *
25 */
26#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
27
28#include <linux/platform_device.h>
29#include <linux/delay.h>
30#include <linux/slab.h>
31#include <linux/module.h>
32
33#include <asm/intel_scu_ipc.h>
34#include <sound/pcm.h>
35#include <sound/pcm_params.h>
36#include <sound/soc.h>
37#include <sound/soc-dapm.h>
38#include <sound/initval.h>
39#include <sound/tlv.h>
40#include <sound/jack.h>
41#include "sn95031.h"
42
43#define SN95031_RATES (SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_44100)
44#define SN95031_FORMATS (SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S16_LE)
45
46/* adc helper functions */
47
48/* enables mic bias voltage */
49static void sn95031_enable_mic_bias(struct snd_soc_codec *codec)
50{
51 snd_soc_write(codec, SN95031_VAUD, BIT(2)|BIT(1)|BIT(0));
52 snd_soc_update_bits(codec, SN95031_MICBIAS, BIT(2), BIT(2));
53}
54
55/* Enable/Disable the ADC depending on the argument */
56static void configure_adc(struct snd_soc_codec *sn95031_codec, int val)
57{
58 int value = snd_soc_read(sn95031_codec, SN95031_ADC1CNTL1);
59
60 if (val) {
61 /* Enable and start the ADC */
62 value |= (SN95031_ADC_ENBL | SN95031_ADC_START);
63 value &= (~SN95031_ADC_NO_LOOP);
64 } else {
65 /* Just stop the ADC */
66 value &= (~SN95031_ADC_START);
67 }
68 snd_soc_write(sn95031_codec, SN95031_ADC1CNTL1, value);
69}
70
71/*
72 * finds an empty channel for conversion
73 * If the ADC is not enabled then start using 0th channel
74 * itself. Otherwise find an empty channel by looking for a
75 * channel in which the stopbit is set to 1. returns the index
76 * of the first free channel if succeeds or an error code.
77 *
78 * Context: can sleep
79 *
80 */
81static int find_free_channel(struct snd_soc_codec *sn95031_codec)
82{
83 int i, value;
84
85 /* check whether ADC is enabled */
86 value = snd_soc_read(sn95031_codec, SN95031_ADC1CNTL1);
87
88 if ((value & SN95031_ADC_ENBL) == 0)
89 return 0;
90
91 /* ADC is already enabled; Looking for an empty channel */
92 for (i = 0; i < SN95031_ADC_CHANLS_MAX; i++) {
93 value = snd_soc_read(sn95031_codec,
94 SN95031_ADC_CHNL_START_ADDR + i);
95 if (value & SN95031_STOPBIT_MASK)
96 break;
97 }
98 return (i == SN95031_ADC_CHANLS_MAX) ? (-EINVAL) : i;
99}
100
101/* Initialize the ADC for reading micbias values. Can sleep. */
102static int sn95031_initialize_adc(struct snd_soc_codec *sn95031_codec)
103{
104 int base_addr, chnl_addr;
105 int value;
106 int channel_index;
107
108 /* Index of the first channel in which the stop bit is set */
109 channel_index = find_free_channel(sn95031_codec);
110 if (channel_index < 0) {
111 pr_err("No free ADC channels");
112 return channel_index;
113 }
114
115 base_addr = SN95031_ADC_CHNL_START_ADDR + channel_index;
116
117 if (!(channel_index == 0 || channel_index == SN95031_ADC_LOOP_MAX)) {
118 /* Reset stop bit for channels other than 0 and 12 */
119 value = snd_soc_read(sn95031_codec, base_addr);
120 /* Set the stop bit to zero */
121 snd_soc_write(sn95031_codec, base_addr, value & 0xEF);
122 /* Index of the first free channel */
123 base_addr++;
124 channel_index++;
125 }
126
127 /* Since this is the last channel, set the stop bit
128 to 1 by ORing the DIE_SENSOR_CODE with 0x10 */
129 snd_soc_write(sn95031_codec, base_addr,
130 SN95031_AUDIO_DETECT_CODE | 0x10);
131
132 chnl_addr = SN95031_ADC_DATA_START_ADDR + 2 * channel_index;
133 pr_debug("mid_initialize : %x", chnl_addr);
134 configure_adc(sn95031_codec, 1);
135 return chnl_addr;
136}
137
138
139/* reads the ADC registers and gets the mic bias value in mV. */
140static unsigned int sn95031_get_mic_bias(struct snd_soc_codec *codec)
141{
142 u16 adc_adr = sn95031_initialize_adc(codec);
143 u16 adc_val1, adc_val2;
144 unsigned int mic_bias;
145
146 sn95031_enable_mic_bias(codec);
147
148 /* Enable the sound card for conversion before reading */
149 snd_soc_write(codec, SN95031_ADC1CNTL3, 0x05);
150 /* Re-toggle the RRDATARD bit */
151 snd_soc_write(codec, SN95031_ADC1CNTL3, 0x04);
152
153 /* Read the higher bits of data */
154 msleep(1000);
155 adc_val1 = snd_soc_read(codec, adc_adr);
156 adc_adr++;
157 adc_val2 = snd_soc_read(codec, adc_adr);
158
159 /* Adding lower two bits to the higher bits */
160 mic_bias = (adc_val1 << 2) + (adc_val2 & 3);
161 mic_bias = (mic_bias * SN95031_ADC_ONE_LSB_MULTIPLIER) / 1000;
162 pr_debug("mic bias = %dmV\n", mic_bias);
163 return mic_bias;
164}
165/*end - adc helper functions */
166
167static int sn95031_read(void *ctx, unsigned int reg, unsigned int *val)
168{
169 u8 value = 0;
170 int ret;
171
172 ret = intel_scu_ipc_ioread8(reg, &value);
173 if (ret == 0)
174 *val = value;
175
176 return ret;
177}
178
179static int sn95031_write(void *ctx, unsigned int reg, unsigned int value)
180{
181 return intel_scu_ipc_iowrite8(reg, value);
182}
183
184static const struct regmap_config sn95031_regmap = {
185 .reg_read = sn95031_read,
186 .reg_write = sn95031_write,
187};
188
189static int sn95031_set_vaud_bias(struct snd_soc_codec *codec,
190 enum snd_soc_bias_level level)
191{
192 switch (level) {
193 case SND_SOC_BIAS_ON:
194 break;
195
196 case SND_SOC_BIAS_PREPARE:
197 if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_STANDBY) {
198 pr_debug("vaud_bias powering up pll\n");
199 /* power up the pll */
200 snd_soc_write(codec, SN95031_AUDPLLCTRL, BIT(5));
201 /* enable pcm 2 */
202 snd_soc_update_bits(codec, SN95031_PCM2C2,
203 BIT(0), BIT(0));
204 }
205 break;
206
207 case SND_SOC_BIAS_STANDBY:
208 switch (snd_soc_codec_get_bias_level(codec)) {
209 case SND_SOC_BIAS_OFF:
210 pr_debug("vaud_bias power up rail\n");
211 /* power up the rail */
212 snd_soc_write(codec, SN95031_VAUD,
213 BIT(2)|BIT(1)|BIT(0));
214 msleep(1);
215 break;
216 case SND_SOC_BIAS_PREPARE:
217 /* turn off pcm */
218 pr_debug("vaud_bias power dn pcm\n");
219 snd_soc_update_bits(codec, SN95031_PCM2C2, BIT(0), 0);
220 snd_soc_write(codec, SN95031_AUDPLLCTRL, 0);
221 break;
222 default:
223 break;
224 }
225 break;
226
227
228 case SND_SOC_BIAS_OFF:
229 pr_debug("vaud_bias _OFF doing rail shutdown\n");
230 snd_soc_write(codec, SN95031_VAUD, BIT(3));
231 break;
232 }
233
234 return 0;
235}
236
237static int sn95031_vhs_event(struct snd_soc_dapm_widget *w,
238 struct snd_kcontrol *kcontrol, int event)
239{
240 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
241
242 if (SND_SOC_DAPM_EVENT_ON(event)) {
243 pr_debug("VHS SND_SOC_DAPM_EVENT_ON doing rail startup now\n");
244 /* power up the rail */
245 snd_soc_write(codec, SN95031_VHSP, 0x3D);
246 snd_soc_write(codec, SN95031_VHSN, 0x3F);
247 msleep(1);
248 } else if (SND_SOC_DAPM_EVENT_OFF(event)) {
249 pr_debug("VHS SND_SOC_DAPM_EVENT_OFF doing rail shutdown\n");
250 snd_soc_write(codec, SN95031_VHSP, 0xC4);
251 snd_soc_write(codec, SN95031_VHSN, 0x04);
252 }
253 return 0;
254}
255
256static int sn95031_vihf_event(struct snd_soc_dapm_widget *w,
257 struct snd_kcontrol *kcontrol, int event)
258{
259 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
260
261 if (SND_SOC_DAPM_EVENT_ON(event)) {
262 pr_debug("VIHF SND_SOC_DAPM_EVENT_ON doing rail startup now\n");
263 /* power up the rail */
264 snd_soc_write(codec, SN95031_VIHF, 0x27);
265 msleep(1);
266 } else if (SND_SOC_DAPM_EVENT_OFF(event)) {
267 pr_debug("VIHF SND_SOC_DAPM_EVENT_OFF doing rail shutdown\n");
268 snd_soc_write(codec, SN95031_VIHF, 0x24);
269 }
270 return 0;
271}
272
273static int sn95031_dmic12_event(struct snd_soc_dapm_widget *w,
274 struct snd_kcontrol *k, int event)
275{
276 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
277 unsigned int ldo = 0, clk_dir = 0, data_dir = 0;
278
279 if (SND_SOC_DAPM_EVENT_ON(event)) {
280 ldo = BIT(5)|BIT(4);
281 clk_dir = BIT(0);
282 data_dir = BIT(7);
283 }
284 /* program DMIC LDO, clock and set clock */
285 snd_soc_update_bits(codec, SN95031_MICBIAS, BIT(5)|BIT(4), ldo);
286 snd_soc_update_bits(codec, SN95031_DMICBUF0123, BIT(0), clk_dir);
287 snd_soc_update_bits(codec, SN95031_DMICBUF0123, BIT(7), data_dir);
288 return 0;
289}
290
291static int sn95031_dmic34_event(struct snd_soc_dapm_widget *w,
292 struct snd_kcontrol *k, int event)
293{
294 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
295 unsigned int ldo = 0, clk_dir = 0, data_dir = 0;
296
297 if (SND_SOC_DAPM_EVENT_ON(event)) {
298 ldo = BIT(5)|BIT(4);
299 clk_dir = BIT(2);
300 data_dir = BIT(1);
301 }
302 /* program DMIC LDO, clock and set clock */
303 snd_soc_update_bits(codec, SN95031_MICBIAS, BIT(5)|BIT(4), ldo);
304 snd_soc_update_bits(codec, SN95031_DMICBUF0123, BIT(2), clk_dir);
305 snd_soc_update_bits(codec, SN95031_DMICBUF45, BIT(1), data_dir);
306 return 0;
307}
308
309static int sn95031_dmic56_event(struct snd_soc_dapm_widget *w,
310 struct snd_kcontrol *k, int event)
311{
312 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
313 unsigned int ldo = 0;
314
315 if (SND_SOC_DAPM_EVENT_ON(event))
316 ldo = BIT(7)|BIT(6);
317
318 /* program DMIC LDO */
319 snd_soc_update_bits(codec, SN95031_MICBIAS, BIT(7)|BIT(6), ldo);
320 return 0;
321}
322
323/* mux controls */
324static const char *sn95031_mic_texts[] = { "AMIC", "LineIn" };
325
326static SOC_ENUM_SINGLE_DECL(sn95031_micl_enum,
327 SN95031_ADCCONFIG, 1, sn95031_mic_texts);
328
329static const struct snd_kcontrol_new sn95031_micl_mux_control =
330 SOC_DAPM_ENUM("Route", sn95031_micl_enum);
331
332static SOC_ENUM_SINGLE_DECL(sn95031_micr_enum,
333 SN95031_ADCCONFIG, 3, sn95031_mic_texts);
334
335static const struct snd_kcontrol_new sn95031_micr_mux_control =
336 SOC_DAPM_ENUM("Route", sn95031_micr_enum);
337
338static const char *sn95031_input_texts[] = { "DMIC1", "DMIC2", "DMIC3",
339 "DMIC4", "DMIC5", "DMIC6",
340 "ADC Left", "ADC Right" };
341
342static SOC_ENUM_SINGLE_DECL(sn95031_input1_enum,
343 SN95031_AUDIOMUX12, 0, sn95031_input_texts);
344
345static const struct snd_kcontrol_new sn95031_input1_mux_control =
346 SOC_DAPM_ENUM("Route", sn95031_input1_enum);
347
348static SOC_ENUM_SINGLE_DECL(sn95031_input2_enum,
349 SN95031_AUDIOMUX12, 4, sn95031_input_texts);
350
351static const struct snd_kcontrol_new sn95031_input2_mux_control =
352 SOC_DAPM_ENUM("Route", sn95031_input2_enum);
353
354static SOC_ENUM_SINGLE_DECL(sn95031_input3_enum,
355 SN95031_AUDIOMUX34, 0, sn95031_input_texts);
356
357static const struct snd_kcontrol_new sn95031_input3_mux_control =
358 SOC_DAPM_ENUM("Route", sn95031_input3_enum);
359
360static SOC_ENUM_SINGLE_DECL(sn95031_input4_enum,
361 SN95031_AUDIOMUX34, 4, sn95031_input_texts);
362
363static const struct snd_kcontrol_new sn95031_input4_mux_control =
364 SOC_DAPM_ENUM("Route", sn95031_input4_enum);
365
366/* capture path controls */
367
368static const char *sn95031_micmode_text[] = {"Single Ended", "Differential"};
369
370/* 0dB to 30dB in 10dB steps */
371static const DECLARE_TLV_DB_SCALE(mic_tlv, 0, 10, 0);
372
373static SOC_ENUM_SINGLE_DECL(sn95031_micmode1_enum,
374 SN95031_MICAMP1, 1, sn95031_micmode_text);
375static SOC_ENUM_SINGLE_DECL(sn95031_micmode2_enum,
376 SN95031_MICAMP2, 1, sn95031_micmode_text);
377
378static const char *sn95031_dmic_cfg_text[] = {"GPO", "DMIC"};
379
380static SOC_ENUM_SINGLE_DECL(sn95031_dmic12_cfg_enum,
381 SN95031_DMICMUX, 0, sn95031_dmic_cfg_text);
382static SOC_ENUM_SINGLE_DECL(sn95031_dmic34_cfg_enum,
383 SN95031_DMICMUX, 1, sn95031_dmic_cfg_text);
384static SOC_ENUM_SINGLE_DECL(sn95031_dmic56_cfg_enum,
385 SN95031_DMICMUX, 2, sn95031_dmic_cfg_text);
386
387static const struct snd_kcontrol_new sn95031_snd_controls[] = {
388 SOC_ENUM("Mic1Mode Capture Route", sn95031_micmode1_enum),
389 SOC_ENUM("Mic2Mode Capture Route", sn95031_micmode2_enum),
390 SOC_ENUM("DMIC12 Capture Route", sn95031_dmic12_cfg_enum),
391 SOC_ENUM("DMIC34 Capture Route", sn95031_dmic34_cfg_enum),
392 SOC_ENUM("DMIC56 Capture Route", sn95031_dmic56_cfg_enum),
393 SOC_SINGLE_TLV("Mic1 Capture Volume", SN95031_MICAMP1,
394 2, 4, 0, mic_tlv),
395 SOC_SINGLE_TLV("Mic2 Capture Volume", SN95031_MICAMP2,
396 2, 4, 0, mic_tlv),
397};
398
399/* DAPM widgets */
400static const struct snd_soc_dapm_widget sn95031_dapm_widgets[] = {
401
402 /* all end points mic, hs etc */
403 SND_SOC_DAPM_OUTPUT("HPOUTL"),
404 SND_SOC_DAPM_OUTPUT("HPOUTR"),
405 SND_SOC_DAPM_OUTPUT("EPOUT"),
406 SND_SOC_DAPM_OUTPUT("IHFOUTL"),
407 SND_SOC_DAPM_OUTPUT("IHFOUTR"),
408 SND_SOC_DAPM_OUTPUT("LINEOUTL"),
409 SND_SOC_DAPM_OUTPUT("LINEOUTR"),
410 SND_SOC_DAPM_OUTPUT("VIB1OUT"),
411 SND_SOC_DAPM_OUTPUT("VIB2OUT"),
412
413 SND_SOC_DAPM_INPUT("AMIC1"), /* headset mic */
414 SND_SOC_DAPM_INPUT("AMIC2"),
415 SND_SOC_DAPM_INPUT("DMIC1"),
416 SND_SOC_DAPM_INPUT("DMIC2"),
417 SND_SOC_DAPM_INPUT("DMIC3"),
418 SND_SOC_DAPM_INPUT("DMIC4"),
419 SND_SOC_DAPM_INPUT("DMIC5"),
420 SND_SOC_DAPM_INPUT("DMIC6"),
421 SND_SOC_DAPM_INPUT("LINEINL"),
422 SND_SOC_DAPM_INPUT("LINEINR"),
423
424 SND_SOC_DAPM_MICBIAS("AMIC1Bias", SN95031_MICBIAS, 2, 0),
425 SND_SOC_DAPM_MICBIAS("AMIC2Bias", SN95031_MICBIAS, 3, 0),
426 SND_SOC_DAPM_MICBIAS("DMIC12Bias", SN95031_DMICMUX, 3, 0),
427 SND_SOC_DAPM_MICBIAS("DMIC34Bias", SN95031_DMICMUX, 4, 0),
428 SND_SOC_DAPM_MICBIAS("DMIC56Bias", SN95031_DMICMUX, 5, 0),
429
430 SND_SOC_DAPM_SUPPLY("DMIC12supply", SN95031_DMICLK, 0, 0,
431 sn95031_dmic12_event,
432 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
433 SND_SOC_DAPM_SUPPLY("DMIC34supply", SN95031_DMICLK, 1, 0,
434 sn95031_dmic34_event,
435 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
436 SND_SOC_DAPM_SUPPLY("DMIC56supply", SN95031_DMICLK, 2, 0,
437 sn95031_dmic56_event,
438 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
439
440 SND_SOC_DAPM_AIF_OUT("PCM_Out", "Capture", 0,
441 SND_SOC_NOPM, 0, 0),
442
443 SND_SOC_DAPM_SUPPLY("Headset Rail", SND_SOC_NOPM, 0, 0,
444 sn95031_vhs_event,
445 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
446 SND_SOC_DAPM_SUPPLY("Speaker Rail", SND_SOC_NOPM, 0, 0,
447 sn95031_vihf_event,
448 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
449
450 /* playback path driver enables */
451 SND_SOC_DAPM_PGA("Headset Left Playback",
452 SN95031_DRIVEREN, 0, 0, NULL, 0),
453 SND_SOC_DAPM_PGA("Headset Right Playback",
454 SN95031_DRIVEREN, 1, 0, NULL, 0),
455 SND_SOC_DAPM_PGA("Speaker Left Playback",
456 SN95031_DRIVEREN, 2, 0, NULL, 0),
457 SND_SOC_DAPM_PGA("Speaker Right Playback",
458 SN95031_DRIVEREN, 3, 0, NULL, 0),
459 SND_SOC_DAPM_PGA("Vibra1 Playback",
460 SN95031_DRIVEREN, 4, 0, NULL, 0),
461 SND_SOC_DAPM_PGA("Vibra2 Playback",
462 SN95031_DRIVEREN, 5, 0, NULL, 0),
463 SND_SOC_DAPM_PGA("Earpiece Playback",
464 SN95031_DRIVEREN, 6, 0, NULL, 0),
465 SND_SOC_DAPM_PGA("Lineout Left Playback",
466 SN95031_LOCTL, 0, 0, NULL, 0),
467 SND_SOC_DAPM_PGA("Lineout Right Playback",
468 SN95031_LOCTL, 4, 0, NULL, 0),
469
470 /* playback path filter enable */
471 SND_SOC_DAPM_PGA("Headset Left Filter",
472 SN95031_HSEPRXCTRL, 4, 0, NULL, 0),
473 SND_SOC_DAPM_PGA("Headset Right Filter",
474 SN95031_HSEPRXCTRL, 5, 0, NULL, 0),
475 SND_SOC_DAPM_PGA("Speaker Left Filter",
476 SN95031_IHFRXCTRL, 0, 0, NULL, 0),
477 SND_SOC_DAPM_PGA("Speaker Right Filter",
478 SN95031_IHFRXCTRL, 1, 0, NULL, 0),
479
480 /* DACs */
481 SND_SOC_DAPM_DAC("HSDAC Left", "Headset",
482 SN95031_DACCONFIG, 0, 0),
483 SND_SOC_DAPM_DAC("HSDAC Right", "Headset",
484 SN95031_DACCONFIG, 1, 0),
485 SND_SOC_DAPM_DAC("IHFDAC Left", "Speaker",
486 SN95031_DACCONFIG, 2, 0),
487 SND_SOC_DAPM_DAC("IHFDAC Right", "Speaker",
488 SN95031_DACCONFIG, 3, 0),
489 SND_SOC_DAPM_DAC("Vibra1 DAC", "Vibra1",
490 SN95031_VIB1C5, 1, 0),
491 SND_SOC_DAPM_DAC("Vibra2 DAC", "Vibra2",
492 SN95031_VIB2C5, 1, 0),
493
494 /* capture widgets */
495 SND_SOC_DAPM_PGA("LineIn Enable Left", SN95031_MICAMP1,
496 7, 0, NULL, 0),
497 SND_SOC_DAPM_PGA("LineIn Enable Right", SN95031_MICAMP2,
498 7, 0, NULL, 0),
499
500 SND_SOC_DAPM_PGA("MIC1 Enable", SN95031_MICAMP1, 0, 0, NULL, 0),
501 SND_SOC_DAPM_PGA("MIC2 Enable", SN95031_MICAMP2, 0, 0, NULL, 0),
502 SND_SOC_DAPM_PGA("TX1 Enable", SN95031_AUDIOTXEN, 2, 0, NULL, 0),
503 SND_SOC_DAPM_PGA("TX2 Enable", SN95031_AUDIOTXEN, 3, 0, NULL, 0),
504 SND_SOC_DAPM_PGA("TX3 Enable", SN95031_AUDIOTXEN, 4, 0, NULL, 0),
505 SND_SOC_DAPM_PGA("TX4 Enable", SN95031_AUDIOTXEN, 5, 0, NULL, 0),
506
507 /* ADC have null stream as they will be turned ON by TX path */
508 SND_SOC_DAPM_ADC("ADC Left", NULL,
509 SN95031_ADCCONFIG, 0, 0),
510 SND_SOC_DAPM_ADC("ADC Right", NULL,
511 SN95031_ADCCONFIG, 2, 0),
512
513 SND_SOC_DAPM_MUX("Mic_InputL Capture Route",
514 SND_SOC_NOPM, 0, 0, &sn95031_micl_mux_control),
515 SND_SOC_DAPM_MUX("Mic_InputR Capture Route",
516 SND_SOC_NOPM, 0, 0, &sn95031_micr_mux_control),
517
518 SND_SOC_DAPM_MUX("Txpath1 Capture Route",
519 SND_SOC_NOPM, 0, 0, &sn95031_input1_mux_control),
520 SND_SOC_DAPM_MUX("Txpath2 Capture Route",
521 SND_SOC_NOPM, 0, 0, &sn95031_input2_mux_control),
522 SND_SOC_DAPM_MUX("Txpath3 Capture Route",
523 SND_SOC_NOPM, 0, 0, &sn95031_input3_mux_control),
524 SND_SOC_DAPM_MUX("Txpath4 Capture Route",
525 SND_SOC_NOPM, 0, 0, &sn95031_input4_mux_control),
526
527};
528
529static const struct snd_soc_dapm_route sn95031_audio_map[] = {
530 /* headset and earpiece map */
531 { "HPOUTL", NULL, "Headset Rail"},
532 { "HPOUTR", NULL, "Headset Rail"},
533 { "HPOUTL", NULL, "Headset Left Playback" },
534 { "HPOUTR", NULL, "Headset Right Playback" },
535 { "EPOUT", NULL, "Earpiece Playback" },
536 { "Headset Left Playback", NULL, "Headset Left Filter"},
537 { "Headset Right Playback", NULL, "Headset Right Filter"},
538 { "Earpiece Playback", NULL, "Headset Left Filter"},
539 { "Headset Left Filter", NULL, "HSDAC Left"},
540 { "Headset Right Filter", NULL, "HSDAC Right"},
541
542 /* speaker map */
543 { "IHFOUTL", NULL, "Speaker Rail"},
544 { "IHFOUTR", NULL, "Speaker Rail"},
545 { "IHFOUTL", NULL, "Speaker Left Playback"},
546 { "IHFOUTR", NULL, "Speaker Right Playback"},
547 { "Speaker Left Playback", NULL, "Speaker Left Filter"},
548 { "Speaker Right Playback", NULL, "Speaker Right Filter"},
549 { "Speaker Left Filter", NULL, "IHFDAC Left"},
550 { "Speaker Right Filter", NULL, "IHFDAC Right"},
551
552 /* vibra map */
553 { "VIB1OUT", NULL, "Vibra1 Playback"},
554 { "Vibra1 Playback", NULL, "Vibra1 DAC"},
555
556 { "VIB2OUT", NULL, "Vibra2 Playback"},
557 { "Vibra2 Playback", NULL, "Vibra2 DAC"},
558
559 /* lineout */
560 { "LINEOUTL", NULL, "Lineout Left Playback"},
561 { "LINEOUTR", NULL, "Lineout Right Playback"},
562 { "Lineout Left Playback", NULL, "Headset Left Filter"},
563 { "Lineout Left Playback", NULL, "Speaker Left Filter"},
564 { "Lineout Left Playback", NULL, "Vibra1 DAC"},
565 { "Lineout Right Playback", NULL, "Headset Right Filter"},
566 { "Lineout Right Playback", NULL, "Speaker Right Filter"},
567 { "Lineout Right Playback", NULL, "Vibra2 DAC"},
568
569 /* Headset (AMIC1) mic */
570 { "AMIC1Bias", NULL, "AMIC1"},
571 { "MIC1 Enable", NULL, "AMIC1Bias"},
572 { "Mic_InputL Capture Route", "AMIC", "MIC1 Enable"},
573
574 /* AMIC2 */
575 { "AMIC2Bias", NULL, "AMIC2"},
576 { "MIC2 Enable", NULL, "AMIC2Bias"},
577 { "Mic_InputR Capture Route", "AMIC", "MIC2 Enable"},
578
579
580 /* Linein */
581 { "LineIn Enable Left", NULL, "LINEINL"},
582 { "LineIn Enable Right", NULL, "LINEINR"},
583 { "Mic_InputL Capture Route", "LineIn", "LineIn Enable Left"},
584 { "Mic_InputR Capture Route", "LineIn", "LineIn Enable Right"},
585
586 /* ADC connection */
587 { "ADC Left", NULL, "Mic_InputL Capture Route"},
588 { "ADC Right", NULL, "Mic_InputR Capture Route"},
589
590 /*DMIC connections */
591 { "DMIC1", NULL, "DMIC12supply"},
592 { "DMIC2", NULL, "DMIC12supply"},
593 { "DMIC3", NULL, "DMIC34supply"},
594 { "DMIC4", NULL, "DMIC34supply"},
595 { "DMIC5", NULL, "DMIC56supply"},
596 { "DMIC6", NULL, "DMIC56supply"},
597
598 { "DMIC12Bias", NULL, "DMIC1"},
599 { "DMIC12Bias", NULL, "DMIC2"},
600 { "DMIC34Bias", NULL, "DMIC3"},
601 { "DMIC34Bias", NULL, "DMIC4"},
602 { "DMIC56Bias", NULL, "DMIC5"},
603 { "DMIC56Bias", NULL, "DMIC6"},
604
605 /*TX path inputs*/
606 { "Txpath1 Capture Route", "ADC Left", "ADC Left"},
607 { "Txpath2 Capture Route", "ADC Left", "ADC Left"},
608 { "Txpath3 Capture Route", "ADC Left", "ADC Left"},
609 { "Txpath4 Capture Route", "ADC Left", "ADC Left"},
610 { "Txpath1 Capture Route", "ADC Right", "ADC Right"},
611 { "Txpath2 Capture Route", "ADC Right", "ADC Right"},
612 { "Txpath3 Capture Route", "ADC Right", "ADC Right"},
613 { "Txpath4 Capture Route", "ADC Right", "ADC Right"},
614 { "Txpath1 Capture Route", "DMIC1", "DMIC1"},
615 { "Txpath2 Capture Route", "DMIC1", "DMIC1"},
616 { "Txpath3 Capture Route", "DMIC1", "DMIC1"},
617 { "Txpath4 Capture Route", "DMIC1", "DMIC1"},
618 { "Txpath1 Capture Route", "DMIC2", "DMIC2"},
619 { "Txpath2 Capture Route", "DMIC2", "DMIC2"},
620 { "Txpath3 Capture Route", "DMIC2", "DMIC2"},
621 { "Txpath4 Capture Route", "DMIC2", "DMIC2"},
622 { "Txpath1 Capture Route", "DMIC3", "DMIC3"},
623 { "Txpath2 Capture Route", "DMIC3", "DMIC3"},
624 { "Txpath3 Capture Route", "DMIC3", "DMIC3"},
625 { "Txpath4 Capture Route", "DMIC3", "DMIC3"},
626 { "Txpath1 Capture Route", "DMIC4", "DMIC4"},
627 { "Txpath2 Capture Route", "DMIC4", "DMIC4"},
628 { "Txpath3 Capture Route", "DMIC4", "DMIC4"},
629 { "Txpath4 Capture Route", "DMIC4", "DMIC4"},
630 { "Txpath1 Capture Route", "DMIC5", "DMIC5"},
631 { "Txpath2 Capture Route", "DMIC5", "DMIC5"},
632 { "Txpath3 Capture Route", "DMIC5", "DMIC5"},
633 { "Txpath4 Capture Route", "DMIC5", "DMIC5"},
634 { "Txpath1 Capture Route", "DMIC6", "DMIC6"},
635 { "Txpath2 Capture Route", "DMIC6", "DMIC6"},
636 { "Txpath3 Capture Route", "DMIC6", "DMIC6"},
637 { "Txpath4 Capture Route", "DMIC6", "DMIC6"},
638
639 /* tx path */
640 { "TX1 Enable", NULL, "Txpath1 Capture Route"},
641 { "TX2 Enable", NULL, "Txpath2 Capture Route"},
642 { "TX3 Enable", NULL, "Txpath3 Capture Route"},
643 { "TX4 Enable", NULL, "Txpath4 Capture Route"},
644 { "PCM_Out", NULL, "TX1 Enable"},
645 { "PCM_Out", NULL, "TX2 Enable"},
646 { "PCM_Out", NULL, "TX3 Enable"},
647 { "PCM_Out", NULL, "TX4 Enable"},
648
649};
650
651/* speaker and headset mutes, for audio pops and clicks */
652static int sn95031_pcm_hs_mute(struct snd_soc_dai *dai, int mute)
653{
654 snd_soc_update_bits(dai->codec,
655 SN95031_HSLVOLCTRL, BIT(7), (!mute << 7));
656 snd_soc_update_bits(dai->codec,
657 SN95031_HSRVOLCTRL, BIT(7), (!mute << 7));
658 return 0;
659}
660
661static int sn95031_pcm_spkr_mute(struct snd_soc_dai *dai, int mute)
662{
663 snd_soc_update_bits(dai->codec,
664 SN95031_IHFLVOLCTRL, BIT(7), (!mute << 7));
665 snd_soc_update_bits(dai->codec,
666 SN95031_IHFRVOLCTRL, BIT(7), (!mute << 7));
667 return 0;
668}
669
670static int sn95031_pcm_hw_params(struct snd_pcm_substream *substream,
671 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
672{
673 unsigned int format, rate;
674
675 switch (params_width(params)) {
676 case 16:
677 format = BIT(4)|BIT(5);
678 break;
679
680 case 24:
681 format = 0;
682 break;
683 default:
684 return -EINVAL;
685 }
686 snd_soc_update_bits(dai->codec, SN95031_PCM2C2,
687 BIT(4)|BIT(5), format);
688
689 switch (params_rate(params)) {
690 case 48000:
691 pr_debug("RATE_48000\n");
692 rate = 0;
693 break;
694
695 case 44100:
696 pr_debug("RATE_44100\n");
697 rate = BIT(7);
698 break;
699
700 default:
701 pr_err("ERR rate %d\n", params_rate(params));
702 return -EINVAL;
703 }
704 snd_soc_update_bits(dai->codec, SN95031_PCM1C1, BIT(7), rate);
705
706 return 0;
707}
708
709/* Codec DAI section */
710static const struct snd_soc_dai_ops sn95031_headset_dai_ops = {
711 .digital_mute = sn95031_pcm_hs_mute,
712 .hw_params = sn95031_pcm_hw_params,
713};
714
715static const struct snd_soc_dai_ops sn95031_speaker_dai_ops = {
716 .digital_mute = sn95031_pcm_spkr_mute,
717 .hw_params = sn95031_pcm_hw_params,
718};
719
720static const struct snd_soc_dai_ops sn95031_vib1_dai_ops = {
721 .hw_params = sn95031_pcm_hw_params,
722};
723
724static const struct snd_soc_dai_ops sn95031_vib2_dai_ops = {
725 .hw_params = sn95031_pcm_hw_params,
726};
727
728static struct snd_soc_dai_driver sn95031_dais[] = {
729{
730 .name = "SN95031 Headset",
731 .playback = {
732 .stream_name = "Headset",
733 .channels_min = 2,
734 .channels_max = 2,
735 .rates = SN95031_RATES,
736 .formats = SN95031_FORMATS,
737 },
738 .capture = {
739 .stream_name = "Capture",
740 .channels_min = 1,
741 .channels_max = 5,
742 .rates = SN95031_RATES,
743 .formats = SN95031_FORMATS,
744 },
745 .ops = &sn95031_headset_dai_ops,
746},
747{ .name = "SN95031 Speaker",
748 .playback = {
749 .stream_name = "Speaker",
750 .channels_min = 2,
751 .channels_max = 2,
752 .rates = SN95031_RATES,
753 .formats = SN95031_FORMATS,
754 },
755 .ops = &sn95031_speaker_dai_ops,
756},
757{ .name = "SN95031 Vibra1",
758 .playback = {
759 .stream_name = "Vibra1",
760 .channels_min = 1,
761 .channels_max = 1,
762 .rates = SN95031_RATES,
763 .formats = SN95031_FORMATS,
764 },
765 .ops = &sn95031_vib1_dai_ops,
766},
767{ .name = "SN95031 Vibra2",
768 .playback = {
769 .stream_name = "Vibra2",
770 .channels_min = 1,
771 .channels_max = 1,
772 .rates = SN95031_RATES,
773 .formats = SN95031_FORMATS,
774 },
775 .ops = &sn95031_vib2_dai_ops,
776},
777};
778
779static inline void sn95031_disable_jack_btn(struct snd_soc_codec *codec)
780{
781 snd_soc_write(codec, SN95031_BTNCTRL2, 0x00);
782}
783
784static inline void sn95031_enable_jack_btn(struct snd_soc_codec *codec)
785{
786 snd_soc_write(codec, SN95031_BTNCTRL1, 0x77);
787 snd_soc_write(codec, SN95031_BTNCTRL2, 0x01);
788}
789
790static int sn95031_get_headset_state(struct snd_soc_codec *codec,
791 struct snd_soc_jack *mfld_jack)
792{
793 int micbias = sn95031_get_mic_bias(codec);
794
795 int jack_type = snd_soc_jack_get_type(mfld_jack, micbias);
796
797 pr_debug("jack type detected = %d\n", jack_type);
798 if (jack_type == SND_JACK_HEADSET)
799 sn95031_enable_jack_btn(codec);
800 return jack_type;
801}
802
803void sn95031_jack_detection(struct snd_soc_codec *codec,
804 struct mfld_jack_data *jack_data)
805{
806 unsigned int status;
807 unsigned int mask = SND_JACK_BTN_0 | SND_JACK_BTN_1 | SND_JACK_HEADSET;
808
809 pr_debug("interrupt id read in sram = 0x%x\n", jack_data->intr_id);
810 if (jack_data->intr_id & 0x1) {
811 pr_debug("short_push detected\n");
812 status = SND_JACK_HEADSET | SND_JACK_BTN_0;
813 } else if (jack_data->intr_id & 0x2) {
814 pr_debug("long_push detected\n");
815 status = SND_JACK_HEADSET | SND_JACK_BTN_1;
816 } else if (jack_data->intr_id & 0x4) {
817 pr_debug("headset or headphones inserted\n");
818 status = sn95031_get_headset_state(codec, jack_data->mfld_jack);
819 } else if (jack_data->intr_id & 0x8) {
820 pr_debug("headset or headphones removed\n");
821 status = 0;
822 sn95031_disable_jack_btn(codec);
823 } else {
824 pr_err("unidentified interrupt\n");
825 return;
826 }
827
828 snd_soc_jack_report(jack_data->mfld_jack, status, mask);
829 /*button pressed and released so we send explicit button release */
830 if ((status & SND_JACK_BTN_0) | (status & SND_JACK_BTN_1))
831 snd_soc_jack_report(jack_data->mfld_jack,
832 SND_JACK_HEADSET, mask);
833}
834EXPORT_SYMBOL_GPL(sn95031_jack_detection);
835
836/* codec registration */
837static int sn95031_codec_probe(struct snd_soc_codec *codec)
838{
839 pr_debug("codec_probe called\n");
840
841 /* PCM interface config
842 * This sets the pcm rx slot conguration to max 6 slots
843 * for max 4 dais (2 stereo and 2 mono)
844 */
845 snd_soc_write(codec, SN95031_PCM2RXSLOT01, 0x10);
846 snd_soc_write(codec, SN95031_PCM2RXSLOT23, 0x32);
847 snd_soc_write(codec, SN95031_PCM2RXSLOT45, 0x54);
848 snd_soc_write(codec, SN95031_PCM2TXSLOT01, 0x10);
849 snd_soc_write(codec, SN95031_PCM2TXSLOT23, 0x32);
850 /* pcm port setting
851 * This sets the pcm port to slave and clock at 19.2Mhz which
852 * can support 6slots, sampling rate set per stream in hw-params
853 */
854 snd_soc_write(codec, SN95031_PCM1C1, 0x00);
855 snd_soc_write(codec, SN95031_PCM2C1, 0x01);
856 snd_soc_write(codec, SN95031_PCM2C2, 0x0A);
857 snd_soc_write(codec, SN95031_HSMIXER, BIT(0)|BIT(4));
858 /* vendor vibra workround, the vibras are muted by
859 * custom register so unmute them
860 */
861 snd_soc_write(codec, SN95031_SSR5, 0x80);
862 snd_soc_write(codec, SN95031_SSR6, 0x80);
863 snd_soc_write(codec, SN95031_VIB1C5, 0x00);
864 snd_soc_write(codec, SN95031_VIB2C5, 0x00);
865 /* configure vibras for pcm port */
866 snd_soc_write(codec, SN95031_VIB1C3, 0x00);
867 snd_soc_write(codec, SN95031_VIB2C3, 0x00);
868
869 /* soft mute ramp time */
870 snd_soc_write(codec, SN95031_SOFTMUTE, 0x3);
871 /* fix the initial volume at 1dB,
872 * default in +9dB,
873 * 1dB give optimal swing on DAC, amps
874 */
875 snd_soc_write(codec, SN95031_HSLVOLCTRL, 0x08);
876 snd_soc_write(codec, SN95031_HSRVOLCTRL, 0x08);
877 snd_soc_write(codec, SN95031_IHFLVOLCTRL, 0x08);
878 snd_soc_write(codec, SN95031_IHFRVOLCTRL, 0x08);
879 /* dac mode and lineout workaround */
880 snd_soc_write(codec, SN95031_SSR2, 0x10);
881 snd_soc_write(codec, SN95031_SSR3, 0x40);
882
883 return 0;
884}
885
886static const struct snd_soc_codec_driver sn95031_codec = {
887 .probe = sn95031_codec_probe,
888 .set_bias_level = sn95031_set_vaud_bias,
889 .idle_bias_off = true,
890
891 .component_driver = {
892 .controls = sn95031_snd_controls,
893 .num_controls = ARRAY_SIZE(sn95031_snd_controls),
894 .dapm_widgets = sn95031_dapm_widgets,
895 .num_dapm_widgets = ARRAY_SIZE(sn95031_dapm_widgets),
896 .dapm_routes = sn95031_audio_map,
897 .num_dapm_routes = ARRAY_SIZE(sn95031_audio_map),
898 },
899};
900
901static int sn95031_device_probe(struct platform_device *pdev)
902{
903 struct regmap *regmap;
904
905 pr_debug("codec device probe called for %s\n", dev_name(&pdev->dev));
906
907 regmap = devm_regmap_init(&pdev->dev, NULL, NULL, &sn95031_regmap);
908 if (IS_ERR(regmap))
909 return PTR_ERR(regmap);
910
911 return snd_soc_register_codec(&pdev->dev, &sn95031_codec,
912 sn95031_dais, ARRAY_SIZE(sn95031_dais));
913}
914
915static int sn95031_device_remove(struct platform_device *pdev)
916{
917 pr_debug("codec device remove called\n");
918 snd_soc_unregister_codec(&pdev->dev);
919 return 0;
920}
921
922static struct platform_driver sn95031_codec_driver = {
923 .driver = {
924 .name = "sn95031",
925 },
926 .probe = sn95031_device_probe,
927 .remove = sn95031_device_remove,
928};
929
930module_platform_driver(sn95031_codec_driver);
931
932MODULE_DESCRIPTION("ASoC TI SN95031 codec driver");
933MODULE_AUTHOR("Vinod Koul <vinod.koul@intel.com>");
934MODULE_AUTHOR("Harsha Priya <priya.harsha@intel.com>");
935MODULE_LICENSE("GPL v2");
936MODULE_ALIAS("platform:sn95031");
diff --git a/sound/soc/codecs/sn95031.h b/sound/soc/codecs/sn95031.h
deleted file mode 100644
index 7651fe4e6a45..000000000000
--- a/sound/soc/codecs/sn95031.h
+++ /dev/null
@@ -1,133 +0,0 @@
1/*
2 * sn95031.h - TI sn95031 Codec driver
3 *
4 * Copyright (C) 2010 Intel Corp
5 * Author: Vinod Koul <vinod.koul@intel.com>
6 * Author: Harsha Priya <priya.harsha@intel.com>
7 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; version 2 of the License.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License along
19 * with this program; if not, write to the Free Software Foundation, Inc.,
20 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
21 *
22 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
23 *
24 *
25 */
26#ifndef _SN95031_H
27#define _SN95031_H
28
29/*register map*/
30#define SN95031_VAUD 0xDB
31#define SN95031_VHSP 0xDC
32#define SN95031_VHSN 0xDD
33#define SN95031_VIHF 0xC9
34
35#define SN95031_AUDPLLCTRL 0x240
36#define SN95031_DMICBUF0123 0x241
37#define SN95031_DMICBUF45 0x242
38#define SN95031_DMICGPO 0x244
39#define SN95031_DMICMUX 0x245
40#define SN95031_DMICLK 0x246
41#define SN95031_MICBIAS 0x247
42#define SN95031_ADCCONFIG 0x248
43#define SN95031_MICAMP1 0x249
44#define SN95031_MICAMP2 0x24A
45#define SN95031_NOISEMUX 0x24B
46#define SN95031_AUDIOMUX12 0x24C
47#define SN95031_AUDIOMUX34 0x24D
48#define SN95031_AUDIOSINC 0x24E
49#define SN95031_AUDIOTXEN 0x24F
50#define SN95031_HSEPRXCTRL 0x250
51#define SN95031_IHFRXCTRL 0x251
52#define SN95031_HSMIXER 0x256
53#define SN95031_DACCONFIG 0x257
54#define SN95031_SOFTMUTE 0x258
55#define SN95031_HSLVOLCTRL 0x259
56#define SN95031_HSRVOLCTRL 0x25A
57#define SN95031_IHFLVOLCTRL 0x25B
58#define SN95031_IHFRVOLCTRL 0x25C
59#define SN95031_DRIVEREN 0x25D
60#define SN95031_LOCTL 0x25E
61#define SN95031_VIB1C1 0x25F
62#define SN95031_VIB1C2 0x260
63#define SN95031_VIB1C3 0x261
64#define SN95031_VIB1SPIPCM1 0x262
65#define SN95031_VIB1SPIPCM2 0x263
66#define SN95031_VIB1C5 0x264
67#define SN95031_VIB2C1 0x265
68#define SN95031_VIB2C2 0x266
69#define SN95031_VIB2C3 0x267
70#define SN95031_VIB2SPIPCM1 0x268
71#define SN95031_VIB2SPIPCM2 0x269
72#define SN95031_VIB2C5 0x26A
73#define SN95031_BTNCTRL1 0x26B
74#define SN95031_BTNCTRL2 0x26C
75#define SN95031_PCM1TXSLOT01 0x26D
76#define SN95031_PCM1TXSLOT23 0x26E
77#define SN95031_PCM1TXSLOT45 0x26F
78#define SN95031_PCM1RXSLOT0_3 0x270
79#define SN95031_PCM1RXSLOT45 0x271
80#define SN95031_PCM2TXSLOT01 0x272
81#define SN95031_PCM2TXSLOT23 0x273
82#define SN95031_PCM2TXSLOT45 0x274
83#define SN95031_PCM2RXSLOT01 0x275
84#define SN95031_PCM2RXSLOT23 0x276
85#define SN95031_PCM2RXSLOT45 0x277
86#define SN95031_PCM1C1 0x278
87#define SN95031_PCM1C2 0x279
88#define SN95031_PCM1C3 0x27A
89#define SN95031_PCM2C1 0x27B
90#define SN95031_PCM2C2 0x27C
91/*end codec register defn*/
92
93/*vendor defn these are not part of avp*/
94#define SN95031_SSR2 0x381
95#define SN95031_SSR3 0x382
96#define SN95031_SSR5 0x384
97#define SN95031_SSR6 0x385
98
99/* ADC registers */
100
101#define SN95031_ADC1CNTL1 0x1C0
102#define SN95031_ADC_ENBL 0x10
103#define SN95031_ADC_START 0x08
104#define SN95031_ADC1CNTL3 0x1C2
105#define SN95031_ADCTHERM_ENBL 0x04
106#define SN95031_ADCRRDATA_ENBL 0x05
107#define SN95031_STOPBIT_MASK 16
108#define SN95031_ADCTHERM_MASK 4
109#define SN95031_ADC_CHANLS_MAX 15 /* Number of ADC channels */
110#define SN95031_ADC_LOOP_MAX (SN95031_ADC_CHANLS_MAX - 1)
111#define SN95031_ADC_NO_LOOP 0x07
112#define SN95031_AUDIO_GPIO_CTRL 0x070
113
114/* ADC channel code values */
115#define SN95031_AUDIO_DETECT_CODE 0x06
116
117/* ADC base addresses */
118#define SN95031_ADC_CHNL_START_ADDR 0x1C5 /* increments by 1 */
119#define SN95031_ADC_DATA_START_ADDR 0x1D4 /* increments by 2 */
120/* multipier to convert to mV */
121#define SN95031_ADC_ONE_LSB_MULTIPLIER 2346
122
123
124struct mfld_jack_data {
125 int intr_id;
126 int micbias_vol;
127 struct snd_soc_jack *mfld_jack;
128};
129
130extern void sn95031_jack_detection(struct snd_soc_codec *codec,
131 struct mfld_jack_data *jack_data);
132
133#endif
diff --git a/sound/soc/codecs/tscs42xx.c b/sound/soc/codecs/tscs42xx.c
index eedd600875e5..e7661d0315e6 100644
--- a/sound/soc/codecs/tscs42xx.c
+++ b/sound/soc/codecs/tscs42xx.c
@@ -355,8 +355,8 @@ static int dapm_micb_event(struct snd_soc_dapm_widget *w,
355 return 0; 355 return 0;
356} 356}
357 357
358int pll_event(struct snd_soc_dapm_widget *w, 358static int pll_event(struct snd_soc_dapm_widget *w,
359 struct snd_kcontrol *kcontrol, int event) 359 struct snd_kcontrol *kcontrol, int event)
360{ 360{
361 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); 361 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
362 int ret; 362 int ret;
@@ -369,8 +369,8 @@ int pll_event(struct snd_soc_dapm_widget *w,
369 return ret; 369 return ret;
370} 370}
371 371
372int dac_event(struct snd_soc_dapm_widget *w, 372static int dac_event(struct snd_soc_dapm_widget *w,
373 struct snd_kcontrol *kcontrol, int event) 373 struct snd_kcontrol *kcontrol, int event)
374{ 374{
375 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); 375 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
376 struct tscs42xx *tscs42xx = snd_soc_codec_get_drvdata(codec); 376 struct tscs42xx *tscs42xx = snd_soc_codec_get_drvdata(codec);
@@ -631,7 +631,7 @@ static const struct snd_kcontrol_new tscs42xx_snd_controls[] = {
631 0, mic_boost_scale), 631 0, mic_boost_scale),
632 632
633 /* Input Channel Map */ 633 /* Input Channel Map */
634 SOC_ENUM("Input Channel Map Switch", ch_map_select_enum), 634 SOC_ENUM("Input Channel Map", ch_map_select_enum),
635 635
636 /* Coefficient Ram */ 636 /* Coefficient Ram */
637 COEFF_RAM_CTL("Cascade1L BiQuad1", BIQUAD_SIZE, 0x00), 637 COEFF_RAM_CTL("Cascade1L BiQuad1", BIQUAD_SIZE, 0x00),
@@ -708,13 +708,13 @@ static const struct snd_kcontrol_new tscs42xx_snd_controls[] = {
708 /* EQ */ 708 /* EQ */
709 SOC_SINGLE("EQ1 Switch", R_CONFIG1, FB_CONFIG1_EQ1_EN, 1, 0), 709 SOC_SINGLE("EQ1 Switch", R_CONFIG1, FB_CONFIG1_EQ1_EN, 1, 0),
710 SOC_SINGLE("EQ2 Switch", R_CONFIG1, FB_CONFIG1_EQ2_EN, 1, 0), 710 SOC_SINGLE("EQ2 Switch", R_CONFIG1, FB_CONFIG1_EQ2_EN, 1, 0),
711 SOC_ENUM("EQ1 Band Enable Switch", eq1_band_enable_enum), 711 SOC_ENUM("EQ1 Band Enable", eq1_band_enable_enum),
712 SOC_ENUM("EQ2 Band Enable Switch", eq2_band_enable_enum), 712 SOC_ENUM("EQ2 Band Enable", eq2_band_enable_enum),
713 713
714 /* CLE */ 714 /* CLE */
715 SOC_ENUM("CLE Level Detect Switch", 715 SOC_ENUM("CLE Level Detect",
716 cle_level_detection_enum), 716 cle_level_detection_enum),
717 SOC_ENUM("CLE Level Detect Win Switch", 717 SOC_ENUM("CLE Level Detect Win",
718 cle_level_detection_window_enum), 718 cle_level_detection_window_enum),
719 SOC_SINGLE("Expander Switch", 719 SOC_SINGLE("Expander Switch",
720 R_CLECTL, FB_CLECTL_EXP_EN, 1, 0), 720 R_CLECTL, FB_CLECTL_EXP_EN, 1, 0),
@@ -726,7 +726,7 @@ static const struct snd_kcontrol_new tscs42xx_snd_controls[] = {
726 R_MUGAIN, FB_MUGAIN_CLEMUG, 0x1f, 0, mugain_scale), 726 R_MUGAIN, FB_MUGAIN_CLEMUG, 0x1f, 0, mugain_scale),
727 SOC_SINGLE_TLV("Comp Thresh Playback Volume", 727 SOC_SINGLE_TLV("Comp Thresh Playback Volume",
728 R_COMPTH, FB_COMPTH, 0xff, 0, compth_scale), 728 R_COMPTH, FB_COMPTH, 0xff, 0, compth_scale),
729 SOC_ENUM("Comp Ratio Switch", compressor_ratio_enum), 729 SOC_ENUM("Comp Ratio", compressor_ratio_enum),
730 SND_SOC_BYTES("Comp Atk Time", R_CATKTCL, 2), 730 SND_SOC_BYTES("Comp Atk Time", R_CATKTCL, 2),
731 731
732 /* Effects */ 732 /* Effects */
@@ -740,50 +740,50 @@ static const struct snd_kcontrol_new tscs42xx_snd_controls[] = {
740 SOC_SINGLE("MBC Band1 Switch", R_DACMBCEN, FB_DACMBCEN_MBCEN1, 1, 0), 740 SOC_SINGLE("MBC Band1 Switch", R_DACMBCEN, FB_DACMBCEN_MBCEN1, 1, 0),
741 SOC_SINGLE("MBC Band2 Switch", R_DACMBCEN, FB_DACMBCEN_MBCEN2, 1, 0), 741 SOC_SINGLE("MBC Band2 Switch", R_DACMBCEN, FB_DACMBCEN_MBCEN2, 1, 0),
742 SOC_SINGLE("MBC Band3 Switch", R_DACMBCEN, FB_DACMBCEN_MBCEN3, 1, 0), 742 SOC_SINGLE("MBC Band3 Switch", R_DACMBCEN, FB_DACMBCEN_MBCEN3, 1, 0),
743 SOC_ENUM("MBC Band1 Level Detect Switch", 743 SOC_ENUM("MBC Band1 Level Detect",
744 mbc_level_detection_enums[0]), 744 mbc_level_detection_enums[0]),
745 SOC_ENUM("MBC Band2 Level Detect Switch", 745 SOC_ENUM("MBC Band2 Level Detect",
746 mbc_level_detection_enums[1]), 746 mbc_level_detection_enums[1]),
747 SOC_ENUM("MBC Band3 Level Detect Switch", 747 SOC_ENUM("MBC Band3 Level Detect",
748 mbc_level_detection_enums[2]), 748 mbc_level_detection_enums[2]),
749 SOC_ENUM("MBC Band1 Level Detect Win Switch", 749 SOC_ENUM("MBC Band1 Level Detect Win",
750 mbc_level_detection_window_enums[0]), 750 mbc_level_detection_window_enums[0]),
751 SOC_ENUM("MBC Band2 Level Detect Win Switch", 751 SOC_ENUM("MBC Band2 Level Detect Win",
752 mbc_level_detection_window_enums[1]), 752 mbc_level_detection_window_enums[1]),
753 SOC_ENUM("MBC Band3 Level Detect Win Switch", 753 SOC_ENUM("MBC Band3 Level Detect Win",
754 mbc_level_detection_window_enums[2]), 754 mbc_level_detection_window_enums[2]),
755 755
756 SOC_SINGLE("MBC1 Phase Invert", R_DACMBCMUG1, FB_DACMBCMUG1_PHASE, 756 SOC_SINGLE("MBC1 Phase Invert Switch",
757 1, 0), 757 R_DACMBCMUG1, FB_DACMBCMUG1_PHASE, 1, 0),
758 SOC_SINGLE_TLV("DAC MBC1 Make-Up Gain Playback Volume", 758 SOC_SINGLE_TLV("DAC MBC1 Make-Up Gain Playback Volume",
759 R_DACMBCMUG1, FB_DACMBCMUG1_MUGAIN, 0x1f, 0, mugain_scale), 759 R_DACMBCMUG1, FB_DACMBCMUG1_MUGAIN, 0x1f, 0, mugain_scale),
760 SOC_SINGLE_TLV("DAC MBC1 Comp Thresh Playback Volume", 760 SOC_SINGLE_TLV("DAC MBC1 Comp Thresh Playback Volume",
761 R_DACMBCTHR1, FB_DACMBCTHR1_THRESH, 0xff, 0, compth_scale), 761 R_DACMBCTHR1, FB_DACMBCTHR1_THRESH, 0xff, 0, compth_scale),
762 SOC_ENUM("DAC MBC1 Comp Ratio Switch", 762 SOC_ENUM("DAC MBC1 Comp Ratio",
763 dac_mbc1_compressor_ratio_enum), 763 dac_mbc1_compressor_ratio_enum),
764 SND_SOC_BYTES("DAC MBC1 Comp Atk Time", R_DACMBCATK1L, 2), 764 SND_SOC_BYTES("DAC MBC1 Comp Atk Time", R_DACMBCATK1L, 2),
765 SND_SOC_BYTES("DAC MBC1 Comp Rel Time Const", 765 SND_SOC_BYTES("DAC MBC1 Comp Rel Time Const",
766 R_DACMBCREL1L, 2), 766 R_DACMBCREL1L, 2),
767 767
768 SOC_SINGLE("MBC2 Phase Invert", R_DACMBCMUG2, FB_DACMBCMUG2_PHASE, 768 SOC_SINGLE("MBC2 Phase Invert Switch",
769 1, 0), 769 R_DACMBCMUG2, FB_DACMBCMUG2_PHASE, 1, 0),
770 SOC_SINGLE_TLV("DAC MBC2 Make-Up Gain Playback Volume", 770 SOC_SINGLE_TLV("DAC MBC2 Make-Up Gain Playback Volume",
771 R_DACMBCMUG2, FB_DACMBCMUG2_MUGAIN, 0x1f, 0, mugain_scale), 771 R_DACMBCMUG2, FB_DACMBCMUG2_MUGAIN, 0x1f, 0, mugain_scale),
772 SOC_SINGLE_TLV("DAC MBC2 Comp Thresh Playback Volume", 772 SOC_SINGLE_TLV("DAC MBC2 Comp Thresh Playback Volume",
773 R_DACMBCTHR2, FB_DACMBCTHR2_THRESH, 0xff, 0, compth_scale), 773 R_DACMBCTHR2, FB_DACMBCTHR2_THRESH, 0xff, 0, compth_scale),
774 SOC_ENUM("DAC MBC2 Comp Ratio Switch", 774 SOC_ENUM("DAC MBC2 Comp Ratio",
775 dac_mbc2_compressor_ratio_enum), 775 dac_mbc2_compressor_ratio_enum),
776 SND_SOC_BYTES("DAC MBC2 Comp Atk Time", R_DACMBCATK2L, 2), 776 SND_SOC_BYTES("DAC MBC2 Comp Atk Time", R_DACMBCATK2L, 2),
777 SND_SOC_BYTES("DAC MBC2 Comp Rel Time Const", 777 SND_SOC_BYTES("DAC MBC2 Comp Rel Time Const",
778 R_DACMBCREL2L, 2), 778 R_DACMBCREL2L, 2),
779 779
780 SOC_SINGLE("MBC3 Phase Invert", R_DACMBCMUG3, FB_DACMBCMUG3_PHASE, 780 SOC_SINGLE("MBC3 Phase Invert Switch",
781 1, 0), 781 R_DACMBCMUG3, FB_DACMBCMUG3_PHASE, 1, 0),
782 SOC_SINGLE_TLV("DAC MBC3 Make-Up Gain Playback Volume", 782 SOC_SINGLE_TLV("DAC MBC3 Make-Up Gain Playback Volume",
783 R_DACMBCMUG3, FB_DACMBCMUG3_MUGAIN, 0x1f, 0, mugain_scale), 783 R_DACMBCMUG3, FB_DACMBCMUG3_MUGAIN, 0x1f, 0, mugain_scale),
784 SOC_SINGLE_TLV("DAC MBC3 Comp Thresh Playback Volume", 784 SOC_SINGLE_TLV("DAC MBC3 Comp Thresh Playback Volume",
785 R_DACMBCTHR3, FB_DACMBCTHR3_THRESH, 0xff, 0, compth_scale), 785 R_DACMBCTHR3, FB_DACMBCTHR3_THRESH, 0xff, 0, compth_scale),
786 SOC_ENUM("DAC MBC3 Comp Ratio Switch", 786 SOC_ENUM("DAC MBC3 Comp Ratio",
787 dac_mbc3_compressor_ratio_enum), 787 dac_mbc3_compressor_ratio_enum),
788 SND_SOC_BYTES("DAC MBC3 Comp Atk Time", R_DACMBCATK3L, 2), 788 SND_SOC_BYTES("DAC MBC3 Comp Atk Time", R_DACMBCATK3L, 2),
789 SND_SOC_BYTES("DAC MBC3 Comp Rel Time Const", 789 SND_SOC_BYTES("DAC MBC3 Comp Rel Time Const",
diff --git a/sound/soc/fsl/fsl_dma.c b/sound/soc/fsl/fsl_dma.c
index 0c11f434a374..8c2981b70f64 100644
--- a/sound/soc/fsl/fsl_dma.c
+++ b/sound/soc/fsl/fsl_dma.c
@@ -913,8 +913,8 @@ static int fsl_soc_dma_probe(struct platform_device *pdev)
913 dma->dai.pcm_free = fsl_dma_free_dma_buffers; 913 dma->dai.pcm_free = fsl_dma_free_dma_buffers;
914 914
915 /* Store the SSI-specific information that we need */ 915 /* Store the SSI-specific information that we need */
916 dma->ssi_stx_phys = res.start + CCSR_SSI_STX0; 916 dma->ssi_stx_phys = res.start + REG_SSI_STX0;
917 dma->ssi_srx_phys = res.start + CCSR_SSI_SRX0; 917 dma->ssi_srx_phys = res.start + REG_SSI_SRX0;
918 918
919 iprop = of_get_property(ssi_np, "fsl,fifo-depth", NULL); 919 iprop = of_get_property(ssi_np, "fsl,fifo-depth", NULL);
920 if (iprop) 920 if (iprop)
diff --git a/sound/soc/intel/Kconfig b/sound/soc/intel/Kconfig
index 7b49d04e3c60..b0bd1938b71e 100644
--- a/sound/soc/intel/Kconfig
+++ b/sound/soc/intel/Kconfig
@@ -1,71 +1,123 @@
1config SND_SOC_INTEL_SST_TOPLEVEL
2 bool "Intel ASoC SST drivers"
3 default y
4 depends on X86 || COMPILE_TEST
5 select SND_SOC_INTEL_MACH
6 help
7 Intel ASoC SST Platform Drivers. If you have a Intel machine that
8 has an audio controller with a DSP and I2S or DMIC port, then
9 enable this option by saying Y
10
11 Note that the answer to this question doesn't directly affect the
12 kernel: saying N will just cause the configurator to skip all
13 the questions about Intel SST drivers.
14
15if SND_SOC_INTEL_SST_TOPLEVEL
16
1config SND_SST_IPC 17config SND_SST_IPC
2 tristate 18 tristate
19 # This option controls the IPC core for HiFi2 platforms
3 20
4config SND_SST_IPC_PCI 21config SND_SST_IPC_PCI
5 tristate 22 tristate
6 select SND_SST_IPC 23 select SND_SST_IPC
24 # This option controls the PCI-based IPC for HiFi2 platforms
25 # (Medfield, Merrifield).
7 26
8config SND_SST_IPC_ACPI 27config SND_SST_IPC_ACPI
9 tristate 28 tristate
10 select SND_SST_IPC 29 select SND_SST_IPC
11 select SND_SOC_INTEL_SST 30 # This option controls the ACPI-based IPC for HiFi2 platforms
12 select IOSF_MBI 31 # (Baytrail, Cherrytrail)
13 32
14config SND_SOC_INTEL_COMMON 33config SND_SOC_INTEL_SST_ACPI
15 tristate 34 tristate
35 # This option controls ACPI-based probing on
36 # Haswell/Broadwell/Baytrail legacy and will be set
37 # when these platforms are enabled
16 38
17config SND_SOC_INTEL_SST 39config SND_SOC_INTEL_SST
18 tristate 40 tristate
19 select SND_SOC_INTEL_SST_ACPI if ACPI
20 41
21config SND_SOC_INTEL_SST_FIRMWARE 42config SND_SOC_INTEL_SST_FIRMWARE
22 tristate 43 tristate
23 select DW_DMAC_CORE 44 select DW_DMAC_CORE
24 45 # This option controls firmware download on
25config SND_SOC_INTEL_SST_ACPI 46 # Haswell/Broadwell/Baytrail legacy and will be set
26 tristate 47 # when these platforms are enabled
27
28config SND_SOC_ACPI_INTEL_MATCH
29 tristate
30 select SND_SOC_ACPI if ACPI
31
32config SND_SOC_INTEL_SST_TOPLEVEL
33 tristate "Intel ASoC SST drivers"
34 depends on X86 || COMPILE_TEST
35 select SND_SOC_INTEL_MACH
36 select SND_SOC_INTEL_COMMON
37 help
38 Intel ASoC Audio Drivers. If you have a Intel machine that
39 has audio controller with a DSP and I2S or DMIC port, then
40 enable this option by saying Y or M
41 If unsure select "N".
42 48
43config SND_SOC_INTEL_HASWELL 49config SND_SOC_INTEL_HASWELL
44 tristate "Intel ASoC SST driver for Haswell/Broadwell" 50 tristate "Haswell/Broadwell Platforms"
45 depends on SND_SOC_INTEL_SST_TOPLEVEL && SND_DMA_SGBUF 51 depends on SND_DMA_SGBUF
46 depends on DMADEVICES 52 depends on DMADEVICES && ACPI
47 select SND_SOC_INTEL_SST 53 select SND_SOC_INTEL_SST
54 select SND_SOC_INTEL_SST_ACPI
48 select SND_SOC_INTEL_SST_FIRMWARE 55 select SND_SOC_INTEL_SST_FIRMWARE
56 select SND_SOC_ACPI_INTEL_MATCH
57 help
58 If you have a Intel Haswell or Broadwell platform connected to
59 an I2S codec, then enable this option by saying Y or m. This is
60 typically used for Chromebooks. This is a recommended option.
49 61
50config SND_SOC_INTEL_BAYTRAIL 62config SND_SOC_INTEL_BAYTRAIL
51 tristate "Intel ASoC SST driver for Baytrail (legacy)" 63 tristate "Baytrail (legacy) Platforms"
52 depends on SND_SOC_INTEL_SST_TOPLEVEL 64 depends on DMADEVICES && ACPI
53 depends on DMADEVICES
54 select SND_SOC_INTEL_SST 65 select SND_SOC_INTEL_SST
66 select SND_SOC_INTEL_SST_ACPI
55 select SND_SOC_INTEL_SST_FIRMWARE 67 select SND_SOC_INTEL_SST_FIRMWARE
68 select SND_SOC_ACPI_INTEL_MATCH
69 help
70 If you have a Intel Baytrail platform connected to an I2S codec,
71 then enable this option by saying Y or m. This was typically used
72 for Baytrail Chromebooks but this option is now deprecated and is
73 not recommended, use SND_SST_ATOM_HIFI2_PLATFORM instead.
74
75config SND_SST_ATOM_HIFI2_PLATFORM_PCI
76 tristate "PCI HiFi2 (Medfield, Merrifield) Platforms"
77 depends on X86 && PCI
78 select SND_SST_IPC_PCI
79 select SND_SOC_COMPRESS
80 select SND_SOC_INTEL_COMMON
81 help
82 If you have a Intel Medfield or Merrifield/Edison platform, then
83 enable this option by saying Y or m. Distros will typically not
84 enable this option: Medfield devices are not available to
85 developers and while Merrifield/Edison can run a mainline kernel with
86 limited functionality it will require a firmware file which
87 is not in the standard firmware tree
56 88
57config SND_SST_ATOM_HIFI2_PLATFORM 89config SND_SST_ATOM_HIFI2_PLATFORM
58 tristate "Intel ASoC SST driver for HiFi2 platforms (*field, *trail)" 90 tristate "ACPI HiFi2 (Baytrail, Cherrytrail) Platforms"
59 depends on SND_SOC_INTEL_SST_TOPLEVEL && X86 91 depends on X86 && ACPI
92 select SND_SST_IPC_ACPI
60 select SND_SOC_COMPRESS 93 select SND_SOC_COMPRESS
94 select SND_SOC_ACPI_INTEL_MATCH
95 select IOSF_MBI
96 help
97 If you have a Intel Baytrail or Cherrytrail platform with an I2S
98 codec, then enable this option by saying Y or m. This is a
99 recommended option
61 100
62config SND_SOC_INTEL_SKYLAKE 101config SND_SOC_INTEL_SKYLAKE
63 tristate "Intel ASoC SST driver for SKL/BXT/KBL/GLK/CNL" 102 tristate "SKL/BXT/KBL/GLK/CNL... Platforms"
64 depends on SND_SOC_INTEL_SST_TOPLEVEL && PCI && ACPI 103 depends on PCI && ACPI
65 select SND_HDA_EXT_CORE 104 select SND_HDA_EXT_CORE
66 select SND_HDA_DSP_LOADER 105 select SND_HDA_DSP_LOADER
67 select SND_SOC_TOPOLOGY 106 select SND_SOC_TOPOLOGY
68 select SND_SOC_INTEL_SST 107 select SND_SOC_INTEL_SST
108 select SND_SOC_ACPI_INTEL_MATCH
109 help
110 If you have a Intel Skylake/Broxton/ApolloLake/KabyLake/
111 GeminiLake or CannonLake platform with the DSP enabled in the BIOS
112 then enable this option by saying Y or m.
113
114config SND_SOC_ACPI_INTEL_MATCH
115 tristate
116 select SND_SOC_ACPI if ACPI
117 # this option controls the compilation of ACPI matching tables and
118 # helpers and is not meant to be selected by the user.
119
120endif ## SND_SOC_INTEL_SST_TOPLEVEL
69 121
70# ASoC codec drivers 122# ASoC codec drivers
71source "sound/soc/intel/boards/Kconfig" 123source "sound/soc/intel/boards/Kconfig"
diff --git a/sound/soc/intel/Makefile b/sound/soc/intel/Makefile
index b973d457e834..8160520fd74c 100644
--- a/sound/soc/intel/Makefile
+++ b/sound/soc/intel/Makefile
@@ -1,6 +1,6 @@
1# SPDX-License-Identifier: GPL-2.0 1# SPDX-License-Identifier: GPL-2.0
2# Core support 2# Core support
3obj-$(CONFIG_SND_SOC_INTEL_COMMON) += common/ 3obj-$(CONFIG_SND_SOC) += common/
4 4
5# Platform Support 5# Platform Support
6obj-$(CONFIG_SND_SOC_INTEL_HASWELL) += haswell/ 6obj-$(CONFIG_SND_SOC_INTEL_HASWELL) += haswell/
diff --git a/sound/soc/intel/atom/sst/sst_stream.c b/sound/soc/intel/atom/sst/sst_stream.c
index 65e257b17a7e..7ee6aeb7e0af 100644
--- a/sound/soc/intel/atom/sst/sst_stream.c
+++ b/sound/soc/intel/atom/sst/sst_stream.c
@@ -220,10 +220,10 @@ int sst_send_byte_stream_mrfld(struct intel_sst_drv *sst_drv_ctx,
220 sst_free_block(sst_drv_ctx, block); 220 sst_free_block(sst_drv_ctx, block);
221out: 221out:
222 test_and_clear_bit(pvt_id, &sst_drv_ctx->pvt_id); 222 test_and_clear_bit(pvt_id, &sst_drv_ctx->pvt_id);
223 return 0; 223 return ret;
224} 224}
225 225
226/* 226/**
227 * sst_pause_stream - Send msg for a pausing stream 227 * sst_pause_stream - Send msg for a pausing stream
228 * @str_id: stream ID 228 * @str_id: stream ID
229 * 229 *
@@ -261,7 +261,7 @@ int sst_pause_stream(struct intel_sst_drv *sst_drv_ctx, int str_id)
261 } 261 }
262 } else { 262 } else {
263 retval = -EBADRQC; 263 retval = -EBADRQC;
264 dev_dbg(sst_drv_ctx->dev, "SST DBG:BADRQC for stream\n "); 264 dev_dbg(sst_drv_ctx->dev, "SST DBG:BADRQC for stream\n");
265 } 265 }
266 266
267 return retval; 267 return retval;
@@ -284,7 +284,7 @@ int sst_resume_stream(struct intel_sst_drv *sst_drv_ctx, int str_id)
284 if (!str_info) 284 if (!str_info)
285 return -EINVAL; 285 return -EINVAL;
286 if (str_info->status == STREAM_RUNNING) 286 if (str_info->status == STREAM_RUNNING)
287 return 0; 287 return 0;
288 if (str_info->status == STREAM_PAUSED) { 288 if (str_info->status == STREAM_PAUSED) {
289 retval = sst_prepare_and_post_msg(sst_drv_ctx, str_info->task_id, 289 retval = sst_prepare_and_post_msg(sst_drv_ctx, str_info->task_id,
290 IPC_CMD, IPC_IA_RESUME_STREAM_MRFLD, 290 IPC_CMD, IPC_IA_RESUME_STREAM_MRFLD,
diff --git a/sound/soc/intel/boards/Kconfig b/sound/soc/intel/boards/Kconfig
index 6f754708a48c..de598dcbef30 100644
--- a/sound/soc/intel/boards/Kconfig
+++ b/sound/soc/intel/boards/Kconfig
@@ -1,183 +1,182 @@
1config SND_SOC_INTEL_MACH 1menuconfig SND_SOC_INTEL_MACH
2 tristate "Intel Audio machine drivers" 2 bool "Intel Machine drivers"
3 depends on SND_SOC_INTEL_SST_TOPLEVEL 3 depends on SND_SOC_INTEL_SST_TOPLEVEL
4 select SND_SOC_ACPI_INTEL_MATCH if ACPI 4 help
5 Intel ASoC Machine Drivers. If you have a Intel machine that
6 has an audio controller with a DSP and I2S or DMIC port, then
7 enable this option by saying Y
8
9 Note that the answer to this question doesn't directly affect the
10 kernel: saying N will just cause the configurator to skip all
11 the questions about Intel ASoC machine drivers.
5 12
6if SND_SOC_INTEL_MACH 13if SND_SOC_INTEL_MACH
7 14
8config SND_MFLD_MACHINE 15if SND_SOC_INTEL_HASWELL
9 tristate "SOC Machine Audio driver for Intel Medfield MID platform"
10 depends on INTEL_SCU_IPC
11 select SND_SOC_SN95031
12 depends on SND_SST_ATOM_HIFI2_PLATFORM
13 select SND_SST_IPC_PCI
14 help
15 This adds support for ASoC machine driver for Intel(R) MID Medfield platform
16 used as alsa device in audio substem in Intel(R) MID devices
17 Say Y if you have such a device.
18 If unsure select "N".
19 16
20config SND_SOC_INTEL_HASWELL_MACH 17config SND_SOC_INTEL_HASWELL_MACH
21 tristate "ASoC Audio DSP support for Intel Haswell Lynxpoint" 18 tristate "Haswell Lynxpoint"
22 depends on X86_INTEL_LPSS && I2C && I2C_DESIGNWARE_PLATFORM 19 depends on X86_INTEL_LPSS && I2C && I2C_DESIGNWARE_PLATFORM
23 depends on SND_SOC_INTEL_HASWELL
24 select SND_SOC_RT5640 20 select SND_SOC_RT5640
25 help 21 help
26 This adds support for the Lynxpoint Audio DSP on Intel(R) Haswell 22 This adds support for the Lynxpoint Audio DSP on Intel(R) Haswell
27 Ultrabook platforms. 23 Ultrabook platforms. This is a recommended option.
28 Say Y if you have such a device. 24 Say Y or m if you have such a device.
29 If unsure select "N". 25 If unsure select "N".
30 26
31config SND_SOC_INTEL_BDW_RT5677_MACH 27config SND_SOC_INTEL_BDW_RT5677_MACH
32 tristate "ASoC Audio driver for Intel Broadwell with RT5677 codec" 28 tristate "Broadwell with RT5677 codec"
33 depends on X86_INTEL_LPSS && GPIOLIB && I2C 29 depends on X86_INTEL_LPSS && I2C && I2C_DESIGNWARE_PLATFORM && GPIOLIB
34 depends on SND_SOC_INTEL_HASWELL
35 select SND_SOC_RT5677 30 select SND_SOC_RT5677
36 help 31 help
37 This adds support for Intel Broadwell platform based boards with 32 This adds support for Intel Broadwell platform based boards with
38 the RT5677 audio codec. 33 the RT5677 audio codec. This is a recommended option.
34 Say Y or m if you have such a device.
35 If unsure select "N".
39 36
40config SND_SOC_INTEL_BROADWELL_MACH 37config SND_SOC_INTEL_BROADWELL_MACH
41 tristate "ASoC Audio DSP support for Intel Broadwell Wildcatpoint" 38 tristate "Broadwell Wildcatpoint"
42 depends on X86_INTEL_LPSS && I2C && I2C_DESIGNWARE_PLATFORM 39 depends on X86_INTEL_LPSS && I2C && I2C_DESIGNWARE_PLATFORM
43 depends on SND_SOC_INTEL_HASWELL
44 select SND_SOC_RT286 40 select SND_SOC_RT286
45 help 41 help
46 This adds support for the Wilcatpoint Audio DSP on Intel(R) Broadwell 42 This adds support for the Wilcatpoint Audio DSP on Intel(R) Broadwell
47 Ultrabook platforms. 43 Ultrabook platforms.
48 Say Y if you have such a device. 44 Say Y or m if you have such a device. This is a recommended option.
49 If unsure select "N". 45 If unsure select "N".
46endif ## SND_SOC_INTEL_HASWELL
47
48if SND_SOC_INTEL_BAYTRAIL
50 49
51config SND_SOC_INTEL_BYT_MAX98090_MACH 50config SND_SOC_INTEL_BYT_MAX98090_MACH
52 tristate "ASoC Audio driver for Intel Baytrail with MAX98090 codec" 51 tristate "Baytrail with MAX98090 codec"
53 depends on X86_INTEL_LPSS && I2C 52 depends on X86_INTEL_LPSS && I2C
54 depends on SND_SST_IPC_ACPI = n
55 depends on SND_SOC_INTEL_BAYTRAIL
56 select SND_SOC_MAX98090 53 select SND_SOC_MAX98090
57 help 54 help
58 This adds audio driver for Intel Baytrail platform based boards 55 This adds audio driver for Intel Baytrail platform based boards
59 with the MAX98090 audio codec. 56 with the MAX98090 audio codec. This driver is deprecated, use
57 SND_SOC_INTEL_CHT_BSW_MAX98090_TI_MACH instead for better
58 functionality.
60 59
61config SND_SOC_INTEL_BYT_RT5640_MACH 60config SND_SOC_INTEL_BYT_RT5640_MACH
62 tristate "ASoC Audio driver for Intel Baytrail with RT5640 codec" 61 tristate "Baytrail with RT5640 codec"
63 depends on X86_INTEL_LPSS && I2C 62 depends on X86_INTEL_LPSS && I2C
64 depends on SND_SST_IPC_ACPI = n
65 depends on SND_SOC_INTEL_BAYTRAIL
66 select SND_SOC_RT5640 63 select SND_SOC_RT5640
67 help 64 help
68 This adds audio driver for Intel Baytrail platform based boards 65 This adds audio driver for Intel Baytrail platform based boards
69 with the RT5640 audio codec. This driver is deprecated, use 66 with the RT5640 audio codec. This driver is deprecated, use
70 SND_SOC_INTEL_BYTCR_RT5640_MACH instead for better functionality. 67 SND_SOC_INTEL_BYTCR_RT5640_MACH instead for better functionality.
71 68
69endif ## SND_SOC_INTEL_BAYTRAIL
70
71if SND_SST_ATOM_HIFI2_PLATFORM
72
72config SND_SOC_INTEL_BYTCR_RT5640_MACH 73config SND_SOC_INTEL_BYTCR_RT5640_MACH
73 tristate "ASoC Audio driver for Intel Baytrail and Baytrail-CR with RT5640 codec" 74 tristate "Baytrail and Baytrail-CR with RT5640 codec"
74 depends on X86 && I2C && ACPI 75 depends on X86_INTEL_LPSS && I2C && ACPI
76 select SND_SOC_ACPI
75 select SND_SOC_RT5640 77 select SND_SOC_RT5640
76 depends on SND_SST_ATOM_HIFI2_PLATFORM
77 select SND_SST_IPC_ACPI
78 help 78 help
79 This adds support for ASoC machine driver for Intel(R) Baytrail and Baytrail-CR 79 This adds support for ASoC machine driver for Intel(R) Baytrail and Baytrail-CR
80 platforms with RT5640 audio codec. 80 platforms with RT5640 audio codec.
81 Say Y if you have such a device. 81 Say Y or m if you have such a device. This is a recommended option.
82 If unsure select "N". 82 If unsure select "N".
83 83
84config SND_SOC_INTEL_BYTCR_RT5651_MACH 84config SND_SOC_INTEL_BYTCR_RT5651_MACH
85 tristate "ASoC Audio driver for Intel Baytrail and Baytrail-CR with RT5651 codec" 85 tristate "Baytrail and Baytrail-CR with RT5651 codec"
86 depends on X86 && I2C && ACPI 86 depends on X86_INTEL_LPSS && I2C && ACPI
87 select SND_SOC_ACPI
87 select SND_SOC_RT5651 88 select SND_SOC_RT5651
88 depends on SND_SST_ATOM_HIFI2_PLATFORM
89 select SND_SST_IPC_ACPI
90 help 89 help
91 This adds support for ASoC machine driver for Intel(R) Baytrail and Baytrail-CR 90 This adds support for ASoC machine driver for Intel(R) Baytrail and Baytrail-CR
92 platforms with RT5651 audio codec. 91 platforms with RT5651 audio codec.
93 Say Y if you have such a device. 92 Say Y or m if you have such a device. This is a recommended option.
94 If unsure select "N". 93 If unsure select "N".
95 94
96config SND_SOC_INTEL_CHT_BSW_RT5672_MACH 95config SND_SOC_INTEL_CHT_BSW_RT5672_MACH
97 tristate "ASoC Audio driver for Intel Cherrytrail & Braswell with RT5672 codec" 96 tristate "Cherrytrail & Braswell with RT5672 codec"
98 depends on X86_INTEL_LPSS && I2C && ACPI 97 depends on X86_INTEL_LPSS && I2C && ACPI
99 select SND_SOC_RT5670 98 select SND_SOC_ACPI
100 depends on SND_SST_ATOM_HIFI2_PLATFORM 99 select SND_SOC_RT5670
101 select SND_SST_IPC_ACPI
102 help 100 help
103 This adds support for ASoC machine driver for Intel(R) Cherrytrail & Braswell 101 This adds support for ASoC machine driver for Intel(R) Cherrytrail & Braswell
104 platforms with RT5672 audio codec. 102 platforms with RT5672 audio codec.
105 Say Y if you have such a device. 103 Say Y or m if you have such a device. This is a recommended option.
106 If unsure select "N". 104 If unsure select "N".
107 105
108config SND_SOC_INTEL_CHT_BSW_RT5645_MACH 106config SND_SOC_INTEL_CHT_BSW_RT5645_MACH
109 tristate "ASoC Audio driver for Intel Cherrytrail & Braswell with RT5645/5650 codec" 107 tristate "Cherrytrail & Braswell with RT5645/5650 codec"
110 depends on X86_INTEL_LPSS && I2C && ACPI 108 depends on X86_INTEL_LPSS && I2C && ACPI
109 select SND_SOC_ACPI
111 select SND_SOC_RT5645 110 select SND_SOC_RT5645
112 depends on SND_SST_ATOM_HIFI2_PLATFORM
113 select SND_SST_IPC_ACPI
114 help 111 help
115 This adds support for ASoC machine driver for Intel(R) Cherrytrail & Braswell 112 This adds support for ASoC machine driver for Intel(R) Cherrytrail & Braswell
116 platforms with RT5645/5650 audio codec. 113 platforms with RT5645/5650 audio codec.
114 Say Y or m if you have such a device. This is a recommended option.
117 If unsure select "N". 115 If unsure select "N".
118 116
119config SND_SOC_INTEL_CHT_BSW_MAX98090_TI_MACH 117config SND_SOC_INTEL_CHT_BSW_MAX98090_TI_MACH
120 tristate "ASoC Audio driver for Intel Cherrytrail & Braswell with MAX98090 & TI codec" 118 tristate "Cherrytrail & Braswell with MAX98090 & TI codec"
121 depends on X86_INTEL_LPSS && I2C && ACPI 119 depends on X86_INTEL_LPSS && I2C && ACPI
122 select SND_SOC_MAX98090 120 select SND_SOC_MAX98090
123 select SND_SOC_TS3A227E 121 select SND_SOC_TS3A227E
124 depends on SND_SST_ATOM_HIFI2_PLATFORM
125 select SND_SST_IPC_ACPI
126 help 122 help
127 This adds support for ASoC machine driver for Intel(R) Cherrytrail & Braswell 123 This adds support for ASoC machine driver for Intel(R) Cherrytrail & Braswell
128 platforms with MAX98090 audio codec it also can support TI jack chip as aux device. 124 platforms with MAX98090 audio codec it also can support TI jack chip as aux device.
125 Say Y or m if you have such a device. This is a recommended option.
129 If unsure select "N". 126 If unsure select "N".
130 127
131config SND_SOC_INTEL_BYT_CHT_DA7213_MACH 128config SND_SOC_INTEL_BYT_CHT_DA7213_MACH
132 tristate "ASoC Audio driver for Intel Baytrail & Cherrytrail with DA7212/7213 codec" 129 tristate "Baytrail & Cherrytrail with DA7212/7213 codec"
133 depends on X86_INTEL_LPSS && I2C && ACPI 130 depends on X86_INTEL_LPSS && I2C && ACPI
131 select SND_SOC_ACPI
134 select SND_SOC_DA7213 132 select SND_SOC_DA7213
135 depends on SND_SST_ATOM_HIFI2_PLATFORM
136 select SND_SST_IPC_ACPI
137 help 133 help
138 This adds support for ASoC machine driver for Intel(R) Baytrail & CherryTrail 134 This adds support for ASoC machine driver for Intel(R) Baytrail & CherryTrail
139 platforms with DA7212/7213 audio codec. 135 platforms with DA7212/7213 audio codec.
136 Say Y or m if you have such a device. This is a recommended option.
140 If unsure select "N". 137 If unsure select "N".
141 138
142config SND_SOC_INTEL_BYT_CHT_ES8316_MACH 139config SND_SOC_INTEL_BYT_CHT_ES8316_MACH
143 tristate "ASoC Audio driver for Intel Baytrail & Cherrytrail with ES8316 codec" 140 tristate "Baytrail & Cherrytrail with ES8316 codec"
144 depends on X86_INTEL_LPSS && I2C && ACPI 141 depends on X86_INTEL_LPSS && I2C && ACPI
145 select SND_SOC_ES8316 142 select SND_SOC_ES8316
146 depends on SND_SST_ATOM_HIFI2_PLATFORM
147 select SND_SST_IPC_ACPI
148 help 143 help
149 This adds support for ASoC machine driver for Intel(R) Baytrail & 144 This adds support for ASoC machine driver for Intel(R) Baytrail &
150 Cherrytrail platforms with ES8316 audio codec. 145 Cherrytrail platforms with ES8316 audio codec.
146 Say Y or m if you have such a device. This is a recommended option.
151 If unsure select "N". 147 If unsure select "N".
152 148
153config SND_SOC_INTEL_BYT_CHT_NOCODEC_MACH 149config SND_SOC_INTEL_BYT_CHT_NOCODEC_MACH
154 tristate "ASoC Audio driver for Intel Baytrail & Cherrytrail platform with no codec (MinnowBoard MAX, Up)" 150 tristate "Baytrail & Cherrytrail platform with no codec (MinnowBoard MAX, Up)"
155 depends on X86_INTEL_LPSS && I2C && ACPI 151 depends on X86_INTEL_LPSS && I2C && ACPI
156 depends on SND_SST_ATOM_HIFI2_PLATFORM
157 select SND_SST_IPC_ACPI
158 help 152 help
159 This adds support for ASoC machine driver for the MinnowBoard Max or 153 This adds support for ASoC machine driver for the MinnowBoard Max or
160 Up boards and provides access to I2S signals on the Low-Speed 154 Up boards and provides access to I2S signals on the Low-Speed
161 connector 155 connector. This is not a recommended option outside of these cases.
156 It is not intended to be enabled by distros by default.
157 Say Y or m if you have such a device.
158
162 If unsure select "N". 159 If unsure select "N".
163 160
161endif ## SND_SST_ATOM_HIFI2_PLATFORM
162
163if SND_SOC_INTEL_SKYLAKE
164
164config SND_SOC_INTEL_SKL_RT286_MACH 165config SND_SOC_INTEL_SKL_RT286_MACH
165 tristate "ASoC Audio driver for SKL with RT286 I2S mode" 166 tristate "SKL with RT286 I2S mode"
166 depends on X86 && ACPI && I2C 167 depends on MFD_INTEL_LPSS && I2C && ACPI
167 depends on SND_SOC_INTEL_SKYLAKE
168 select SND_SOC_RT286 168 select SND_SOC_RT286
169 select SND_SOC_DMIC 169 select SND_SOC_DMIC
170 select SND_SOC_HDAC_HDMI 170 select SND_SOC_HDAC_HDMI
171 help 171 help
172 This adds support for ASoC machine driver for Skylake platforms 172 This adds support for ASoC machine driver for Skylake platforms
173 with RT286 I2S audio codec. 173 with RT286 I2S audio codec.
174 Say Y if you have such a device. 174 Say Y or m if you have such a device.
175 If unsure select "N". 175 If unsure select "N".
176 176
177config SND_SOC_INTEL_SKL_NAU88L25_SSM4567_MACH 177config SND_SOC_INTEL_SKL_NAU88L25_SSM4567_MACH
178 tristate "ASoC Audio driver for SKL with NAU88L25 and SSM4567 in I2S Mode" 178 tristate "SKL with NAU88L25 and SSM4567 in I2S Mode"
179 depends on X86_INTEL_LPSS && I2C 179 depends on MFD_INTEL_LPSS && I2C && ACPI
180 depends on SND_SOC_INTEL_SKYLAKE
181 select SND_SOC_NAU8825 180 select SND_SOC_NAU8825
182 select SND_SOC_SSM4567 181 select SND_SOC_SSM4567
183 select SND_SOC_DMIC 182 select SND_SOC_DMIC
@@ -185,13 +184,12 @@ config SND_SOC_INTEL_SKL_NAU88L25_SSM4567_MACH
185 help 184 help
186 This adds support for ASoC Onboard Codec I2S machine driver. This will 185 This adds support for ASoC Onboard Codec I2S machine driver. This will
187 create an alsa sound card for NAU88L25 + SSM4567. 186 create an alsa sound card for NAU88L25 + SSM4567.
188 Say Y if you have such a device. 187 Say Y or m if you have such a device. This is a recommended option.
189 If unsure select "N". 188 If unsure select "N".
190 189
191config SND_SOC_INTEL_SKL_NAU88L25_MAX98357A_MACH 190config SND_SOC_INTEL_SKL_NAU88L25_MAX98357A_MACH
192 tristate "ASoC Audio driver for SKL with NAU88L25 and MAX98357A in I2S Mode" 191 tristate "SKL with NAU88L25 and MAX98357A in I2S Mode"
193 depends on X86_INTEL_LPSS && I2C 192 depends on MFD_INTEL_LPSS && I2C && ACPI
194 depends on SND_SOC_INTEL_SKYLAKE
195 select SND_SOC_NAU8825 193 select SND_SOC_NAU8825
196 select SND_SOC_MAX98357A 194 select SND_SOC_MAX98357A
197 select SND_SOC_DMIC 195 select SND_SOC_DMIC
@@ -199,13 +197,12 @@ config SND_SOC_INTEL_SKL_NAU88L25_MAX98357A_MACH
199 help 197 help
200 This adds support for ASoC Onboard Codec I2S machine driver. This will 198 This adds support for ASoC Onboard Codec I2S machine driver. This will
201 create an alsa sound card for NAU88L25 + MAX98357A. 199 create an alsa sound card for NAU88L25 + MAX98357A.
202 Say Y if you have such a device. 200 Say Y or m if you have such a device. This is a recommended option.
203 If unsure select "N". 201 If unsure select "N".
204 202
205config SND_SOC_INTEL_BXT_DA7219_MAX98357A_MACH 203config SND_SOC_INTEL_BXT_DA7219_MAX98357A_MACH
206 tristate "ASoC Audio driver for Broxton with DA7219 and MAX98357A in I2S Mode" 204 tristate "Broxton with DA7219 and MAX98357A in I2S Mode"
207 depends on X86 && ACPI && I2C 205 depends on MFD_INTEL_LPSS && I2C && ACPI
208 depends on SND_SOC_INTEL_SKYLAKE
209 select SND_SOC_DA7219 206 select SND_SOC_DA7219
210 select SND_SOC_MAX98357A 207 select SND_SOC_MAX98357A
211 select SND_SOC_DMIC 208 select SND_SOC_DMIC
@@ -214,13 +211,12 @@ config SND_SOC_INTEL_BXT_DA7219_MAX98357A_MACH
214 help 211 help
215 This adds support for ASoC machine driver for Broxton-P platforms 212 This adds support for ASoC machine driver for Broxton-P platforms
216 with DA7219 + MAX98357A I2S audio codec. 213 with DA7219 + MAX98357A I2S audio codec.
217 Say Y if you have such a device. 214 Say Y or m if you have such a device. This is a recommended option.
218 If unsure select "N". 215 If unsure select "N".
219 216
220config SND_SOC_INTEL_BXT_RT298_MACH 217config SND_SOC_INTEL_BXT_RT298_MACH
221 tristate "ASoC Audio driver for Broxton with RT298 I2S mode" 218 tristate "Broxton with RT298 I2S mode"
222 depends on X86 && ACPI && I2C 219 depends on MFD_INTEL_LPSS && I2C && ACPI
223 depends on SND_SOC_INTEL_SKYLAKE
224 select SND_SOC_RT298 220 select SND_SOC_RT298
225 select SND_SOC_DMIC 221 select SND_SOC_DMIC
226 select SND_SOC_HDAC_HDMI 222 select SND_SOC_HDAC_HDMI
@@ -228,14 +224,12 @@ config SND_SOC_INTEL_BXT_RT298_MACH
228 help 224 help
229 This adds support for ASoC machine driver for Broxton platforms 225 This adds support for ASoC machine driver for Broxton platforms
230 with RT286 I2S audio codec. 226 with RT286 I2S audio codec.
231 Say Y if you have such a device. 227 Say Y or m if you have such a device. This is a recommended option.
232 If unsure select "N". 228 If unsure select "N".
233 229
234config SND_SOC_INTEL_KBL_RT5663_MAX98927_MACH 230config SND_SOC_INTEL_KBL_RT5663_MAX98927_MACH
235 tristate "ASoC Audio driver for KBL with RT5663 and MAX98927 in I2S Mode" 231 tristate "KBL with RT5663 and MAX98927 in I2S Mode"
236 depends on X86_INTEL_LPSS && I2C 232 depends on MFD_INTEL_LPSS && I2C && ACPI
237 select SND_SOC_INTEL_SST
238 depends on SND_SOC_INTEL_SKYLAKE
239 select SND_SOC_RT5663 233 select SND_SOC_RT5663
240 select SND_SOC_MAX98927 234 select SND_SOC_MAX98927
241 select SND_SOC_DMIC 235 select SND_SOC_DMIC
@@ -243,14 +237,13 @@ config SND_SOC_INTEL_KBL_RT5663_MAX98927_MACH
243 help 237 help
244 This adds support for ASoC Onboard Codec I2S machine driver. This will 238 This adds support for ASoC Onboard Codec I2S machine driver. This will
245 create an alsa sound card for RT5663 + MAX98927. 239 create an alsa sound card for RT5663 + MAX98927.
246 Say Y if you have such a device. 240 Say Y or m if you have such a device. This is a recommended option.
247 If unsure select "N". 241 If unsure select "N".
248 242
249config SND_SOC_INTEL_KBL_RT5663_RT5514_MAX98927_MACH 243config SND_SOC_INTEL_KBL_RT5663_RT5514_MAX98927_MACH
250 tristate "ASoC Audio driver for KBL with RT5663, RT5514 and MAX98927 in I2S Mode" 244 tristate "KBL with RT5663, RT5514 and MAX98927 in I2S Mode"
251 depends on X86_INTEL_LPSS && I2C && SPI 245 depends on MFD_INTEL_LPSS && I2C && ACPI
252 select SND_SOC_INTEL_SST 246 depends on SPI
253 depends on SND_SOC_INTEL_SKYLAKE
254 select SND_SOC_RT5663 247 select SND_SOC_RT5663
255 select SND_SOC_RT5514 248 select SND_SOC_RT5514
256 select SND_SOC_RT5514_SPI 249 select SND_SOC_RT5514_SPI
@@ -259,7 +252,8 @@ config SND_SOC_INTEL_KBL_RT5663_RT5514_MAX98927_MACH
259 help 252 help
260 This adds support for ASoC Onboard Codec I2S machine driver. This will 253 This adds support for ASoC Onboard Codec I2S machine driver. This will
261 create an alsa sound card for RT5663 + RT5514 + MAX98927. 254 create an alsa sound card for RT5663 + RT5514 + MAX98927.
262 Say Y if you have such a device. 255 Say Y or m if you have such a device. This is a recommended option.
263 If unsure select "N". 256 If unsure select "N".
257endif ## SND_SOC_INTEL_SKYLAKE
264 258
265endif 259endif ## SND_SOC_INTEL_MACH
diff --git a/sound/soc/intel/boards/bytcr_rt5651.c b/sound/soc/intel/boards/bytcr_rt5651.c
index 488ec48f296a..22c9cc5d135e 100644
--- a/sound/soc/intel/boards/bytcr_rt5651.c
+++ b/sound/soc/intel/boards/bytcr_rt5651.c
@@ -39,6 +39,7 @@ enum {
39 BYT_RT5651_IN1_MAP, 39 BYT_RT5651_IN1_MAP,
40 BYT_RT5651_IN2_MAP, 40 BYT_RT5651_IN2_MAP,
41 BYT_RT5651_IN1_IN2_MAP, 41 BYT_RT5651_IN1_IN2_MAP,
42 BYT_RT5651_IN3_MAP,
42}; 43};
43 44
44#define BYT_RT5651_MAP(quirk) ((quirk) & GENMASK(7, 0)) 45#define BYT_RT5651_MAP(quirk) ((quirk) & GENMASK(7, 0))
@@ -63,6 +64,8 @@ static void log_quirks(struct device *dev)
63 dev_info(dev, "quirk IN1_MAP enabled"); 64 dev_info(dev, "quirk IN1_MAP enabled");
64 if (BYT_RT5651_MAP(byt_rt5651_quirk) == BYT_RT5651_IN2_MAP) 65 if (BYT_RT5651_MAP(byt_rt5651_quirk) == BYT_RT5651_IN2_MAP)
65 dev_info(dev, "quirk IN2_MAP enabled"); 66 dev_info(dev, "quirk IN2_MAP enabled");
67 if (BYT_RT5651_MAP(byt_rt5651_quirk) == BYT_RT5651_IN3_MAP)
68 dev_info(dev, "quirk IN3_MAP enabled");
66 if (byt_rt5651_quirk & BYT_RT5651_DMIC_EN) 69 if (byt_rt5651_quirk & BYT_RT5651_DMIC_EN)
67 dev_info(dev, "quirk DMIC enabled"); 70 dev_info(dev, "quirk DMIC enabled");
68 if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN) 71 if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN)
@@ -128,6 +131,7 @@ static const struct snd_soc_dapm_widget byt_rt5651_widgets[] = {
128 SND_SOC_DAPM_MIC("Headset Mic", NULL), 131 SND_SOC_DAPM_MIC("Headset Mic", NULL),
129 SND_SOC_DAPM_MIC("Internal Mic", NULL), 132 SND_SOC_DAPM_MIC("Internal Mic", NULL),
130 SND_SOC_DAPM_SPK("Speaker", NULL), 133 SND_SOC_DAPM_SPK("Speaker", NULL),
134 SND_SOC_DAPM_LINE("Line In", NULL),
131 SND_SOC_DAPM_SUPPLY("Platform Clock", SND_SOC_NOPM, 0, 0, 135 SND_SOC_DAPM_SUPPLY("Platform Clock", SND_SOC_NOPM, 0, 0,
132 platform_clock_control, SND_SOC_DAPM_PRE_PMU | 136 platform_clock_control, SND_SOC_DAPM_PRE_PMU |
133 SND_SOC_DAPM_POST_PMD), 137 SND_SOC_DAPM_POST_PMD),
@@ -139,6 +143,7 @@ static const struct snd_soc_dapm_route byt_rt5651_audio_map[] = {
139 {"Headset Mic", NULL, "Platform Clock"}, 143 {"Headset Mic", NULL, "Platform Clock"},
140 {"Internal Mic", NULL, "Platform Clock"}, 144 {"Internal Mic", NULL, "Platform Clock"},
141 {"Speaker", NULL, "Platform Clock"}, 145 {"Speaker", NULL, "Platform Clock"},
146 {"Line In", NULL, "Platform Clock"},
142 147
143 {"AIF1 Playback", NULL, "ssp2 Tx"}, 148 {"AIF1 Playback", NULL, "ssp2 Tx"},
144 {"ssp2 Tx", NULL, "codec_out0"}, 149 {"ssp2 Tx", NULL, "codec_out0"},
@@ -152,6 +157,9 @@ static const struct snd_soc_dapm_route byt_rt5651_audio_map[] = {
152 {"Headphone", NULL, "HPOR"}, 157 {"Headphone", NULL, "HPOR"},
153 {"Speaker", NULL, "LOUTL"}, 158 {"Speaker", NULL, "LOUTL"},
154 {"Speaker", NULL, "LOUTR"}, 159 {"Speaker", NULL, "LOUTR"},
160 {"IN2P", NULL, "Line In"},
161 {"IN2N", NULL, "Line In"},
162
155}; 163};
156 164
157static const struct snd_soc_dapm_route byt_rt5651_intmic_dmic_map[] = { 165static const struct snd_soc_dapm_route byt_rt5651_intmic_dmic_map[] = {
@@ -179,11 +187,18 @@ static const struct snd_soc_dapm_route byt_rt5651_intmic_in1_in2_map[] = {
179 {"IN3P", NULL, "Headset Mic"}, 187 {"IN3P", NULL, "Headset Mic"},
180}; 188};
181 189
190static const struct snd_soc_dapm_route byt_rt5651_intmic_in3_map[] = {
191 {"Internal Mic", NULL, "micbias1"},
192 {"IN3P", NULL, "Headset Mic"},
193 {"IN1P", NULL, "Internal Mic"},
194};
195
182static const struct snd_kcontrol_new byt_rt5651_controls[] = { 196static const struct snd_kcontrol_new byt_rt5651_controls[] = {
183 SOC_DAPM_PIN_SWITCH("Headphone"), 197 SOC_DAPM_PIN_SWITCH("Headphone"),
184 SOC_DAPM_PIN_SWITCH("Headset Mic"), 198 SOC_DAPM_PIN_SWITCH("Headset Mic"),
185 SOC_DAPM_PIN_SWITCH("Internal Mic"), 199 SOC_DAPM_PIN_SWITCH("Internal Mic"),
186 SOC_DAPM_PIN_SWITCH("Speaker"), 200 SOC_DAPM_PIN_SWITCH("Speaker"),
201 SOC_DAPM_PIN_SWITCH("Line In"),
187}; 202};
188 203
189static struct snd_soc_jack_pin bytcr_jack_pins[] = { 204static struct snd_soc_jack_pin bytcr_jack_pins[] = {
@@ -255,8 +270,16 @@ static const struct dmi_system_id byt_rt5651_quirk_table[] = {
255 DMI_MATCH(DMI_SYS_VENDOR, "Circuitco"), 270 DMI_MATCH(DMI_SYS_VENDOR, "Circuitco"),
256 DMI_MATCH(DMI_PRODUCT_NAME, "Minnowboard Max B3 PLATFORM"), 271 DMI_MATCH(DMI_PRODUCT_NAME, "Minnowboard Max B3 PLATFORM"),
257 }, 272 },
258 .driver_data = (void *)(BYT_RT5651_DMIC_MAP | 273 .driver_data = (void *)(BYT_RT5651_IN3_MAP),
259 BYT_RT5651_DMIC_EN), 274 },
275 {
276 .callback = byt_rt5651_quirk_cb,
277 .matches = {
278 DMI_MATCH(DMI_SYS_VENDOR, "ADI"),
279 DMI_MATCH(DMI_PRODUCT_NAME, "Minnowboard Turbot"),
280 },
281 .driver_data = (void *)(BYT_RT5651_MCLK_EN |
282 BYT_RT5651_IN3_MAP),
260 }, 283 },
261 { 284 {
262 .callback = byt_rt5651_quirk_cb, 285 .callback = byt_rt5651_quirk_cb,
@@ -264,7 +287,8 @@ static const struct dmi_system_id byt_rt5651_quirk_table[] = {
264 DMI_MATCH(DMI_SYS_VENDOR, "KIANO"), 287 DMI_MATCH(DMI_SYS_VENDOR, "KIANO"),
265 DMI_MATCH(DMI_PRODUCT_NAME, "KIANO SlimNote 14.2"), 288 DMI_MATCH(DMI_PRODUCT_NAME, "KIANO SlimNote 14.2"),
266 }, 289 },
267 .driver_data = (void *)(BYT_RT5651_IN1_IN2_MAP), 290 .driver_data = (void *)(BYT_RT5651_MCLK_EN |
291 BYT_RT5651_IN1_IN2_MAP),
268 }, 292 },
269 {} 293 {}
270}; 294};
@@ -293,6 +317,10 @@ static int byt_rt5651_init(struct snd_soc_pcm_runtime *runtime)
293 custom_map = byt_rt5651_intmic_in1_in2_map; 317 custom_map = byt_rt5651_intmic_in1_in2_map;
294 num_routes = ARRAY_SIZE(byt_rt5651_intmic_in1_in2_map); 318 num_routes = ARRAY_SIZE(byt_rt5651_intmic_in1_in2_map);
295 break; 319 break;
320 case BYT_RT5651_IN3_MAP:
321 custom_map = byt_rt5651_intmic_in3_map;
322 num_routes = ARRAY_SIZE(byt_rt5651_intmic_in3_map);
323 break;
296 default: 324 default:
297 custom_map = byt_rt5651_intmic_dmic_map; 325 custom_map = byt_rt5651_intmic_dmic_map;
298 num_routes = ARRAY_SIZE(byt_rt5651_intmic_dmic_map); 326 num_routes = ARRAY_SIZE(byt_rt5651_intmic_dmic_map);
diff --git a/sound/soc/intel/boards/mfld_machine.c b/sound/soc/intel/boards/mfld_machine.c
deleted file mode 100644
index 7cb44fdde1ee..000000000000
--- a/sound/soc/intel/boards/mfld_machine.c
+++ /dev/null
@@ -1,430 +0,0 @@
1/*
2 * mfld_machine.c - ASoc Machine driver for Intel Medfield MID platform
3 *
4 * Copyright (C) 2010 Intel Corp
5 * Author: Vinod Koul <vinod.koul@intel.com>
6 * Author: Harsha Priya <priya.harsha@intel.com>
7 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; version 2 of the License.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License along
19 * with this program; if not, write to the Free Software Foundation, Inc.,
20 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
21 *
22 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
23 */
24
25#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
26
27#include <linux/init.h>
28#include <linux/device.h>
29#include <linux/slab.h>
30#include <linux/io.h>
31#include <linux/module.h>
32#include <sound/pcm.h>
33#include <sound/pcm_params.h>
34#include <sound/soc.h>
35#include <sound/jack.h>
36#include "../codecs/sn95031.h"
37
38#define MID_MONO 1
39#define MID_STEREO 2
40#define MID_MAX_CAP 5
41#define MFLD_JACK_INSERT 0x04
42
43enum soc_mic_bias_zones {
44 MFLD_MV_START = 0,
45 /* mic bias volutage range for Headphones*/
46 MFLD_MV_HP = 400,
47 /* mic bias volutage range for American Headset*/
48 MFLD_MV_AM_HS = 650,
49 /* mic bias volutage range for Headset*/
50 MFLD_MV_HS = 2000,
51 MFLD_MV_UNDEFINED,
52};
53
54static unsigned int hs_switch;
55static unsigned int lo_dac;
56static struct snd_soc_codec *mfld_codec;
57
58struct mfld_mc_private {
59 void __iomem *int_base;
60 u8 interrupt_status;
61};
62
63struct snd_soc_jack mfld_jack;
64
65/*Headset jack detection DAPM pins */
66static struct snd_soc_jack_pin mfld_jack_pins[] = {
67 {
68 .pin = "Headphones",
69 .mask = SND_JACK_HEADPHONE,
70 },
71 {
72 .pin = "AMIC1",
73 .mask = SND_JACK_MICROPHONE,
74 },
75};
76
77/* jack detection voltage zones */
78static struct snd_soc_jack_zone mfld_zones[] = {
79 {MFLD_MV_START, MFLD_MV_AM_HS, SND_JACK_HEADPHONE},
80 {MFLD_MV_AM_HS, MFLD_MV_HS, SND_JACK_HEADSET},
81};
82
83/* sound card controls */
84static const char * const headset_switch_text[] = {"Earpiece", "Headset"};
85
86static const char * const lo_text[] = {"Vibra", "Headset", "IHF", "None"};
87
88static const struct soc_enum headset_enum =
89 SOC_ENUM_SINGLE_EXT(2, headset_switch_text);
90
91static const struct soc_enum lo_enum =
92 SOC_ENUM_SINGLE_EXT(4, lo_text);
93
94static int headset_get_switch(struct snd_kcontrol *kcontrol,
95 struct snd_ctl_elem_value *ucontrol)
96{
97 ucontrol->value.enumerated.item[0] = hs_switch;
98 return 0;
99}
100
101static int headset_set_switch(struct snd_kcontrol *kcontrol,
102 struct snd_ctl_elem_value *ucontrol)
103{
104 struct snd_soc_card *card = snd_kcontrol_chip(kcontrol);
105 struct snd_soc_dapm_context *dapm = &card->dapm;
106
107 if (ucontrol->value.enumerated.item[0] == hs_switch)
108 return 0;
109
110 snd_soc_dapm_mutex_lock(dapm);
111
112 if (ucontrol->value.enumerated.item[0]) {
113 pr_debug("hs_set HS path\n");
114 snd_soc_dapm_enable_pin_unlocked(dapm, "Headphones");
115 snd_soc_dapm_disable_pin_unlocked(dapm, "EPOUT");
116 } else {
117 pr_debug("hs_set EP path\n");
118 snd_soc_dapm_disable_pin_unlocked(dapm, "Headphones");
119 snd_soc_dapm_enable_pin_unlocked(dapm, "EPOUT");
120 }
121
122 snd_soc_dapm_sync_unlocked(dapm);
123
124 snd_soc_dapm_mutex_unlock(dapm);
125
126 hs_switch = ucontrol->value.enumerated.item[0];
127
128 return 0;
129}
130
131static void lo_enable_out_pins(struct snd_soc_dapm_context *dapm)
132{
133 snd_soc_dapm_enable_pin_unlocked(dapm, "IHFOUTL");
134 snd_soc_dapm_enable_pin_unlocked(dapm, "IHFOUTR");
135 snd_soc_dapm_enable_pin_unlocked(dapm, "LINEOUTL");
136 snd_soc_dapm_enable_pin_unlocked(dapm, "LINEOUTR");
137 snd_soc_dapm_enable_pin_unlocked(dapm, "VIB1OUT");
138 snd_soc_dapm_enable_pin_unlocked(dapm, "VIB2OUT");
139 if (hs_switch) {
140 snd_soc_dapm_enable_pin_unlocked(dapm, "Headphones");
141 snd_soc_dapm_disable_pin_unlocked(dapm, "EPOUT");
142 } else {
143 snd_soc_dapm_disable_pin_unlocked(dapm, "Headphones");
144 snd_soc_dapm_enable_pin_unlocked(dapm, "EPOUT");
145 }
146}
147
148static int lo_get_switch(struct snd_kcontrol *kcontrol,
149 struct snd_ctl_elem_value *ucontrol)
150{
151 ucontrol->value.enumerated.item[0] = lo_dac;
152 return 0;
153}
154
155static int lo_set_switch(struct snd_kcontrol *kcontrol,
156 struct snd_ctl_elem_value *ucontrol)
157{
158 struct snd_soc_card *card = snd_kcontrol_chip(kcontrol);
159 struct snd_soc_dapm_context *dapm = &card->dapm;
160
161 if (ucontrol->value.enumerated.item[0] == lo_dac)
162 return 0;
163
164 snd_soc_dapm_mutex_lock(dapm);
165
166 /* we dont want to work with last state of lineout so just enable all
167 * pins and then disable pins not required
168 */
169 lo_enable_out_pins(dapm);
170
171 switch (ucontrol->value.enumerated.item[0]) {
172 case 0:
173 pr_debug("set vibra path\n");
174 snd_soc_dapm_disable_pin_unlocked(dapm, "VIB1OUT");
175 snd_soc_dapm_disable_pin_unlocked(dapm, "VIB2OUT");
176 snd_soc_update_bits(mfld_codec, SN95031_LOCTL, 0x66, 0);
177 break;
178
179 case 1:
180 pr_debug("set hs path\n");
181 snd_soc_dapm_disable_pin_unlocked(dapm, "Headphones");
182 snd_soc_dapm_disable_pin_unlocked(dapm, "EPOUT");
183 snd_soc_update_bits(mfld_codec, SN95031_LOCTL, 0x66, 0x22);
184 break;
185
186 case 2:
187 pr_debug("set spkr path\n");
188 snd_soc_dapm_disable_pin_unlocked(dapm, "IHFOUTL");
189 snd_soc_dapm_disable_pin_unlocked(dapm, "IHFOUTR");
190 snd_soc_update_bits(mfld_codec, SN95031_LOCTL, 0x66, 0x44);
191 break;
192
193 case 3:
194 pr_debug("set null path\n");
195 snd_soc_dapm_disable_pin_unlocked(dapm, "LINEOUTL");
196 snd_soc_dapm_disable_pin_unlocked(dapm, "LINEOUTR");
197 snd_soc_update_bits(mfld_codec, SN95031_LOCTL, 0x66, 0x66);
198 break;
199 }
200
201 snd_soc_dapm_sync_unlocked(dapm);
202
203 snd_soc_dapm_mutex_unlock(dapm);
204
205 lo_dac = ucontrol->value.enumerated.item[0];
206 return 0;
207}
208
209static const struct snd_kcontrol_new mfld_snd_controls[] = {
210 SOC_ENUM_EXT("Playback Switch", headset_enum,
211 headset_get_switch, headset_set_switch),
212 SOC_ENUM_EXT("Lineout Mux", lo_enum,
213 lo_get_switch, lo_set_switch),
214};
215
216static const struct snd_soc_dapm_widget mfld_widgets[] = {
217 SND_SOC_DAPM_HP("Headphones", NULL),
218 SND_SOC_DAPM_MIC("Mic", NULL),
219};
220
221static const struct snd_soc_dapm_route mfld_map[] = {
222 {"Headphones", NULL, "HPOUTR"},
223 {"Headphones", NULL, "HPOUTL"},
224 {"Mic", NULL, "AMIC1"},
225};
226
227static void mfld_jack_check(unsigned int intr_status)
228{
229 struct mfld_jack_data jack_data;
230
231 if (!mfld_codec)
232 return;
233
234 jack_data.mfld_jack = &mfld_jack;
235 jack_data.intr_id = intr_status;
236
237 sn95031_jack_detection(mfld_codec, &jack_data);
238 /* TODO: add american headset detection post gpiolib support */
239}
240
241static int mfld_init(struct snd_soc_pcm_runtime *runtime)
242{
243 struct snd_soc_dapm_context *dapm = &runtime->card->dapm;
244 int ret_val;
245
246 /* default is earpiece pin, userspace sets it explcitly */
247 snd_soc_dapm_disable_pin(dapm, "Headphones");
248 /* default is lineout NC, userspace sets it explcitly */
249 snd_soc_dapm_disable_pin(dapm, "LINEOUTL");
250 snd_soc_dapm_disable_pin(dapm, "LINEOUTR");
251 lo_dac = 3;
252 hs_switch = 0;
253 /* we dont use linein in this so set to NC */
254 snd_soc_dapm_disable_pin(dapm, "LINEINL");
255 snd_soc_dapm_disable_pin(dapm, "LINEINR");
256
257 /* Headset and button jack detection */
258 ret_val = snd_soc_card_jack_new(runtime->card,
259 "Intel(R) MID Audio Jack", SND_JACK_HEADSET |
260 SND_JACK_BTN_0 | SND_JACK_BTN_1, &mfld_jack,
261 mfld_jack_pins, ARRAY_SIZE(mfld_jack_pins));
262 if (ret_val) {
263 pr_err("jack creation failed\n");
264 return ret_val;
265 }
266
267 ret_val = snd_soc_jack_add_zones(&mfld_jack,
268 ARRAY_SIZE(mfld_zones), mfld_zones);
269 if (ret_val) {
270 pr_err("adding jack zones failed\n");
271 return ret_val;
272 }
273
274 mfld_codec = runtime->codec;
275
276 /* we want to check if anything is inserted at boot,
277 * so send a fake event to codec and it will read adc
278 * to find if anything is there or not */
279 mfld_jack_check(MFLD_JACK_INSERT);
280 return ret_val;
281}
282
283static struct snd_soc_dai_link mfld_msic_dailink[] = {
284 {
285 .name = "Medfield Headset",
286 .stream_name = "Headset",
287 .cpu_dai_name = "Headset-cpu-dai",
288 .codec_dai_name = "SN95031 Headset",
289 .codec_name = "sn95031",
290 .platform_name = "sst-platform",
291 .init = mfld_init,
292 },
293 {
294 .name = "Medfield Speaker",
295 .stream_name = "Speaker",
296 .cpu_dai_name = "Speaker-cpu-dai",
297 .codec_dai_name = "SN95031 Speaker",
298 .codec_name = "sn95031",
299 .platform_name = "sst-platform",
300 .init = NULL,
301 },
302 {
303 .name = "Medfield Vibra",
304 .stream_name = "Vibra1",
305 .cpu_dai_name = "Vibra1-cpu-dai",
306 .codec_dai_name = "SN95031 Vibra1",
307 .codec_name = "sn95031",
308 .platform_name = "sst-platform",
309 .init = NULL,
310 },
311 {
312 .name = "Medfield Haptics",
313 .stream_name = "Vibra2",
314 .cpu_dai_name = "Vibra2-cpu-dai",
315 .codec_dai_name = "SN95031 Vibra2",
316 .codec_name = "sn95031",
317 .platform_name = "sst-platform",
318 .init = NULL,
319 },
320 {
321 .name = "Medfield Compress",
322 .stream_name = "Speaker",
323 .cpu_dai_name = "Compress-cpu-dai",
324 .codec_dai_name = "SN95031 Speaker",
325 .codec_name = "sn95031",
326 .platform_name = "sst-platform",
327 .init = NULL,
328 },
329};
330
331/* SoC card */
332static struct snd_soc_card snd_soc_card_mfld = {
333 .name = "medfield_audio",
334 .owner = THIS_MODULE,
335 .dai_link = mfld_msic_dailink,
336 .num_links = ARRAY_SIZE(mfld_msic_dailink),
337
338 .controls = mfld_snd_controls,
339 .num_controls = ARRAY_SIZE(mfld_snd_controls),
340 .dapm_widgets = mfld_widgets,
341 .num_dapm_widgets = ARRAY_SIZE(mfld_widgets),
342 .dapm_routes = mfld_map,
343 .num_dapm_routes = ARRAY_SIZE(mfld_map),
344};
345
346static irqreturn_t snd_mfld_jack_intr_handler(int irq, void *dev)
347{
348 struct mfld_mc_private *mc_private = (struct mfld_mc_private *) dev;
349
350 memcpy_fromio(&mc_private->interrupt_status,
351 ((void *)(mc_private->int_base)),
352 sizeof(u8));
353 return IRQ_WAKE_THREAD;
354}
355
356static irqreturn_t snd_mfld_jack_detection(int irq, void *data)
357{
358 struct mfld_mc_private *mc_drv_ctx = (struct mfld_mc_private *) data;
359
360 mfld_jack_check(mc_drv_ctx->interrupt_status);
361
362 return IRQ_HANDLED;
363}
364
365static int snd_mfld_mc_probe(struct platform_device *pdev)
366{
367 int ret_val = 0, irq;
368 struct mfld_mc_private *mc_drv_ctx;
369 struct resource *irq_mem;
370
371 pr_debug("snd_mfld_mc_probe called\n");
372
373 /* retrive the irq number */
374 irq = platform_get_irq(pdev, 0);
375 if (irq <= 0)
376 return irq < 0 ? irq : -ENODEV;
377
378 /* audio interrupt base of SRAM location where
379 * interrupts are stored by System FW */
380 mc_drv_ctx = devm_kzalloc(&pdev->dev, sizeof(*mc_drv_ctx), GFP_ATOMIC);
381 if (!mc_drv_ctx)
382 return -ENOMEM;
383
384 irq_mem = platform_get_resource_byname(
385 pdev, IORESOURCE_MEM, "IRQ_BASE");
386 if (!irq_mem) {
387 pr_err("no mem resource given\n");
388 return -ENODEV;
389 }
390 mc_drv_ctx->int_base = devm_ioremap_nocache(&pdev->dev, irq_mem->start,
391 resource_size(irq_mem));
392 if (!mc_drv_ctx->int_base) {
393 pr_err("Mapping of cache failed\n");
394 return -ENOMEM;
395 }
396 /* register for interrupt */
397 ret_val = devm_request_threaded_irq(&pdev->dev, irq,
398 snd_mfld_jack_intr_handler,
399 snd_mfld_jack_detection,
400 IRQF_SHARED, pdev->dev.driver->name, mc_drv_ctx);
401 if (ret_val) {
402 pr_err("cannot register IRQ\n");
403 return ret_val;
404 }
405 /* register the soc card */
406 snd_soc_card_mfld.dev = &pdev->dev;
407 ret_val = devm_snd_soc_register_card(&pdev->dev, &snd_soc_card_mfld);
408 if (ret_val) {
409 pr_debug("snd_soc_register_card failed %d\n", ret_val);
410 return ret_val;
411 }
412 platform_set_drvdata(pdev, mc_drv_ctx);
413 pr_debug("successfully exited probe\n");
414 return 0;
415}
416
417static struct platform_driver snd_mfld_mc_driver = {
418 .driver = {
419 .name = "msic_audio",
420 },
421 .probe = snd_mfld_mc_probe,
422};
423
424module_platform_driver(snd_mfld_mc_driver);
425
426MODULE_DESCRIPTION("ASoC Intel(R) MID Machine driver");
427MODULE_AUTHOR("Vinod Koul <vinod.koul@intel.com>");
428MODULE_AUTHOR("Harsha Priya <priya.harsha@intel.com>");
429MODULE_LICENSE("GPL v2");
430MODULE_ALIAS("platform:msic-audio");
diff --git a/sound/soc/mediatek/mt2701/mt2701-afe-pcm.c b/sound/soc/mediatek/mt2701/mt2701-afe-pcm.c
index f0cd08fa5c5d..5bc4e00a4a29 100644
--- a/sound/soc/mediatek/mt2701/mt2701-afe-pcm.c
+++ b/sound/soc/mediatek/mt2701/mt2701-afe-pcm.c
@@ -1440,9 +1440,9 @@ static int mt2701_afe_pcm_dev_probe(struct platform_device *pdev)
1440 } 1440 }
1441 1441
1442 afe->regmap = syscon_node_to_regmap(dev->parent->of_node); 1442 afe->regmap = syscon_node_to_regmap(dev->parent->of_node);
1443 if (!afe->regmap) { 1443 if (IS_ERR(afe->regmap)) {
1444 dev_err(dev, "could not get regmap from parent\n"); 1444 dev_err(dev, "could not get regmap from parent\n");
1445 return -ENODEV; 1445 return PTR_ERR(afe->regmap);
1446 } 1446 }
1447 1447
1448 mutex_init(&afe->irq_alloc_lock); 1448 mutex_init(&afe->irq_alloc_lock);
diff --git a/sound/soc/mediatek/mt8173/mt8173-rt5650-rt5514.c b/sound/soc/mediatek/mt8173/mt8173-rt5650-rt5514.c
index 99c15219dbc8..5a9a5482976e 100644
--- a/sound/soc/mediatek/mt8173/mt8173-rt5650-rt5514.c
+++ b/sound/soc/mediatek/mt8173/mt8173-rt5650-rt5514.c
@@ -37,8 +37,6 @@ static const struct snd_soc_dapm_route mt8173_rt5650_rt5514_routes[] = {
37 {"Sub DMIC1R", NULL, "Int Mic"}, 37 {"Sub DMIC1R", NULL, "Int Mic"},
38 {"Headphone", NULL, "HPOL"}, 38 {"Headphone", NULL, "HPOL"},
39 {"Headphone", NULL, "HPOR"}, 39 {"Headphone", NULL, "HPOR"},
40 {"Headset Mic", NULL, "micbias1"},
41 {"Headset Mic", NULL, "micbias2"},
42 {"IN1P", NULL, "Headset Mic"}, 40 {"IN1P", NULL, "Headset Mic"},
43 {"IN1N", NULL, "Headset Mic"}, 41 {"IN1N", NULL, "Headset Mic"},
44}; 42};
diff --git a/sound/soc/mediatek/mt8173/mt8173-rt5650-rt5676.c b/sound/soc/mediatek/mt8173/mt8173-rt5650-rt5676.c
index 42de84ca8c84..b7248085ca04 100644
--- a/sound/soc/mediatek/mt8173/mt8173-rt5650-rt5676.c
+++ b/sound/soc/mediatek/mt8173/mt8173-rt5650-rt5676.c
@@ -40,8 +40,6 @@ static const struct snd_soc_dapm_route mt8173_rt5650_rt5676_routes[] = {
40 {"Headphone", NULL, "HPOL"}, 40 {"Headphone", NULL, "HPOL"},
41 {"Headphone", NULL, "HPOR"}, 41 {"Headphone", NULL, "HPOR"},
42 {"Headphone", NULL, "Sub AIF2TX"}, /* IF2 ADC to 5650 */ 42 {"Headphone", NULL, "Sub AIF2TX"}, /* IF2 ADC to 5650 */
43 {"Headset Mic", NULL, "micbias1"},
44 {"Headset Mic", NULL, "micbias2"},
45 {"IN1P", NULL, "Headset Mic"}, 43 {"IN1P", NULL, "Headset Mic"},
46 {"IN1N", NULL, "Headset Mic"}, 44 {"IN1N", NULL, "Headset Mic"},
47 {"Sub AIF2RX", NULL, "Headset Mic"}, /* IF2 DAC from 5650 */ 45 {"Sub AIF2RX", NULL, "Headset Mic"}, /* IF2 DAC from 5650 */
diff --git a/sound/soc/mediatek/mt8173/mt8173-rt5650.c b/sound/soc/mediatek/mt8173/mt8173-rt5650.c
index e69c141d8ed4..40ebefd625c1 100644
--- a/sound/soc/mediatek/mt8173/mt8173-rt5650.c
+++ b/sound/soc/mediatek/mt8173/mt8173-rt5650.c
@@ -51,8 +51,6 @@ static const struct snd_soc_dapm_route mt8173_rt5650_routes[] = {
51 {"DMIC R1", NULL, "Int Mic"}, 51 {"DMIC R1", NULL, "Int Mic"},
52 {"Headphone", NULL, "HPOL"}, 52 {"Headphone", NULL, "HPOL"},
53 {"Headphone", NULL, "HPOR"}, 53 {"Headphone", NULL, "HPOR"},
54 {"Headset Mic", NULL, "micbias1"},
55 {"Headset Mic", NULL, "micbias2"},
56 {"IN1P", NULL, "Headset Mic"}, 54 {"IN1P", NULL, "Headset Mic"},
57 {"IN1N", NULL, "Headset Mic"}, 55 {"IN1N", NULL, "Headset Mic"},
58}; 56};
diff --git a/sound/soc/rockchip/rockchip_i2s.c b/sound/soc/rockchip/rockchip_i2s.c
index 908211e1d6fc..950823d69e9c 100644
--- a/sound/soc/rockchip/rockchip_i2s.c
+++ b/sound/soc/rockchip/rockchip_i2s.c
@@ -328,6 +328,7 @@ static int rockchip_i2s_hw_params(struct snd_pcm_substream *substream,
328 val |= I2S_CHN_4; 328 val |= I2S_CHN_4;
329 break; 329 break;
330 case 2: 330 case 2:
331 case 1:
331 val |= I2S_CHN_2; 332 val |= I2S_CHN_2;
332 break; 333 break;
333 default: 334 default:
@@ -460,7 +461,7 @@ static struct snd_soc_dai_driver rockchip_i2s_dai = {
460 }, 461 },
461 .capture = { 462 .capture = {
462 .stream_name = "Capture", 463 .stream_name = "Capture",
463 .channels_min = 2, 464 .channels_min = 1,
464 .channels_max = 2, 465 .channels_max = 2,
465 .rates = SNDRV_PCM_RATE_8000_192000, 466 .rates = SNDRV_PCM_RATE_8000_192000,
466 .formats = (SNDRV_PCM_FMTBIT_S8 | 467 .formats = (SNDRV_PCM_FMTBIT_S8 |
@@ -504,6 +505,7 @@ static bool rockchip_i2s_rd_reg(struct device *dev, unsigned int reg)
504 case I2S_INTCR: 505 case I2S_INTCR:
505 case I2S_XFER: 506 case I2S_XFER:
506 case I2S_CLR: 507 case I2S_CLR:
508 case I2S_TXDR:
507 case I2S_RXDR: 509 case I2S_RXDR:
508 case I2S_FIFOLR: 510 case I2S_FIFOLR:
509 case I2S_INTSR: 511 case I2S_INTSR:
@@ -518,6 +520,9 @@ static bool rockchip_i2s_volatile_reg(struct device *dev, unsigned int reg)
518 switch (reg) { 520 switch (reg) {
519 case I2S_INTSR: 521 case I2S_INTSR:
520 case I2S_CLR: 522 case I2S_CLR:
523 case I2S_FIFOLR:
524 case I2S_TXDR:
525 case I2S_RXDR:
521 return true; 526 return true;
522 default: 527 default:
523 return false; 528 return false;
@@ -527,6 +532,8 @@ static bool rockchip_i2s_volatile_reg(struct device *dev, unsigned int reg)
527static bool rockchip_i2s_precious_reg(struct device *dev, unsigned int reg) 532static bool rockchip_i2s_precious_reg(struct device *dev, unsigned int reg)
528{ 533{
529 switch (reg) { 534 switch (reg) {
535 case I2S_RXDR:
536 return true;
530 default: 537 default:
531 return false; 538 return false;
532 } 539 }
@@ -654,7 +661,7 @@ static int rockchip_i2s_probe(struct platform_device *pdev)
654 } 661 }
655 662
656 if (!of_property_read_u32(node, "rockchip,capture-channels", &val)) { 663 if (!of_property_read_u32(node, "rockchip,capture-channels", &val)) {
657 if (val >= 2 && val <= 8) 664 if (val >= 1 && val <= 8)
658 soc_dai->capture.channels_max = val; 665 soc_dai->capture.channels_max = val;
659 } 666 }
660 667
diff --git a/sound/soc/soc-acpi.c b/sound/soc/soc-acpi.c
index f21df28bc28e..7f43c9bf3d09 100644
--- a/sound/soc/soc-acpi.c
+++ b/sound/soc/soc-acpi.c
@@ -49,46 +49,16 @@ const char *snd_soc_acpi_find_name_from_hid(const u8 hid[ACPI_ID_LEN])
49} 49}
50EXPORT_SYMBOL_GPL(snd_soc_acpi_find_name_from_hid); 50EXPORT_SYMBOL_GPL(snd_soc_acpi_find_name_from_hid);
51 51
52static acpi_status snd_soc_acpi_mach_match(acpi_handle handle, u32 level,
53 void *context, void **ret)
54{
55 unsigned long long sta;
56 acpi_status status;
57
58 *(bool *)context = true;
59 status = acpi_evaluate_integer(handle, "_STA", NULL, &sta);
60 if (ACPI_FAILURE(status) || !(sta & ACPI_STA_DEVICE_PRESENT))
61 *(bool *)context = false;
62
63 return AE_OK;
64}
65
66bool snd_soc_acpi_check_hid(const u8 hid[ACPI_ID_LEN])
67{
68 acpi_status status;
69 bool found = false;
70
71 status = acpi_get_devices(hid, snd_soc_acpi_mach_match, &found, NULL);
72
73 if (ACPI_FAILURE(status))
74 return false;
75
76 return found;
77}
78EXPORT_SYMBOL_GPL(snd_soc_acpi_check_hid);
79
80struct snd_soc_acpi_mach * 52struct snd_soc_acpi_mach *
81snd_soc_acpi_find_machine(struct snd_soc_acpi_mach *machines) 53snd_soc_acpi_find_machine(struct snd_soc_acpi_mach *machines)
82{ 54{
83 struct snd_soc_acpi_mach *mach; 55 struct snd_soc_acpi_mach *mach;
84 56
85 for (mach = machines; mach->id[0]; mach++) { 57 for (mach = machines; mach->id[0]; mach++) {
86 if (snd_soc_acpi_check_hid(mach->id) == true) { 58 if (acpi_dev_present(mach->id, NULL, -1)) {
87 if (mach->machine_quirk == NULL) 59 if (mach->machine_quirk)
88 return mach; 60 mach = mach->machine_quirk(mach);
89 61 return mach;
90 if (mach->machine_quirk(mach) != NULL)
91 return mach;
92 } 62 }
93 } 63 }
94 return NULL; 64 return NULL;
@@ -163,7 +133,7 @@ struct snd_soc_acpi_mach *snd_soc_acpi_codec_list(void *arg)
163 return mach; 133 return mach;
164 134
165 for (i = 0; i < codec_list->num_codecs; i++) { 135 for (i = 0; i < codec_list->num_codecs; i++) {
166 if (snd_soc_acpi_check_hid(codec_list->codecs[i]) != true) 136 if (!acpi_dev_present(codec_list->codecs[i], NULL, -1))
167 return NULL; 137 return NULL;
168 } 138 }
169 139
diff --git a/sound/soc/stm/Kconfig b/sound/soc/stm/Kconfig
index 3398e6c57f37..3ad881fc40a1 100644
--- a/sound/soc/stm/Kconfig
+++ b/sound/soc/stm/Kconfig
@@ -28,4 +28,16 @@ config SND_SOC_STM32_SPDIFRX
28 help 28 help
29 Say Y if you want to enable S/PDIF capture for STM32 29 Say Y if you want to enable S/PDIF capture for STM32
30 30
31config SND_SOC_STM32_DFSDM
32 tristate "SoC Audio support for STM32 DFSDM"
33 depends on ARCH_STM32 || COMPILE_TEST
34 depends on SND_SOC
35 depends on STM32_DFSDM_ADC
36 select SND_SOC_GENERIC_DMAENGINE_PCM
37 select SND_SOC_DMIC
38 select IIO_BUFFER_CB
39 help
40 Select this option to enable the STM32 Digital Filter
41 for Sigma Delta Modulators (DFSDM) driver used
42 in various STM32 series for digital microphone capture.
31endmenu 43endmenu
diff --git a/sound/soc/stm/Makefile b/sound/soc/stm/Makefile
index 5b7f0fab0bd6..3143c0b47042 100644
--- a/sound/soc/stm/Makefile
+++ b/sound/soc/stm/Makefile
@@ -13,3 +13,6 @@ obj-$(CONFIG_SND_SOC_STM32_I2S) += snd-soc-stm32-i2s.o
13# SPDIFRX 13# SPDIFRX
14snd-soc-stm32-spdifrx-objs := stm32_spdifrx.o 14snd-soc-stm32-spdifrx-objs := stm32_spdifrx.o
15obj-$(CONFIG_SND_SOC_STM32_SPDIFRX) += snd-soc-stm32-spdifrx.o 15obj-$(CONFIG_SND_SOC_STM32_SPDIFRX) += snd-soc-stm32-spdifrx.o
16
17#DFSDM
18obj-$(CONFIG_SND_SOC_STM32_DFSDM) += stm32_adfsdm.o
diff --git a/sound/soc/stm/stm32_adfsdm.c b/sound/soc/stm/stm32_adfsdm.c
new file mode 100644
index 000000000000..7306e3eca9e1
--- /dev/null
+++ b/sound/soc/stm/stm32_adfsdm.c
@@ -0,0 +1,347 @@
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * This file is part of STM32 DFSDM ASoC DAI driver
4 *
5 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
6 * Authors: Arnaud Pouliquen <arnaud.pouliquen@st.com>
7 * Olivier Moysan <olivier.moysan@st.com>
8 */
9
10#include <linux/clk.h>
11#include <linux/module.h>
12#include <linux/platform_device.h>
13#include <linux/slab.h>
14
15#include <linux/iio/iio.h>
16#include <linux/iio/consumer.h>
17#include <linux/iio/adc/stm32-dfsdm-adc.h>
18
19#include <sound/pcm.h>
20#include <sound/soc.h>
21
22#define STM32_ADFSDM_DRV_NAME "stm32-adfsdm"
23
24#define DFSDM_MAX_PERIOD_SIZE (PAGE_SIZE / 2)
25#define DFSDM_MAX_PERIODS 6
26
27struct stm32_adfsdm_priv {
28 struct snd_soc_dai_driver dai_drv;
29 struct snd_pcm_substream *substream;
30 struct device *dev;
31
32 /* IIO */
33 struct iio_channel *iio_ch;
34 struct iio_cb_buffer *iio_cb;
35 bool iio_active;
36
37 /* PCM buffer */
38 unsigned char *pcm_buff;
39 unsigned int pos;
40};
41
42static const struct snd_pcm_hardware stm32_adfsdm_pcm_hw = {
43 .info = SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER |
44 SNDRV_PCM_INFO_PAUSE,
45 .formats = SNDRV_PCM_FMTBIT_S32_LE,
46
47 .rate_min = 8000,
48 .rate_max = 32000,
49
50 .channels_min = 1,
51 .channels_max = 1,
52
53 .periods_min = 2,
54 .periods_max = DFSDM_MAX_PERIODS,
55
56 .period_bytes_max = DFSDM_MAX_PERIOD_SIZE,
57 .buffer_bytes_max = DFSDM_MAX_PERIODS * DFSDM_MAX_PERIOD_SIZE
58};
59
60static void stm32_adfsdm_shutdown(struct snd_pcm_substream *substream,
61 struct snd_soc_dai *dai)
62{
63 struct stm32_adfsdm_priv *priv = snd_soc_dai_get_drvdata(dai);
64
65 if (priv->iio_active) {
66 iio_channel_stop_all_cb(priv->iio_cb);
67 priv->iio_active = false;
68 }
69}
70
71static int stm32_adfsdm_dai_prepare(struct snd_pcm_substream *substream,
72 struct snd_soc_dai *dai)
73{
74 struct stm32_adfsdm_priv *priv = snd_soc_dai_get_drvdata(dai);
75 int ret;
76
77 ret = iio_write_channel_attribute(priv->iio_ch,
78 substream->runtime->rate, 0,
79 IIO_CHAN_INFO_SAMP_FREQ);
80 if (ret < 0) {
81 dev_err(dai->dev, "%s: Failed to set %d sampling rate\n",
82 __func__, substream->runtime->rate);
83 return ret;
84 }
85
86 if (!priv->iio_active) {
87 ret = iio_channel_start_all_cb(priv->iio_cb);
88 if (!ret)
89 priv->iio_active = true;
90 else
91 dev_err(dai->dev, "%s: IIO channel start failed (%d)\n",
92 __func__, ret);
93 }
94
95 return ret;
96}
97
98static int stm32_adfsdm_set_sysclk(struct snd_soc_dai *dai, int clk_id,
99 unsigned int freq, int dir)
100{
101 struct stm32_adfsdm_priv *priv = snd_soc_dai_get_drvdata(dai);
102 ssize_t size;
103 char str_freq[10];
104
105 dev_dbg(dai->dev, "%s: Enter for freq %d\n", __func__, freq);
106
107 /* Set IIO frequency if CODEC is master as clock comes from SPI_IN */
108
109 snprintf(str_freq, sizeof(str_freq), "%d\n", freq);
110 size = iio_write_channel_ext_info(priv->iio_ch, "spi_clk_freq",
111 str_freq, sizeof(str_freq));
112 if (size != sizeof(str_freq)) {
113 dev_err(dai->dev, "%s: Failed to set SPI clock\n",
114 __func__);
115 return -EINVAL;
116 }
117 return 0;
118}
119
120static const struct snd_soc_dai_ops stm32_adfsdm_dai_ops = {
121 .shutdown = stm32_adfsdm_shutdown,
122 .prepare = stm32_adfsdm_dai_prepare,
123 .set_sysclk = stm32_adfsdm_set_sysclk,
124};
125
126static const struct snd_soc_dai_driver stm32_adfsdm_dai = {
127 .capture = {
128 .channels_min = 1,
129 .channels_max = 1,
130 .formats = SNDRV_PCM_FMTBIT_S32_LE,
131 .rates = (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
132 SNDRV_PCM_RATE_32000),
133 },
134 .ops = &stm32_adfsdm_dai_ops,
135};
136
137static const struct snd_soc_component_driver stm32_adfsdm_dai_component = {
138 .name = "stm32_dfsdm_audio",
139};
140
141static int stm32_afsdm_pcm_cb(const void *data, size_t size, void *private)
142{
143 struct stm32_adfsdm_priv *priv = private;
144 struct snd_soc_pcm_runtime *rtd = priv->substream->private_data;
145 u8 *pcm_buff = priv->pcm_buff;
146 u8 *src_buff = (u8 *)data;
147 unsigned int buff_size = snd_pcm_lib_buffer_bytes(priv->substream);
148 unsigned int period_size = snd_pcm_lib_period_bytes(priv->substream);
149 unsigned int old_pos = priv->pos;
150 unsigned int cur_size = size;
151
152 dev_dbg(rtd->dev, "%s: buff_add :%p, pos = %d, size = %zu\n",
153 __func__, &pcm_buff[priv->pos], priv->pos, size);
154
155 if ((priv->pos + size) > buff_size) {
156 memcpy(&pcm_buff[priv->pos], src_buff, buff_size - priv->pos);
157 cur_size -= buff_size - priv->pos;
158 priv->pos = 0;
159 }
160
161 memcpy(&pcm_buff[priv->pos], &src_buff[size - cur_size], cur_size);
162 priv->pos = (priv->pos + cur_size) % buff_size;
163
164 if (cur_size != size || (old_pos && (old_pos % period_size < size)))
165 snd_pcm_period_elapsed(priv->substream);
166
167 return 0;
168}
169
170static int stm32_adfsdm_trigger(struct snd_pcm_substream *substream, int cmd)
171{
172 struct snd_soc_pcm_runtime *rtd = substream->private_data;
173 struct stm32_adfsdm_priv *priv =
174 snd_soc_dai_get_drvdata(rtd->cpu_dai);
175
176 switch (cmd) {
177 case SNDRV_PCM_TRIGGER_START:
178 case SNDRV_PCM_TRIGGER_RESUME:
179 priv->pos = 0;
180 return stm32_dfsdm_get_buff_cb(priv->iio_ch->indio_dev,
181 stm32_afsdm_pcm_cb, priv);
182 case SNDRV_PCM_TRIGGER_SUSPEND:
183 case SNDRV_PCM_TRIGGER_STOP:
184 return stm32_dfsdm_release_buff_cb(priv->iio_ch->indio_dev);
185 }
186
187 return -EINVAL;
188}
189
190static int stm32_adfsdm_pcm_open(struct snd_pcm_substream *substream)
191{
192 struct snd_soc_pcm_runtime *rtd = substream->private_data;
193 struct stm32_adfsdm_priv *priv = snd_soc_dai_get_drvdata(rtd->cpu_dai);
194 int ret;
195
196 ret = snd_soc_set_runtime_hwparams(substream, &stm32_adfsdm_pcm_hw);
197 if (!ret)
198 priv->substream = substream;
199
200 return ret;
201}
202
203static int stm32_adfsdm_pcm_close(struct snd_pcm_substream *substream)
204{
205 struct snd_soc_pcm_runtime *rtd = substream->private_data;
206 struct stm32_adfsdm_priv *priv =
207 snd_soc_dai_get_drvdata(rtd->cpu_dai);
208
209 snd_pcm_lib_free_pages(substream);
210 priv->substream = NULL;
211
212 return 0;
213}
214
215static snd_pcm_uframes_t stm32_adfsdm_pcm_pointer(
216 struct snd_pcm_substream *substream)
217{
218 struct snd_soc_pcm_runtime *rtd = substream->private_data;
219 struct stm32_adfsdm_priv *priv =
220 snd_soc_dai_get_drvdata(rtd->cpu_dai);
221
222 return bytes_to_frames(substream->runtime, priv->pos);
223}
224
225static int stm32_adfsdm_pcm_hw_params(struct snd_pcm_substream *substream,
226 struct snd_pcm_hw_params *params)
227{
228 struct snd_soc_pcm_runtime *rtd = substream->private_data;
229 struct stm32_adfsdm_priv *priv =
230 snd_soc_dai_get_drvdata(rtd->cpu_dai);
231 int ret;
232
233 ret = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(params));
234 if (ret < 0)
235 return ret;
236 priv->pcm_buff = substream->runtime->dma_area;
237
238 return iio_channel_cb_set_buffer_watermark(priv->iio_cb,
239 params_period_size(params));
240}
241
242static int stm32_adfsdm_pcm_hw_free(struct snd_pcm_substream *substream)
243{
244 snd_pcm_lib_free_pages(substream);
245
246 return 0;
247}
248
249static struct snd_pcm_ops stm32_adfsdm_pcm_ops = {
250 .open = stm32_adfsdm_pcm_open,
251 .close = stm32_adfsdm_pcm_close,
252 .hw_params = stm32_adfsdm_pcm_hw_params,
253 .hw_free = stm32_adfsdm_pcm_hw_free,
254 .trigger = stm32_adfsdm_trigger,
255 .pointer = stm32_adfsdm_pcm_pointer,
256};
257
258static int stm32_adfsdm_pcm_new(struct snd_soc_pcm_runtime *rtd)
259{
260 struct snd_pcm *pcm = rtd->pcm;
261 struct stm32_adfsdm_priv *priv =
262 snd_soc_dai_get_drvdata(rtd->cpu_dai);
263 unsigned int size = DFSDM_MAX_PERIODS * DFSDM_MAX_PERIOD_SIZE;
264
265 return snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
266 priv->dev, size, size);
267}
268
269static void stm32_adfsdm_pcm_free(struct snd_pcm *pcm)
270{
271 struct snd_pcm_substream *substream;
272 struct snd_soc_pcm_runtime *rtd;
273 struct stm32_adfsdm_priv *priv;
274
275 substream = pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream;
276 if (substream) {
277 rtd = substream->private_data;
278 priv = snd_soc_dai_get_drvdata(rtd->cpu_dai);
279
280 snd_pcm_lib_preallocate_free_for_all(pcm);
281 }
282}
283
284static struct snd_soc_platform_driver stm32_adfsdm_soc_platform = {
285 .ops = &stm32_adfsdm_pcm_ops,
286 .pcm_new = stm32_adfsdm_pcm_new,
287 .pcm_free = stm32_adfsdm_pcm_free,
288};
289
290static const struct of_device_id stm32_adfsdm_of_match[] = {
291 {.compatible = "st,stm32h7-dfsdm-dai"},
292 {}
293};
294MODULE_DEVICE_TABLE(of, stm32_adfsdm_of_match);
295
296static int stm32_adfsdm_probe(struct platform_device *pdev)
297{
298 struct stm32_adfsdm_priv *priv;
299 int ret;
300
301 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
302 if (!priv)
303 return -ENOMEM;
304
305 priv->dev = &pdev->dev;
306 priv->dai_drv = stm32_adfsdm_dai;
307
308 dev_set_drvdata(&pdev->dev, priv);
309
310 ret = devm_snd_soc_register_component(&pdev->dev,
311 &stm32_adfsdm_dai_component,
312 &priv->dai_drv, 1);
313 if (ret < 0)
314 return ret;
315
316 /* Associate iio channel */
317 priv->iio_ch = devm_iio_channel_get_all(&pdev->dev);
318 if (IS_ERR(priv->iio_ch))
319 return PTR_ERR(priv->iio_ch);
320
321 priv->iio_cb = iio_channel_get_all_cb(&pdev->dev, NULL, NULL);
322 if (IS_ERR(priv->iio_cb))
323 return PTR_ERR(priv->iio_cb);
324
325 ret = devm_snd_soc_register_platform(&pdev->dev,
326 &stm32_adfsdm_soc_platform);
327 if (ret < 0)
328 dev_err(&pdev->dev, "%s: Failed to register PCM platform\n",
329 __func__);
330
331 return ret;
332}
333
334static struct platform_driver stm32_adfsdm_driver = {
335 .driver = {
336 .name = STM32_ADFSDM_DRV_NAME,
337 .of_match_table = stm32_adfsdm_of_match,
338 },
339 .probe = stm32_adfsdm_probe,
340};
341
342module_platform_driver(stm32_adfsdm_driver);
343
344MODULE_DESCRIPTION("stm32 DFSDM DAI driver");
345MODULE_AUTHOR("Arnaud Pouliquen <arnaud.pouliquen@st.com>");
346MODULE_LICENSE("GPL v2");
347MODULE_ALIAS("platform:" STM32_ADFSDM_DRV_NAME);
diff --git a/sound/soc/ux500/mop500.c b/sound/soc/ux500/mop500.c
index 070a6880980e..c60a57797640 100644
--- a/sound/soc/ux500/mop500.c
+++ b/sound/soc/ux500/mop500.c
@@ -163,3 +163,7 @@ static struct platform_driver snd_soc_mop500_driver = {
163}; 163};
164 164
165module_platform_driver(snd_soc_mop500_driver); 165module_platform_driver(snd_soc_mop500_driver);
166
167MODULE_LICENSE("GPL v2");
168MODULE_DESCRIPTION("ASoC MOP500 board driver");
169MODULE_AUTHOR("Ola Lilja");
diff --git a/sound/soc/ux500/ux500_pcm.c b/sound/soc/ux500/ux500_pcm.c
index f12c01dddc8d..d35ba7700f46 100644
--- a/sound/soc/ux500/ux500_pcm.c
+++ b/sound/soc/ux500/ux500_pcm.c
@@ -165,3 +165,8 @@ int ux500_pcm_unregister_platform(struct platform_device *pdev)
165 return 0; 165 return 0;
166} 166}
167EXPORT_SYMBOL_GPL(ux500_pcm_unregister_platform); 167EXPORT_SYMBOL_GPL(ux500_pcm_unregister_platform);
168
169MODULE_AUTHOR("Ola Lilja");
170MODULE_AUTHOR("Roger Nilsson");
171MODULE_DESCRIPTION("ASoC UX500 driver");
172MODULE_LICENSE("GPL v2");