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authorLinus Torvalds <torvalds@linux-foundation.org>2017-11-15 14:36:08 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2017-11-15 14:36:08 -0500
commit892204e06cb9e89fbc4b299a678f9ca358e97cac (patch)
tree6d44375ae5ca917e4d0a39c08631b312412135da
parentc9b012e5f4a1d01dfa8abc6318211a67ba7d5db2 (diff)
parente0c5f36b2a638fc3298200c385af7f196d3b5cd4 (diff)
Merge tag 'mips_4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/jhogan/mips
Pull MIPS updates from James Hogan: "These are the main MIPS changes for 4.15. Fixes: - ralink: Fix MT7620 PCI build issues (4.5) - Disable cmpxchg64() and HAVE_VIRT_CPU_ACCOUNTING_GEN for 32-bit SMP (4.1) - Fix MIPS64 FP save/restore on 32-bit kernels (4.0) - ptrace: Pick up ptrace/seccomp changed syscall numbers (3.19) - ralink: Fix MT7628 pinmux (3.19) - BCM47XX: Fix LED inversion on WRT54GSv1 (3.17) - Fix n32 core dumping as o32 since regset support (3.13) - ralink: Drop obsolete USB_ARCH_HAS_HCD select Build system: - Default to "generic" (multiplatform) system type instead of IP22 - Use generic little endian MIPS32 r2 configuration as default defconfig instead of ip22_defconfig FPU emulation: - Fix exception generation for certain R6 FPU instructions SMP: - Allow __cpu_number_map to be larger than NR_CPUS for sparse CPU id spaces Miscellaneous: - Add iomem resource for kernel bss section for kexec/kdump - Atomics: Nudge writes on bit unlock - DT files: Standardise "ok" -> "okay" Minor cleanups: - Define virt_to_pfn() - Make thread_saved_pc static - Simplify 32-bit sign extension in __read_64bit_c0_split() - DMA: Use vma_pages() helper - FPU emulation: Replace unsigned with unsigned int - MM: Removed unused lastpfn - Alchemy: Make clk_ops const - Lasat: Use setup_timer() helper - ralink: Use BIT() in MT7620 PCI driver Platform support: BMIPS: - Enable HARDIRQS_SW_RESEND Broadcom BCM63XX: - Add clkdev lookup support - Update clk driver, UART driver, DTs to handle named refclk from DTs - Split apart various clocks to more closely match hardware - Add ethernet clocks Cavium Octeon: - Remove usage of cvmx_wait() in favour of __delay() ImgTec Pistachio: - DT: Drop deprecated dwmmc num-slots property Ingenic JZ4780: - Add NFS root to Ci20 defconfig - Add watchdog to Ci20 DT & defconfig, and allow building of watchdog driver with this SoC Generic (multiplatform): - Migrate xilfpga (MIPSfpga) platform to the generic platform Lantiq xway: - Fix ASC0/ASC1 clocks" * tag 'mips_4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/jhogan/mips: (46 commits) MIPS: Add iomem resource for kernel bss section. MIPS: cmpxchg64() and HAVE_VIRT_CPU_ACCOUNTING_GEN don't work for 32-bit SMP MIPS: BMIPS: Enable HARDIRQS_SW_RESEND MIPS: pci: Make use of the BIT() macro inside the mt7620 driver MIPS: pci: Remove KERN_WARN instance inside the mt7620 driver MIPS: pci: Remove duplicate define in mt7620 driver MIPS: ralink: Fix typo in mt7628 pinmux function MIPS: ralink: Fix MT7628 pinmux MIPS: Fix odd fp register warnings with MIPS64r2 watchdog: jz4780: Allow selection of jz4740-wdt driver MIPS/ptrace: Update syscall nr on register changes MIPS/ptrace: Pick up ptrace/seccomp changed syscalls MIPS: Fix an n32 core file generation regset support regression MIPS: Fix MIPS64 FP save/restore on 32-bit kernels MIPS: page.h: Define virt_to_pfn() MIPS: Xilfpga: Switch to using generic defconfigs MIPS: generic: Add support for MIPSfpga MIPS: Set defconfig target to a generic system for 32r2el MIPS: Kconfig: Set default MIPS system type as generic MIPS: DTS: Remove num-slots from Pistachio SoC ...
Diffstat
-rw-r--r--Documentation/devicetree/bindings/serial/brcm,bcm6345-uart.txt6
-rw-r--r--arch/mips/Kbuild.platforms1
-rw-r--r--arch/mips/Kconfig42
-rw-r--r--arch/mips/Makefile6
-rw-r--r--arch/mips/alchemy/common/clock.c10
-rw-r--r--arch/mips/bcm47xx/leds.c2
-rw-r--r--arch/mips/bcm63xx/clk.c242
-rw-r--r--arch/mips/boot/dts/brcm/bcm3368.dtsi2
-rw-r--r--arch/mips/boot/dts/brcm/bcm63268-comtrend-vr-3032u.dts2
-rw-r--r--arch/mips/boot/dts/brcm/bcm63268.dtsi2
-rw-r--r--arch/mips/boot/dts/brcm/bcm6328.dtsi2
-rw-r--r--arch/mips/boot/dts/brcm/bcm6358-neufbox4-sercomm.dts2
-rw-r--r--arch/mips/boot/dts/brcm/bcm6358.dtsi2
-rw-r--r--arch/mips/boot/dts/brcm/bcm6362.dtsi2
-rw-r--r--arch/mips/boot/dts/brcm/bcm6368.dtsi2
-rw-r--r--arch/mips/boot/dts/img/pistachio.dtsi1
-rw-r--r--arch/mips/boot/dts/ingenic/jz4780.dtsi5
-rw-r--r--arch/mips/boot/dts/ralink/rt3052_eval.dts2
-rw-r--r--arch/mips/boot/dts/xilfpga/Makefile2
-rw-r--r--arch/mips/boot/dts/xilfpga/nexys4ddr.dts8
-rw-r--r--arch/mips/cavium-octeon/executive/cvmx-helper.c2
-rw-r--r--arch/mips/cavium-octeon/executive/cvmx-spi.c10
-rw-r--r--arch/mips/configs/ci20_defconfig7
-rw-r--r--arch/mips/configs/generic/board-xilfpga.config22
-rw-r--r--arch/mips/configs/ip22_defconfig1
-rw-r--r--arch/mips/configs/xilfpga_defconfig75
-rw-r--r--arch/mips/generic/Kconfig6
-rw-r--r--arch/mips/generic/board-xilfpga.its.S22
-rw-r--r--arch/mips/include/asm/asmmacro.h16
-rw-r--r--arch/mips/include/asm/bitops.h1
-rw-r--r--arch/mips/include/asm/cmpxchg.h2
-rw-r--r--arch/mips/include/asm/mipsregs.h14
-rw-r--r--arch/mips/include/asm/octeon/cvmx-fpa.h4
-rw-r--r--arch/mips/include/asm/octeon/cvmx.h15
-rw-r--r--arch/mips/include/asm/page.h4
-rw-r--r--arch/mips/include/asm/processor.h2
-rw-r--r--arch/mips/include/asm/smp.h2
-rw-r--r--arch/mips/include/asm/syscall.h29
-rw-r--r--arch/mips/kernel/process.c2
-rw-r--r--arch/mips/kernel/ptrace.c41
-rw-r--r--arch/mips/kernel/ptrace32.c7
-rw-r--r--arch/mips/kernel/r4k_fpu.S20
-rw-r--r--arch/mips/kernel/setup.c4
-rw-r--r--arch/mips/kernel/smp.c2
-rw-r--r--arch/mips/lantiq/xway/sysctrl.c6
-rw-r--r--arch/mips/lasat/picvue_proc.c3
-rw-r--r--arch/mips/math-emu/cp1emu.c46
-rw-r--r--arch/mips/math-emu/dp_maddf.c8
-rw-r--r--arch/mips/math-emu/dp_mul.c8
-rw-r--r--arch/mips/math-emu/dp_sqrt.c4
-rw-r--r--arch/mips/math-emu/ieee754.h15
-rw-r--r--arch/mips/math-emu/ieee754int.h6
-rw-r--r--arch/mips/math-emu/ieee754sp.c4
-rw-r--r--arch/mips/math-emu/ieee754sp.h2
-rw-r--r--arch/mips/math-emu/sp_div.c4
-rw-r--r--arch/mips/math-emu/sp_fint.c2
-rw-r--r--arch/mips/math-emu/sp_maddf.c6
-rw-r--r--arch/mips/math-emu/sp_mul.c10
-rw-r--r--arch/mips/mm/dma-default.c2
-rw-r--r--arch/mips/mm/init.c4
-rw-r--r--arch/mips/pci/pci-mt7620.c15
-rw-r--r--arch/mips/pci/pcie-octeon.c12
-rw-r--r--arch/mips/ralink/Kconfig1
-rw-r--r--arch/mips/ralink/mt7620.c4
-rw-r--r--arch/mips/xilfpga/Kconfig10
-rw-r--r--arch/mips/xilfpga/Makefile7
-rw-r--r--arch/mips/xilfpga/Platform3
-rw-r--r--arch/mips/xilfpga/init.c44
-rw-r--r--arch/mips/xilfpga/intc.c22
-rw-r--r--arch/mips/xilfpga/time.c41
-rw-r--r--drivers/tty/serial/bcm63xx_uart.c6
-rw-r--r--drivers/watchdog/Kconfig2
72 files changed, 514 insertions, 436 deletions
diff --git a/Documentation/devicetree/bindings/serial/brcm,bcm6345-uart.txt b/Documentation/devicetree/bindings/serial/brcm,bcm6345-uart.txt
index 5c52e5eef16d..8b2b0460259a 100644
--- a/Documentation/devicetree/bindings/serial/brcm,bcm6345-uart.txt
+++ b/Documentation/devicetree/bindings/serial/brcm,bcm6345-uart.txt
@@ -11,6 +11,11 @@ Required properties:
11- clocks: Clock driving the hardware; used to figure out the baud rate 11- clocks: Clock driving the hardware; used to figure out the baud rate
12 divisor. 12 divisor.
13 13
14
15Optional properties:
16
17- clock-names: Should be "refclk".
18
14Example: 19Example:
15 20
16 uart0: serial@14e00520 { 21 uart0: serial@14e00520 {
@@ -19,6 +24,7 @@ Example:
19 interrupt-parent = <&periph_intc>; 24 interrupt-parent = <&periph_intc>;
20 interrupts = <2>; 25 interrupts = <2>;
21 clocks = <&periph_clk>; 26 clocks = <&periph_clk>;
27 clock-names = "refclk";
22 }; 28 };
23 29
24 clocks { 30 clocks {
diff --git a/arch/mips/Kbuild.platforms b/arch/mips/Kbuild.platforms
index f5f1bdb292de..ac7ad54f984f 100644
--- a/arch/mips/Kbuild.platforms
+++ b/arch/mips/Kbuild.platforms
@@ -34,7 +34,6 @@ platforms += sibyte
34platforms += sni 34platforms += sni
35platforms += txx9 35platforms += txx9
36platforms += vr41xx 36platforms += vr41xx
37platforms += xilfpga
38 37
39# include the platform specific files 38# include the platform specific files
40include $(patsubst %, $(srctree)/arch/mips/%/Platform, $(platforms)) 39include $(patsubst %, $(srctree)/arch/mips/%/Platform, $(platforms))
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 5d3284d20678..350a990fc719 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -65,7 +65,7 @@ config MIPS
65 select HAVE_PERF_EVENTS 65 select HAVE_PERF_EVENTS
66 select HAVE_REGS_AND_STACK_ACCESS_API 66 select HAVE_REGS_AND_STACK_ACCESS_API
67 select HAVE_SYSCALL_TRACEPOINTS 67 select HAVE_SYSCALL_TRACEPOINTS
68 select HAVE_VIRT_CPU_ACCOUNTING_GEN 68 select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
69 select IRQ_FORCED_THREADING 69 select IRQ_FORCED_THREADING
70 select MODULES_USE_ELF_RELA if MODULES && 64BIT 70 select MODULES_USE_ELF_RELA if MODULES && 64BIT
71 select MODULES_USE_ELF_REL if MODULES 71 select MODULES_USE_ELF_REL if MODULES
@@ -78,7 +78,7 @@ menu "Machine selection"
78 78
79choice 79choice
80 prompt "System type" 80 prompt "System type"
81 default SGI_IP22 81 default MIPS_GENERIC
82 82
83config MIPS_GENERIC 83config MIPS_GENERIC
84 bool "Generic board-agnostic MIPS kernel" 84 bool "Generic board-agnostic MIPS kernel"
@@ -233,6 +233,7 @@ config BMIPS_GENERIC
233 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 233 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
234 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN 234 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
235 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 235 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
236 select HARDIRQS_SW_RESEND
236 help 237 help
237 Build a generic DT-based kernel image that boots on select 238 Build a generic DT-based kernel image that boots on select
238 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top 239 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
@@ -276,6 +277,7 @@ config BCM63XX
276 select GPIOLIB 277 select GPIOLIB
277 select HAVE_CLK 278 select HAVE_CLK
278 select MIPS_L1_CACHE_SHIFT_4 279 select MIPS_L1_CACHE_SHIFT_4
280 select CLKDEV_LOOKUP
279 help 281 help
280 Support for BCM63XX based boards 282 Support for BCM63XX based boards
281 283
@@ -468,29 +470,6 @@ config MACH_PISTACHIO
468 help 470 help
469 This enables support for the IMG Pistachio SoC platform. 471 This enables support for the IMG Pistachio SoC platform.
470 472
471config MACH_XILFPGA
472 bool "MIPSfpga Xilinx based boards"
473 select BOOT_ELF32
474 select BOOT_RAW
475 select BUILTIN_DTB
476 select CEVT_R4K
477 select COMMON_CLK
478 select CSRC_R4K
479 select GPIOLIB
480 select IRQ_MIPS_CPU
481 select LIBFDT
482 select MIPS_CPU_SCACHE
483 select SYS_HAS_EARLY_PRINTK
484 select SYS_HAS_CPU_MIPS32_R2
485 select SYS_SUPPORTS_32BIT_KERNEL
486 select SYS_SUPPORTS_LITTLE_ENDIAN
487 select SYS_SUPPORTS_ZBOOT_UART16550
488 select USE_OF
489 select USE_GENERIC_EARLY_PRINTK_8250
490 select XILINX_INTC
491 help
492 This enables support for the IMG University Program MIPSfpga platform.
493
494config MIPS_MALTA 473config MIPS_MALTA
495 bool "MIPS Malta board" 474 bool "MIPS Malta board"
496 select ARCH_MAY_HAVE_PC_FDC 475 select ARCH_MAY_HAVE_PC_FDC
@@ -916,7 +895,8 @@ config CAVIUM_OCTEON_SOC
916 select USE_OF 895 select USE_OF
917 select ARCH_SPARSEMEM_ENABLE 896 select ARCH_SPARSEMEM_ENABLE
918 select SYS_SUPPORTS_SMP 897 select SYS_SUPPORTS_SMP
919 select NR_CPUS_DEFAULT_16 898 select NR_CPUS_DEFAULT_64
899 select MIPS_NR_CPU_NR_MAP_1024
920 select BUILTIN_DTB 900 select BUILTIN_DTB
921 select MTD_COMPLEX_MAPPINGS 901 select MTD_COMPLEX_MAPPINGS
922 select SYS_SUPPORTS_RELOCATABLE 902 select SYS_SUPPORTS_RELOCATABLE
@@ -1034,7 +1014,6 @@ source "arch/mips/loongson32/Kconfig"
1034source "arch/mips/loongson64/Kconfig" 1014source "arch/mips/loongson64/Kconfig"
1035source "arch/mips/netlogic/Kconfig" 1015source "arch/mips/netlogic/Kconfig"
1036source "arch/mips/paravirt/Kconfig" 1016source "arch/mips/paravirt/Kconfig"
1037source "arch/mips/xilfpga/Kconfig"
1038 1017
1039endmenu 1018endmenu
1040 1019
@@ -2726,6 +2705,15 @@ config NR_CPUS
2726config MIPS_PERF_SHARED_TC_COUNTERS 2705config MIPS_PERF_SHARED_TC_COUNTERS
2727 bool 2706 bool
2728 2707
2708config MIPS_NR_CPU_NR_MAP_1024
2709 bool
2710
2711config MIPS_NR_CPU_NR_MAP
2712 int
2713 depends on SMP
2714 default 1024 if MIPS_NR_CPU_NR_MAP_1024
2715 default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
2716
2729# 2717#
2730# Timer Interrupt Frequency Configuration 2718# Timer Interrupt Frequency Configuration
2731# 2719#
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index a96d97a806c9..9f6a26d72f9f 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -15,7 +15,7 @@
15archscripts: scripts_basic 15archscripts: scripts_basic
16 $(Q)$(MAKE) $(build)=arch/mips/boot/tools relocs 16 $(Q)$(MAKE) $(build)=arch/mips/boot/tools relocs
17 17
18KBUILD_DEFCONFIG := ip22_defconfig 18KBUILD_DEFCONFIG := 32r2el_defconfig
19 19
20# 20#
21# Select the object file format to substitute into the linker script. 21# Select the object file format to substitute into the linker script.
@@ -544,3 +544,7 @@ sead3_defconfig:
544.PHONY: sead3micro_defconfig 544.PHONY: sead3micro_defconfig
545sead3micro_defconfig: 545sead3micro_defconfig:
546 $(Q)$(MAKE) -f $(srctree)/Makefile micro32r2el_defconfig BOARDS=sead-3 546 $(Q)$(MAKE) -f $(srctree)/Makefile micro32r2el_defconfig BOARDS=sead-3
547
548.PHONY: xilfpga_defconfig
549xilfpga_defconfig:
550 $(Q)$(MAKE) -f $(srctree)/Makefile 32r2el_defconfig BOARDS=xilfpga
diff --git a/arch/mips/alchemy/common/clock.c b/arch/mips/alchemy/common/clock.c
index a83c7b7e2eb1..6b6f6851df92 100644
--- a/arch/mips/alchemy/common/clock.c
+++ b/arch/mips/alchemy/common/clock.c
@@ -143,7 +143,7 @@ void __init alchemy_set_lpj(void)
143 preset_lpj /= 2 * HZ; 143 preset_lpj /= 2 * HZ;
144} 144}
145 145
146static struct clk_ops alchemy_clkops_cpu = { 146static const struct clk_ops alchemy_clkops_cpu = {
147 .recalc_rate = alchemy_clk_cpu_recalc, 147 .recalc_rate = alchemy_clk_cpu_recalc,
148}; 148};
149 149
@@ -224,7 +224,7 @@ static long alchemy_clk_aux_roundr(struct clk_hw *hw,
224 return (*parent_rate) * mult; 224 return (*parent_rate) * mult;
225} 225}
226 226
227static struct clk_ops alchemy_clkops_aux = { 227static const struct clk_ops alchemy_clkops_aux = {
228 .recalc_rate = alchemy_clk_aux_recalc, 228 .recalc_rate = alchemy_clk_aux_recalc,
229 .set_rate = alchemy_clk_aux_setr, 229 .set_rate = alchemy_clk_aux_setr,
230 .round_rate = alchemy_clk_aux_roundr, 230 .round_rate = alchemy_clk_aux_roundr,
@@ -576,7 +576,7 @@ static int alchemy_clk_fgv1_detr(struct clk_hw *hw,
576} 576}
577 577
578/* Au1000, Au1100, Au15x0, Au12x0 */ 578/* Au1000, Au1100, Au15x0, Au12x0 */
579static struct clk_ops alchemy_clkops_fgenv1 = { 579static const struct clk_ops alchemy_clkops_fgenv1 = {
580 .recalc_rate = alchemy_clk_fgv1_recalc, 580 .recalc_rate = alchemy_clk_fgv1_recalc,
581 .determine_rate = alchemy_clk_fgv1_detr, 581 .determine_rate = alchemy_clk_fgv1_detr,
582 .set_rate = alchemy_clk_fgv1_setr, 582 .set_rate = alchemy_clk_fgv1_setr,
@@ -717,7 +717,7 @@ static int alchemy_clk_fgv2_detr(struct clk_hw *hw,
717} 717}
718 718
719/* Au1300 larger input mux, no separate disable bit, flexible divider */ 719/* Au1300 larger input mux, no separate disable bit, flexible divider */
720static struct clk_ops alchemy_clkops_fgenv2 = { 720static const struct clk_ops alchemy_clkops_fgenv2 = {
721 .recalc_rate = alchemy_clk_fgv2_recalc, 721 .recalc_rate = alchemy_clk_fgv2_recalc,
722 .determine_rate = alchemy_clk_fgv2_detr, 722 .determine_rate = alchemy_clk_fgv2_detr,
723 .set_rate = alchemy_clk_fgv2_setr, 723 .set_rate = alchemy_clk_fgv2_setr,
@@ -925,7 +925,7 @@ static int alchemy_clk_csrc_detr(struct clk_hw *hw,
925 return alchemy_clk_fgcs_detr(hw, req, scale, 4); 925 return alchemy_clk_fgcs_detr(hw, req, scale, 4);
926} 926}
927 927
928static struct clk_ops alchemy_clkops_csrc = { 928static const struct clk_ops alchemy_clkops_csrc = {
929 .recalc_rate = alchemy_clk_csrc_recalc, 929 .recalc_rate = alchemy_clk_csrc_recalc,
930 .determine_rate = alchemy_clk_csrc_detr, 930 .determine_rate = alchemy_clk_csrc_detr,
931 .set_rate = alchemy_clk_csrc_setr, 931 .set_rate = alchemy_clk_csrc_setr,
diff --git a/arch/mips/bcm47xx/leds.c b/arch/mips/bcm47xx/leds.c
index d4f2407a42c6..8307a8a02667 100644
--- a/arch/mips/bcm47xx/leds.c
+++ b/arch/mips/bcm47xx/leds.c
@@ -331,7 +331,7 @@ bcm47xx_leds_linksys_wrt54g3gv2[] __initconst = {
331/* Verified on: WRT54GS V1.0 */ 331/* Verified on: WRT54GS V1.0 */
332static const struct gpio_led 332static const struct gpio_led
333bcm47xx_leds_linksys_wrt54g_type_0101[] __initconst = { 333bcm47xx_leds_linksys_wrt54g_type_0101[] __initconst = {
334 BCM47XX_GPIO_LED(0, "green", "wlan", 0, LEDS_GPIO_DEFSTATE_OFF), 334 BCM47XX_GPIO_LED(0, "green", "wlan", 1, LEDS_GPIO_DEFSTATE_OFF),
335 BCM47XX_GPIO_LED(1, "green", "power", 0, LEDS_GPIO_DEFSTATE_ON), 335 BCM47XX_GPIO_LED(1, "green", "power", 0, LEDS_GPIO_DEFSTATE_ON),
336 BCM47XX_GPIO_LED(7, "green", "dmz", 1, LEDS_GPIO_DEFSTATE_OFF), 336 BCM47XX_GPIO_LED(7, "green", "dmz", 1, LEDS_GPIO_DEFSTATE_OFF),
337}; 337};
diff --git a/arch/mips/bcm63xx/clk.c b/arch/mips/bcm63xx/clk.c
index 19577f771c1f..164115944a7f 100644
--- a/arch/mips/bcm63xx/clk.c
+++ b/arch/mips/bcm63xx/clk.c
@@ -11,6 +11,7 @@
11#include <linux/mutex.h> 11#include <linux/mutex.h>
12#include <linux/err.h> 12#include <linux/err.h>
13#include <linux/clk.h> 13#include <linux/clk.h>
14#include <linux/clkdev.h>
14#include <linux/delay.h> 15#include <linux/delay.h>
15#include <bcm63xx_cpu.h> 16#include <bcm63xx_cpu.h>
16#include <bcm63xx_io.h> 17#include <bcm63xx_io.h>
@@ -121,21 +122,56 @@ static struct clk clk_ephy = {
121}; 122};
122 123
123/* 124/*
125 * Ethernet switch SAR clock
126 */
127static void swpkt_sar_set(struct clk *clk, int enable)
128{
129 if (BCMCPU_IS_6368())
130 bcm_hwclock_set(CKCTL_6368_SWPKT_SAR_EN, enable);
131 else
132 return;
133}
134
135static struct clk clk_swpkt_sar = {
136 .set = swpkt_sar_set,
137};
138
139/*
140 * Ethernet switch USB clock
141 */
142static void swpkt_usb_set(struct clk *clk, int enable)
143{
144 if (BCMCPU_IS_6368())
145 bcm_hwclock_set(CKCTL_6368_SWPKT_USB_EN, enable);
146 else
147 return;
148}
149
150static struct clk clk_swpkt_usb = {
151 .set = swpkt_usb_set,
152};
153
154/*
124 * Ethernet switch clock 155 * Ethernet switch clock
125 */ 156 */
126static void enetsw_set(struct clk *clk, int enable) 157static void enetsw_set(struct clk *clk, int enable)
127{ 158{
128 if (BCMCPU_IS_6328()) 159 if (BCMCPU_IS_6328()) {
129 bcm_hwclock_set(CKCTL_6328_ROBOSW_EN, enable); 160 bcm_hwclock_set(CKCTL_6328_ROBOSW_EN, enable);
130 else if (BCMCPU_IS_6362()) 161 } else if (BCMCPU_IS_6362()) {
131 bcm_hwclock_set(CKCTL_6362_ROBOSW_EN, enable); 162 bcm_hwclock_set(CKCTL_6362_ROBOSW_EN, enable);
132 else if (BCMCPU_IS_6368()) 163 } else if (BCMCPU_IS_6368()) {
133 bcm_hwclock_set(CKCTL_6368_ROBOSW_EN | 164 if (enable) {
134 CKCTL_6368_SWPKT_USB_EN | 165 clk_enable_unlocked(&clk_swpkt_sar);
135 CKCTL_6368_SWPKT_SAR_EN, 166 clk_enable_unlocked(&clk_swpkt_usb);
136 enable); 167 } else {
137 else 168 clk_disable_unlocked(&clk_swpkt_usb);
169 clk_disable_unlocked(&clk_swpkt_sar);
170 }
171 bcm_hwclock_set(CKCTL_6368_ROBOSW_EN, enable);
172 } else {
138 return; 173 return;
174 }
139 175
140 if (enable) { 176 if (enable) {
141 /* reset switch core afer clock change */ 177 /* reset switch core afer clock change */
@@ -247,6 +283,10 @@ static struct clk clk_hsspi = {
247 .set = hsspi_set, 283 .set = hsspi_set,
248}; 284};
249 285
286/*
287 * HSSPI PLL
288 */
289static struct clk clk_hsspi_pll;
250 290
251/* 291/*
252 * XTM clock 292 * XTM clock
@@ -256,8 +296,12 @@ static void xtm_set(struct clk *clk, int enable)
256 if (!BCMCPU_IS_6368()) 296 if (!BCMCPU_IS_6368())
257 return; 297 return;
258 298
259 bcm_hwclock_set(CKCTL_6368_SAR_EN | 299 if (enable)
260 CKCTL_6368_SWPKT_SAR_EN, enable); 300 clk_enable_unlocked(&clk_swpkt_sar);
301 else
302 clk_disable_unlocked(&clk_swpkt_sar);
303
304 bcm_hwclock_set(CKCTL_6368_SAR_EN, enable);
261 305
262 if (enable) { 306 if (enable) {
263 /* reset sar core afer clock change */ 307 /* reset sar core afer clock change */
@@ -359,44 +403,128 @@ long clk_round_rate(struct clk *clk, unsigned long rate)
359} 403}
360EXPORT_SYMBOL_GPL(clk_round_rate); 404EXPORT_SYMBOL_GPL(clk_round_rate);
361 405
362struct clk *clk_get(struct device *dev, const char *id) 406static struct clk_lookup bcm3368_clks[] = {
363{ 407 /* fixed rate clocks */
364 if (!strcmp(id, "enet0")) 408 CLKDEV_INIT(NULL, "periph", &clk_periph),
365 return &clk_enet0; 409 CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
366 if (!strcmp(id, "enet1")) 410 CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
367 return &clk_enet1; 411 /* gated clocks */
368 if (!strcmp(id, "enetsw")) 412 CLKDEV_INIT(NULL, "enet0", &clk_enet0),
369 return &clk_enetsw; 413 CLKDEV_INIT(NULL, "enet1", &clk_enet1),
370 if (!strcmp(id, "ephy")) 414 CLKDEV_INIT(NULL, "ephy", &clk_ephy),
371 return &clk_ephy; 415 CLKDEV_INIT(NULL, "usbh", &clk_usbh),
372 if (!strcmp(id, "usbh")) 416 CLKDEV_INIT(NULL, "usbd", &clk_usbd),
373 return &clk_usbh; 417 CLKDEV_INIT(NULL, "spi", &clk_spi),
374 if (!strcmp(id, "usbd")) 418 CLKDEV_INIT(NULL, "pcm", &clk_pcm),
375 return &clk_usbd; 419 CLKDEV_INIT("bcm63xx_enet.0", "enet", &clk_enet0),
376 if (!strcmp(id, "spi")) 420 CLKDEV_INIT("bcm63xx_enet.1", "enet", &clk_enet1),
377 return &clk_spi; 421};
378 if (!strcmp(id, "hsspi"))
379 return &clk_hsspi;
380 if (!strcmp(id, "xtm"))
381 return &clk_xtm;
382 if (!strcmp(id, "periph"))
383 return &clk_periph;
384 if ((BCMCPU_IS_3368() || BCMCPU_IS_6358()) && !strcmp(id, "pcm"))
385 return &clk_pcm;
386 if ((BCMCPU_IS_6362() || BCMCPU_IS_6368()) && !strcmp(id, "ipsec"))
387 return &clk_ipsec;
388 if ((BCMCPU_IS_6328() || BCMCPU_IS_6362()) && !strcmp(id, "pcie"))
389 return &clk_pcie;
390 return ERR_PTR(-ENOENT);
391}
392 422
393EXPORT_SYMBOL(clk_get); 423static struct clk_lookup bcm6328_clks[] = {
424 /* fixed rate clocks */
425 CLKDEV_INIT(NULL, "periph", &clk_periph),
426 CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
427 CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
428 CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
429 /* gated clocks */
430 CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
431 CLKDEV_INIT(NULL, "usbh", &clk_usbh),
432 CLKDEV_INIT(NULL, "usbd", &clk_usbd),
433 CLKDEV_INIT(NULL, "hsspi", &clk_hsspi),
434 CLKDEV_INIT(NULL, "pcie", &clk_pcie),
435};
394 436
395void clk_put(struct clk *clk) 437static struct clk_lookup bcm6338_clks[] = {
396{ 438 /* fixed rate clocks */
397} 439 CLKDEV_INIT(NULL, "periph", &clk_periph),
440 CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
441 /* gated clocks */
442 CLKDEV_INIT(NULL, "enet0", &clk_enet0),
443 CLKDEV_INIT(NULL, "enet1", &clk_enet1),
444 CLKDEV_INIT(NULL, "ephy", &clk_ephy),
445 CLKDEV_INIT(NULL, "usbh", &clk_usbh),
446 CLKDEV_INIT(NULL, "usbd", &clk_usbd),
447 CLKDEV_INIT(NULL, "spi", &clk_spi),
448 CLKDEV_INIT("bcm63xx_enet.0", "enet", &clk_enet_misc),
449};
398 450
399EXPORT_SYMBOL(clk_put); 451static struct clk_lookup bcm6345_clks[] = {
452 /* fixed rate clocks */
453 CLKDEV_INIT(NULL, "periph", &clk_periph),
454 CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
455 /* gated clocks */
456 CLKDEV_INIT(NULL, "enet0", &clk_enet0),
457 CLKDEV_INIT(NULL, "enet1", &clk_enet1),
458 CLKDEV_INIT(NULL, "ephy", &clk_ephy),
459 CLKDEV_INIT(NULL, "usbh", &clk_usbh),
460 CLKDEV_INIT(NULL, "usbd", &clk_usbd),
461 CLKDEV_INIT(NULL, "spi", &clk_spi),
462 CLKDEV_INIT("bcm63xx_enet.0", "enet", &clk_enet_misc),
463};
464
465static struct clk_lookup bcm6348_clks[] = {
466 /* fixed rate clocks */
467 CLKDEV_INIT(NULL, "periph", &clk_periph),
468 CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
469 /* gated clocks */
470 CLKDEV_INIT(NULL, "enet0", &clk_enet0),
471 CLKDEV_INIT(NULL, "enet1", &clk_enet1),
472 CLKDEV_INIT(NULL, "ephy", &clk_ephy),
473 CLKDEV_INIT(NULL, "usbh", &clk_usbh),
474 CLKDEV_INIT(NULL, "usbd", &clk_usbd),
475 CLKDEV_INIT(NULL, "spi", &clk_spi),
476 CLKDEV_INIT("bcm63xx_enet.0", "enet", &clk_enet_misc),
477 CLKDEV_INIT("bcm63xx_enet.1", "enet", &clk_enet_misc),
478};
479
480static struct clk_lookup bcm6358_clks[] = {
481 /* fixed rate clocks */
482 CLKDEV_INIT(NULL, "periph", &clk_periph),
483 CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
484 CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
485 /* gated clocks */
486 CLKDEV_INIT(NULL, "enet0", &clk_enet0),
487 CLKDEV_INIT(NULL, "enet1", &clk_enet1),
488 CLKDEV_INIT(NULL, "ephy", &clk_ephy),
489 CLKDEV_INIT(NULL, "usbh", &clk_usbh),
490 CLKDEV_INIT(NULL, "usbd", &clk_usbd),
491 CLKDEV_INIT(NULL, "spi", &clk_spi),
492 CLKDEV_INIT(NULL, "pcm", &clk_pcm),
493 CLKDEV_INIT(NULL, "swpkt_sar", &clk_swpkt_sar),
494 CLKDEV_INIT(NULL, "swpkt_usb", &clk_swpkt_usb),
495 CLKDEV_INIT("bcm63xx_enet.0", "enet", &clk_enet0),
496 CLKDEV_INIT("bcm63xx_enet.1", "enet", &clk_enet1),
497};
498
499static struct clk_lookup bcm6362_clks[] = {
500 /* fixed rate clocks */
501 CLKDEV_INIT(NULL, "periph", &clk_periph),
502 CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
503 CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
504 CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
505 /* gated clocks */
506 CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
507 CLKDEV_INIT(NULL, "usbh", &clk_usbh),
508 CLKDEV_INIT(NULL, "usbd", &clk_usbd),
509 CLKDEV_INIT(NULL, "spi", &clk_spi),
510 CLKDEV_INIT(NULL, "hsspi", &clk_hsspi),
511 CLKDEV_INIT(NULL, "pcie", &clk_pcie),
512 CLKDEV_INIT(NULL, "ipsec", &clk_ipsec),
513};
514
515static struct clk_lookup bcm6368_clks[] = {
516 /* fixed rate clocks */
517 CLKDEV_INIT(NULL, "periph", &clk_periph),
518 CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
519 CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
520 /* gated clocks */
521 CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
522 CLKDEV_INIT(NULL, "usbh", &clk_usbh),
523 CLKDEV_INIT(NULL, "usbd", &clk_usbd),
524 CLKDEV_INIT(NULL, "spi", &clk_spi),
525 CLKDEV_INIT(NULL, "xtm", &clk_xtm),
526 CLKDEV_INIT(NULL, "ipsec", &clk_ipsec),
527};
400 528
401#define HSSPI_PLL_HZ_6328 133333333 529#define HSSPI_PLL_HZ_6328 133333333
402#define HSSPI_PLL_HZ_6362 400000000 530#define HSSPI_PLL_HZ_6362 400000000
@@ -404,11 +532,31 @@ EXPORT_SYMBOL(clk_put);
404static int __init bcm63xx_clk_init(void) 532static int __init bcm63xx_clk_init(void)
405{ 533{
406 switch (bcm63xx_get_cpu_id()) { 534 switch (bcm63xx_get_cpu_id()) {
535 case BCM3368_CPU_ID:
536 clkdev_add_table(bcm3368_clks, ARRAY_SIZE(bcm3368_clks));
537 break;
407 case BCM6328_CPU_ID: 538 case BCM6328_CPU_ID:
408 clk_hsspi.rate = HSSPI_PLL_HZ_6328; 539 clk_hsspi_pll.rate = HSSPI_PLL_HZ_6328;
540 clkdev_add_table(bcm6328_clks, ARRAY_SIZE(bcm6328_clks));
541 break;
542 case BCM6338_CPU_ID:
543 clkdev_add_table(bcm6338_clks, ARRAY_SIZE(bcm6338_clks));
544 break;
545 case BCM6345_CPU_ID:
546 clkdev_add_table(bcm6345_clks, ARRAY_SIZE(bcm6345_clks));
547 break;
548 case BCM6348_CPU_ID:
549 clkdev_add_table(bcm6348_clks, ARRAY_SIZE(bcm6348_clks));
550 break;
551 case BCM6358_CPU_ID:
552 clkdev_add_table(bcm6358_clks, ARRAY_SIZE(bcm6358_clks));
409 break; 553 break;
410 case BCM6362_CPU_ID: 554 case BCM6362_CPU_ID:
411 clk_hsspi.rate = HSSPI_PLL_HZ_6362; 555 clk_hsspi_pll.rate = HSSPI_PLL_HZ_6362;
556 clkdev_add_table(bcm6362_clks, ARRAY_SIZE(bcm6362_clks));
557 break;
558 case BCM6368_CPU_ID:
559 clkdev_add_table(bcm6368_clks, ARRAY_SIZE(bcm6368_clks));
412 break; 560 break;
413 } 561 }
414 562
diff --git a/arch/mips/boot/dts/brcm/bcm3368.dtsi b/arch/mips/boot/dts/brcm/bcm3368.dtsi
index 277cde02b744..7a3e5c8943ca 100644
--- a/arch/mips/boot/dts/brcm/bcm3368.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm3368.dtsi
@@ -83,6 +83,7 @@
83 interrupts = <2>; 83 interrupts = <2>;
84 84
85 clocks = <&periph_clk>; 85 clocks = <&periph_clk>;
86 clock-names = "refclk";
86 87
87 status = "disabled"; 88 status = "disabled";
88 }; 89 };
@@ -95,6 +96,7 @@
95 interrupts = <3>; 96 interrupts = <3>;
96 97
97 clocks = <&periph_clk>; 98 clocks = <&periph_clk>;
99 clock-names = "refclk";
98 100
99 status = "disabled"; 101 status = "disabled";
100 }; 102 };
diff --git a/arch/mips/boot/dts/brcm/bcm63268-comtrend-vr-3032u.dts b/arch/mips/boot/dts/brcm/bcm63268-comtrend-vr-3032u.dts
index 2bc0d8401ad6..8d010b919de2 100644
--- a/arch/mips/boot/dts/brcm/bcm63268-comtrend-vr-3032u.dts
+++ b/arch/mips/boot/dts/brcm/bcm63268-comtrend-vr-3032u.dts
@@ -19,7 +19,7 @@
19}; 19};
20 20
21&leds0 { 21&leds0 {
22 status = "ok"; 22 status = "okay";
23 brcm,serial-leds; 23 brcm,serial-leds;
24 brcm,serial-dat-low; 24 brcm,serial-dat-low;
25 brcm,serial-shift-inv; 25 brcm,serial-shift-inv;
diff --git a/arch/mips/boot/dts/brcm/bcm63268.dtsi b/arch/mips/boot/dts/brcm/bcm63268.dtsi
index 3b09f44e67fb..58790b173bb2 100644
--- a/arch/mips/boot/dts/brcm/bcm63268.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm63268.dtsi
@@ -84,6 +84,7 @@
84 interrupts = <5>; 84 interrupts = <5>;
85 85
86 clocks = <&periph_clk>; 86 clocks = <&periph_clk>;
87 clock-names = "refclk";
87 88
88 status = "disabled"; 89 status = "disabled";
89 }; 90 };
@@ -96,6 +97,7 @@
96 interrupts = <34>; 97 interrupts = <34>;
97 98
98 clocks = <&periph_clk>; 99 clocks = <&periph_clk>;
100 clock-names = "refclk";
99 101
100 status = "disabled"; 102 status = "disabled";
101 }; 103 };
diff --git a/arch/mips/boot/dts/brcm/bcm6328.dtsi b/arch/mips/boot/dts/brcm/bcm6328.dtsi
index 644486fe4159..bf6716aa425a 100644
--- a/arch/mips/boot/dts/brcm/bcm6328.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm6328.dtsi
@@ -69,6 +69,7 @@
69 interrupt-parent = <&periph_intc>; 69 interrupt-parent = <&periph_intc>;
70 interrupts = <28>; 70 interrupts = <28>;
71 clocks = <&periph_clk>; 71 clocks = <&periph_clk>;
72 clock-names = "refclk";
72 status = "disabled"; 73 status = "disabled";
73 }; 74 };
74 75
@@ -78,6 +79,7 @@
78 interrupt-parent = <&periph_intc>; 79 interrupt-parent = <&periph_intc>;
79 interrupts = <39>; 80 interrupts = <39>;
80 clocks = <&periph_clk>; 81 clocks = <&periph_clk>;
82 clock-names = "refclk";
81 status = "disabled"; 83 status = "disabled";
82 }; 84 };
83 85
diff --git a/arch/mips/boot/dts/brcm/bcm6358-neufbox4-sercomm.dts b/arch/mips/boot/dts/brcm/bcm6358-neufbox4-sercomm.dts
index 5e62190aa3d5..53e57cc29291 100644
--- a/arch/mips/boot/dts/brcm/bcm6358-neufbox4-sercomm.dts
+++ b/arch/mips/boot/dts/brcm/bcm6358-neufbox4-sercomm.dts
@@ -19,7 +19,7 @@
19}; 19};
20 20
21&leds0 { 21&leds0 {
22 status = "ok"; 22 status = "okay";
23 23
24 led@0 { 24 led@0 {
25 reg = <0>; 25 reg = <0>;
diff --git a/arch/mips/boot/dts/brcm/bcm6358.dtsi b/arch/mips/boot/dts/brcm/bcm6358.dtsi
index 682df7fb7069..26ddae5a4247 100644
--- a/arch/mips/boot/dts/brcm/bcm6358.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm6358.dtsi
@@ -93,6 +93,7 @@
93 interrupts = <2>; 93 interrupts = <2>;
94 94
95 clocks = <&periph_clk>; 95 clocks = <&periph_clk>;
96 clock-names = "refclk";
96 97
97 status = "disabled"; 98 status = "disabled";
98 }; 99 };
@@ -105,6 +106,7 @@
105 interrupts = <3>; 106 interrupts = <3>;
106 107
107 clocks = <&periph_clk>; 108 clocks = <&periph_clk>;
109 clock-names = "refclk";
108 110
109 status = "disabled"; 111 status = "disabled";
110 }; 112 };
diff --git a/arch/mips/boot/dts/brcm/bcm6362.dtsi b/arch/mips/boot/dts/brcm/bcm6362.dtsi
index a82a5e5de672..c387793525dd 100644
--- a/arch/mips/boot/dts/brcm/bcm6362.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm6362.dtsi
@@ -84,6 +84,7 @@
84 interrupts = <3>; 84 interrupts = <3>;
85 85
86 clocks = <&periph_clk>; 86 clocks = <&periph_clk>;
87 clock-names = "refclk";
87 88
88 status = "disabled"; 89 status = "disabled";
89 }; 90 };
@@ -96,6 +97,7 @@
96 interrupts = <4>; 97 interrupts = <4>;
97 98
98 clocks = <&periph_clk>; 99 clocks = <&periph_clk>;
100 clock-names = "refclk";
99 101
100 status = "disabled"; 102 status = "disabled";
101 }; 103 };
diff --git a/arch/mips/boot/dts/brcm/bcm6368.dtsi b/arch/mips/boot/dts/brcm/bcm6368.dtsi
index 7a72f59ae457..e116a385525f 100644
--- a/arch/mips/boot/dts/brcm/bcm6368.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm6368.dtsi
@@ -90,6 +90,7 @@
90 interrupt-parent = <&periph_intc>; 90 interrupt-parent = <&periph_intc>;
91 interrupts = <2>; 91 interrupts = <2>;
92 clocks = <&periph_clk>; 92 clocks = <&periph_clk>;
93 clock-names = "refclk";
93 status = "disabled"; 94 status = "disabled";
94 }; 95 };
95 96
@@ -99,6 +100,7 @@
99 interrupt-parent = <&periph_intc>; 100 interrupt-parent = <&periph_intc>;
100 interrupts = <3>; 101 interrupts = <3>;
101 clocks = <&periph_clk>; 102 clocks = <&periph_clk>;
103 clock-names = "refclk";
102 status = "disabled"; 104 status = "disabled";
103 }; 105 };
104 106
diff --git a/arch/mips/boot/dts/img/pistachio.dtsi b/arch/mips/boot/dts/img/pistachio.dtsi
index 57809f6a5864..f8d7e6f622cb 100644
--- a/arch/mips/boot/dts/img/pistachio.dtsi
+++ b/arch/mips/boot/dts/img/pistachio.dtsi
@@ -805,7 +805,6 @@
805 pinctrl-0 = <&sdhost_pins>; 805 pinctrl-0 = <&sdhost_pins>;
806 pinctrl-names = "default"; 806 pinctrl-names = "default";
807 fifo-depth = <0x20>; 807 fifo-depth = <0x20>;
808 num-slots = <1>;
809 clock-frequency = <50000000>; 808 clock-frequency = <50000000>;
810 bus-width = <8>; 809 bus-width = <8>;
811 cap-mmc-highspeed; 810 cap-mmc-highspeed;
diff --git a/arch/mips/boot/dts/ingenic/jz4780.dtsi b/arch/mips/boot/dts/ingenic/jz4780.dtsi
index ff3298f29ec4..9b5794667aee 100644
--- a/arch/mips/boot/dts/ingenic/jz4780.dtsi
+++ b/arch/mips/boot/dts/ingenic/jz4780.dtsi
@@ -219,6 +219,11 @@
219 status = "disabled"; 219 status = "disabled";
220 }; 220 };
221 221
222 watchdog: watchdog@10002000 {
223 compatible = "ingenic,jz4780-watchdog";
224 reg = <0x10002000 0x100>;
225 };
226
222 nemc: nemc@13410000 { 227 nemc: nemc@13410000 {
223 compatible = "ingenic,jz4780-nemc"; 228 compatible = "ingenic,jz4780-nemc";
224 reg = <0x13410000 0x10000>; 229 reg = <0x13410000 0x10000>;
diff --git a/arch/mips/boot/dts/ralink/rt3052_eval.dts b/arch/mips/boot/dts/ralink/rt3052_eval.dts
index 674efdd42e74..6408ff629d5a 100644
--- a/arch/mips/boot/dts/ralink/rt3052_eval.dts
+++ b/arch/mips/boot/dts/ralink/rt3052_eval.dts
@@ -47,6 +47,6 @@
47 }; 47 };
48 48
49 usb@101c0000 { 49 usb@101c0000 {
50 status = "ok"; 50 status = "okay";
51 }; 51 };
52}; 52};
diff --git a/arch/mips/boot/dts/xilfpga/Makefile b/arch/mips/boot/dts/xilfpga/Makefile
index 5d222c97db9e..616322405ade 100644
--- a/arch/mips/boot/dts/xilfpga/Makefile
+++ b/arch/mips/boot/dts/xilfpga/Makefile
@@ -1,5 +1,5 @@
1# SPDX-License-Identifier: GPL-2.0 1# SPDX-License-Identifier: GPL-2.0
2dtb-$(CONFIG_XILFPGA_NEXYS4DDR) += nexys4ddr.dtb 2dtb-$(CONFIG_FIT_IMAGE_FDT_XILFPGA) += nexys4ddr.dtb
3 3
4obj-y += $(patsubst %.dtb, %.dtb.o, $(dtb-y)) 4obj-y += $(patsubst %.dtb, %.dtb.o, $(dtb-y))
5 5
diff --git a/arch/mips/boot/dts/xilfpga/nexys4ddr.dts b/arch/mips/boot/dts/xilfpga/nexys4ddr.dts
index 41fee03dc312..2152b7ba65fb 100644
--- a/arch/mips/boot/dts/xilfpga/nexys4ddr.dts
+++ b/arch/mips/boot/dts/xilfpga/nexys4ddr.dts
@@ -6,6 +6,14 @@
6/ { 6/ {
7 compatible = "digilent,nexys4ddr"; 7 compatible = "digilent,nexys4ddr";
8 8
9 aliases {
10 serial0 = &axi_uart16550;
11 };
12 chosen {
13 bootargs = "console=ttyS0,115200";
14 stdout-path = "serial0:115200n8";
15 };
16
9 memory { 17 memory {
10 device_type = "memory"; 18 device_type = "memory";
11 reg = <0x0 0x08000000>; 19 reg = <0x0 0x08000000>;
diff --git a/arch/mips/cavium-octeon/executive/cvmx-helper.c b/arch/mips/cavium-octeon/executive/cvmx-helper.c
index f24be0b5db50..75108ec669eb 100644
--- a/arch/mips/cavium-octeon/executive/cvmx-helper.c
+++ b/arch/mips/cavium-octeon/executive/cvmx-helper.c
@@ -862,7 +862,7 @@ int __cvmx_helper_errata_fix_ipd_ptr_alignment(void)
862 */ 862 */
863 cvmx_write_csr(CVMX_ASXX_RX_PRT_EN(INTERFACE(FIX_IPD_OUTPORT)), 0); 863 cvmx_write_csr(CVMX_ASXX_RX_PRT_EN(INTERFACE(FIX_IPD_OUTPORT)), 0);
864 864
865 cvmx_wait(100000000ull); 865 __delay(100000000ull);
866 866
867 for (retry_loop_cnt = 0; retry_loop_cnt < 10; retry_loop_cnt++) { 867 for (retry_loop_cnt = 0; retry_loop_cnt < 10; retry_loop_cnt++) {
868 retry_cnt = 100000; 868 retry_cnt = 100000;
diff --git a/arch/mips/cavium-octeon/executive/cvmx-spi.c b/arch/mips/cavium-octeon/executive/cvmx-spi.c
index 459e3b1eb61f..f51957a3e915 100644
--- a/arch/mips/cavium-octeon/executive/cvmx-spi.c
+++ b/arch/mips/cavium-octeon/executive/cvmx-spi.c
@@ -215,7 +215,7 @@ int cvmx_spi_reset_cb(int interface, cvmx_spi_mode_t mode)
215 spxx_clk_ctl.u64 = 0; 215 spxx_clk_ctl.u64 = 0;
216 spxx_clk_ctl.s.runbist = 1; 216 spxx_clk_ctl.s.runbist = 1;
217 cvmx_write_csr(CVMX_SPXX_CLK_CTL(interface), spxx_clk_ctl.u64); 217 cvmx_write_csr(CVMX_SPXX_CLK_CTL(interface), spxx_clk_ctl.u64);
218 cvmx_wait(10 * MS); 218 __delay(10 * MS);
219 spxx_bist_stat.u64 = cvmx_read_csr(CVMX_SPXX_BIST_STAT(interface)); 219 spxx_bist_stat.u64 = cvmx_read_csr(CVMX_SPXX_BIST_STAT(interface));
220 if (spxx_bist_stat.s.stat0) 220 if (spxx_bist_stat.s.stat0)
221 cvmx_dprintf 221 cvmx_dprintf
@@ -265,14 +265,14 @@ int cvmx_spi_reset_cb(int interface, cvmx_spi_mode_t mode)
265 spxx_clk_ctl.s.rcvtrn = 0; 265 spxx_clk_ctl.s.rcvtrn = 0;
266 spxx_clk_ctl.s.srxdlck = 0; 266 spxx_clk_ctl.s.srxdlck = 0;
267 cvmx_write_csr(CVMX_SPXX_CLK_CTL(interface), spxx_clk_ctl.u64); 267 cvmx_write_csr(CVMX_SPXX_CLK_CTL(interface), spxx_clk_ctl.u64);
268 cvmx_wait(100 * MS); 268 __delay(100 * MS);
269 269
270 /* Reset SRX0 DLL */ 270 /* Reset SRX0 DLL */
271 spxx_clk_ctl.s.srxdlck = 1; 271 spxx_clk_ctl.s.srxdlck = 1;
272 cvmx_write_csr(CVMX_SPXX_CLK_CTL(interface), spxx_clk_ctl.u64); 272 cvmx_write_csr(CVMX_SPXX_CLK_CTL(interface), spxx_clk_ctl.u64);
273 273
274 /* Waiting for Inf0 Spi4 RX DLL to lock */ 274 /* Waiting for Inf0 Spi4 RX DLL to lock */
275 cvmx_wait(100 * MS); 275 __delay(100 * MS);
276 276
277 /* Enable dynamic alignment */ 277 /* Enable dynamic alignment */
278 spxx_trn4_ctl.s.trntest = 0; 278 spxx_trn4_ctl.s.trntest = 0;
@@ -527,7 +527,7 @@ int cvmx_spi_training_cb(int interface, cvmx_spi_mode_t mode, int timeout)
527 spxx_clk_ctl.s.rcvtrn = 1; 527 spxx_clk_ctl.s.rcvtrn = 1;
528 spxx_clk_ctl.s.srxdlck = 1; 528 spxx_clk_ctl.s.srxdlck = 1;
529 cvmx_write_csr(CVMX_SPXX_CLK_CTL(interface), spxx_clk_ctl.u64); 529 cvmx_write_csr(CVMX_SPXX_CLK_CTL(interface), spxx_clk_ctl.u64);
530 cvmx_wait(1000 * MS); 530 __delay(1000 * MS);
531 531
532 /* SRX0 clear the boot bit */ 532 /* SRX0 clear the boot bit */
533 spxx_trn4_ctl.u64 = cvmx_read_csr(CVMX_SPXX_TRN4_CTL(interface)); 533 spxx_trn4_ctl.u64 = cvmx_read_csr(CVMX_SPXX_TRN4_CTL(interface));
@@ -536,7 +536,7 @@ int cvmx_spi_training_cb(int interface, cvmx_spi_mode_t mode, int timeout)
536 536
537 /* Wait for the training sequence to complete */ 537 /* Wait for the training sequence to complete */
538 cvmx_dprintf("SPI%d: Waiting for training\n", interface); 538 cvmx_dprintf("SPI%d: Waiting for training\n", interface);
539 cvmx_wait(1000 * MS); 539 __delay(1000 * MS);
540 /* Wait a really long time here */ 540 /* Wait a really long time here */
541 timeout_time = cvmx_get_cycle() + 1000ull * MS * 600; 541 timeout_time = cvmx_get_cycle() + 1000ull * MS * 600;
542 /* 542 /*
diff --git a/arch/mips/configs/ci20_defconfig b/arch/mips/configs/ci20_defconfig
index 5ea3104a3aca..b5f4ad8f2c45 100644
--- a/arch/mips/configs/ci20_defconfig
+++ b/arch/mips/configs/ci20_defconfig
@@ -38,6 +38,8 @@ CONFIG_NET=y
38CONFIG_PACKET=y 38CONFIG_PACKET=y
39CONFIG_UNIX=y 39CONFIG_UNIX=y
40CONFIG_INET=y 40CONFIG_INET=y
41CONFIG_IP_PNP=y
42CONFIG_IP_PNP_DHCP=y
41# CONFIG_INET_XFRM_MODE_TRANSPORT is not set 43# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
42# CONFIG_INET_XFRM_MODE_TUNNEL is not set 44# CONFIG_INET_XFRM_MODE_TUNNEL is not set
43# CONFIG_INET_XFRM_MODE_BEET is not set 45# CONFIG_INET_XFRM_MODE_BEET is not set
@@ -93,6 +95,8 @@ CONFIG_I2C_JZ4780=y
93CONFIG_GPIO_SYSFS=y 95CONFIG_GPIO_SYSFS=y
94CONFIG_GPIO_INGENIC=y 96CONFIG_GPIO_INGENIC=y
95# CONFIG_HWMON is not set 97# CONFIG_HWMON is not set
98CONFIG_WATCHDOG=y
99CONFIG_JZ4740_WDT=y
96CONFIG_REGULATOR=y 100CONFIG_REGULATOR=y
97CONFIG_REGULATOR_DEBUG=y 101CONFIG_REGULATOR_DEBUG=y
98CONFIG_REGULATOR_FIXED_VOLTAGE=y 102CONFIG_REGULATOR_FIXED_VOLTAGE=y
@@ -110,7 +114,8 @@ CONFIG_PROC_KCORE=y
110CONFIG_TMPFS=y 114CONFIG_TMPFS=y
111CONFIG_CONFIGFS_FS=y 115CONFIG_CONFIGFS_FS=y
112CONFIG_UBIFS_FS=y 116CONFIG_UBIFS_FS=y
113# CONFIG_NETWORK_FILESYSTEMS is not set 117CONFIG_NFS_FS=y
118CONFIG_ROOT_NFS=y
114CONFIG_NLS=y 119CONFIG_NLS=y
115CONFIG_NLS_CODEPAGE_437=y 120CONFIG_NLS_CODEPAGE_437=y
116CONFIG_NLS_CODEPAGE_737=y 121CONFIG_NLS_CODEPAGE_737=y
diff --git a/arch/mips/configs/generic/board-xilfpga.config b/arch/mips/configs/generic/board-xilfpga.config
new file mode 100644
index 000000000000..9cce57385b03
--- /dev/null
+++ b/arch/mips/configs/generic/board-xilfpga.config
@@ -0,0 +1,22 @@
1# require CONFIG_CPU_MIPS32_R2=y
2# require CONFIG_CPU_LITTLE_ENDIAN=y
3
4CONFIG_SERIAL_8250=y
5CONFIG_SERIAL_8250_CONSOLE=y
6CONFIG_SERIAL_OF_PLATFORM=y
7CONFIG_GPIO_SYSFS=y
8CONFIG_GPIO_XILINX=y
9CONFIG_PANIC_ON_OOPS=y
10CONFIG_FIT_IMAGE_FDT_XILFPGA=y
11CONFIG_I2C=y
12CONFIG_I2C_CHARDEV=y
13CONFIG_I2C_XILINX=y
14CONFIG_SENSORS_ADT7410=y
15CONFIG_TMPFS=y
16CONFIG_NET=y
17CONFIG_PACKET=y
18CONFIG_UNIX=y
19CONFIG_INET=y
20CONFIG_NETDEVICES=y
21CONFIG_XILINX_EMACLITE=y
22CONFIG_SMSC_PHY=y
diff --git a/arch/mips/configs/ip22_defconfig b/arch/mips/configs/ip22_defconfig
index 83e8fe2064aa..7ddfb4ef9479 100644
--- a/arch/mips/configs/ip22_defconfig
+++ b/arch/mips/configs/ip22_defconfig
@@ -1,3 +1,4 @@
1CONFIG_SGI_IP22=y
1CONFIG_ARC_CONSOLE=y 2CONFIG_ARC_CONSOLE=y
2CONFIG_CPU_R5000=y 3CONFIG_CPU_R5000=y
3CONFIG_NO_HZ=y 4CONFIG_NO_HZ=y
diff --git a/arch/mips/configs/xilfpga_defconfig b/arch/mips/configs/xilfpga_defconfig
deleted file mode 100644
index 829c637be3fc..000000000000
--- a/arch/mips/configs/xilfpga_defconfig
+++ /dev/null
@@ -1,75 +0,0 @@
1CONFIG_MACH_XILFPGA=y
2# CONFIG_COMPACTION is not set
3# CONFIG_LOCALVERSION_AUTO is not set
4CONFIG_EMBEDDED=y
5# CONFIG_VM_EVENT_COUNTERS is not set
6# CONFIG_COMPAT_BRK is not set
7CONFIG_SLAB=y
8# CONFIG_BLOCK is not set
9# CONFIG_SUSPEND is not set
10CONFIG_NET=y
11CONFIG_PACKET=y
12CONFIG_UNIX=y
13CONFIG_INET=y
14# CONFIG_IPV6 is not set
15# CONFIG_WIRELESS is not set
16# CONFIG_UEVENT_HELPER is not set
17CONFIG_DEVTMPFS=y
18CONFIG_DEVTMPFS_MOUNT=y
19# CONFIG_STANDALONE is not set
20# CONFIG_PREVENT_FIRMWARE_BUILD is not set
21# CONFIG_FW_LOADER is not set
22# CONFIG_ALLOW_DEV_COREDUMP is not set
23CONFIG_NETDEVICES=y
24# CONFIG_NET_CORE is not set
25# CONFIG_NET_VENDOR_ARC is not set
26# CONFIG_NET_CADENCE is not set
27# CONFIG_NET_VENDOR_BROADCOM is not set
28# CONFIG_NET_VENDOR_EZCHIP is not set
29# CONFIG_NET_VENDOR_INTEL is not set
30# CONFIG_NET_VENDOR_MARVELL is not set
31# CONFIG_NET_VENDOR_MICREL is not set
32# CONFIG_NET_VENDOR_NATSEMI is not set
33# CONFIG_NET_VENDOR_NETRONOME is not set
34# CONFIG_NET_VENDOR_QUALCOMM is not set
35# CONFIG_NET_VENDOR_RENESAS is not set
36# CONFIG_NET_VENDOR_ROCKER is not set
37# CONFIG_NET_VENDOR_SAMSUNG is not set
38# CONFIG_NET_VENDOR_SEEQ is not set
39# CONFIG_NET_VENDOR_SMSC is not set
40# CONFIG_NET_VENDOR_STMICRO is not set
41# CONFIG_NET_VENDOR_SYNOPSYS is not set
42# CONFIG_NET_VENDOR_VIA is not set
43# CONFIG_NET_VENDOR_WIZNET is not set
44CONFIG_XILINX_EMACLITE=y
45CONFIG_SMSC_PHY=y
46# CONFIG_WLAN is not set
47# CONFIG_INPUT_MOUSEDEV is not set
48# CONFIG_INPUT_KEYBOARD is not set
49# CONFIG_INPUT_MOUSE is not set
50# CONFIG_SERIO is not set
51CONFIG_VT_HW_CONSOLE_BINDING=y
52# CONFIG_UNIX98_PTYS is not set
53# CONFIG_LEGACY_PTYS is not set
54CONFIG_SERIAL_8250=y
55CONFIG_SERIAL_8250_CONSOLE=y
56CONFIG_SERIAL_OF_PLATFORM=y
57# CONFIG_HW_RANDOM is not set
58CONFIG_I2C=y
59CONFIG_I2C_CHARDEV=y
60# CONFIG_I2C_HELPER_AUTO is not set
61CONFIG_I2C_XILINX=y
62CONFIG_GPIO_SYSFS=y
63CONFIG_GPIO_XILINX=y
64CONFIG_SENSORS_ADT7410=y
65# CONFIG_USB_SUPPORT is not set
66# CONFIG_MIPS_PLATFORM_DEVICES is not set
67# CONFIG_IOMMU_SUPPORT is not set
68# CONFIG_PROC_PAGE_MONITOR is not set
69CONFIG_TMPFS=y
70# CONFIG_MISC_FILESYSTEMS is not set
71CONFIG_PANIC_ON_OOPS=y
72# CONFIG_SCHED_DEBUG is not set
73# CONFIG_FTRACE is not set
74CONFIG_CMDLINE_BOOL=y
75CONFIG_CMDLINE="console=ttyS0,115200"
diff --git a/arch/mips/generic/Kconfig b/arch/mips/generic/Kconfig
index 0b67c46666cc..52e0286a1612 100644
--- a/arch/mips/generic/Kconfig
+++ b/arch/mips/generic/Kconfig
@@ -43,4 +43,10 @@ config FIT_IMAGE_FDT_NI169445
43 Enable this to include the FDT for the 169445 platform from 43 Enable this to include the FDT for the 169445 platform from
44 National Instruments in the FIT kernel image. 44 National Instruments in the FIT kernel image.
45 45
46config FIT_IMAGE_FDT_XILFPGA
47 bool "Include FDT for Xilfpga"
48 help
49 Enable this to include the FDT for the MIPSfpga platform
50 from Imagination Technologies in the FIT kernel image.
51
46endif 52endif
diff --git a/arch/mips/generic/board-xilfpga.its.S b/arch/mips/generic/board-xilfpga.its.S
new file mode 100644
index 000000000000..a2e773d3f14f
--- /dev/null
+++ b/arch/mips/generic/board-xilfpga.its.S
@@ -0,0 +1,22 @@
1/ {
2 images {
3 fdt@xilfpga {
4 description = "MIPSfpga (xilfpga) Device Tree";
5 data = /incbin/("boot/dts/xilfpga/nexys4ddr.dtb");
6 type = "flat_dt";
7 arch = "mips";
8 compression = "none";
9 hash@0 {
10 algo = "sha1";
11 };
12 };
13 };
14
15 configurations {
16 conf@xilfpga {
17 description = "MIPSfpga Linux kernel";
18 kernel = "kernel@0";
19 fdt = "fdt@xilfpga";
20 };
21 };
22};
diff --git a/arch/mips/include/asm/asmmacro.h b/arch/mips/include/asm/asmmacro.h
index 83054f79f72a..feb069cbf44e 100644
--- a/arch/mips/include/asm/asmmacro.h
+++ b/arch/mips/include/asm/asmmacro.h
@@ -19,6 +19,9 @@
19#include <asm/asmmacro-64.h> 19#include <asm/asmmacro-64.h>
20#endif 20#endif
21 21
22/* preprocessor replaces the fp in ".set fp=64" with $30 otherwise */
23#undef fp
24
22/* 25/*
23 * Helper macros for generating raw instruction encodings. 26 * Helper macros for generating raw instruction encodings.
24 */ 27 */
@@ -105,6 +108,7 @@
105 .macro fpu_save_16odd thread 108 .macro fpu_save_16odd thread
106 .set push 109 .set push
107 .set mips64r2 110 .set mips64r2
111 .set fp=64
108 SET_HARDFLOAT 112 SET_HARDFLOAT
109 sdc1 $f1, THREAD_FPR1(\thread) 113 sdc1 $f1, THREAD_FPR1(\thread)
110 sdc1 $f3, THREAD_FPR3(\thread) 114 sdc1 $f3, THREAD_FPR3(\thread)
@@ -126,8 +130,8 @@
126 .endm 130 .endm
127 131
128 .macro fpu_save_double thread status tmp 132 .macro fpu_save_double thread status tmp
129#if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPS32_R2) || \ 133#if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPSR2) || \
130 defined(CONFIG_CPU_MIPS32_R6) 134 defined(CONFIG_CPU_MIPSR6)
131 sll \tmp, \status, 5 135 sll \tmp, \status, 5
132 bgez \tmp, 10f 136 bgez \tmp, 10f
133 fpu_save_16odd \thread 137 fpu_save_16odd \thread
@@ -163,6 +167,7 @@
163 .macro fpu_restore_16odd thread 167 .macro fpu_restore_16odd thread
164 .set push 168 .set push
165 .set mips64r2 169 .set mips64r2
170 .set fp=64
166 SET_HARDFLOAT 171 SET_HARDFLOAT
167 ldc1 $f1, THREAD_FPR1(\thread) 172 ldc1 $f1, THREAD_FPR1(\thread)
168 ldc1 $f3, THREAD_FPR3(\thread) 173 ldc1 $f3, THREAD_FPR3(\thread)
@@ -184,8 +189,8 @@
184 .endm 189 .endm
185 190
186 .macro fpu_restore_double thread status tmp 191 .macro fpu_restore_double thread status tmp
187#if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPS32_R2) || \ 192#if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPSR2) || \
188 defined(CONFIG_CPU_MIPS32_R6) 193 defined(CONFIG_CPU_MIPSR6)
189 sll \tmp, \status, 5 194 sll \tmp, \status, 5
190 bgez \tmp, 10f # 16 register mode? 195 bgez \tmp, 10f # 16 register mode?
191 196
@@ -234,9 +239,6 @@
234 .endm 239 .endm
235 240
236#ifdef TOOLCHAIN_SUPPORTS_MSA 241#ifdef TOOLCHAIN_SUPPORTS_MSA
237/* preprocessor replaces the fp in ".set fp=64" with $30 otherwise */
238#undef fp
239
240 .macro _cfcmsa rd, cs 242 .macro _cfcmsa rd, cs
241 .set push 243 .set push
242 .set mips32r2 244 .set mips32r2
diff --git a/arch/mips/include/asm/bitops.h b/arch/mips/include/asm/bitops.h
index fa57cef12a46..da1b8718861e 100644
--- a/arch/mips/include/asm/bitops.h
+++ b/arch/mips/include/asm/bitops.h
@@ -456,6 +456,7 @@ static inline void __clear_bit_unlock(unsigned long nr, volatile unsigned long *
456{ 456{
457 smp_mb__before_llsc(); 457 smp_mb__before_llsc();
458 __clear_bit(nr, addr); 458 __clear_bit(nr, addr);
459 nudge_writes();
459} 460}
460 461
461/* 462/*
diff --git a/arch/mips/include/asm/cmpxchg.h b/arch/mips/include/asm/cmpxchg.h
index 7e25c5cc353a..89e9fb7976fe 100644
--- a/arch/mips/include/asm/cmpxchg.h
+++ b/arch/mips/include/asm/cmpxchg.h
@@ -204,8 +204,10 @@ static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
204#else 204#else
205#include <asm-generic/cmpxchg-local.h> 205#include <asm-generic/cmpxchg-local.h>
206#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n)) 206#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
207#ifndef CONFIG_SMP
207#define cmpxchg64(ptr, o, n) cmpxchg64_local((ptr), (o), (n)) 208#define cmpxchg64(ptr, o, n) cmpxchg64_local((ptr), (o), (n))
208#endif 209#endif
210#endif
209 211
210#undef __scbeqz 212#undef __scbeqz
211 213
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index a6810923b3f0..6b1f1ad0542c 100644
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -1355,19 +1355,17 @@ do { \
1355 if (sel == 0) \ 1355 if (sel == 0) \
1356 __asm__ __volatile__( \ 1356 __asm__ __volatile__( \
1357 ".set\tmips64\n\t" \ 1357 ".set\tmips64\n\t" \
1358 "dmfc0\t%M0, " #source "\n\t" \ 1358 "dmfc0\t%L0, " #source "\n\t" \
1359 "dsll\t%L0, %M0, 32\n\t" \ 1359 "dsra\t%M0, %L0, 32\n\t" \
1360 "dsra\t%M0, %M0, 32\n\t" \ 1360 "sll\t%L0, %L0, 0\n\t" \
1361 "dsra\t%L0, %L0, 32\n\t" \
1362 ".set\tmips0" \ 1361 ".set\tmips0" \
1363 : "=r" (__val)); \ 1362 : "=r" (__val)); \
1364 else \ 1363 else \
1365 __asm__ __volatile__( \ 1364 __asm__ __volatile__( \
1366 ".set\tmips64\n\t" \ 1365 ".set\tmips64\n\t" \
1367 "dmfc0\t%M0, " #source ", " #sel "\n\t" \ 1366 "dmfc0\t%L0, " #source ", " #sel "\n\t" \
1368 "dsll\t%L0, %M0, 32\n\t" \ 1367 "dsra\t%M0, %L0, 32\n\t" \
1369 "dsra\t%M0, %M0, 32\n\t" \ 1368 "sll\t%L0, %L0, 0\n\t" \
1370 "dsra\t%L0, %L0, 32\n\t" \
1371 ".set\tmips0" \ 1369 ".set\tmips0" \
1372 : "=r" (__val)); \ 1370 : "=r" (__val)); \
1373 local_irq_restore(__flags); \ 1371 local_irq_restore(__flags); \
diff --git a/arch/mips/include/asm/octeon/cvmx-fpa.h b/arch/mips/include/asm/octeon/cvmx-fpa.h
index c00501d0f7ae..29ae63606ab4 100644
--- a/arch/mips/include/asm/octeon/cvmx-fpa.h
+++ b/arch/mips/include/asm/octeon/cvmx-fpa.h
@@ -36,6 +36,8 @@
36#ifndef __CVMX_FPA_H__ 36#ifndef __CVMX_FPA_H__
37#define __CVMX_FPA_H__ 37#define __CVMX_FPA_H__
38 38
39#include <linux/delay.h>
40
39#include <asm/octeon/cvmx-address.h> 41#include <asm/octeon/cvmx-address.h>
40#include <asm/octeon/cvmx-fpa-defs.h> 42#include <asm/octeon/cvmx-fpa-defs.h>
41 43
@@ -165,7 +167,7 @@ static inline void cvmx_fpa_enable(void)
165 } 167 }
166 168
167 /* Enforce a 10 cycle delay between config and enable */ 169 /* Enforce a 10 cycle delay between config and enable */
168 cvmx_wait(10); 170 __delay(10);
169 } 171 }
170 172
171 /* FIXME: CVMX_FPA_CTL_STATUS read is unmodelled */ 173 /* FIXME: CVMX_FPA_CTL_STATUS read is unmodelled */
diff --git a/arch/mips/include/asm/octeon/cvmx.h b/arch/mips/include/asm/octeon/cvmx.h
index 205ab2ce10f8..25854abc95f8 100644
--- a/arch/mips/include/asm/octeon/cvmx.h
+++ b/arch/mips/include/asm/octeon/cvmx.h
@@ -30,6 +30,7 @@
30 30
31#include <linux/kernel.h> 31#include <linux/kernel.h>
32#include <linux/string.h> 32#include <linux/string.h>
33#include <linux/delay.h>
33 34
34enum cvmx_mips_space { 35enum cvmx_mips_space {
35 CVMX_MIPS_SPACE_XKSEG = 3LL, 36 CVMX_MIPS_SPACE_XKSEG = 3LL,
@@ -429,18 +430,6 @@ static inline uint64_t cvmx_get_cycle(void)
429} 430}
430 431
431/** 432/**
432 * Wait for the specified number of cycle
433 *
434 */
435static inline void cvmx_wait(uint64_t cycles)
436{
437 uint64_t done = cvmx_get_cycle() + cycles;
438
439 while (cvmx_get_cycle() < done)
440 ; /* Spin */
441}
442
443/**
444 * Reads a chip global cycle counter. This counts CPU cycles since 433 * Reads a chip global cycle counter. This counts CPU cycles since
445 * chip reset. The counter is 64 bit. 434 * chip reset. The counter is 64 bit.
446 * This register does not exist on CN38XX pass 1 silicion 435 * This register does not exist on CN38XX pass 1 silicion
@@ -481,7 +470,7 @@ static inline uint64_t cvmx_get_cycle_global(void)
481 result = -1; \ 470 result = -1; \
482 break; \ 471 break; \
483 } else \ 472 } else \
484 cvmx_wait(100); \ 473 __delay(100); \
485 } \ 474 } \
486 } while (0); \ 475 } while (0); \
487 result; \ 476 result; \
diff --git a/arch/mips/include/asm/page.h b/arch/mips/include/asm/page.h
index 5f987598054f..ad461216b5a1 100644
--- a/arch/mips/include/asm/page.h
+++ b/arch/mips/include/asm/page.h
@@ -240,8 +240,8 @@ static inline int pfn_valid(unsigned long pfn)
240 240
241#endif 241#endif
242 242
243#define virt_to_page(kaddr) pfn_to_page(PFN_DOWN(virt_to_phys((void *) \ 243#define virt_to_pfn(kaddr) PFN_DOWN(virt_to_phys((void *)(kaddr)))
244 (kaddr)))) 244#define virt_to_page(kaddr) pfn_to_page(virt_to_pfn(kaddr))
245 245
246extern int __virt_addr_valid(const volatile void *kaddr); 246extern int __virt_addr_valid(const volatile void *kaddr);
247#define virt_addr_valid(kaddr) \ 247#define virt_addr_valid(kaddr) \
diff --git a/arch/mips/include/asm/processor.h b/arch/mips/include/asm/processor.h
index 95b8c471f572..af34afbc32d9 100644
--- a/arch/mips/include/asm/processor.h
+++ b/arch/mips/include/asm/processor.h
@@ -368,8 +368,6 @@ struct task_struct;
368/* Free all resources held by a thread. */ 368/* Free all resources held by a thread. */
369#define release_thread(thread) do { } while(0) 369#define release_thread(thread) do { } while(0)
370 370
371extern unsigned long thread_saved_pc(struct task_struct *tsk);
372
373/* 371/*
374 * Do necessary setup to start up a newly executed thread. 372 * Do necessary setup to start up a newly executed thread.
375 */ 373 */
diff --git a/arch/mips/include/asm/smp.h b/arch/mips/include/asm/smp.h
index 9e494f8d9c03..88ebd83b3bf9 100644
--- a/arch/mips/include/asm/smp.h
+++ b/arch/mips/include/asm/smp.h
@@ -29,7 +29,7 @@ extern cpumask_t cpu_foreign_map[];
29 29
30/* Map from cpu id to sequential logical cpu number. This will only 30/* Map from cpu id to sequential logical cpu number. This will only
31 not be idempotent when cpus failed to come on-line. */ 31 not be idempotent when cpus failed to come on-line. */
32extern int __cpu_number_map[NR_CPUS]; 32extern int __cpu_number_map[CONFIG_MIPS_NR_CPU_NR_MAP];
33#define cpu_number_map(cpu) __cpu_number_map[cpu] 33#define cpu_number_map(cpu) __cpu_number_map[cpu]
34 34
35/* The reverse map from sequential logical cpu number to cpu id. */ 35/* The reverse map from sequential logical cpu number to cpu id. */
diff --git a/arch/mips/include/asm/syscall.h b/arch/mips/include/asm/syscall.h
index 7c713025b23f..0170602a1e4e 100644
--- a/arch/mips/include/asm/syscall.h
+++ b/arch/mips/include/asm/syscall.h
@@ -26,12 +26,34 @@
26#define __NR_syscall 4000 26#define __NR_syscall 4000
27#endif 27#endif
28 28
29static inline bool mips_syscall_is_indirect(struct task_struct *task,
30 struct pt_regs *regs)
31{
32 /* O32 ABI syscall() - Either 64-bit with O32 or 32-bit */
33 return (IS_ENABLED(CONFIG_32BIT) ||
34 test_tsk_thread_flag(task, TIF_32BIT_REGS)) &&
35 (regs->regs[2] == __NR_syscall);
36}
37
29static inline long syscall_get_nr(struct task_struct *task, 38static inline long syscall_get_nr(struct task_struct *task,
30 struct pt_regs *regs) 39 struct pt_regs *regs)
31{ 40{
32 return current_thread_info()->syscall; 41 return current_thread_info()->syscall;
33} 42}
34 43
44static inline void mips_syscall_update_nr(struct task_struct *task,
45 struct pt_regs *regs)
46{
47 /*
48 * v0 is the system call number, except for O32 ABI syscall(), where it
49 * ends up in a0.
50 */
51 if (mips_syscall_is_indirect(task, regs))
52 task_thread_info(task)->syscall = regs->regs[4];
53 else
54 task_thread_info(task)->syscall = regs->regs[2];
55}
56
35static inline unsigned long mips_get_syscall_arg(unsigned long *arg, 57static inline unsigned long mips_get_syscall_arg(unsigned long *arg,
36 struct task_struct *task, struct pt_regs *regs, unsigned int n) 58 struct task_struct *task, struct pt_regs *regs, unsigned int n)
37{ 59{
@@ -98,10 +120,9 @@ static inline void syscall_get_arguments(struct task_struct *task,
98 unsigned long *args) 120 unsigned long *args)
99{ 121{
100 int ret; 122 int ret;
101 /* O32 ABI syscall() - Either 64-bit with O32 or 32-bit */ 123
102 if ((IS_ENABLED(CONFIG_32BIT) || 124 /* O32 ABI syscall() */
103 test_tsk_thread_flag(task, TIF_32BIT_REGS)) && 125 if (mips_syscall_is_indirect(task, regs))
104 (regs->regs[2] == __NR_syscall))
105 i++; 126 i++;
106 127
107 while (n--) 128 while (n--)
diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c
index c5ff6bfe2825..45d0b6b037ee 100644
--- a/arch/mips/kernel/process.c
+++ b/arch/mips/kernel/process.c
@@ -487,7 +487,7 @@ arch_initcall(frame_info_init);
487/* 487/*
488 * Return saved PC of a blocked thread. 488 * Return saved PC of a blocked thread.
489 */ 489 */
490unsigned long thread_saved_pc(struct task_struct *tsk) 490static unsigned long thread_saved_pc(struct task_struct *tsk)
491{ 491{
492 struct thread_struct *t = &tsk->thread; 492 struct thread_struct *t = &tsk->thread;
493 493
diff --git a/arch/mips/kernel/ptrace.c b/arch/mips/kernel/ptrace.c
index 1395654cfc8d..efbd8df8b665 100644
--- a/arch/mips/kernel/ptrace.c
+++ b/arch/mips/kernel/ptrace.c
@@ -144,6 +144,9 @@ int ptrace_setregs(struct task_struct *child, struct user_pt_regs __user *data)
144 144
145 /* badvaddr, status, and cause may not be written. */ 145 /* badvaddr, status, and cause may not be written. */
146 146
147 /* System call number may have been changed */
148 mips_syscall_update_nr(child, regs);
149
147 return 0; 150 return 0;
148} 151}
149 152
@@ -345,6 +348,9 @@ static int gpr32_set(struct task_struct *target,
345 } 348 }
346 } 349 }
347 350
351 /* System call number may have been changed */
352 mips_syscall_update_nr(target, regs);
353
348 return 0; 354 return 0;
349} 355}
350 356
@@ -405,6 +411,9 @@ static int gpr64_set(struct task_struct *target,
405 } 411 }
406 } 412 }
407 413
414 /* System call number may have been changed */
415 mips_syscall_update_nr(target, regs);
416
408 return 0; 417 return 0;
409} 418}
410 419
@@ -618,6 +627,19 @@ static const struct user_regset_view user_mips64_view = {
618 .n = ARRAY_SIZE(mips64_regsets), 627 .n = ARRAY_SIZE(mips64_regsets),
619}; 628};
620 629
630#ifdef CONFIG_MIPS32_N32
631
632static const struct user_regset_view user_mipsn32_view = {
633 .name = "mipsn32",
634 .e_flags = EF_MIPS_ABI2,
635 .e_machine = ELF_ARCH,
636 .ei_osabi = ELF_OSABI,
637 .regsets = mips64_regsets,
638 .n = ARRAY_SIZE(mips64_regsets),
639};
640
641#endif /* CONFIG_MIPS32_N32 */
642
621#endif /* CONFIG_64BIT */ 643#endif /* CONFIG_64BIT */
622 644
623const struct user_regset_view *task_user_regset_view(struct task_struct *task) 645const struct user_regset_view *task_user_regset_view(struct task_struct *task)
@@ -629,6 +651,10 @@ const struct user_regset_view *task_user_regset_view(struct task_struct *task)
629 if (test_tsk_thread_flag(task, TIF_32BIT_REGS)) 651 if (test_tsk_thread_flag(task, TIF_32BIT_REGS))
630 return &user_mips_view; 652 return &user_mips_view;
631#endif 653#endif
654#ifdef CONFIG_MIPS32_N32
655 if (test_tsk_thread_flag(task, TIF_32BIT_ADDR))
656 return &user_mipsn32_view;
657#endif
632 return &user_mips64_view; 658 return &user_mips64_view;
633#endif 659#endif
634} 660}
@@ -753,6 +779,12 @@ long arch_ptrace(struct task_struct *child, long request,
753 switch (addr) { 779 switch (addr) {
754 case 0 ... 31: 780 case 0 ... 31:
755 regs->regs[addr] = data; 781 regs->regs[addr] = data;
782 /* System call number may have been changed */
783 if (addr == 2)
784 mips_syscall_update_nr(child, regs);
785 else if (addr == 4 &&
786 mips_syscall_is_indirect(child, regs))
787 mips_syscall_update_nr(child, regs);
756 break; 788 break;
757 case FPR_BASE ... FPR_BASE + 31: { 789 case FPR_BASE ... FPR_BASE + 31: {
758 union fpureg *fregs = get_fpu_regs(child); 790 union fpureg *fregs = get_fpu_regs(child);
@@ -864,9 +896,11 @@ asmlinkage long syscall_trace_enter(struct pt_regs *regs, long syscall)
864 896
865 current_thread_info()->syscall = syscall; 897 current_thread_info()->syscall = syscall;
866 898
867 if (test_thread_flag(TIF_SYSCALL_TRACE) && 899 if (test_thread_flag(TIF_SYSCALL_TRACE)) {
868 tracehook_report_syscall_entry(regs)) 900 if (tracehook_report_syscall_entry(regs))
869 return -1; 901 return -1;
902 syscall = current_thread_info()->syscall;
903 }
870 904
871#ifdef CONFIG_SECCOMP 905#ifdef CONFIG_SECCOMP
872 if (unlikely(test_thread_flag(TIF_SECCOMP))) { 906 if (unlikely(test_thread_flag(TIF_SECCOMP))) {
@@ -884,6 +918,7 @@ asmlinkage long syscall_trace_enter(struct pt_regs *regs, long syscall)
884 ret = __secure_computing(&sd); 918 ret = __secure_computing(&sd);
885 if (ret == -1) 919 if (ret == -1)
886 return ret; 920 return ret;
921 syscall = current_thread_info()->syscall;
887 } 922 }
888#endif 923#endif
889 924
diff --git a/arch/mips/kernel/ptrace32.c b/arch/mips/kernel/ptrace32.c
index 40e212d6b26b..2b9260f92ccd 100644
--- a/arch/mips/kernel/ptrace32.c
+++ b/arch/mips/kernel/ptrace32.c
@@ -33,6 +33,7 @@
33#include <asm/pgtable.h> 33#include <asm/pgtable.h>
34#include <asm/page.h> 34#include <asm/page.h>
35#include <asm/reg.h> 35#include <asm/reg.h>
36#include <asm/syscall.h>
36#include <linux/uaccess.h> 37#include <linux/uaccess.h>
37#include <asm/bootinfo.h> 38#include <asm/bootinfo.h>
38 39
@@ -195,6 +196,12 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
195 switch (addr) { 196 switch (addr) {
196 case 0 ... 31: 197 case 0 ... 31:
197 regs->regs[addr] = data; 198 regs->regs[addr] = data;
199 /* System call number may have been changed */
200 if (addr == 2)
201 mips_syscall_update_nr(child, regs);
202 else if (addr == 4 &&
203 mips_syscall_is_indirect(child, regs))
204 mips_syscall_update_nr(child, regs);
198 break; 205 break;
199 case FPR_BASE ... FPR_BASE + 31: { 206 case FPR_BASE ... FPR_BASE + 31: {
200 union fpureg *fregs = get_fpu_regs(child); 207 union fpureg *fregs = get_fpu_regs(child);
diff --git a/arch/mips/kernel/r4k_fpu.S b/arch/mips/kernel/r4k_fpu.S
index 0a83b1708b3c..8e3a6020c613 100644
--- a/arch/mips/kernel/r4k_fpu.S
+++ b/arch/mips/kernel/r4k_fpu.S
@@ -40,8 +40,8 @@
40 */ 40 */
41LEAF(_save_fp) 41LEAF(_save_fp)
42EXPORT_SYMBOL(_save_fp) 42EXPORT_SYMBOL(_save_fp)
43#if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPS32_R2) || \ 43#if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPSR2) || \
44 defined(CONFIG_CPU_MIPS32_R6) 44 defined(CONFIG_CPU_MIPSR6)
45 mfc0 t0, CP0_STATUS 45 mfc0 t0, CP0_STATUS
46#endif 46#endif
47 fpu_save_double a0 t0 t1 # clobbers t1 47 fpu_save_double a0 t0 t1 # clobbers t1
@@ -52,8 +52,8 @@ EXPORT_SYMBOL(_save_fp)
52 * Restore a thread's fp context. 52 * Restore a thread's fp context.
53 */ 53 */
54LEAF(_restore_fp) 54LEAF(_restore_fp)
55#if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPS32_R2) || \ 55#if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPSR2) || \
56 defined(CONFIG_CPU_MIPS32_R6) 56 defined(CONFIG_CPU_MIPSR6)
57 mfc0 t0, CP0_STATUS 57 mfc0 t0, CP0_STATUS
58#endif 58#endif
59 fpu_restore_double a0 t0 t1 # clobbers t1 59 fpu_restore_double a0 t0 t1 # clobbers t1
@@ -246,11 +246,11 @@ LEAF(_save_fp_context)
246 cfc1 t1, fcr31 246 cfc1 t1, fcr31
247 .set pop 247 .set pop
248 248
249#if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPS32_R2) || \ 249#if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPSR2) || \
250 defined(CONFIG_CPU_MIPS32_R6) 250 defined(CONFIG_CPU_MIPSR6)
251 .set push 251 .set push
252 SET_HARDFLOAT 252 SET_HARDFLOAT
253#ifdef CONFIG_CPU_MIPS32_R2 253#ifdef CONFIG_CPU_MIPSR2
254 .set mips32r2 254 .set mips32r2
255 .set fp=64 255 .set fp=64
256 mfc0 t0, CP0_STATUS 256 mfc0 t0, CP0_STATUS
@@ -314,11 +314,11 @@ LEAF(_save_fp_context)
314LEAF(_restore_fp_context) 314LEAF(_restore_fp_context)
315 EX lw t1, 0(a1) 315 EX lw t1, 0(a1)
316 316
317#if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPS32_R2) || \ 317#if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPSR2) || \
318 defined(CONFIG_CPU_MIPS32_R6) 318 defined(CONFIG_CPU_MIPSR6)
319 .set push 319 .set push
320 SET_HARDFLOAT 320 SET_HARDFLOAT
321#ifdef CONFIG_CPU_MIPS32_R2 321#ifdef CONFIG_CPU_MIPSR2
322 .set mips32r2 322 .set mips32r2
323 .set fp=64 323 .set fp=64
324 mfc0 t0, CP0_STATUS 324 mfc0 t0, CP0_STATUS
diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c
index fe3939726765..702c678de116 100644
--- a/arch/mips/kernel/setup.c
+++ b/arch/mips/kernel/setup.c
@@ -80,6 +80,7 @@ EXPORT_SYMBOL(mips_io_port_base);
80 80
81static struct resource code_resource = { .name = "Kernel code", }; 81static struct resource code_resource = { .name = "Kernel code", };
82static struct resource data_resource = { .name = "Kernel data", }; 82static struct resource data_resource = { .name = "Kernel data", };
83static struct resource bss_resource = { .name = "Kernel bss", };
83 84
84static void *detect_magic __initdata = detect_memory_region; 85static void *detect_magic __initdata = detect_memory_region;
85 86
@@ -927,6 +928,8 @@ static void __init resource_init(void)
927 code_resource.end = __pa_symbol(&_etext) - 1; 928 code_resource.end = __pa_symbol(&_etext) - 1;
928 data_resource.start = __pa_symbol(&_etext); 929 data_resource.start = __pa_symbol(&_etext);
929 data_resource.end = __pa_symbol(&_edata) - 1; 930 data_resource.end = __pa_symbol(&_edata) - 1;
931 bss_resource.start = __pa_symbol(&__bss_start);
932 bss_resource.end = __pa_symbol(&__bss_stop) - 1;
930 933
931 for (i = 0; i < boot_mem_map.nr_map; i++) { 934 for (i = 0; i < boot_mem_map.nr_map; i++) {
932 struct resource *res; 935 struct resource *res;
@@ -966,6 +969,7 @@ static void __init resource_init(void)
966 */ 969 */
967 request_resource(res, &code_resource); 970 request_resource(res, &code_resource);
968 request_resource(res, &data_resource); 971 request_resource(res, &data_resource);
972 request_resource(res, &bss_resource);
969 request_crashkernel(res); 973 request_crashkernel(res);
970 } 974 }
971} 975}
diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c
index 88be966d3e61..d84b9066b465 100644
--- a/arch/mips/kernel/smp.c
+++ b/arch/mips/kernel/smp.c
@@ -48,7 +48,7 @@
48#include <asm/setup.h> 48#include <asm/setup.h>
49#include <asm/maar.h> 49#include <asm/maar.h>
50 50
51int __cpu_number_map[NR_CPUS]; /* Map physical to logical */ 51int __cpu_number_map[CONFIG_MIPS_NR_CPU_NR_MAP]; /* Map physical to logical */
52EXPORT_SYMBOL(__cpu_number_map); 52EXPORT_SYMBOL(__cpu_number_map);
53 53
54int __cpu_logical_map[NR_CPUS]; /* Map logical to physical */ 54int __cpu_logical_map[NR_CPUS]; /* Map logical to physical */
diff --git a/arch/mips/lantiq/xway/sysctrl.c b/arch/mips/lantiq/xway/sysctrl.c
index 7611c3013793..52500d3b7004 100644
--- a/arch/mips/lantiq/xway/sysctrl.c
+++ b/arch/mips/lantiq/xway/sysctrl.c
@@ -446,9 +446,9 @@ void __init ltq_soc_init(void)
446 446
447 /* add our generic xway clocks */ 447 /* add our generic xway clocks */
448 clkdev_add_pmu("10000000.fpi", NULL, 0, 0, PMU_FPI); 448 clkdev_add_pmu("10000000.fpi", NULL, 0, 0, PMU_FPI);
449 clkdev_add_pmu("1e100400.serial", NULL, 0, 0, PMU_ASC0);
450 clkdev_add_pmu("1e100a00.gptu", NULL, 1, 0, PMU_GPT); 449 clkdev_add_pmu("1e100a00.gptu", NULL, 1, 0, PMU_GPT);
451 clkdev_add_pmu("1e100bb0.stp", NULL, 1, 0, PMU_STP); 450 clkdev_add_pmu("1e100bb0.stp", NULL, 1, 0, PMU_STP);
451 clkdev_add_pmu("1e100c00.serial", NULL, 0, 0, PMU_ASC1);
452 clkdev_add_pmu("1e104100.dma", NULL, 1, 0, PMU_DMA); 452 clkdev_add_pmu("1e104100.dma", NULL, 1, 0, PMU_DMA);
453 clkdev_add_pmu("1e100800.spi", NULL, 1, 0, PMU_SPI); 453 clkdev_add_pmu("1e100800.spi", NULL, 1, 0, PMU_SPI);
454 clkdev_add_pmu("1e105300.ebu", NULL, 0, 0, PMU_EBU); 454 clkdev_add_pmu("1e105300.ebu", NULL, 0, 0, PMU_EBU);
@@ -462,10 +462,8 @@ void __init ltq_soc_init(void)
462 clkdev_add_pmu("1e180000.etop", NULL, 1, 0, PMU_PPE); 462 clkdev_add_pmu("1e180000.etop", NULL, 1, 0, PMU_PPE);
463 } 463 }
464 464
465 if (!of_machine_is_compatible("lantiq,ase")) { 465 if (!of_machine_is_compatible("lantiq,ase"))
466 clkdev_add_pmu("1e100c00.serial", NULL, 0, 0, PMU_ASC1);
467 clkdev_add_pci(); 466 clkdev_add_pci();
468 }
469 467
470 if (of_machine_is_compatible("lantiq,grx390") || 468 if (of_machine_is_compatible("lantiq,grx390") ||
471 of_machine_is_compatible("lantiq,ar10")) { 469 of_machine_is_compatible("lantiq,ar10")) {
diff --git a/arch/mips/lasat/picvue_proc.c b/arch/mips/lasat/picvue_proc.c
index dd292dcec684..a8103f6972cd 100644
--- a/arch/mips/lasat/picvue_proc.c
+++ b/arch/mips/lasat/picvue_proc.c
@@ -197,8 +197,7 @@ static int __init pvc_proc_init(void)
197 if (proc_entry == NULL) 197 if (proc_entry == NULL)
198 goto error; 198 goto error;
199 199
200 init_timer(&timer); 200 setup_timer(&timer, pvc_proc_timerfunc, 0UL);
201 timer.function = pvc_proc_timerfunc;
202 201
203 return 0; 202 return 0;
204error: 203error:
diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c
index 16d9ef5a78c5..da6c1c0c30c1 100644
--- a/arch/mips/math-emu/cp1emu.c
+++ b/arch/mips/math-emu/cp1emu.c
@@ -810,7 +810,7 @@ do { \
810#define SITOREG(si, x) \ 810#define SITOREG(si, x) \
811do { \ 811do { \
812 if (cop1_64bit(xcp) && !hybrid_fprs()) { \ 812 if (cop1_64bit(xcp) && !hybrid_fprs()) { \
813 unsigned i; \ 813 unsigned int i; \
814 set_fpr32(&ctx->fpr[x], 0, si); \ 814 set_fpr32(&ctx->fpr[x], 0, si); \
815 for (i = 1; i < ARRAY_SIZE(ctx->fpr[x].val32); i++) \ 815 for (i = 1; i < ARRAY_SIZE(ctx->fpr[x].val32); i++) \
816 set_fpr32(&ctx->fpr[x], i, 0); \ 816 set_fpr32(&ctx->fpr[x], i, 0); \
@@ -823,7 +823,7 @@ do { \
823 823
824#define SITOHREG(si, x) \ 824#define SITOHREG(si, x) \
825do { \ 825do { \
826 unsigned i; \ 826 unsigned int i; \
827 set_fpr32(&ctx->fpr[x], 1, si); \ 827 set_fpr32(&ctx->fpr[x], 1, si); \
828 for (i = 2; i < ARRAY_SIZE(ctx->fpr[x].val32); i++) \ 828 for (i = 2; i < ARRAY_SIZE(ctx->fpr[x].val32); i++) \
829 set_fpr32(&ctx->fpr[x], i, 0); \ 829 set_fpr32(&ctx->fpr[x], i, 0); \
@@ -834,7 +834,7 @@ do { \
834 834
835#define DITOREG(di, x) \ 835#define DITOREG(di, x) \
836do { \ 836do { \
837 unsigned fpr, i; \ 837 unsigned int fpr, i; \
838 fpr = (x) & ~(cop1_64bit(xcp) ^ 1); \ 838 fpr = (x) & ~(cop1_64bit(xcp) ^ 1); \
839 set_fpr64(&ctx->fpr[fpr], 0, di); \ 839 set_fpr64(&ctx->fpr[fpr], 0, di); \
840 for (i = 1; i < ARRAY_SIZE(ctx->fpr[x].val64); i++) \ 840 for (i = 1; i < ARRAY_SIZE(ctx->fpr[x].val64); i++) \
@@ -1465,7 +1465,7 @@ DEF3OP(nmsub, dp, ieee754dp_mul, ieee754dp_sub, ieee754dp_neg);
1465static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx, 1465static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
1466 mips_instruction ir, void __user **fault_addr) 1466 mips_instruction ir, void __user **fault_addr)
1467{ 1467{
1468 unsigned rcsr = 0; /* resulting csr */ 1468 unsigned int rcsr = 0; /* resulting csr */
1469 1469
1470 MIPS_FPU_EMU_INC_STATS(cp1xops); 1470 MIPS_FPU_EMU_INC_STATS(cp1xops);
1471 1471
@@ -1661,10 +1661,10 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
1661 mips_instruction ir) 1661 mips_instruction ir)
1662{ 1662{
1663 int rfmt; /* resulting format */ 1663 int rfmt; /* resulting format */
1664 unsigned rcsr = 0; /* resulting csr */ 1664 unsigned int rcsr = 0; /* resulting csr */
1665 unsigned int oldrm; 1665 unsigned int oldrm;
1666 unsigned int cbit; 1666 unsigned int cbit;
1667 unsigned cond; 1667 unsigned int cond;
1668 union { 1668 union {
1669 union ieee754dp d; 1669 union ieee754dp d;
1670 union ieee754sp s; 1670 union ieee754sp s;
@@ -1795,7 +1795,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
1795 SPFROMREG(fs, MIPSInst_FS(ir)); 1795 SPFROMREG(fs, MIPSInst_FS(ir));
1796 SPFROMREG(fd, MIPSInst_FD(ir)); 1796 SPFROMREG(fd, MIPSInst_FD(ir));
1797 rv.s = ieee754sp_maddf(fd, fs, ft); 1797 rv.s = ieee754sp_maddf(fd, fs, ft);
1798 break; 1798 goto copcsr;
1799 } 1799 }
1800 1800
1801 case fmsubf_op: { 1801 case fmsubf_op: {
@@ -1809,7 +1809,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
1809 SPFROMREG(fs, MIPSInst_FS(ir)); 1809 SPFROMREG(fs, MIPSInst_FS(ir));
1810 SPFROMREG(fd, MIPSInst_FD(ir)); 1810 SPFROMREG(fd, MIPSInst_FD(ir));
1811 rv.s = ieee754sp_msubf(fd, fs, ft); 1811 rv.s = ieee754sp_msubf(fd, fs, ft);
1812 break; 1812 goto copcsr;
1813 } 1813 }
1814 1814
1815 case frint_op: { 1815 case frint_op: {
@@ -1834,7 +1834,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
1834 SPFROMREG(fs, MIPSInst_FS(ir)); 1834 SPFROMREG(fs, MIPSInst_FS(ir));
1835 rv.w = ieee754sp_2008class(fs); 1835 rv.w = ieee754sp_2008class(fs);
1836 rfmt = w_fmt; 1836 rfmt = w_fmt;
1837 break; 1837 goto copcsr;
1838 } 1838 }
1839 1839
1840 case fmin_op: { 1840 case fmin_op: {
@@ -1847,7 +1847,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
1847 SPFROMREG(ft, MIPSInst_FT(ir)); 1847 SPFROMREG(ft, MIPSInst_FT(ir));
1848 SPFROMREG(fs, MIPSInst_FS(ir)); 1848 SPFROMREG(fs, MIPSInst_FS(ir));
1849 rv.s = ieee754sp_fmin(fs, ft); 1849 rv.s = ieee754sp_fmin(fs, ft);
1850 break; 1850 goto copcsr;
1851 } 1851 }
1852 1852
1853 case fmina_op: { 1853 case fmina_op: {
@@ -1860,7 +1860,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
1860 SPFROMREG(ft, MIPSInst_FT(ir)); 1860 SPFROMREG(ft, MIPSInst_FT(ir));
1861 SPFROMREG(fs, MIPSInst_FS(ir)); 1861 SPFROMREG(fs, MIPSInst_FS(ir));
1862 rv.s = ieee754sp_fmina(fs, ft); 1862 rv.s = ieee754sp_fmina(fs, ft);
1863 break; 1863 goto copcsr;
1864 } 1864 }
1865 1865
1866 case fmax_op: { 1866 case fmax_op: {
@@ -1873,7 +1873,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
1873 SPFROMREG(ft, MIPSInst_FT(ir)); 1873 SPFROMREG(ft, MIPSInst_FT(ir));
1874 SPFROMREG(fs, MIPSInst_FS(ir)); 1874 SPFROMREG(fs, MIPSInst_FS(ir));
1875 rv.s = ieee754sp_fmax(fs, ft); 1875 rv.s = ieee754sp_fmax(fs, ft);
1876 break; 1876 goto copcsr;
1877 } 1877 }
1878 1878
1879 case fmaxa_op: { 1879 case fmaxa_op: {
@@ -1886,7 +1886,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
1886 SPFROMREG(ft, MIPSInst_FT(ir)); 1886 SPFROMREG(ft, MIPSInst_FT(ir));
1887 SPFROMREG(fs, MIPSInst_FS(ir)); 1887 SPFROMREG(fs, MIPSInst_FS(ir));
1888 rv.s = ieee754sp_fmaxa(fs, ft); 1888 rv.s = ieee754sp_fmaxa(fs, ft);
1889 break; 1889 goto copcsr;
1890 } 1890 }
1891 1891
1892 case fabs_op: 1892 case fabs_op:
@@ -2029,9 +2029,10 @@ copcsr:
2029 2029
2030 default: 2030 default:
2031 if (!NO_R6EMU && MIPSInst_FUNC(ir) >= fcmp_op) { 2031 if (!NO_R6EMU && MIPSInst_FUNC(ir) >= fcmp_op) {
2032 unsigned cmpop = MIPSInst_FUNC(ir) - fcmp_op; 2032 unsigned int cmpop;
2033 union ieee754sp fs, ft; 2033 union ieee754sp fs, ft;
2034 2034
2035 cmpop = MIPSInst_FUNC(ir) - fcmp_op;
2035 SPFROMREG(fs, MIPSInst_FS(ir)); 2036 SPFROMREG(fs, MIPSInst_FS(ir));
2036 SPFROMREG(ft, MIPSInst_FT(ir)); 2037 SPFROMREG(ft, MIPSInst_FT(ir));
2037 rv.w = ieee754sp_cmp(fs, ft, 2038 rv.w = ieee754sp_cmp(fs, ft,
@@ -2165,7 +2166,7 @@ copcsr:
2165 DPFROMREG(fs, MIPSInst_FS(ir)); 2166 DPFROMREG(fs, MIPSInst_FS(ir));
2166 DPFROMREG(fd, MIPSInst_FD(ir)); 2167 DPFROMREG(fd, MIPSInst_FD(ir));
2167 rv.d = ieee754dp_maddf(fd, fs, ft); 2168 rv.d = ieee754dp_maddf(fd, fs, ft);
2168 break; 2169 goto copcsr;
2169 } 2170 }
2170 2171
2171 case fmsubf_op: { 2172 case fmsubf_op: {
@@ -2179,7 +2180,7 @@ copcsr:
2179 DPFROMREG(fs, MIPSInst_FS(ir)); 2180 DPFROMREG(fs, MIPSInst_FS(ir));
2180 DPFROMREG(fd, MIPSInst_FD(ir)); 2181 DPFROMREG(fd, MIPSInst_FD(ir));
2181 rv.d = ieee754dp_msubf(fd, fs, ft); 2182 rv.d = ieee754dp_msubf(fd, fs, ft);
2182 break; 2183 goto copcsr;
2183 } 2184 }
2184 2185
2185 case frint_op: { 2186 case frint_op: {
@@ -2204,7 +2205,7 @@ copcsr:
2204 DPFROMREG(fs, MIPSInst_FS(ir)); 2205 DPFROMREG(fs, MIPSInst_FS(ir));
2205 rv.l = ieee754dp_2008class(fs); 2206 rv.l = ieee754dp_2008class(fs);
2206 rfmt = l_fmt; 2207 rfmt = l_fmt;
2207 break; 2208 goto copcsr;
2208 } 2209 }
2209 2210
2210 case fmin_op: { 2211 case fmin_op: {
@@ -2217,7 +2218,7 @@ copcsr:
2217 DPFROMREG(ft, MIPSInst_FT(ir)); 2218 DPFROMREG(ft, MIPSInst_FT(ir));
2218 DPFROMREG(fs, MIPSInst_FS(ir)); 2219 DPFROMREG(fs, MIPSInst_FS(ir));
2219 rv.d = ieee754dp_fmin(fs, ft); 2220 rv.d = ieee754dp_fmin(fs, ft);
2220 break; 2221 goto copcsr;
2221 } 2222 }
2222 2223
2223 case fmina_op: { 2224 case fmina_op: {
@@ -2230,7 +2231,7 @@ copcsr:
2230 DPFROMREG(ft, MIPSInst_FT(ir)); 2231 DPFROMREG(ft, MIPSInst_FT(ir));
2231 DPFROMREG(fs, MIPSInst_FS(ir)); 2232 DPFROMREG(fs, MIPSInst_FS(ir));
2232 rv.d = ieee754dp_fmina(fs, ft); 2233 rv.d = ieee754dp_fmina(fs, ft);
2233 break; 2234 goto copcsr;
2234 } 2235 }
2235 2236
2236 case fmax_op: { 2237 case fmax_op: {
@@ -2243,7 +2244,7 @@ copcsr:
2243 DPFROMREG(ft, MIPSInst_FT(ir)); 2244 DPFROMREG(ft, MIPSInst_FT(ir));
2244 DPFROMREG(fs, MIPSInst_FS(ir)); 2245 DPFROMREG(fs, MIPSInst_FS(ir));
2245 rv.d = ieee754dp_fmax(fs, ft); 2246 rv.d = ieee754dp_fmax(fs, ft);
2246 break; 2247 goto copcsr;
2247 } 2248 }
2248 2249
2249 case fmaxa_op: { 2250 case fmaxa_op: {
@@ -2256,7 +2257,7 @@ copcsr:
2256 DPFROMREG(ft, MIPSInst_FT(ir)); 2257 DPFROMREG(ft, MIPSInst_FT(ir));
2257 DPFROMREG(fs, MIPSInst_FS(ir)); 2258 DPFROMREG(fs, MIPSInst_FS(ir));
2258 rv.d = ieee754dp_fmaxa(fs, ft); 2259 rv.d = ieee754dp_fmaxa(fs, ft);
2259 break; 2260 goto copcsr;
2260 } 2261 }
2261 2262
2262 case fabs_op: 2263 case fabs_op:
@@ -2379,9 +2380,10 @@ dcopuop:
2379 2380
2380 default: 2381 default:
2381 if (!NO_R6EMU && MIPSInst_FUNC(ir) >= fcmp_op) { 2382 if (!NO_R6EMU && MIPSInst_FUNC(ir) >= fcmp_op) {
2382 unsigned cmpop = MIPSInst_FUNC(ir) - fcmp_op; 2383 unsigned int cmpop;
2383 union ieee754dp fs, ft; 2384 union ieee754dp fs, ft;
2384 2385
2386 cmpop = MIPSInst_FUNC(ir) - fcmp_op;
2385 DPFROMREG(fs, MIPSInst_FS(ir)); 2387 DPFROMREG(fs, MIPSInst_FS(ir));
2386 DPFROMREG(ft, MIPSInst_FT(ir)); 2388 DPFROMREG(ft, MIPSInst_FT(ir));
2387 rv.w = ieee754dp_cmp(fs, ft, 2389 rv.w = ieee754dp_cmp(fs, ft,
diff --git a/arch/mips/math-emu/dp_maddf.c b/arch/mips/math-emu/dp_maddf.c
index e0d9be5fbf4c..7ad79ed411f5 100644
--- a/arch/mips/math-emu/dp_maddf.c
+++ b/arch/mips/math-emu/dp_maddf.c
@@ -45,10 +45,10 @@ static union ieee754dp _dp_maddf(union ieee754dp z, union ieee754dp x,
45{ 45{
46 int re; 46 int re;
47 int rs; 47 int rs;
48 unsigned lxm; 48 unsigned int lxm;
49 unsigned hxm; 49 unsigned int hxm;
50 unsigned lym; 50 unsigned int lym;
51 unsigned hym; 51 unsigned int hym;
52 u64 lrm; 52 u64 lrm;
53 u64 hrm; 53 u64 hrm;
54 u64 lzm; 54 u64 lzm;
diff --git a/arch/mips/math-emu/dp_mul.c b/arch/mips/math-emu/dp_mul.c
index 87d0b44b0614..60c8bfe40947 100644
--- a/arch/mips/math-emu/dp_mul.c
+++ b/arch/mips/math-emu/dp_mul.c
@@ -26,10 +26,10 @@ union ieee754dp ieee754dp_mul(union ieee754dp x, union ieee754dp y)
26 int re; 26 int re;
27 int rs; 27 int rs;
28 u64 rm; 28 u64 rm;
29 unsigned lxm; 29 unsigned int lxm;
30 unsigned hxm; 30 unsigned int hxm;
31 unsigned lym; 31 unsigned int lym;
32 unsigned hym; 32 unsigned int hym;
33 u64 lrm; 33 u64 lrm;
34 u64 hrm; 34 u64 hrm;
35 u64 t; 35 u64 t;
diff --git a/arch/mips/math-emu/dp_sqrt.c b/arch/mips/math-emu/dp_sqrt.c
index cd5bc083001e..cea907b83146 100644
--- a/arch/mips/math-emu/dp_sqrt.c
+++ b/arch/mips/math-emu/dp_sqrt.c
@@ -21,7 +21,7 @@
21 21
22#include "ieee754dp.h" 22#include "ieee754dp.h"
23 23
24static const unsigned table[] = { 24static const unsigned int table[] = {
25 0, 1204, 3062, 5746, 9193, 13348, 18162, 23592, 25 0, 1204, 3062, 5746, 9193, 13348, 18162, 23592,
26 29598, 36145, 43202, 50740, 58733, 67158, 75992, 26 29598, 36145, 43202, 50740, 58733, 67158, 75992,
27 85215, 83599, 71378, 60428, 50647, 41945, 34246, 27 85215, 83599, 71378, 60428, 50647, 41945, 34246,
@@ -33,7 +33,7 @@ union ieee754dp ieee754dp_sqrt(union ieee754dp x)
33{ 33{
34 struct _ieee754_csr oldcsr; 34 struct _ieee754_csr oldcsr;
35 union ieee754dp y, z, t; 35 union ieee754dp y, z, t;
36 unsigned scalx, yh; 36 unsigned int scalx, yh;
37 COMPXDP; 37 COMPXDP;
38 38
39 EXPLODEXDP; 39 EXPLODEXDP;
diff --git a/arch/mips/math-emu/ieee754.h b/arch/mips/math-emu/ieee754.h
index 92dc8fa565cb..e0eb7a965fdf 100644
--- a/arch/mips/math-emu/ieee754.h
+++ b/arch/mips/math-emu/ieee754.h
@@ -165,11 +165,12 @@ struct _ieee754_csr {
165}; 165};
166#define ieee754_csr (*(struct _ieee754_csr *)(&current->thread.fpu.fcr31)) 166#define ieee754_csr (*(struct _ieee754_csr *)(&current->thread.fpu.fcr31))
167 167
168static inline unsigned ieee754_getrm(void) 168static inline unsigned int ieee754_getrm(void)
169{ 169{
170 return (ieee754_csr.rm); 170 return (ieee754_csr.rm);
171} 171}
172static inline unsigned ieee754_setrm(unsigned rm) 172
173static inline unsigned int ieee754_setrm(unsigned int rm)
173{ 174{
174 return (ieee754_csr.rm = rm); 175 return (ieee754_csr.rm = rm);
175} 176}
@@ -177,14 +178,14 @@ static inline unsigned ieee754_setrm(unsigned rm)
177/* 178/*
178 * get current exceptions 179 * get current exceptions
179 */ 180 */
180static inline unsigned ieee754_getcx(void) 181static inline unsigned int ieee754_getcx(void)
181{ 182{
182 return (ieee754_csr.cx); 183 return (ieee754_csr.cx);
183} 184}
184 185
185/* test for current exception condition 186/* test for current exception condition
186 */ 187 */
187static inline int ieee754_cxtest(unsigned n) 188static inline int ieee754_cxtest(unsigned int n)
188{ 189{
189 return (ieee754_csr.cx & n); 190 return (ieee754_csr.cx & n);
190} 191}
@@ -192,21 +193,21 @@ static inline int ieee754_cxtest(unsigned n)
192/* 193/*
193 * get sticky exceptions 194 * get sticky exceptions
194 */ 195 */
195static inline unsigned ieee754_getsx(void) 196static inline unsigned int ieee754_getsx(void)
196{ 197{
197 return (ieee754_csr.sx); 198 return (ieee754_csr.sx);
198} 199}
199 200
200/* clear sticky conditions 201/* clear sticky conditions
201*/ 202*/
202static inline unsigned ieee754_clrsx(void) 203static inline unsigned int ieee754_clrsx(void)
203{ 204{
204 return (ieee754_csr.sx = 0); 205 return (ieee754_csr.sx = 0);
205} 206}
206 207
207/* test for sticky exception condition 208/* test for sticky exception condition
208 */ 209 */
209static inline int ieee754_sxtest(unsigned n) 210static inline int ieee754_sxtest(unsigned int n)
210{ 211{
211 return (ieee754_csr.sx & n); 212 return (ieee754_csr.sx & n);
212} 213}
diff --git a/arch/mips/math-emu/ieee754int.h b/arch/mips/math-emu/ieee754int.h
index dd2071f430e0..06ac0e2ac7ac 100644
--- a/arch/mips/math-emu/ieee754int.h
+++ b/arch/mips/math-emu/ieee754int.h
@@ -54,13 +54,13 @@ static inline int ieee754_class_nan(int xc)
54} 54}
55 55
56#define COMPXSP \ 56#define COMPXSP \
57 unsigned xm; int xe; int xs __maybe_unused; int xc 57 unsigned int xm; int xe; int xs __maybe_unused; int xc
58 58
59#define COMPYSP \ 59#define COMPYSP \
60 unsigned ym; int ye; int ys; int yc 60 unsigned int ym; int ye; int ys; int yc
61 61
62#define COMPZSP \ 62#define COMPZSP \
63 unsigned zm; int ze; int zs; int zc 63 unsigned int zm; int ze; int zs; int zc
64 64
65#define EXPLODESP(v, vc, vs, ve, vm) \ 65#define EXPLODESP(v, vc, vs, ve, vm) \
66{ \ 66{ \
diff --git a/arch/mips/math-emu/ieee754sp.c b/arch/mips/math-emu/ieee754sp.c
index 260e68965907..8423e4c5e415 100644
--- a/arch/mips/math-emu/ieee754sp.c
+++ b/arch/mips/math-emu/ieee754sp.c
@@ -65,7 +65,7 @@ union ieee754sp __cold ieee754sp_nanxcpt(union ieee754sp r)
65 return r; 65 return r;
66} 66}
67 67
68static unsigned ieee754sp_get_rounding(int sn, unsigned xm) 68static unsigned int ieee754sp_get_rounding(int sn, unsigned int xm)
69{ 69{
70 /* inexact must round of 3 bits 70 /* inexact must round of 3 bits
71 */ 71 */
@@ -96,7 +96,7 @@ static unsigned ieee754sp_get_rounding(int sn, unsigned xm)
96 * xe is an unbiased exponent 96 * xe is an unbiased exponent
97 * xm is 3bit extended precision value. 97 * xm is 3bit extended precision value.
98 */ 98 */
99union ieee754sp ieee754sp_format(int sn, int xe, unsigned xm) 99union ieee754sp ieee754sp_format(int sn, int xe, unsigned int xm)
100{ 100{
101 assert(xm); /* we don't gen exact zeros (probably should) */ 101 assert(xm); /* we don't gen exact zeros (probably should) */
102 102
diff --git a/arch/mips/math-emu/ieee754sp.h b/arch/mips/math-emu/ieee754sp.h
index 0f63e4202cff..8c5a63804873 100644
--- a/arch/mips/math-emu/ieee754sp.h
+++ b/arch/mips/math-emu/ieee754sp.h
@@ -69,7 +69,7 @@ static inline int ieee754sp_finite(union ieee754sp x)
69#define SPDNORMY SPDNORMx(ym, ye) 69#define SPDNORMY SPDNORMx(ym, ye)
70#define SPDNORMZ SPDNORMx(zm, ze) 70#define SPDNORMZ SPDNORMx(zm, ze)
71 71
72static inline union ieee754sp buildsp(int s, int bx, unsigned m) 72static inline union ieee754sp buildsp(int s, int bx, unsigned int m)
73{ 73{
74 union ieee754sp r; 74 union ieee754sp r;
75 75
diff --git a/arch/mips/math-emu/sp_div.c b/arch/mips/math-emu/sp_div.c
index 27f6db3a0a4c..23587b31ca87 100644
--- a/arch/mips/math-emu/sp_div.c
+++ b/arch/mips/math-emu/sp_div.c
@@ -23,9 +23,9 @@
23 23
24union ieee754sp ieee754sp_div(union ieee754sp x, union ieee754sp y) 24union ieee754sp ieee754sp_div(union ieee754sp x, union ieee754sp y)
25{ 25{
26 unsigned rm; 26 unsigned int rm;
27 int re; 27 int re;
28 unsigned bm; 28 unsigned int bm;
29 29
30 COMPXSP; 30 COMPXSP;
31 COMPYSP; 31 COMPYSP;
diff --git a/arch/mips/math-emu/sp_fint.c b/arch/mips/math-emu/sp_fint.c
index d5d8495b2cc4..1a35d12b6fc8 100644
--- a/arch/mips/math-emu/sp_fint.c
+++ b/arch/mips/math-emu/sp_fint.c
@@ -23,7 +23,7 @@
23 23
24union ieee754sp ieee754sp_fint(int x) 24union ieee754sp ieee754sp_fint(int x)
25{ 25{
26 unsigned xm; 26 unsigned int xm;
27 int xe; 27 int xe;
28 int xs; 28 int xs;
29 29
diff --git a/arch/mips/math-emu/sp_maddf.c b/arch/mips/math-emu/sp_maddf.c
index 7195fe785d81..f823338dbb65 100644
--- a/arch/mips/math-emu/sp_maddf.c
+++ b/arch/mips/math-emu/sp_maddf.c
@@ -20,9 +20,9 @@ static union ieee754sp _sp_maddf(union ieee754sp z, union ieee754sp x,
20{ 20{
21 int re; 21 int re;
22 int rs; 22 int rs;
23 unsigned rm; 23 unsigned int rm;
24 uint64_t rm64; 24 u64 rm64;
25 uint64_t zm64; 25 u64 zm64;
26 int s; 26 int s;
27 27
28 COMPXSP; 28 COMPXSP;
diff --git a/arch/mips/math-emu/sp_mul.c b/arch/mips/math-emu/sp_mul.c
index d910c43a6f30..4015101fbc37 100644
--- a/arch/mips/math-emu/sp_mul.c
+++ b/arch/mips/math-emu/sp_mul.c
@@ -25,15 +25,15 @@ union ieee754sp ieee754sp_mul(union ieee754sp x, union ieee754sp y)
25{ 25{
26 int re; 26 int re;
27 int rs; 27 int rs;
28 unsigned rm; 28 unsigned int rm;
29 unsigned short lxm; 29 unsigned short lxm;
30 unsigned short hxm; 30 unsigned short hxm;
31 unsigned short lym; 31 unsigned short lym;
32 unsigned short hym; 32 unsigned short hym;
33 unsigned lrm; 33 unsigned int lrm;
34 unsigned hrm; 34 unsigned int hrm;
35 unsigned t; 35 unsigned int t;
36 unsigned at; 36 unsigned int at;
37 37
38 COMPXSP; 38 COMPXSP;
39 COMPYSP; 39 COMPYSP;
diff --git a/arch/mips/mm/dma-default.c b/arch/mips/mm/dma-default.c
index 2e2514e00720..e3e94d05f0fd 100644
--- a/arch/mips/mm/dma-default.c
+++ b/arch/mips/mm/dma-default.c
@@ -179,7 +179,7 @@ static int mips_dma_mmap(struct device *dev, struct vm_area_struct *vma,
179 void *cpu_addr, dma_addr_t dma_addr, size_t size, 179 void *cpu_addr, dma_addr_t dma_addr, size_t size,
180 unsigned long attrs) 180 unsigned long attrs)
181{ 181{
182 unsigned long user_count = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT; 182 unsigned long user_count = vma_pages(vma);
183 unsigned long count = PAGE_ALIGN(size) >> PAGE_SHIFT; 183 unsigned long count = PAGE_ALIGN(size) >> PAGE_SHIFT;
184 unsigned long addr = (unsigned long)cpu_addr; 184 unsigned long addr = (unsigned long)cpu_addr;
185 unsigned long off = vma->vm_pgoff; 185 unsigned long off = vma->vm_pgoff;
diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c
index 5f6ea7d746de..84b7b592b834 100644
--- a/arch/mips/mm/init.c
+++ b/arch/mips/mm/init.c
@@ -402,7 +402,6 @@ int page_is_ram(unsigned long pagenr)
402void __init paging_init(void) 402void __init paging_init(void)
403{ 403{
404 unsigned long max_zone_pfns[MAX_NR_ZONES]; 404 unsigned long max_zone_pfns[MAX_NR_ZONES];
405 unsigned long lastpfn __maybe_unused;
406 405
407 pagetable_init(); 406 pagetable_init();
408 407
@@ -416,17 +415,14 @@ void __init paging_init(void)
416 max_zone_pfns[ZONE_DMA32] = MAX_DMA32_PFN; 415 max_zone_pfns[ZONE_DMA32] = MAX_DMA32_PFN;
417#endif 416#endif
418 max_zone_pfns[ZONE_NORMAL] = max_low_pfn; 417 max_zone_pfns[ZONE_NORMAL] = max_low_pfn;
419 lastpfn = max_low_pfn;
420#ifdef CONFIG_HIGHMEM 418#ifdef CONFIG_HIGHMEM
421 max_zone_pfns[ZONE_HIGHMEM] = highend_pfn; 419 max_zone_pfns[ZONE_HIGHMEM] = highend_pfn;
422 lastpfn = highend_pfn;
423 420
424 if (cpu_has_dc_aliases && max_low_pfn != highend_pfn) { 421 if (cpu_has_dc_aliases && max_low_pfn != highend_pfn) {
425 printk(KERN_WARNING "This processor doesn't support highmem." 422 printk(KERN_WARNING "This processor doesn't support highmem."
426 " %ldk highmem ignored\n", 423 " %ldk highmem ignored\n",
427 (highend_pfn - max_low_pfn) << (PAGE_SHIFT - 10)); 424 (highend_pfn - max_low_pfn) << (PAGE_SHIFT - 10));
428 max_zone_pfns[ZONE_HIGHMEM] = max_low_pfn; 425 max_zone_pfns[ZONE_HIGHMEM] = max_low_pfn;
429 lastpfn = max_low_pfn;
430 } 426 }
431#endif 427#endif
432 428
diff --git a/arch/mips/pci/pci-mt7620.c b/arch/mips/pci/pci-mt7620.c
index 90fba9bf98da..407f155f0bb6 100644
--- a/arch/mips/pci/pci-mt7620.c
+++ b/arch/mips/pci/pci-mt7620.c
@@ -33,14 +33,13 @@
33#define RALINK_GPIOMODE 0x60 33#define RALINK_GPIOMODE 0x60
34 34
35#define PPLL_CFG1 0x9c 35#define PPLL_CFG1 0x9c
36#define PDRV_SW_SET BIT(23)
37 36
38#define PPLL_DRV 0xa0 37#define PPLL_DRV 0xa0
39#define PDRV_SW_SET (1<<31) 38#define PDRV_SW_SET BIT(31)
40#define LC_CKDRVPD (1<<19) 39#define LC_CKDRVPD BIT(19)
41#define LC_CKDRVOHZ (1<<18) 40#define LC_CKDRVOHZ BIT(18)
42#define LC_CKDRVHZ (1<<17) 41#define LC_CKDRVHZ BIT(17)
43#define LC_CKTEST (1<<16) 42#define LC_CKTEST BIT(16)
44 43
45/* PCI Bridge registers */ 44/* PCI Bridge registers */
46#define RALINK_PCI_PCICFG_ADDR 0x00 45#define RALINK_PCI_PCICFG_ADDR 0x00
@@ -66,7 +65,7 @@
66#define PCIEPHY0_CFG 0x90 65#define PCIEPHY0_CFG 0x90
67 66
68#define RALINK_PCIEPHY_P0_CTL_OFFSET 0x7498 67#define RALINK_PCIEPHY_P0_CTL_OFFSET 0x7498
69#define RALINK_PCIE0_CLK_EN (1 << 26) 68#define RALINK_PCIE0_CLK_EN BIT(26)
70 69
71#define BUSY 0x80000000 70#define BUSY 0x80000000
72#define WAITRETRY_MAX 10 71#define WAITRETRY_MAX 10
@@ -121,7 +120,7 @@ static int wait_pciephy_busy(void)
121 else 120 else
122 break; 121 break;
123 if (retry++ > WAITRETRY_MAX) { 122 if (retry++ > WAITRETRY_MAX) {
124 printk(KERN_WARN "PCIE-PHY retry failed.\n"); 123 pr_warn("PCIE-PHY retry failed.\n");
125 return -1; 124 return -1;
126 } 125 }
127 } 126 }
diff --git a/arch/mips/pci/pcie-octeon.c b/arch/mips/pci/pcie-octeon.c
index fd2887415bc8..87ba86bd8696 100644
--- a/arch/mips/pci/pcie-octeon.c
+++ b/arch/mips/pci/pcie-octeon.c
@@ -639,7 +639,7 @@ static int __cvmx_pcie_rc_initialize_link_gen1(int pcie_port)
639 cvmx_dprintf("PCIe: Port %d link timeout\n", pcie_port); 639 cvmx_dprintf("PCIe: Port %d link timeout\n", pcie_port);
640 return -1; 640 return -1;
641 } 641 }
642 cvmx_wait(10000); 642 __delay(10000);
643 pciercx_cfg032.u32 = cvmx_pcie_cfgx_read(pcie_port, CVMX_PCIERCX_CFG032(pcie_port)); 643 pciercx_cfg032.u32 = cvmx_pcie_cfgx_read(pcie_port, CVMX_PCIERCX_CFG032(pcie_port));
644 } while (pciercx_cfg032.s.dlla == 0); 644 } while (pciercx_cfg032.s.dlla == 0);
645 645
@@ -821,7 +821,7 @@ retry:
821 * don't poll PESCX_CTL_STATUS2[PCIERST], but simply wait a 821 * don't poll PESCX_CTL_STATUS2[PCIERST], but simply wait a
822 * fixed number of cycles. 822 * fixed number of cycles.
823 */ 823 */
824 cvmx_wait(400000); 824 __delay(400000);
825 825
826 /* 826 /*
827 * PESCX_BIST_STATUS2[PCLK_RUN] was missing on pass 1 of 827 * PESCX_BIST_STATUS2[PCLK_RUN] was missing on pass 1 of
@@ -1018,7 +1018,7 @@ retry:
1018 i = in_p_offset; 1018 i = in_p_offset;
1019 while (i--) { 1019 while (i--) {
1020 cvmx_write64_uint32(write_address, 0); 1020 cvmx_write64_uint32(write_address, 0);
1021 cvmx_wait(10000); 1021 __delay(10000);
1022 } 1022 }
1023 1023
1024 /* 1024 /*
@@ -1034,7 +1034,7 @@ retry:
1034 dbg_data.u64 = cvmx_read_csr(CVMX_PEXP_NPEI_DBG_DATA); 1034 dbg_data.u64 = cvmx_read_csr(CVMX_PEXP_NPEI_DBG_DATA);
1035 old_in_fif_p_count = dbg_data.s.data & 0xff; 1035 old_in_fif_p_count = dbg_data.s.data & 0xff;
1036 cvmx_write64_uint32(write_address, 0); 1036 cvmx_write64_uint32(write_address, 0);
1037 cvmx_wait(10000); 1037 __delay(10000);
1038 dbg_data.u64 = cvmx_read_csr(CVMX_PEXP_NPEI_DBG_DATA); 1038 dbg_data.u64 = cvmx_read_csr(CVMX_PEXP_NPEI_DBG_DATA);
1039 in_fif_p_count = dbg_data.s.data & 0xff; 1039 in_fif_p_count = dbg_data.s.data & 0xff;
1040 } while (in_fif_p_count != ((old_in_fif_p_count+1) & 0xff)); 1040 } while (in_fif_p_count != ((old_in_fif_p_count+1) & 0xff));
@@ -1053,7 +1053,7 @@ retry:
1053 cvmx_dprintf("PCIe: Port %d aligning TLP counters as workaround to maintain ordering\n", pcie_port); 1053 cvmx_dprintf("PCIe: Port %d aligning TLP counters as workaround to maintain ordering\n", pcie_port);
1054 while (in_fif_p_count != 0) { 1054 while (in_fif_p_count != 0) {
1055 cvmx_write64_uint32(write_address, 0); 1055 cvmx_write64_uint32(write_address, 0);
1056 cvmx_wait(10000); 1056 __delay(10000);
1057 in_fif_p_count = (in_fif_p_count + 1) & 0xff; 1057 in_fif_p_count = (in_fif_p_count + 1) & 0xff;
1058 } 1058 }
1059 /* 1059 /*
@@ -1105,7 +1105,7 @@ static int __cvmx_pcie_rc_initialize_link_gen2(int pcie_port)
1105 do { 1105 do {
1106 if (cvmx_get_cycle() - start_cycle > octeon_get_clock_rate()) 1106 if (cvmx_get_cycle() - start_cycle > octeon_get_clock_rate())
1107 return -1; 1107 return -1;
1108 cvmx_wait(10000); 1108 __delay(10000);
1109 pciercx_cfg032.u32 = cvmx_pcie_cfgx_read(pcie_port, CVMX_PCIERCX_CFG032(pcie_port)); 1109 pciercx_cfg032.u32 = cvmx_pcie_cfgx_read(pcie_port, CVMX_PCIERCX_CFG032(pcie_port));
1110 } while ((pciercx_cfg032.s.dlla == 0) || (pciercx_cfg032.s.lt == 1)); 1110 } while ((pciercx_cfg032.s.dlla == 0) || (pciercx_cfg032.s.lt == 1));
1111 1111
diff --git a/arch/mips/ralink/Kconfig b/arch/mips/ralink/Kconfig
index f26736b7080b..1f9cb0e3c79a 100644
--- a/arch/mips/ralink/Kconfig
+++ b/arch/mips/ralink/Kconfig
@@ -31,7 +31,6 @@ choice
31 31
32 config SOC_RT305X 32 config SOC_RT305X
33 bool "RT305x" 33 bool "RT305x"
34 select USB_ARCH_HAS_HCD
35 34
36 config SOC_RT3883 35 config SOC_RT3883
37 bool "RT3883" 36 bool "RT3883"
diff --git a/arch/mips/ralink/mt7620.c b/arch/mips/ralink/mt7620.c
index 9be8b08ae46b..41b71c4352c2 100644
--- a/arch/mips/ralink/mt7620.c
+++ b/arch/mips/ralink/mt7620.c
@@ -145,8 +145,8 @@ static struct rt2880_pmx_func i2c_grp_mt7628[] = {
145 FUNC("i2c", 0, 4, 2), 145 FUNC("i2c", 0, 4, 2),
146}; 146};
147 147
148static struct rt2880_pmx_func refclk_grp_mt7628[] = { FUNC("reclk", 0, 36, 1) }; 148static struct rt2880_pmx_func refclk_grp_mt7628[] = { FUNC("refclk", 0, 37, 1) };
149static struct rt2880_pmx_func perst_grp_mt7628[] = { FUNC("perst", 0, 37, 1) }; 149static struct rt2880_pmx_func perst_grp_mt7628[] = { FUNC("perst", 0, 36, 1) };
150static struct rt2880_pmx_func wdt_grp_mt7628[] = { FUNC("wdt", 0, 38, 1) }; 150static struct rt2880_pmx_func wdt_grp_mt7628[] = { FUNC("wdt", 0, 38, 1) };
151static struct rt2880_pmx_func spi_grp_mt7628[] = { FUNC("spi", 0, 7, 4) }; 151static struct rt2880_pmx_func spi_grp_mt7628[] = { FUNC("spi", 0, 7, 4) };
152 152
diff --git a/arch/mips/xilfpga/Kconfig b/arch/mips/xilfpga/Kconfig
deleted file mode 100644
index ca7b2368eab7..000000000000
--- a/arch/mips/xilfpga/Kconfig
+++ /dev/null
@@ -1,10 +0,0 @@
1# SPDX-License-Identifier: GPL-2.0
2choice
3 prompt "Machine type"
4 depends on MACH_XILFPGA
5 default XILFPGA_NEXYS4DDR
6
7config XILFPGA_NEXYS4DDR
8 bool "Nexys4DDR by Digilent"
9
10endchoice
diff --git a/arch/mips/xilfpga/Makefile b/arch/mips/xilfpga/Makefile
deleted file mode 100644
index a4deec6fadbc..000000000000
--- a/arch/mips/xilfpga/Makefile
+++ /dev/null
@@ -1,7 +0,0 @@
1#
2# Makefile for the Xilfpga
3#
4
5obj-y += init.o
6obj-y += intc.o
7obj-y += time.o
diff --git a/arch/mips/xilfpga/Platform b/arch/mips/xilfpga/Platform
deleted file mode 100644
index ed375afe3d39..000000000000
--- a/arch/mips/xilfpga/Platform
+++ /dev/null
@@ -1,3 +0,0 @@
1platform-$(CONFIG_MACH_XILFPGA) += xilfpga/
2cflags-$(CONFIG_MACH_XILFPGA) += -I$(srctree)/arch/mips/include/asm/mach-xilfpga
3load-$(CONFIG_MACH_XILFPGA) += 0xffffffff80100000
diff --git a/arch/mips/xilfpga/init.c b/arch/mips/xilfpga/init.c
deleted file mode 100644
index 602e384a26a2..000000000000
--- a/arch/mips/xilfpga/init.c
+++ /dev/null
@@ -1,44 +0,0 @@
1/*
2 * Xilfpga platform setup
3 *
4 * Copyright (C) 2015 Imagination Technologies
5 * Author: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms and conditions of the GNU General Public License,
9 * version 2, as published by the Free Software Foundation.
10 */
11
12#include <linux/of_fdt.h>
13
14#include <asm/prom.h>
15
16#define XILFPGA_UART_BASE 0xb0401000
17
18const char *get_system_type(void)
19{
20 return "MIPSfpga";
21}
22
23void __init plat_mem_setup(void)
24{
25 __dt_setup_arch(__dtb_start);
26 strlcpy(arcs_cmdline, boot_command_line, COMMAND_LINE_SIZE);
27}
28
29void __init prom_init(void)
30{
31 setup_8250_early_printk_port(XILFPGA_UART_BASE, 2, 50000);
32}
33
34void __init prom_free_prom_memory(void)
35{
36}
37
38void __init device_tree_init(void)
39{
40 if (!initial_boot_params)
41 return;
42
43 unflatten_and_copy_device_tree();
44}
diff --git a/arch/mips/xilfpga/intc.c b/arch/mips/xilfpga/intc.c
deleted file mode 100644
index a127cca3ae8c..000000000000
--- a/arch/mips/xilfpga/intc.c
+++ /dev/null
@@ -1,22 +0,0 @@
1/*
2 * Xilfpga interrupt controller setup
3 *
4 * Copyright (C) 2015 Imagination Technologies
5 * Author: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms and conditions of the GNU General Public License,
9 * version 2, as published by the Free Software Foundation.
10 */
11
12#include <linux/of.h>
13#include <linux/of_irq.h>
14#include <linux/irqchip.h>
15
16#include <asm/irq_cpu.h>
17
18
19void __init arch_init_irq(void)
20{
21 irqchip_init();
22}
diff --git a/arch/mips/xilfpga/time.c b/arch/mips/xilfpga/time.c
deleted file mode 100644
index 36f3f1870ee2..000000000000
--- a/arch/mips/xilfpga/time.c
+++ /dev/null
@@ -1,41 +0,0 @@
1/*
2 * Xilfpga clocksource/timer setup
3 *
4 * Copyright (C) 2015 Imagination Technologies
5 * Author: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms and conditions of the GNU General Public License,
9 * version 2, as published by the Free Software Foundation.
10 */
11
12#include <linux/clk.h>
13#include <linux/clk-provider.h>
14#include <linux/clocksource.h>
15#include <linux/of.h>
16
17#include <asm/time.h>
18
19void __init plat_time_init(void)
20{
21 struct device_node *np;
22 struct clk *clk;
23
24 of_clk_init(NULL);
25 timer_probe();
26
27 np = of_get_cpu_node(0, NULL);
28 if (!np) {
29 pr_err("Failed to get CPU node\n");
30 return;
31 }
32
33 clk = of_clk_get(np, 0);
34 if (IS_ERR(clk)) {
35 pr_err("Failed to get CPU clock: %ld\n", PTR_ERR(clk));
36 return;
37 }
38
39 mips_hpt_frequency = clk_get_rate(clk) / 2;
40 clk_put(clk);
41}
diff --git a/drivers/tty/serial/bcm63xx_uart.c b/drivers/tty/serial/bcm63xx_uart.c
index 9d1b7bf7378c..b7adc6127b3d 100644
--- a/drivers/tty/serial/bcm63xx_uart.c
+++ b/drivers/tty/serial/bcm63xx_uart.c
@@ -843,8 +843,10 @@ static int bcm_uart_probe(struct platform_device *pdev)
843 if (!res_irq) 843 if (!res_irq)
844 return -ENODEV; 844 return -ENODEV;
845 845
846 clk = pdev->dev.of_node ? of_clk_get(pdev->dev.of_node, 0) : 846 clk = clk_get(&pdev->dev, "refclk");
847 clk_get(&pdev->dev, "periph"); 847 if (IS_ERR(clk) && pdev->dev.of_node)
848 clk = of_clk_get(pdev->dev.of_node, 0);
849
848 if (IS_ERR(clk)) 850 if (IS_ERR(clk))
849 return -ENODEV; 851 return -ENODEV;
850 852
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index c722cbfdc7e6..ca200d1f310a 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -1460,7 +1460,7 @@ config INDYDOG
1460 1460
1461config JZ4740_WDT 1461config JZ4740_WDT
1462 tristate "Ingenic jz4740 SoC hardware watchdog" 1462 tristate "Ingenic jz4740 SoC hardware watchdog"
1463 depends on MACH_JZ4740 1463 depends on MACH_JZ4740 || MACH_JZ4780
1464 select WATCHDOG_CORE 1464 select WATCHDOG_CORE
1465 help 1465 help
1466 Hardware driver for the built-in watchdog timer on Ingenic jz4740 SoCs. 1466 Hardware driver for the built-in watchdog timer on Ingenic jz4740 SoCs.
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-18 21:43:04 -0400