diff options
author | Weinan Li <weinan.z.li@intel.com> | 2017-03-16 21:38:57 -0400 |
---|---|---|
committer | Zhenyu Wang <zhenyuw@linux.intel.com> | 2017-03-29 03:28:51 -0400 |
commit | 88a16b64c3f48d1c7c2b12f1632ba2181eb502de (patch) | |
tree | 10552f449b98ce6c1bf0683886b91ead951be1bc | |
parent | c276be4f38dfef1968400939aa2e33602d0a7156 (diff) |
drm/i915/gvt: emulate SKL_FUSE_STATUS and LCPLL_CTL for virtual monitor detection
Initialize the correct vreg for virtual monitor.
Set PG0/1/2 distribution and fuse download done in SKL_FUSE_STATUS.
Set PLL_ENABLE and PLL_LOCK in LCPLL_CTL.
Guest may need to check these registers for display monitor detection
on Skylake platforms.
Signed-off-by: Weinan Li <weinan.z.li@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
-rw-r--r-- | drivers/gpu/drm/i915/gvt/display.c | 13 |
1 files changed, 12 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/gvt/display.c b/drivers/gpu/drm/i915/gvt/display.c index 5419ae6ec633..79939f93464d 100644 --- a/drivers/gpu/drm/i915/gvt/display.c +++ b/drivers/gpu/drm/i915/gvt/display.c | |||
@@ -172,9 +172,20 @@ static void emulate_monitor_status_change(struct intel_vgpu *vgpu) | |||
172 | SDE_PORTC_HOTPLUG_CPT | | 172 | SDE_PORTC_HOTPLUG_CPT | |
173 | SDE_PORTD_HOTPLUG_CPT); | 173 | SDE_PORTD_HOTPLUG_CPT); |
174 | 174 | ||
175 | if (IS_SKYLAKE(dev_priv)) | 175 | if (IS_SKYLAKE(dev_priv)) { |
176 | vgpu_vreg(vgpu, SDEISR) &= ~(SDE_PORTA_HOTPLUG_SPT | | 176 | vgpu_vreg(vgpu, SDEISR) &= ~(SDE_PORTA_HOTPLUG_SPT | |
177 | SDE_PORTE_HOTPLUG_SPT); | 177 | SDE_PORTE_HOTPLUG_SPT); |
178 | vgpu_vreg(vgpu, SKL_FUSE_STATUS) |= | ||
179 | SKL_FUSE_DOWNLOAD_STATUS | | ||
180 | SKL_FUSE_PG0_DIST_STATUS | | ||
181 | SKL_FUSE_PG1_DIST_STATUS | | ||
182 | SKL_FUSE_PG2_DIST_STATUS; | ||
183 | vgpu_vreg(vgpu, LCPLL1_CTL) |= | ||
184 | LCPLL_PLL_ENABLE | | ||
185 | LCPLL_PLL_LOCK; | ||
186 | vgpu_vreg(vgpu, LCPLL2_CTL) |= LCPLL_PLL_ENABLE; | ||
187 | |||
188 | } | ||
178 | 189 | ||
179 | if (intel_vgpu_has_monitor_on_port(vgpu, PORT_B)) { | 190 | if (intel_vgpu_has_monitor_on_port(vgpu, PORT_B)) { |
180 | vgpu_vreg(vgpu, SDEISR) |= SDE_PORTB_HOTPLUG_CPT; | 191 | vgpu_vreg(vgpu, SDEISR) |= SDE_PORTB_HOTPLUG_CPT; |