diff options
author | Adam Thomson <Adam.Thomson.Opensource@diasemi.com> | 2016-08-08 10:35:23 -0400 |
---|---|---|
committer | Mark Brown <broonie@kernel.org> | 2016-08-08 10:57:07 -0400 |
commit | 8799af0d823512c2ce6ba52259dedfebc84793e2 (patch) | |
tree | 1c6978db06ca3a8a0b6fbc05ece7558eff3ada3b | |
parent | 29b4817d4018df78086157ea3a55c1d9424a7cfc (diff) |
ASoC: da7218: Remove 32KHz PLL mode from driver
Functionality has been removed in latest silicon variants. This
patch removes the feature from the driver to align.
Signed-off-by: Adam Thomson <Adam.Thomson.Opensource@diasemi.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
-rw-r--r-- | sound/soc/codecs/da7218.c | 12 | ||||
-rw-r--r-- | sound/soc/codecs/da7218.h | 2 |
2 files changed, 3 insertions, 11 deletions
diff --git a/sound/soc/codecs/da7218.c b/sound/soc/codecs/da7218.c index 99ce23e113bf..f4435193b6d3 100644 --- a/sound/soc/codecs/da7218.c +++ b/sound/soc/codecs/da7218.c | |||
@@ -1819,7 +1819,7 @@ static int da7218_set_dai_sysclk(struct snd_soc_dai *codec_dai, | |||
1819 | if (da7218->mclk_rate == freq) | 1819 | if (da7218->mclk_rate == freq) |
1820 | return 0; | 1820 | return 0; |
1821 | 1821 | ||
1822 | if (((freq < 2000000) && (freq != 32768)) || (freq > 54000000)) { | 1822 | if ((freq < 2000000) || (freq > 54000000)) { |
1823 | dev_err(codec_dai->dev, "Unsupported MCLK value %d\n", | 1823 | dev_err(codec_dai->dev, "Unsupported MCLK value %d\n", |
1824 | freq); | 1824 | freq); |
1825 | return -EINVAL; | 1825 | return -EINVAL; |
@@ -1866,11 +1866,8 @@ static int da7218_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id, | |||
1866 | u32 freq_ref; | 1866 | u32 freq_ref; |
1867 | u64 frac_div; | 1867 | u64 frac_div; |
1868 | 1868 | ||
1869 | /* Verify 32KHz, 2MHz - 54MHz MCLK provided, and set input divider */ | 1869 | /* Verify 2MHz - 54MHz MCLK provided, and set input divider */ |
1870 | if (da7218->mclk_rate == 32768) { | 1870 | if (da7218->mclk_rate < 2000000) { |
1871 | indiv_bits = DA7218_PLL_INDIV_9_TO_18_MHZ; | ||
1872 | indiv = DA7218_PLL_INDIV_9_TO_18_MHZ_VAL; | ||
1873 | } else if (da7218->mclk_rate < 2000000) { | ||
1874 | dev_err(codec->dev, "PLL input clock %d below valid range\n", | 1871 | dev_err(codec->dev, "PLL input clock %d below valid range\n", |
1875 | da7218->mclk_rate); | 1872 | da7218->mclk_rate); |
1876 | return -EINVAL; | 1873 | return -EINVAL; |
@@ -1911,9 +1908,6 @@ static int da7218_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id, | |||
1911 | case DA7218_SYSCLK_PLL_SRM: | 1908 | case DA7218_SYSCLK_PLL_SRM: |
1912 | pll_ctrl |= DA7218_PLL_MODE_SRM; | 1909 | pll_ctrl |= DA7218_PLL_MODE_SRM; |
1913 | break; | 1910 | break; |
1914 | case DA7218_SYSCLK_PLL_32KHZ: | ||
1915 | pll_ctrl |= DA7218_PLL_MODE_32KHZ; | ||
1916 | break; | ||
1917 | default: | 1911 | default: |
1918 | dev_err(codec->dev, "Invalid PLL config\n"); | 1912 | dev_err(codec->dev, "Invalid PLL config\n"); |
1919 | return -EINVAL; | 1913 | return -EINVAL; |
diff --git a/sound/soc/codecs/da7218.h b/sound/soc/codecs/da7218.h index 477cd37723cf..4f7ec21069a4 100644 --- a/sound/soc/codecs/da7218.h +++ b/sound/soc/codecs/da7218.h | |||
@@ -888,7 +888,6 @@ | |||
888 | #define DA7218_PLL_MODE_BYPASS (0x0 << 6) | 888 | #define DA7218_PLL_MODE_BYPASS (0x0 << 6) |
889 | #define DA7218_PLL_MODE_NORMAL (0x1 << 6) | 889 | #define DA7218_PLL_MODE_NORMAL (0x1 << 6) |
890 | #define DA7218_PLL_MODE_SRM (0x2 << 6) | 890 | #define DA7218_PLL_MODE_SRM (0x2 << 6) |
891 | #define DA7218_PLL_MODE_32KHZ (0x3 << 6) | ||
892 | 891 | ||
893 | /* DA7218_PLL_FRAC_TOP = 0x92 */ | 892 | /* DA7218_PLL_FRAC_TOP = 0x92 */ |
894 | #define DA7218_PLL_FBDIV_FRAC_TOP_SHIFT 0 | 893 | #define DA7218_PLL_FBDIV_FRAC_TOP_SHIFT 0 |
@@ -1371,7 +1370,6 @@ enum da7218_sys_clk { | |||
1371 | DA7218_SYSCLK_MCLK = 0, | 1370 | DA7218_SYSCLK_MCLK = 0, |
1372 | DA7218_SYSCLK_PLL, | 1371 | DA7218_SYSCLK_PLL, |
1373 | DA7218_SYSCLK_PLL_SRM, | 1372 | DA7218_SYSCLK_PLL_SRM, |
1374 | DA7218_SYSCLK_PLL_32KHZ | ||
1375 | }; | 1373 | }; |
1376 | 1374 | ||
1377 | enum da7218_dev_id { | 1375 | enum da7218_dev_id { |