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authorArnd Bergmann <arnd@arndb.de>2017-10-30 07:43:54 -0400
committerArnd Bergmann <arnd@arndb.de>2017-10-30 07:43:54 -0400
commit877b203e15d34d14b2551ba97f9a58daac96f60e (patch)
treea3348007a112125b6366d1535e7da6610148509a
parentd524dc30a57d48a4efffe1dbdee906588ea8eef2 (diff)
parentbc79cce741fab70968141c67974f8e99e31aec47 (diff)
Merge tag 'arm-soc/for-4.15/devicetree' of http://github.com/Broadcom/stblinux into next/dt
Pull "Broadcom devicetree changes for 4.15" from Florian Fainelli: This pull request contains Broadcom ARM-based Device Tree changes for 4.15, please pull the following: - Eric adds support for the CLCD and PWM controller on Cygnus chis - Loic fixes the console path on the Raspberry Pi 3 (already submitted as fixes) and then proceeds with enabling the BCM43438 bluetooth chip on the Raspberry Pi 3 - Rafal specifies the USB ports on the Luxul XWR-1200 - Dan adds support for the Luxul ABR-4500 based on BCM47094, the Luxul XAP-810 and XAP-1440 both based on BCM53573 - Florian adds support for the Broadcom Hurricane 2 SoC by adding general machine binding, clock binding, SoC DTS include file and a DTS for the Ubiquiti Networks UniFi Switch 8 * tag 'arm-soc/for-4.15/devicetree' of http://github.com/Broadcom/stblinux: ARM: dts: Hurricane 2: Add basic support for Ubiquiti UniFi Switch 8 dt-bindings: Add Ubiquiti Networks vendor prefix ARM: dts: Add Broadcom Hurricane 2 DTS include file dt-bindings: Document Broadcom Hurricane 2 clocks dt-bindings: Add documentation for Broadcom Hurricane 2 SoCs ARM: dts: BCM53573: Add DT for Luxul XAP-1440 ARM: dts: BCM53573: Add DT for Luxul XAP-810 ARM: dts: BCM5301X: Add DT for Luxul ABR-4500 ARM: dts: BCM5301X: Add DT for Luxul XBR-4500 ARM: dts: BCM5301X: Specify USB ports for USB LED of Luxul XWR-1200 ARM: dts: bcm2837-rpi-3-b: Add bcm43438 serial slave ARM: dts: bcm283x: Fix console path on RPi3 ARM: dts: cygnus: Add the PWM node ARM: dts: cygnus: Add the CLCD controller
Diffstat
-rw-r--r--Documentation/devicetree/bindings/arm/bcm/brcm,hr2.txt14
-rw-r--r--Documentation/devicetree/bindings/clock/brcm,iproc-clocks.txt14
-rw-r--r--Documentation/devicetree/bindings/vendor-prefixes.txt1
-rw-r--r--arch/arm/boot/dts/Makefile6
-rw-r--r--arch/arm/boot/dts/bcm-cygnus.dtsi18
-rw-r--r--arch/arm/boot/dts/bcm-hr2.dtsi368
-rw-r--r--arch/arm/boot/dts/bcm2835-rpi-zero-w.dts9
-rw-r--r--arch/arm/boot/dts/bcm2837-rpi-3-b.dts10
-rw-r--r--arch/arm/boot/dts/bcm283x.dtsi7
-rw-r--r--arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts3
-rw-r--r--arch/arm/boot/dts/bcm47094-luxul-abr-4500.dts63
-rw-r--r--arch/arm/boot/dts/bcm47094-luxul-xbr-4500.dts63
-rw-r--r--arch/arm/boot/dts/bcm47189-luxul-xap-1440.dts50
-rw-r--r--arch/arm/boot/dts/bcm47189-luxul-xap-810.dts87
-rw-r--r--arch/arm/boot/dts/bcm53340-ubnt-unifi-switch8.dts85
15 files changed, 790 insertions, 8 deletions
diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,hr2.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,hr2.txt
new file mode 100644
index 000000000000..a124c7fc4dcd
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/bcm/brcm,hr2.txt
@@ -0,0 +1,14 @@
1Broadcom Hurricane 2 device tree bindings
2---------------------------------------
3
4Broadcom Hurricane 2 family of SoCs are used for switching control. These SoCs
5are based on Broadcom's iProc SoC architecture and feature a single core Cortex
6A9 ARM CPUs, DDR2/DDR3 memory, PCIe GEN-2, USB 2.0 and USB 3.0, serial and NAND
7flash and a PCIe attached integrated switching engine.
8
9Boards with Hurricane SoCs shall have the following properties:
10
11Required root node property:
12
13BCM53342
14compatible = "brcm,bcm53342", "brcm,hr2";
diff --git a/Documentation/devicetree/bindings/clock/brcm,iproc-clocks.txt b/Documentation/devicetree/bindings/clock/brcm,iproc-clocks.txt
index f2c5f0e4a363..f8e4a93466cb 100644
--- a/Documentation/devicetree/bindings/clock/brcm,iproc-clocks.txt
+++ b/Documentation/devicetree/bindings/clock/brcm,iproc-clocks.txt
@@ -137,6 +137,20 @@ These clock IDs are defined in:
137 ch1_audio audiopll 2 BCM_CYGNUS_AUDIOPLL_CH1 137 ch1_audio audiopll 2 BCM_CYGNUS_AUDIOPLL_CH1
138 ch2_audio audiopll 3 BCM_CYGNUS_AUDIOPLL_CH2 138 ch2_audio audiopll 3 BCM_CYGNUS_AUDIOPLL_CH2
139 139
140Hurricane 2
141------
142PLL and leaf clock compatible strings for Hurricane 2 are:
143 "brcm,hr2-armpll"
144
145The following table defines the set of PLL/clock for Hurricane 2:
146
147 Clock Source Index ID
148 --- ----- ----- ---------
149 crystal N/A N/A N/A
150
151 armpll crystal N/A N/A
152
153
140Northstar and Northstar Plus 154Northstar and Northstar Plus
141------ 155------
142PLL and leaf clock compatible strings for Northstar and Northstar Plus are: 156PLL and leaf clock compatible strings for Northstar and Northstar Plus are:
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
index fced3866f53e..edc3b26a445c 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.txt
+++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
@@ -354,6 +354,7 @@ truly Truly Semiconductors Limited
354tsd Theobroma Systems Design und Consulting GmbH 354tsd Theobroma Systems Design und Consulting GmbH
355tyan Tyan Computer Corporation 355tyan Tyan Computer Corporation
356ucrobotics uCRobotics 356ucrobotics uCRobotics
357ubnt Ubiquiti Networks
357udoo Udoo 358udoo Udoo
358uniwest United Western Technologies Corp (UniWest) 359uniwest United Western Technologies Corp (UniWest)
359upisemi uPI Semiconductor Corp. 360upisemi uPI Semiconductor Corp.
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index cffb7f686996..53d03731e845 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -100,6 +100,8 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \
100 bcm4709-tplink-archer-c9-v1.dtb \ 100 bcm4709-tplink-archer-c9-v1.dtb \
101 bcm47094-dlink-dir-885l.dtb \ 101 bcm47094-dlink-dir-885l.dtb \
102 bcm47094-linksys-panamera.dtb \ 102 bcm47094-linksys-panamera.dtb \
103 bcm47094-luxul-abr-4500.dtb \
104 bcm47094-luxul-xbr-4500.dtb \
103 bcm47094-luxul-xwr-3100.dtb \ 105 bcm47094-luxul-xwr-3100.dtb \
104 bcm47094-netgear-r8500.dtb \ 106 bcm47094-netgear-r8500.dtb \
105 bcm94708.dtb \ 107 bcm94708.dtb \
@@ -108,6 +110,8 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \
108 bcm953012hr.dtb \ 110 bcm953012hr.dtb \
109 bcm953012k.dtb 111 bcm953012k.dtb
110dtb-$(CONFIG_ARCH_BCM_53573) += \ 112dtb-$(CONFIG_ARCH_BCM_53573) += \
113 bcm47189-luxul-xap-1440.dtb \
114 bcm47189-luxul-xap-810.dtb \
111 bcm47189-tenda-ac9.dtb \ 115 bcm47189-tenda-ac9.dtb \
112 bcm947189acdbmr.dtb 116 bcm947189acdbmr.dtb
113dtb-$(CONFIG_ARCH_BCM_63XX) += \ 117dtb-$(CONFIG_ARCH_BCM_63XX) += \
@@ -117,6 +121,8 @@ dtb-$(CONFIG_ARCH_BCM_CYGNUS) += \
117 bcm911360k.dtb \ 121 bcm911360k.dtb \
118 bcm958300k.dtb \ 122 bcm958300k.dtb \
119 bcm958305k.dtb 123 bcm958305k.dtb
124dtb-$(CONFIG_ARCH_BCM_HR2) += \
125 bcm53340-ubnt-unifi-switch8.dtb
120dtb-$(CONFIG_ARCH_BCM_MOBILE) += \ 126dtb-$(CONFIG_ARCH_BCM_MOBILE) += \
121 bcm28155-ap.dtb \ 127 bcm28155-ap.dtb \
122 bcm21664-garnet.dtb \ 128 bcm21664-garnet.dtb \
diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi b/arch/arm/boot/dts/bcm-cygnus.dtsi
index 86e8c155d175..699fdf94d139 100644
--- a/arch/arm/boot/dts/bcm-cygnus.dtsi
+++ b/arch/arm/boot/dts/bcm-cygnus.dtsi
@@ -473,6 +473,16 @@
473 status = "disabled"; 473 status = "disabled";
474 }; 474 };
475 475
476 clcd: clcd@180a0000 {
477 compatible = "arm,pl111", "arm,primecell";
478 reg = <0x180a0000 0x1000>;
479 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
480 interrupt-names = "combined";
481 clocks = <&axi41_clk>, <&apb_clk>;
482 clock-names = "clcdclk", "apb_pclk";
483 status = "disabled";
484 };
485
476 v3d: v3d@180a2000 { 486 v3d: v3d@180a2000 {
477 compatible = "brcm,cygnus-v3d"; 487 compatible = "brcm,cygnus-v3d";
478 reg = <0x180a2000 0x1000>; 488 reg = <0x180a2000 0x1000>;
@@ -575,6 +585,14 @@
575 status = "disabled"; 585 status = "disabled";
576 }; 586 };
577 587
588 pwm: pwm@180aa500 {
589 compatible = "brcm,kona-pwm";
590 reg = <0x180aa500 0xc4>;
591 #pwm-cells = <3>;
592 clocks = <&asiu_clks BCM_CYGNUS_ASIU_PWM_CLK>;
593 status = "disabled";
594 };
595
578 keypad: keypad@180ac000 { 596 keypad: keypad@180ac000 {
579 compatible = "brcm,bcm-keypad"; 597 compatible = "brcm,bcm-keypad";
580 reg = <0x180ac000 0x14c>; 598 reg = <0x180ac000 0x14c>;
diff --git a/arch/arm/boot/dts/bcm-hr2.dtsi b/arch/arm/boot/dts/bcm-hr2.dtsi
new file mode 100644
index 000000000000..3f9cedd8011f
--- /dev/null
+++ b/arch/arm/boot/dts/bcm-hr2.dtsi
@@ -0,0 +1,368 @@
1/*
2 * BSD LICENSE
3 *
4 * Copyright(c) 2017 Broadcom. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * * Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * * Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in
14 * the documentation and/or other materials provided with the
15 * distribution.
16 * * Neither the name of Broadcom Corporation nor the names of its
17 * contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33#include <dt-bindings/interrupt-controller/arm-gic.h>
34#include <dt-bindings/interrupt-controller/irq.h>
35
36/ {
37 compatible = "brcm,hr2";
38 model = "Broadcom Hurricane 2 SoC";
39 interrupt-parent = <&gic>;
40 #address-cells = <1>;
41 #size-cells = <1>;
42
43 cpus {
44 #address-cells = <1>;
45 #size-cells = <0>;
46
47 cpu0: cpu@0 {
48 device_type = "cpu";
49 compatible = "arm,cortex-a9";
50 next-level-cache = <&L2>;
51 reg = <0x0>;
52 };
53 };
54
55 pmu {
56 compatible = "arm,cortex-a9-pmu";
57 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH
58 GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
59 interrupt-affinity = <&cpu0>;
60 };
61
62 mpcore@19000000 {
63 compatible = "simple-bus";
64 ranges = <0x00000000 0x19000000 0x00023000>;
65 #address-cells = <1>;
66 #size-cells = <1>;
67
68 a9pll: arm_clk@0 {
69 #clock-cells = <0>;
70 compatible = "brcm,hr2-armpll";
71 clocks = <&osc>;
72 reg = <0x0 0x1000>;
73 };
74
75 timer@20200 {
76 compatible = "arm,cortex-a9-global-timer";
77 reg = <0x20200 0x100>;
78 interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
79 clocks = <&periph_clk>;
80 };
81
82 twd-timer@20600 {
83 compatible = "arm,cortex-a9-twd-timer";
84 reg = <0x20600 0x20>;
85 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) |
86 IRQ_TYPE_LEVEL_HIGH)>;
87 clocks = <&periph_clk>;
88 };
89
90 twd-watchdog@20620 {
91 compatible = "arm,cortex-a9-twd-wdt";
92 reg = <0x20620 0x20>;
93 interrupts = <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) |
94 IRQ_TYPE_LEVEL_HIGH)>;
95 clocks = <&periph_clk>;
96 };
97
98 gic: interrupt-controller@21000 {
99 compatible = "arm,cortex-a9-gic";
100 #interrupt-cells = <3>;
101 #address-cells = <0>;
102 interrupt-controller;
103 reg = <0x21000 0x1000>,
104 <0x20100 0x100>;
105 };
106
107 L2: l2-cache@22000 {
108 compatible = "arm,pl310-cache";
109 reg = <0x22000 0x1000>;
110 cache-unified;
111 cache-level = <2>;
112 };
113 };
114
115 clocks {
116 #address-cells = <1>;
117 #size-cells = <1>;
118 ranges;
119
120 osc: oscillator {
121 #clock-cells = <0>;
122 compatible = "fixed-clock";
123 clock-frequency = <25000000>;
124 };
125
126 periph_clk: periph_clk {
127 #clock-cells = <0>;
128 compatible = "fixed-factor-clock";
129 clocks = <&a9pll>;
130 clock-div = <2>;
131 clock-mult = <1>;
132 };
133 };
134
135 axi@18000000 {
136 compatible = "simple-bus";
137 ranges = <0x00000000 0x18000000 0x0011c40c>;
138 #address-cells = <1>;
139 #size-cells = <1>;
140
141 uart0: serial@300 {
142 compatible = "ns16550a";
143 reg = <0x0300 0x100>;
144 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
145 clocks = <&osc>;
146 status = "disabled";
147 };
148
149 uart1: serial@400 {
150 compatible = "ns16550a";
151 reg = <0x0400 0x100>;
152 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
153 clocks = <&osc>;
154 status = "disabled";
155 };
156
157 dma@20000 {
158 compatible = "arm,pl330", "arm,primecell";
159 reg = <0x20000 0x1000>;
160 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
161 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
162 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
163 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
164 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
165 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
166 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
167 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
168 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
169 #dma-cells = <1>;
170 status = "disabled";
171 };
172
173 amac0: ethernet@22000 {
174 compatible = "brcm,nsp-amac";
175 reg = <0x22000 0x1000>,
176 <0x110000 0x1000>;
177 reg-names = "amac_base", "idm_base";
178 interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>;
179 status = "disabled";
180 };
181
182 nand: nand@26000 {
183 compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1";
184 reg = <0x26000 0x600>,
185 <0x11b408 0x600>,
186 <0x026f00 0x20>;
187 reg-names = "nand", "iproc-idm", "iproc-ext";
188 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
189
190 #address-cells = <1>;
191 #size-cells = <0>;
192
193 brcm,nand-has-wp;
194 };
195
196 gpiob: gpio@30000 {
197 compatible = "brcm,iproc-hr2-gpio", "brcm,iproc-gpio";
198 reg = <0x30000 0x50>;
199 #gpio-cells = <2>;
200 gpio-controller;
201 ngpios = <4>;
202 interrupt-controller;
203 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
204 };
205
206 pwm: pwm@31000 {
207 compatible = "brcm,iproc-pwm";
208 reg = <0x31000 0x28>;
209 clocks = <&osc>;
210 #pwm-cells = <3>;
211 status = "disabled";
212 };
213
214 rng: rng@33000 {
215 compatible = "brcm,bcm-nsp-rng";
216 reg = <0x33000 0x14>;
217 };
218
219 qspi: qspi@27200 {
220 compatible = "brcm,spi-bcm-qspi", "brcm,spi-nsp-qspi";
221 reg = <0x027200 0x184>,
222 <0x027000 0x124>,
223 <0x11c408 0x004>,
224 <0x0273a0 0x01c>;
225 reg-names = "mspi", "bspi", "intr_regs",
226 "intr_status_reg";
227 interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>,
228 <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>,
229 <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
230 <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>,
231 <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
232 <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>,
233 <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
234 interrupt-names = "spi_lr_fullness_reached",
235 "spi_lr_session_aborted",
236 "spi_lr_impatient",
237 "spi_lr_session_done",
238 "spi_lr_overhead",
239 "mspi_done",
240 "mspi_halted";
241 num-cs = <2>;
242 #address-cells = <1>;
243 #size-cells = <0>;
244
245 /* partitions defined in board DTS */
246 };
247
248 ccbtimer0: timer@34000 {
249 compatible = "arm,sp804";
250 reg = <0x34000 0x1000>;
251 interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
252 <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
253 };
254
255 ccbtimer1: timer@35000 {
256 compatible = "arm,sp804";
257 reg = <0x35000 0x1000>;
258 interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
259 <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
260 };
261
262 i2c0: i2c@38000 {
263 compatible = "brcm,iproc-i2c";
264 reg = <0x38000 0x50>;
265 #address-cells = <1>;
266 #size-cells = <0>;
267 interrupts = <GIC_SPI 95 IRQ_TYPE_NONE>;
268 clock-frequency = <100000>;
269 };
270
271 watchdog@39000 {
272 compatible = "arm,sp805", "arm,primecell";
273 reg = <0x39000 0x1000>;
274 interrupts = <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>;
275 };
276
277 i2c1: i2c@3b000 {
278 compatible = "brcm,iproc-i2c";
279 reg = <0x3b000 0x50>;
280 #address-cells = <1>;
281 #size-cells = <0>;
282 interrupts = <GIC_SPI 96 IRQ_TYPE_NONE>;
283 clock-frequency = <100000>;
284 };
285 };
286
287 pflash: nor@20000000 {
288 compatible = "cfi-flash", "jedec-flash";
289 reg = <0x20000000 0x04000000>;
290 status = "disabled";
291 #address-cells = <1>;
292 #size-cells = <1>;
293
294 /* partitions defined in board DTS */
295 };
296
297 pcie0: pcie@18012000 {
298 compatible = "brcm,iproc-pcie";
299 reg = <0x18012000 0x1000>;
300
301 #interrupt-cells = <1>;
302 interrupt-map-mask = <0 0 0 0>;
303 interrupt-map = <0 0 0 0 &gic GIC_SPI 186 IRQ_TYPE_NONE>;
304
305 linux,pci-domain = <0>;
306
307 bus-range = <0x00 0xff>;
308
309 #address-cells = <3>;
310 #size-cells = <2>;
311 device_type = "pci";
312
313 /* Note: The HW does not support I/O resources. So,
314 * only the memory resource range is being specified.
315 */
316 ranges = <0x82000000 0 0x08000000 0x08000000 0 0x8000000>;
317
318 status = "disabled";
319
320 msi-parent = <&msi0>;
321 msi0: msi-controller {
322 compatible = "brcm,iproc-msi";
323 msi-controller;
324 interrupt-parent = <&gic>;
325 interrupts = <GIC_SPI 182 IRQ_TYPE_NONE>,
326 <GIC_SPI 183 IRQ_TYPE_NONE>,
327 <GIC_SPI 184 IRQ_TYPE_NONE>,
328 <GIC_SPI 185 IRQ_TYPE_NONE>;
329 brcm,pcie-msi-inten;
330 };
331 };
332
333 pcie1: pcie@18013000 {
334 compatible = "brcm,iproc-pcie";
335 reg = <0x18013000 0x1000>;
336
337 #interrupt-cells = <1>;
338 interrupt-map-mask = <0 0 0 0>;
339 interrupt-map = <0 0 0 0 &gic GIC_SPI 192 IRQ_TYPE_NONE>;
340
341 linux,pci-domain = <1>;
342
343 bus-range = <0x00 0xff>;
344
345 #address-cells = <3>;
346 #size-cells = <2>;
347 device_type = "pci";
348
349 /* Note: The HW does not support I/O resources. So,
350 * only the memory resource range is being specified.
351 */
352 ranges = <0x82000000 0 0x40000000 0x40000000 0 0x8000000>;
353
354 status = "disabled";
355
356 msi-parent = <&msi1>;
357 msi1: msi-controller {
358 compatible = "brcm,iproc-msi";
359 msi-controller;
360 interrupt-parent = <&gic>;
361 interrupts = <GIC_SPI 188 IRQ_TYPE_NONE>,
362 <GIC_SPI 189 IRQ_TYPE_NONE>,
363 <GIC_SPI 190 IRQ_TYPE_NONE>,
364 <GIC_SPI 191 IRQ_TYPE_NONE>;
365 brcm,pcie-msi-inten;
366 };
367 };
368};
diff --git a/arch/arm/boot/dts/bcm2835-rpi-zero-w.dts b/arch/arm/boot/dts/bcm2835-rpi-zero-w.dts
index 82651c3eb682..b8565fc33eea 100644
--- a/arch/arm/boot/dts/bcm2835-rpi-zero-w.dts
+++ b/arch/arm/boot/dts/bcm2835-rpi-zero-w.dts
@@ -18,12 +18,9 @@
18 compatible = "raspberrypi,model-zero-w", "brcm,bcm2835"; 18 compatible = "raspberrypi,model-zero-w", "brcm,bcm2835";
19 model = "Raspberry Pi Zero W"; 19 model = "Raspberry Pi Zero W";
20 20
21 /* Needed by firmware to properly init UARTs */ 21 chosen {
22 aliases { 22 /* 8250 auxiliary UART instead of pl011 */
23 uart0 = "/soc/serial@7e201000"; 23 stdout-path = "serial1:115200n8";
24 uart1 = "/soc/serial@7e215040";
25 serial0 = "/soc/serial@7e201000";
26 serial1 = "/soc/serial@7e215040";
27 }; 24 };
28 25
29 leds { 26 leds {
diff --git a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts
index 20725ca487f3..ca588552f37b 100644
--- a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts
+++ b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts
@@ -8,6 +8,11 @@
8 compatible = "raspberrypi,3-model-b", "brcm,bcm2837"; 8 compatible = "raspberrypi,3-model-b", "brcm,bcm2837";
9 model = "Raspberry Pi 3 Model B"; 9 model = "Raspberry Pi 3 Model B";
10 10
11 chosen {
12 /* 8250 auxiliary UART instead of pl011 */
13 stdout-path = "serial1:115200n8";
14 };
15
11 memory { 16 memory {
12 reg = <0 0x40000000>; 17 reg = <0 0x40000000>;
13 }; 18 };
@@ -24,6 +29,11 @@
24 pinctrl-names = "default"; 29 pinctrl-names = "default";
25 pinctrl-0 = <&uart0_gpio32 &gpclk2_gpio43>; 30 pinctrl-0 = <&uart0_gpio32 &gpclk2_gpio43>;
26 status = "okay"; 31 status = "okay";
32
33 bluetooth {
34 compatible = "brcm,bcm43438-bt";
35 max-speed = <2000000>;
36 };
27}; 37};
28 38
29/* uart1 is mapped to the pin header */ 39/* uart1 is mapped to the pin header */
diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi
index 431dcfc900c0..013431e3d7c3 100644
--- a/arch/arm/boot/dts/bcm283x.dtsi
+++ b/arch/arm/boot/dts/bcm283x.dtsi
@@ -20,8 +20,13 @@
20 #address-cells = <1>; 20 #address-cells = <1>;
21 #size-cells = <1>; 21 #size-cells = <1>;
22 22
23 aliases {
24 serial0 = &uart0;
25 serial1 = &uart1;
26 };
27
23 chosen { 28 chosen {
24 bootargs = "earlyprintk console=ttyAMA0"; 29 stdout-path = "serial0:115200n8";
25 }; 30 };
26 31
27 thermal-zones { 32 thermal-zones {
diff --git a/arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts b/arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts
index c544ab302012..ba1c19b1b3eb 100644
--- a/arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts
+++ b/arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts
@@ -57,7 +57,8 @@
57 usb { 57 usb {
58 label = "bcm53xx:green:usb"; 58 label = "bcm53xx:green:usb";
59 gpios = <&chipcommon 8 GPIO_ACTIVE_LOW>; 59 gpios = <&chipcommon 8 GPIO_ACTIVE_LOW>;
60 linux,default-trigger = "none"; 60 trigger-sources = <&ohci_port2>, <&ehci_port2>;
61 linux,default-trigger = "usbport";
61 }; 62 };
62 63
63 status { 64 status {
diff --git a/arch/arm/boot/dts/bcm47094-luxul-abr-4500.dts b/arch/arm/boot/dts/bcm47094-luxul-abr-4500.dts
new file mode 100644
index 000000000000..ecd22a246746
--- /dev/null
+++ b/arch/arm/boot/dts/bcm47094-luxul-abr-4500.dts
@@ -0,0 +1,63 @@
1/*
2 * Copyright (C) 2017 Luxul Inc.
3 *
4 * Licensed under the ISC license.
5 */
6
7/dts-v1/;
8
9#include "bcm4708.dtsi"
10#include "bcm5301x-nand-cs0-bch8.dtsi"
11
12/ {
13 compatible = "luxul,abr-4500-v1", "brcm,bcm47094", "brcm,bcm4708";
14 model = "Luxul ABR-4500 V1";
15
16 chosen {
17 bootargs = "earlycon";
18 };
19
20 memory {
21 reg = <0x00000000 0x08000000
22 0x88000000 0x18000000>;
23 };
24
25 leds {
26 compatible = "gpio-leds";
27
28 status {
29 label = "bcm53xx:green:status";
30 gpios = <&chipcommon 20 GPIO_ACTIVE_LOW>;
31 linux,default-trigger = "timer";
32 };
33
34 usb3 {
35 label = "bcm53xx:green:usb3";
36 gpios = <&chipcommon 19 GPIO_ACTIVE_LOW>;
37 trigger-sources = <&ohci_port1>, <&ehci_port1>,
38 <&xhci_port1>;
39 linux,default-trigger = "usbport";
40 };
41
42 };
43
44 gpio-keys {
45 compatible = "gpio-keys";
46 #address-cells = <1>;
47 #size-cells = <0>;
48
49 restart {
50 label = "Reset";
51 linux,code = <KEY_RESTART>;
52 gpios = <&chipcommon 17 GPIO_ACTIVE_LOW>;
53 };
54 };
55};
56
57&usb3 {
58 vcc-gpio = <&chipcommon 18 GPIO_ACTIVE_HIGH>;
59};
60
61&spi_nor {
62 status = "okay";
63};
diff --git a/arch/arm/boot/dts/bcm47094-luxul-xbr-4500.dts b/arch/arm/boot/dts/bcm47094-luxul-xbr-4500.dts
new file mode 100644
index 000000000000..15ffb1abc440
--- /dev/null
+++ b/arch/arm/boot/dts/bcm47094-luxul-xbr-4500.dts
@@ -0,0 +1,63 @@
1/*
2 * Copyright (C) 2017 Luxul Inc.
3 *
4 * Licensed under the ISC license.
5 */
6
7/dts-v1/;
8
9#include "bcm4708.dtsi"
10#include "bcm5301x-nand-cs0-bch8.dtsi"
11
12/ {
13 compatible = "luxul,xbr-4500-v1", "brcm,bcm47094", "brcm,bcm4708";
14 model = "Luxul XBR-4500 V1";
15
16 chosen {
17 bootargs = "earlycon";
18 };
19
20 memory {
21 reg = <0x00000000 0x08000000
22 0x88000000 0x18000000>;
23 };
24
25 leds {
26 compatible = "gpio-leds";
27
28 status {
29 label = "bcm53xx:green:status";
30 gpios = <&chipcommon 20 GPIO_ACTIVE_HIGH>;
31 linux,default-trigger = "timer";
32 };
33
34 usb3 {
35 label = "bcm53xx:green:usb3";
36 gpios = <&chipcommon 19 GPIO_ACTIVE_HIGH>;
37 trigger-sources = <&ohci_port1>, <&ehci_port1>,
38 <&xhci_port1>;
39 linux,default-trigger = "usbport";
40 };
41
42 };
43
44 gpio-keys {
45 compatible = "gpio-keys";
46 #address-cells = <1>;
47 #size-cells = <0>;
48
49 restart {
50 label = "Reset";
51 linux,code = <KEY_RESTART>;
52 gpios = <&chipcommon 17 GPIO_ACTIVE_LOW>;
53 };
54 };
55};
56
57&usb3 {
58 vcc-gpio = <&chipcommon 18 GPIO_ACTIVE_HIGH>;
59};
60
61&spi_nor {
62 status = "okay";
63};
diff --git a/arch/arm/boot/dts/bcm47189-luxul-xap-1440.dts b/arch/arm/boot/dts/bcm47189-luxul-xap-1440.dts
new file mode 100644
index 000000000000..74c83b0ca54e
--- /dev/null
+++ b/arch/arm/boot/dts/bcm47189-luxul-xap-1440.dts
@@ -0,0 +1,50 @@
1/*
2 * Copyright 2017 Luxul Inc.
3 *
4 * Licensed under the ISC license.
5 */
6
7/dts-v1/;
8
9#include "bcm53573.dtsi"
10
11/ {
12 compatible = "luxul,xap-1440-v1", "brcm,bcm47189", "brcm,bcm53573";
13 model = "Luxul XAP-1440 V1";
14
15 chosen {
16 bootargs = "earlycon";
17 };
18
19 memory {
20 reg = <0x00000000 0x08000000>;
21 };
22
23 leds {
24 compatible = "gpio-leds";
25
26 wlan {
27 label = "bcm53xx:blue:wlan";
28 gpios = <&chipcommon 10 GPIO_ACTIVE_LOW>;
29 linux,default-trigger = "default-off";
30 };
31
32 system {
33 label = "bcm53xx:green:system";
34 gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>;
35 linux,default-trigger = "timer";
36 };
37 };
38
39 gpio-keys {
40 compatible = "gpio-keys";
41 #address-cells = <1>;
42 #size-cells = <0>;
43
44 restart {
45 label = "Reset";
46 linux,code = <KEY_RESTART>;
47 gpios = <&chipcommon 7 GPIO_ACTIVE_LOW>;
48 };
49 };
50};
diff --git a/arch/arm/boot/dts/bcm47189-luxul-xap-810.dts b/arch/arm/boot/dts/bcm47189-luxul-xap-810.dts
new file mode 100644
index 000000000000..214df18f3a75
--- /dev/null
+++ b/arch/arm/boot/dts/bcm47189-luxul-xap-810.dts
@@ -0,0 +1,87 @@
1/*
2 * Copyright 2017 Luxul Inc.
3 *
4 * Licensed under the ISC license.
5 */
6
7/dts-v1/;
8
9#include "bcm53573.dtsi"
10
11/ {
12 compatible = "luxul,xap-810-v1", "brcm,bcm47189", "brcm,bcm53573";
13 model = "Luxul XAP-810 V1";
14
15 chosen {
16 bootargs = "earlycon";
17 };
18
19 memory {
20 reg = <0x00000000 0x08000000>;
21 };
22
23 leds {
24 compatible = "gpio-leds";
25
26 5ghz {
27 label = "bcm53xx:blue:5ghz";
28 gpios = <&chipcommon 11 GPIO_ACTIVE_HIGH>;
29 linux,default-trigger = "default-off";
30 };
31
32 system {
33 label = "bcm53xx:green:system";
34 gpios = <&chipcommon 15 GPIO_ACTIVE_HIGH>;
35 linux,default-trigger = "timer";
36 };
37 };
38
39 pcie0_leds {
40 compatible = "gpio-leds";
41
42 2ghz {
43 label = "bcm53xx:blue:2ghz";
44 gpios = <&pcie0_chipcommon 3 GPIO_ACTIVE_HIGH>;
45 linux,default-trigger = "default-off";
46 };
47 };
48
49 gpio-keys {
50 compatible = "gpio-keys";
51 #address-cells = <1>;
52 #size-cells = <0>;
53
54 restart {
55 label = "Reset";
56 linux,code = <KEY_RESTART>;
57 gpios = <&chipcommon 7 GPIO_ACTIVE_LOW>;
58 };
59 };
60};
61
62&pcie0 {
63 ranges = <0x00000000 0 0 0 0 0x00100000>;
64 #address-cells = <3>;
65 #size-cells = <2>;
66
67 bridge@0,0,0 {
68 reg = <0x0000 0 0 0 0>;
69 ranges = <0x00000000 0 0 0 0 0 0 0x00100000>;
70 #address-cells = <3>;
71 #size-cells = <2>;
72
73 wifi@0,1,0 {
74 reg = <0x0000 0 0 0 0>;
75 ranges = <0x00000000 0 0 0 0x00100000>;
76 #address-cells = <1>;
77 #size-cells = <1>;
78
79 pcie0_chipcommon: chipcommon@0 {
80 reg = <0 0x1000>;
81
82 gpio-controller;
83 #gpio-cells = <2>;
84 };
85 };
86 };
87};
diff --git a/arch/arm/boot/dts/bcm53340-ubnt-unifi-switch8.dts b/arch/arm/boot/dts/bcm53340-ubnt-unifi-switch8.dts
new file mode 100644
index 000000000000..431cda514230
--- /dev/null
+++ b/arch/arm/boot/dts/bcm53340-ubnt-unifi-switch8.dts
@@ -0,0 +1,85 @@
1/*
2 * DTS for Unifi Switch 8 port
3 *
4 * Copyright (C) 2017 Florian Fainelli <f.fainelli@gmail.com>
5 *
6 * Licensed under the GNU/GPL. See COPYING for details.
7 */
8
9/dts-v1/;
10
11#include "bcm-hr2.dtsi"
12
13/ {
14 compatible = "ubnt,unifi-switch8", "brcm,bcm53342", "brcm,hr2";
15 model = "Ubiquiti UniFi Switch 8 (BCM53342)";
16
17 /* Hurricane 2 designs use the second UART */
18 chosen {
19 bootargs = "console=ttyS1,115200 earlyprintk";
20 };
21
22 memory@0 {
23 reg = <0x00000000 0x08000000>,
24 <0x68000000 0x08000000>;
25 };
26};
27
28&uart1 {
29 status = "okay";
30};
31
32&qspi {
33 status = "okay";
34 bspi-sel = <0>;
35
36 flash: m25p80@0 {
37 compatible = "m25p80";
38 reg = <0>;
39 #address-cells = <1>;
40 #size-cells = <1>;
41 spi-max-frequency = <12500000>;
42 spi-cpol;
43 spi-cpha;
44
45 partition@0 {
46 label = "u-boot";
47 reg = <0x0 0xc0000>;
48 };
49
50 partition@c0000 {
51 label = "u-boot-env";
52 reg = <0xc0000 0x10000>;
53 };
54
55 partition@d0000 {
56 label = "shmoo";
57 reg = <0xd0000 0x10000>;
58 };
59
60 partition@e0000 {
61 label = "kernel0";
62 reg = <0xe0000 0xf00000>;
63 };
64
65 partition@fe0000 {
66 label = "kernel1";
67 reg = <0xfe0000 0xf10000>;
68 };
69
70 partition@1ef0000 {
71 label = "cfg";
72 reg = <0x1ef0000 0x100000>;
73 };
74
75 partition@1ff0000 {
76 label = "EEPROM";
77 reg = <0x1ff0000 0x10000>;
78 };
79 };
80};
81
82&pcie0 {
83 /* Attaches to the internal switch */
84 status = "okay";
85};
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-28 05:06:27 -0400