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authorAnson Huang <Anson.Huang@nxp.com>2016-08-29 09:49:56 -0400
committerShawn Guo <shawnguo@kernel.org>2016-08-29 10:39:27 -0400
commit8765caa5cb6054247832947119ea533b5d410d2b (patch)
tree7279e54908e6150821b3919ec554e5c181e3c1c3
parent29b4817d4018df78086157ea3a55c1d9424a7cfc (diff)
ARM: imx: rename imx6q_set_int_mem_clk_lpm() function
Let's rename the function imx6q_set_int_mem_clk_lpm() to imx6_set_int_mem_clk_lpm() since it's actually common for all i.MX6 SoCs. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-rw-r--r--arch/arm/mach-imx/common.h2
-rw-r--r--arch/arm/mach-imx/cpuidle-imx6q.c2
-rw-r--r--arch/arm/mach-imx/pm-imx6.c8
3 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h
index a8f469333027..fb644304446c 100644
--- a/arch/arm/mach-imx/common.h
+++ b/arch/arm/mach-imx/common.h
@@ -109,7 +109,7 @@ void imx_anatop_init(void);
109void imx_anatop_pre_suspend(void); 109void imx_anatop_pre_suspend(void);
110void imx_anatop_post_resume(void); 110void imx_anatop_post_resume(void);
111int imx6_set_lpm(enum mxc_cpu_pwr_mode mode); 111int imx6_set_lpm(enum mxc_cpu_pwr_mode mode);
112void imx6q_set_int_mem_clk_lpm(bool enable); 112void imx6_set_int_mem_clk_lpm(bool enable);
113void imx6sl_set_wait_clk(bool enter); 113void imx6sl_set_wait_clk(bool enter);
114int imx_mmdc_get_ddr_type(void); 114int imx_mmdc_get_ddr_type(void);
115 115
diff --git a/arch/arm/mach-imx/cpuidle-imx6q.c b/arch/arm/mach-imx/cpuidle-imx6q.c
index db0f48c4b17e..bfeb25aaf9a2 100644
--- a/arch/arm/mach-imx/cpuidle-imx6q.c
+++ b/arch/arm/mach-imx/cpuidle-imx6q.c
@@ -85,7 +85,7 @@ EXPORT_SYMBOL_GPL(imx6q_cpuidle_fec_irqs_unused);
85int __init imx6q_cpuidle_init(void) 85int __init imx6q_cpuidle_init(void)
86{ 86{
87 /* Set INT_MEM_CLK_LPM bit to get a reliable WAIT mode support */ 87 /* Set INT_MEM_CLK_LPM bit to get a reliable WAIT mode support */
88 imx6q_set_int_mem_clk_lpm(true); 88 imx6_set_int_mem_clk_lpm(true);
89 89
90 return cpuidle_register(&imx6q_cpuidle_driver, NULL); 90 return cpuidle_register(&imx6q_cpuidle_driver, NULL);
91} 91}
diff --git a/arch/arm/mach-imx/pm-imx6.c b/arch/arm/mach-imx/pm-imx6.c
index 58924b3844df..549648309deb 100644
--- a/arch/arm/mach-imx/pm-imx6.c
+++ b/arch/arm/mach-imx/pm-imx6.c
@@ -217,7 +217,7 @@ struct imx6_cpu_pm_info {
217 u32 mmdc_io_val[MX6_MAX_MMDC_IO_NUM][2]; /* To save offset and value */ 217 u32 mmdc_io_val[MX6_MAX_MMDC_IO_NUM][2]; /* To save offset and value */
218} __aligned(8); 218} __aligned(8);
219 219
220void imx6q_set_int_mem_clk_lpm(bool enable) 220void imx6_set_int_mem_clk_lpm(bool enable)
221{ 221{
222 u32 val = readl_relaxed(ccm_base + CGPR); 222 u32 val = readl_relaxed(ccm_base + CGPR);
223 223
@@ -367,7 +367,7 @@ static int imx6q_pm_enter(suspend_state_t state)
367 switch (state) { 367 switch (state) {
368 case PM_SUSPEND_STANDBY: 368 case PM_SUSPEND_STANDBY:
369 imx6_set_lpm(STOP_POWER_ON); 369 imx6_set_lpm(STOP_POWER_ON);
370 imx6q_set_int_mem_clk_lpm(true); 370 imx6_set_int_mem_clk_lpm(true);
371 imx_gpc_pre_suspend(false); 371 imx_gpc_pre_suspend(false);
372 if (cpu_is_imx6sl()) 372 if (cpu_is_imx6sl())
373 imx6sl_set_wait_clk(true); 373 imx6sl_set_wait_clk(true);
@@ -380,7 +380,7 @@ static int imx6q_pm_enter(suspend_state_t state)
380 break; 380 break;
381 case PM_SUSPEND_MEM: 381 case PM_SUSPEND_MEM:
382 imx6_set_lpm(STOP_POWER_OFF); 382 imx6_set_lpm(STOP_POWER_OFF);
383 imx6q_set_int_mem_clk_lpm(false); 383 imx6_set_int_mem_clk_lpm(false);
384 imx6q_enable_wb(true); 384 imx6q_enable_wb(true);
385 /* 385 /*
386 * For suspend into ocram, asm code already take care of 386 * For suspend into ocram, asm code already take care of
@@ -398,7 +398,7 @@ static int imx6q_pm_enter(suspend_state_t state)
398 imx_gpc_post_resume(); 398 imx_gpc_post_resume();
399 imx6_enable_rbc(false); 399 imx6_enable_rbc(false);
400 imx6q_enable_wb(false); 400 imx6q_enable_wb(false);
401 imx6q_set_int_mem_clk_lpm(true); 401 imx6_set_int_mem_clk_lpm(true);
402 imx6_set_lpm(WAIT_CLOCKED); 402 imx6_set_lpm(WAIT_CLOCKED);
403 break; 403 break;
404 default: 404 default: