arm64: dts: exynos: Use human-friendly symbols for interrupt properties in exynos7

Replace hard-coded values of type of GIC interrupt and its flags with respective macros from header to increase code readability Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
author: Krzysztof Kozlowski <krzk@kernel.org> 2016-09-16 17:41:56 -0400
committer: Krzysztof Kozlowski <krzk@kernel.org> 2016-11-03 16:40:39 -0400
commit: 86bb573d0b2a8e876a12d1348bd0b6e377c1043e (patch)
tree: d9db6529dc21bb48ed4f0205ca141d62ce6e6744
parent: ef4aea97a70013cecb69adf6a9f0d25ab6f11590 (diff)
2 files changed, 51 insertions, 51 deletions
diff --git a/arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi b/arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi
index 20f10e0f7c77..82321984e1fb 100644
--- a/arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi
@@ -20,14 +20,14 @@
                interrupt-controller;
                interrupt-parent = <&gic>;
                #interrupt-cells = <2>;
-                interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>,
+                interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
-                             <0 1 IRQ_TYPE_LEVEL_HIGH>,
+                             <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
-                             <0 2 IRQ_TYPE_LEVEL_HIGH>,
+                             <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
-                             <0 3 IRQ_TYPE_LEVEL_HIGH>,
+                             <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
-                             <0 4 IRQ_TYPE_LEVEL_HIGH>,
+                             <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
-                             <0 5 IRQ_TYPE_LEVEL_HIGH>,
+                             <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
-                             <0 6 IRQ_TYPE_LEVEL_HIGH>,
+                             <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
-                             <0 7 IRQ_TYPE_LEVEL_HIGH>;
+                             <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
        };
        gpa1: gpa1 {
@@ -37,14 +37,14 @@
                interrupt-controller;
                interrupt-parent = <&gic>;
                #interrupt-cells = <2>;
-                interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>,
+                interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
-                             <0 9 IRQ_TYPE_LEVEL_HIGH>,
+                             <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
-                             <0 10 IRQ_TYPE_LEVEL_HIGH>,
+                             <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
-                             <0 11 IRQ_TYPE_LEVEL_HIGH>,
+                             <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
-                             <0 12 IRQ_TYPE_LEVEL_HIGH>,
+                             <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
-                             <0 13 IRQ_TYPE_LEVEL_HIGH>,
+                             <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
-                             <0 14 IRQ_TYPE_LEVEL_HIGH>,
+                             <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
-                             <0 15 IRQ_TYPE_LEVEL_HIGH>;
+                             <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
        };
        gpa2: gpa2 {
diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi b/arch/arm64/boot/dts/exynos/exynos7.dtsi
index 0a80dabfbe95..4b5a1eadffb5 100644
--- a/arch/arm64/boot/dts/exynos/exynos7.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi
@@ -106,7 +106,7 @@
                        pdma0: pdma@10E10000 {
                                compatible = "arm,pl330", "arm,primecell";
                                reg = <0x10E10000 0x1000>;
-                                interrupts = <0 225 IRQ_TYPE_LEVEL_HIGH>;
+                                interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&clock_fsys0 ACLK_PDMA0>;
                                clock-names = "apb_pclk";
                                #dma-cells = <1>;
@@ -117,7 +117,7 @@
                        pdma1: pdma@10EB0000 {
                                compatible = "arm,pl330", "arm,primecell";
                                reg = <0x10EB0000 0x1000>;
-                                interrupts = <0 226 IRQ_TYPE_LEVEL_HIGH>;
+                                interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&clock_fsys0 ACLK_PDMA1>;
                                clock-names = "apb_pclk";
                                #dma-cells = <1>;
@@ -220,7 +220,7 @@
                serial_0: serial@13630000 {
                        compatible = "samsung,exynos4210-uart";
                        reg = <0x13630000 0x100>;
-                        interrupts = <0 440 IRQ_TYPE_LEVEL_HIGH>;
+                        interrupts = <GIC_SPI 440 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&clock_peric0 PCLK_UART0>,
                                 <&clock_peric0 SCLK_UART0>;
                        clock-names = "uart", "clk_uart_baud0";
@@ -230,7 +230,7 @@
                serial_1: serial@14c20000 {
                        compatible = "samsung,exynos4210-uart";
                        reg = <0x14c20000 0x100>;
-                        interrupts = <0 456 IRQ_TYPE_LEVEL_HIGH>;
+                        interrupts = <GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&clock_peric1 PCLK_UART1>,
                                 <&clock_peric1 SCLK_UART1>;
                        clock-names = "uart", "clk_uart_baud0";
@@ -240,7 +240,7 @@
                serial_2: serial@14c30000 {
                        compatible = "samsung,exynos4210-uart";
                        reg = <0x14c30000 0x100>;
-                        interrupts = <0 457 IRQ_TYPE_LEVEL_HIGH>;
+                        interrupts = <GIC_SPI 457 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&clock_peric1 PCLK_UART2>,
                                 <&clock_peric1 SCLK_UART2>;
                        clock-names = "uart", "clk_uart_baud0";
@@ -250,7 +250,7 @@
                serial_3: serial@14c40000 {
                        compatible = "samsung,exynos4210-uart";
                        reg = <0x14c40000 0x100>;
-                        interrupts = <0 458 IRQ_TYPE_LEVEL_HIGH>;
+                        interrupts = <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&clock_peric1 PCLK_UART3>,
                                 <&clock_peric1 SCLK_UART3>;
                        clock-names = "uart", "clk_uart_baud0";
@@ -264,62 +264,62 @@
                        wakeup-interrupt-controller {
                                compatible = "samsung,exynos7-wakeup-eint";
                                interrupt-parent = <&gic>;
-                                interrupts = <0 16 IRQ_TYPE_LEVEL_HIGH>;
+                                interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
                        };
                };
                pinctrl_bus0: pinctrl@13470000 {
                        compatible = "samsung,exynos7-pinctrl";
                        reg = <0x13470000 0x1000>;
-                        interrupts = <0 383 IRQ_TYPE_LEVEL_HIGH>;
+                        interrupts = <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
                };
                pinctrl_nfc: pinctrl@14cd0000 {
                        compatible = "samsung,exynos7-pinctrl";
                        reg = <0x14cd0000 0x1000>;
-                        interrupts = <0 473 IRQ_TYPE_LEVEL_HIGH>;
+                        interrupts = <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>;
                };
                pinctrl_touch: pinctrl@14ce0000 {
                        compatible = "samsung,exynos7-pinctrl";
                        reg = <0x14ce0000 0x1000>;
-                        interrupts = <0 474 IRQ_TYPE_LEVEL_HIGH>;
+                        interrupts = <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>;
                };
                pinctrl_ff: pinctrl@14c90000 {
                        compatible = "samsung,exynos7-pinctrl";
                        reg = <0x14c90000 0x1000>;
-                        interrupts = <0 475 IRQ_TYPE_LEVEL_HIGH>;
+                        interrupts = <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>;
                };
                pinctrl_ese: pinctrl@14ca0000 {
                        compatible = "samsung,exynos7-pinctrl";
                        reg = <0x14ca0000 0x1000>;
-                        interrupts = <0 476 IRQ_TYPE_LEVEL_HIGH>;
+                        interrupts = <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>;
                };
                pinctrl_fsys0: pinctrl@10e60000 {
                        compatible = "samsung,exynos7-pinctrl";
                        reg = <0x10e60000 0x1000>;
-                        interrupts = <0 221 IRQ_TYPE_LEVEL_HIGH>;
+                        interrupts = <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
                };
                pinctrl_fsys1: pinctrl@15690000 {
                        compatible = "samsung,exynos7-pinctrl";
                        reg = <0x15690000 0x1000>;
-                        interrupts = <0 203 IRQ_TYPE_LEVEL_HIGH>;
+                        interrupts = <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>;
                };
                pinctrl_bus1: pinctrl@14870000 {
                        compatible = "samsung,exynos7-pinctrl";
                        reg = <0x14870000 0x1000>;
-                        interrupts = <0 384 IRQ_TYPE_LEVEL_HIGH>;
+                        interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>;
                };
                hsi2c_0: hsi2c@13640000 {
                        compatible = "samsung,exynos7-hsi2c";
                        reg = <0x13640000 0x1000>;
-                        interrupts = <0 441 IRQ_TYPE_LEVEL_HIGH>;
+                        interrupts = <GIC_SPI 441 IRQ_TYPE_LEVEL_HIGH>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        pinctrl-names = "default";
@@ -332,7 +332,7 @@
                hsi2c_1: hsi2c@13650000 {
                        compatible = "samsung,exynos7-hsi2c";
                        reg = <0x13650000 0x1000>;
-                        interrupts = <0 442 IRQ_TYPE_LEVEL_HIGH>;
+                        interrupts = <GIC_SPI 442 IRQ_TYPE_LEVEL_HIGH>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        pinctrl-names = "default";
@@ -345,7 +345,7 @@
                hsi2c_2: hsi2c@14e60000 {
                        compatible = "samsung,exynos7-hsi2c";
                        reg = <0x14e60000 0x1000>;
-                        interrupts = <0 459 IRQ_TYPE_LEVEL_HIGH>;
+                        interrupts = <GIC_SPI 459 IRQ_TYPE_LEVEL_HIGH>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        pinctrl-names = "default";
@@ -358,7 +358,7 @@
                hsi2c_3: hsi2c@14e70000 {
                        compatible = "samsung,exynos7-hsi2c";
                        reg = <0x14e70000 0x1000>;
-                        interrupts = <0 460 IRQ_TYPE_LEVEL_HIGH>;
+                        interrupts = <GIC_SPI 460 IRQ_TYPE_LEVEL_HIGH>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        pinctrl-names = "default";
@@ -371,7 +371,7 @@
                hsi2c_4: hsi2c@13660000 {
                        compatible = "samsung,exynos7-hsi2c";
                        reg = <0x13660000 0x1000>;
-                        interrupts = <0 443 IRQ_TYPE_LEVEL_HIGH>;
+                        interrupts = <GIC_SPI 443 IRQ_TYPE_LEVEL_HIGH>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        pinctrl-names = "default";
@@ -384,7 +384,7 @@
                hsi2c_5: hsi2c@13670000 {
                        compatible = "samsung,exynos7-hsi2c";
                        reg = <0x13670000 0x1000>;
-                        interrupts = <0 444 IRQ_TYPE_LEVEL_HIGH>;
+                        interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        pinctrl-names = "default";
@@ -397,7 +397,7 @@
                hsi2c_6: hsi2c@14e00000 {
                        compatible = "samsung,exynos7-hsi2c";
                        reg = <0x14e00000 0x1000>;
-                        interrupts = <0 461 IRQ_TYPE_LEVEL_HIGH>;
+                        interrupts = <GIC_SPI 461 IRQ_TYPE_LEVEL_HIGH>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        pinctrl-names = "default";
@@ -410,7 +410,7 @@
                hsi2c_7: hsi2c@13e10000 {
                        compatible = "samsung,exynos7-hsi2c";
                        reg = <0x13e10000 0x1000>;
-                        interrupts = <0 462 IRQ_TYPE_LEVEL_HIGH>;
+                        interrupts = <GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        pinctrl-names = "default";
@@ -423,7 +423,7 @@
                hsi2c_8: hsi2c@14e20000 {
                        compatible = "samsung,exynos7-hsi2c";
                        reg = <0x14e20000 0x1000>;
-                        interrupts = <0 463 IRQ_TYPE_LEVEL_HIGH>;
+                        interrupts = <GIC_SPI 463 IRQ_TYPE_LEVEL_HIGH>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        pinctrl-names = "default";
@@ -436,7 +436,7 @@
                hsi2c_9: hsi2c@13680000 {
                        compatible = "samsung,exynos7-hsi2c";
                        reg = <0x13680000 0x1000>;
-                        interrupts = <0 445 IRQ_TYPE_LEVEL_HIGH>;
+                        interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        pinctrl-names = "default";
@@ -449,7 +449,7 @@
                hsi2c_10: hsi2c@13690000 {
                        compatible = "samsung,exynos7-hsi2c";
                        reg = <0x13690000 0x1000>;
-                        interrupts = <0 446 IRQ_TYPE_LEVEL_HIGH>;
+                        interrupts = <GIC_SPI 446 IRQ_TYPE_LEVEL_HIGH>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        pinctrl-names = "default";
@@ -462,7 +462,7 @@
                hsi2c_11: hsi2c@136a0000 {
                        compatible = "samsung,exynos7-hsi2c";
                        reg = <0x136a0000 0x1000>;
-                        interrupts = <0 447 IRQ_TYPE_LEVEL_HIGH>;
+                        interrupts = <GIC_SPI 447 IRQ_TYPE_LEVEL_HIGH>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        pinctrl-names = "default";
@@ -499,8 +499,8 @@
                rtc: rtc@10590000 {
                        compatible = "samsung,s3c6410-rtc";
                        reg = <0x10590000 0x100>;
-                        interrupts = <0 355 IRQ_TYPE_LEVEL_HIGH>,
+                        interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>,
-                                     <0 356 IRQ_TYPE_LEVEL_HIGH>;
+                                     <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&clock_ccore PCLK_RTC>;
                        clock-names = "rtc";
                        status = "disabled";
@@ -509,7 +509,7 @@
                watchdog: watchdog@101d0000 {
                        compatible = "samsung,exynos7-wdt";
                        reg = <0x101d0000 0x100>;
-                        interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>;
+                        interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&clock_peris PCLK_WDT>;
                        clock-names = "watchdog";
                        samsung,syscon-phandle = <&pmu_system_controller>;
@@ -518,7 +518,7 @@
                mmc_0: mmc@15740000 {
                        compatible = "samsung,exynos7-dw-mshc-smu";
-                        interrupts = <0 201 IRQ_TYPE_LEVEL_HIGH>;
+                        interrupts = <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        reg = <0x15740000 0x2000>;
@@ -531,7 +531,7 @@
                mmc_1: mmc@15750000 {
                        compatible = "samsung,exynos7-dw-mshc";
-                        interrupts = <0 202 IRQ_TYPE_LEVEL_HIGH>;
+                        interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        reg = <0x15750000 0x2000>;
@@ -544,7 +544,7 @@
                mmc_2: mmc@15560000 {
                        compatible = "samsung,exynos7-dw-mshc-smu";
-                        interrupts = <0 216 IRQ_TYPE_LEVEL_HIGH>;
+                        interrupts = <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        reg = <0x15560000 0x2000>;
@@ -558,7 +558,7 @@
                adc: adc@13620000 {
                        compatible = "samsung,exynos7-adc";
                        reg = <0x13620000 0x100>;
-                        interrupts = <0 448 IRQ_TYPE_LEVEL_HIGH>;
+                        interrupts = <GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&clock_peric0 PCLK_ADCIF>;
                        clock-names = "adc";
                        #io-channel-cells = <1>;
@@ -578,7 +578,7 @@
                tmuctrl_0: tmu@10060000 {
                        compatible = "samsung,exynos7-tmu";
                        reg = <0x10060000 0x200>;
-                        interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
+                        interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&clock_peris PCLK_TMU>,
                                 <&clock_peris SCLK_TMU>;
                        clock-names = "tmu_apbif", "tmu_sclk";
author	Krzysztof Kozlowski <krzk@kernel.org>	2016-09-16 17:41:56 -0400
committer	Krzysztof Kozlowski <krzk@kernel.org>	2016-11-03 16:40:39 -0400
commit	86bb573d0b2a8e876a12d1348bd0b6e377c1043e (patch)
tree	d9db6529dc21bb48ed4f0205ca141d62ce6e6744
parent	ef4aea97a70013cecb69adf6a9f0d25ab6f11590 (diff)

diff --git a/arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi b/arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi index 20f10e0f7c77..82321984e1fb 100644 --- a/arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi
@@ -20,14 +20,14 @@
20	interrupt-controller;	20	interrupt-controller;
21	interrupt-parent = <&gic>;	21	interrupt-parent = <&gic>;
22	#interrupt-cells = <2>;	22	#interrupt-cells = <2>;
23	interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>,	23	interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
24	<0 1 IRQ_TYPE_LEVEL_HIGH>,	24	<GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
25	<0 2 IRQ_TYPE_LEVEL_HIGH>,	25	<GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
26	<0 3 IRQ_TYPE_LEVEL_HIGH>,	26	<GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
27	<0 4 IRQ_TYPE_LEVEL_HIGH>,	27	<GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
28	<0 5 IRQ_TYPE_LEVEL_HIGH>,	28	<GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
29	<0 6 IRQ_TYPE_LEVEL_HIGH>,	29	<GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
30	<0 7 IRQ_TYPE_LEVEL_HIGH>;	30	<GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
31	};	31	};
32		32
33	gpa1: gpa1 {	33	gpa1: gpa1 {
@@ -37,14 +37,14 @@
37	interrupt-controller;	37	interrupt-controller;
38	interrupt-parent = <&gic>;	38	interrupt-parent = <&gic>;
39	#interrupt-cells = <2>;	39	#interrupt-cells = <2>;
40	interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>,	40	interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
41	<0 9 IRQ_TYPE_LEVEL_HIGH>,	41	<GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
42	<0 10 IRQ_TYPE_LEVEL_HIGH>,	42	<GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
43	<0 11 IRQ_TYPE_LEVEL_HIGH>,	43	<GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
44	<0 12 IRQ_TYPE_LEVEL_HIGH>,	44	<GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
45	<0 13 IRQ_TYPE_LEVEL_HIGH>,	45	<GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
46	<0 14 IRQ_TYPE_LEVEL_HIGH>,	46	<GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
47	<0 15 IRQ_TYPE_LEVEL_HIGH>;	47	<GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
48	};	48	};
49		49
50	gpa2: gpa2 {	50	gpa2: gpa2 {


diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi b/arch/arm64/boot/dts/exynos/exynos7.dtsi index 0a80dabfbe95..4b5a1eadffb5 100644 --- a/arch/arm64/boot/dts/exynos/exynos7.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi
@@ -106,7 +106,7 @@
106	pdma0: pdma@10E10000 {	106	pdma0: pdma@10E10000 {
107	compatible = "arm,pl330", "arm,primecell";	107	compatible = "arm,pl330", "arm,primecell";
108	reg = <0x10E10000 0x1000>;	108	reg = <0x10E10000 0x1000>;
109	interrupts = <0 225 IRQ_TYPE_LEVEL_HIGH>;	109	interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
110	clocks = <&clock_fsys0 ACLK_PDMA0>;	110	clocks = <&clock_fsys0 ACLK_PDMA0>;
111	clock-names = "apb_pclk";	111	clock-names = "apb_pclk";
112	#dma-cells = <1>;	112	#dma-cells = <1>;
@@ -117,7 +117,7 @@
117	pdma1: pdma@10EB0000 {	117	pdma1: pdma@10EB0000 {
118	compatible = "arm,pl330", "arm,primecell";	118	compatible = "arm,pl330", "arm,primecell";
119	reg = <0x10EB0000 0x1000>;	119	reg = <0x10EB0000 0x1000>;
120	interrupts = <0 226 IRQ_TYPE_LEVEL_HIGH>;	120	interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
121	clocks = <&clock_fsys0 ACLK_PDMA1>;	121	clocks = <&clock_fsys0 ACLK_PDMA1>;
122	clock-names = "apb_pclk";	122	clock-names = "apb_pclk";
123	#dma-cells = <1>;	123	#dma-cells = <1>;
@@ -220,7 +220,7 @@
220	serial_0: serial@13630000 {	220	serial_0: serial@13630000 {
221	compatible = "samsung,exynos4210-uart";	221	compatible = "samsung,exynos4210-uart";
222	reg = <0x13630000 0x100>;	222	reg = <0x13630000 0x100>;
223	interrupts = <0 440 IRQ_TYPE_LEVEL_HIGH>;	223	interrupts = <GIC_SPI 440 IRQ_TYPE_LEVEL_HIGH>;
224	clocks = <&clock_peric0 PCLK_UART0>,	224	clocks = <&clock_peric0 PCLK_UART0>,
225	<&clock_peric0 SCLK_UART0>;	225	<&clock_peric0 SCLK_UART0>;
226	clock-names = "uart", "clk_uart_baud0";	226	clock-names = "uart", "clk_uart_baud0";
@@ -230,7 +230,7 @@
230	serial_1: serial@14c20000 {	230	serial_1: serial@14c20000 {
231	compatible = "samsung,exynos4210-uart";	231	compatible = "samsung,exynos4210-uart";
232	reg = <0x14c20000 0x100>;	232	reg = <0x14c20000 0x100>;
233	interrupts = <0 456 IRQ_TYPE_LEVEL_HIGH>;	233	interrupts = <GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>;
234	clocks = <&clock_peric1 PCLK_UART1>,	234	clocks = <&clock_peric1 PCLK_UART1>,
235	<&clock_peric1 SCLK_UART1>;	235	<&clock_peric1 SCLK_UART1>;
236	clock-names = "uart", "clk_uart_baud0";	236	clock-names = "uart", "clk_uart_baud0";
@@ -240,7 +240,7 @@
240	serial_2: serial@14c30000 {	240	serial_2: serial@14c30000 {
241	compatible = "samsung,exynos4210-uart";	241	compatible = "samsung,exynos4210-uart";
242	reg = <0x14c30000 0x100>;	242	reg = <0x14c30000 0x100>;
243	interrupts = <0 457 IRQ_TYPE_LEVEL_HIGH>;	243	interrupts = <GIC_SPI 457 IRQ_TYPE_LEVEL_HIGH>;
244	clocks = <&clock_peric1 PCLK_UART2>,	244	clocks = <&clock_peric1 PCLK_UART2>,
245	<&clock_peric1 SCLK_UART2>;	245	<&clock_peric1 SCLK_UART2>;
246	clock-names = "uart", "clk_uart_baud0";	246	clock-names = "uart", "clk_uart_baud0";
@@ -250,7 +250,7 @@
250	serial_3: serial@14c40000 {	250	serial_3: serial@14c40000 {
251	compatible = "samsung,exynos4210-uart";	251	compatible = "samsung,exynos4210-uart";
252	reg = <0x14c40000 0x100>;	252	reg = <0x14c40000 0x100>;
253	interrupts = <0 458 IRQ_TYPE_LEVEL_HIGH>;	253	interrupts = <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH>;
254	clocks = <&clock_peric1 PCLK_UART3>,	254	clocks = <&clock_peric1 PCLK_UART3>,
255	<&clock_peric1 SCLK_UART3>;	255	<&clock_peric1 SCLK_UART3>;
256	clock-names = "uart", "clk_uart_baud0";	256	clock-names = "uart", "clk_uart_baud0";
@@ -264,62 +264,62 @@
264	wakeup-interrupt-controller {	264	wakeup-interrupt-controller {
265	compatible = "samsung,exynos7-wakeup-eint";	265	compatible = "samsung,exynos7-wakeup-eint";
266	interrupt-parent = <&gic>;	266	interrupt-parent = <&gic>;
267	interrupts = <0 16 IRQ_TYPE_LEVEL_HIGH>;	267	interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
268	};	268	};
269	};	269	};
270		270
271	pinctrl_bus0: pinctrl@13470000 {	271	pinctrl_bus0: pinctrl@13470000 {
272	compatible = "samsung,exynos7-pinctrl";	272	compatible = "samsung,exynos7-pinctrl";
273	reg = <0x13470000 0x1000>;	273	reg = <0x13470000 0x1000>;
274	interrupts = <0 383 IRQ_TYPE_LEVEL_HIGH>;	274	interrupts = <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
275	};	275	};
276		276
277	pinctrl_nfc: pinctrl@14cd0000 {	277	pinctrl_nfc: pinctrl@14cd0000 {
278	compatible = "samsung,exynos7-pinctrl";	278	compatible = "samsung,exynos7-pinctrl";
279	reg = <0x14cd0000 0x1000>;	279	reg = <0x14cd0000 0x1000>;
280	interrupts = <0 473 IRQ_TYPE_LEVEL_HIGH>;	280	interrupts = <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>;
281	};	281	};
282		282
283	pinctrl_touch: pinctrl@14ce0000 {	283	pinctrl_touch: pinctrl@14ce0000 {
284	compatible = "samsung,exynos7-pinctrl";	284	compatible = "samsung,exynos7-pinctrl";
285	reg = <0x14ce0000 0x1000>;	285	reg = <0x14ce0000 0x1000>;
286	interrupts = <0 474 IRQ_TYPE_LEVEL_HIGH>;	286	interrupts = <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>;
287	};	287	};
288		288
289	pinctrl_ff: pinctrl@14c90000 {	289	pinctrl_ff: pinctrl@14c90000 {
290	compatible = "samsung,exynos7-pinctrl";	290	compatible = "samsung,exynos7-pinctrl";
291	reg = <0x14c90000 0x1000>;	291	reg = <0x14c90000 0x1000>;
292	interrupts = <0 475 IRQ_TYPE_LEVEL_HIGH>;	292	interrupts = <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>;
293	};	293	};
294		294
295	pinctrl_ese: pinctrl@14ca0000 {	295	pinctrl_ese: pinctrl@14ca0000 {
296	compatible = "samsung,exynos7-pinctrl";	296	compatible = "samsung,exynos7-pinctrl";
297	reg = <0x14ca0000 0x1000>;	297	reg = <0x14ca0000 0x1000>;
298	interrupts = <0 476 IRQ_TYPE_LEVEL_HIGH>;	298	interrupts = <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>;
299	};	299	};
300		300
301	pinctrl_fsys0: pinctrl@10e60000 {	301	pinctrl_fsys0: pinctrl@10e60000 {
302	compatible = "samsung,exynos7-pinctrl";	302	compatible = "samsung,exynos7-pinctrl";
303	reg = <0x10e60000 0x1000>;	303	reg = <0x10e60000 0x1000>;
304	interrupts = <0 221 IRQ_TYPE_LEVEL_HIGH>;	304	interrupts = <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
305	};	305	};
306		306
307	pinctrl_fsys1: pinctrl@15690000 {	307	pinctrl_fsys1: pinctrl@15690000 {
308	compatible = "samsung,exynos7-pinctrl";	308	compatible = "samsung,exynos7-pinctrl";
309	reg = <0x15690000 0x1000>;	309	reg = <0x15690000 0x1000>;
310	interrupts = <0 203 IRQ_TYPE_LEVEL_HIGH>;	310	interrupts = <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>;
311	};	311	};
312		312
313	pinctrl_bus1: pinctrl@14870000 {	313	pinctrl_bus1: pinctrl@14870000 {
314	compatible = "samsung,exynos7-pinctrl";	314	compatible = "samsung,exynos7-pinctrl";
315	reg = <0x14870000 0x1000>;	315	reg = <0x14870000 0x1000>;
316	interrupts = <0 384 IRQ_TYPE_LEVEL_HIGH>;	316	interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>;
317	};	317	};
318		318
319	hsi2c_0: hsi2c@13640000 {	319	hsi2c_0: hsi2c@13640000 {
320	compatible = "samsung,exynos7-hsi2c";	320	compatible = "samsung,exynos7-hsi2c";
321	reg = <0x13640000 0x1000>;	321	reg = <0x13640000 0x1000>;
322	interrupts = <0 441 IRQ_TYPE_LEVEL_HIGH>;	322	interrupts = <GIC_SPI 441 IRQ_TYPE_LEVEL_HIGH>;
323	#address-cells = <1>;	323	#address-cells = <1>;
324	#size-cells = <0>;	324	#size-cells = <0>;
325	pinctrl-names = "default";	325	pinctrl-names = "default";
@@ -332,7 +332,7 @@
332	hsi2c_1: hsi2c@13650000 {	332	hsi2c_1: hsi2c@13650000 {
333	compatible = "samsung,exynos7-hsi2c";	333	compatible = "samsung,exynos7-hsi2c";
334	reg = <0x13650000 0x1000>;	334	reg = <0x13650000 0x1000>;
335	interrupts = <0 442 IRQ_TYPE_LEVEL_HIGH>;	335	interrupts = <GIC_SPI 442 IRQ_TYPE_LEVEL_HIGH>;
336	#address-cells = <1>;	336	#address-cells = <1>;
337	#size-cells = <0>;	337	#size-cells = <0>;
338	pinctrl-names = "default";	338	pinctrl-names = "default";
@@ -345,7 +345,7 @@
345	hsi2c_2: hsi2c@14e60000 {	345	hsi2c_2: hsi2c@14e60000 {
346	compatible = "samsung,exynos7-hsi2c";	346	compatible = "samsung,exynos7-hsi2c";
347	reg = <0x14e60000 0x1000>;	347	reg = <0x14e60000 0x1000>;
348	interrupts = <0 459 IRQ_TYPE_LEVEL_HIGH>;	348	interrupts = <GIC_SPI 459 IRQ_TYPE_LEVEL_HIGH>;
349	#address-cells = <1>;	349	#address-cells = <1>;
350	#size-cells = <0>;	350	#size-cells = <0>;
351	pinctrl-names = "default";	351	pinctrl-names = "default";
@@ -358,7 +358,7 @@
358	hsi2c_3: hsi2c@14e70000 {	358	hsi2c_3: hsi2c@14e70000 {
359	compatible = "samsung,exynos7-hsi2c";	359	compatible = "samsung,exynos7-hsi2c";
360	reg = <0x14e70000 0x1000>;	360	reg = <0x14e70000 0x1000>;
361	interrupts = <0 460 IRQ_TYPE_LEVEL_HIGH>;	361	interrupts = <GIC_SPI 460 IRQ_TYPE_LEVEL_HIGH>;
362	#address-cells = <1>;	362	#address-cells = <1>;
363	#size-cells = <0>;	363	#size-cells = <0>;
364	pinctrl-names = "default";	364	pinctrl-names = "default";
@@ -371,7 +371,7 @@
371	hsi2c_4: hsi2c@13660000 {	371	hsi2c_4: hsi2c@13660000 {
372	compatible = "samsung,exynos7-hsi2c";	372	compatible = "samsung,exynos7-hsi2c";
373	reg = <0x13660000 0x1000>;	373	reg = <0x13660000 0x1000>;
374	interrupts = <0 443 IRQ_TYPE_LEVEL_HIGH>;	374	interrupts = <GIC_SPI 443 IRQ_TYPE_LEVEL_HIGH>;
375	#address-cells = <1>;	375	#address-cells = <1>;
376	#size-cells = <0>;	376	#size-cells = <0>;
377	pinctrl-names = "default";	377	pinctrl-names = "default";
@@ -384,7 +384,7 @@
384	hsi2c_5: hsi2c@13670000 {	384	hsi2c_5: hsi2c@13670000 {
385	compatible = "samsung,exynos7-hsi2c";	385	compatible = "samsung,exynos7-hsi2c";
386	reg = <0x13670000 0x1000>;	386	reg = <0x13670000 0x1000>;
387	interrupts = <0 444 IRQ_TYPE_LEVEL_HIGH>;	387	interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
388	#address-cells = <1>;	388	#address-cells = <1>;
389	#size-cells = <0>;	389	#size-cells = <0>;
390	pinctrl-names = "default";	390	pinctrl-names = "default";
@@ -397,7 +397,7 @@
397	hsi2c_6: hsi2c@14e00000 {	397	hsi2c_6: hsi2c@14e00000 {
398	compatible = "samsung,exynos7-hsi2c";	398	compatible = "samsung,exynos7-hsi2c";
399	reg = <0x14e00000 0x1000>;	399	reg = <0x14e00000 0x1000>;
400	interrupts = <0 461 IRQ_TYPE_LEVEL_HIGH>;	400	interrupts = <GIC_SPI 461 IRQ_TYPE_LEVEL_HIGH>;
401	#address-cells = <1>;	401	#address-cells = <1>;
402	#size-cells = <0>;	402	#size-cells = <0>;
403	pinctrl-names = "default";	403	pinctrl-names = "default";
@@ -410,7 +410,7 @@
410	hsi2c_7: hsi2c@13e10000 {	410	hsi2c_7: hsi2c@13e10000 {
411	compatible = "samsung,exynos7-hsi2c";	411	compatible = "samsung,exynos7-hsi2c";
412	reg = <0x13e10000 0x1000>;	412	reg = <0x13e10000 0x1000>;
413	interrupts = <0 462 IRQ_TYPE_LEVEL_HIGH>;	413	interrupts = <GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH>;
414	#address-cells = <1>;	414	#address-cells = <1>;
415	#size-cells = <0>;	415	#size-cells = <0>;
416	pinctrl-names = "default";	416	pinctrl-names = "default";
@@ -423,7 +423,7 @@
423	hsi2c_8: hsi2c@14e20000 {	423	hsi2c_8: hsi2c@14e20000 {
424	compatible = "samsung,exynos7-hsi2c";	424	compatible = "samsung,exynos7-hsi2c";
425	reg = <0x14e20000 0x1000>;	425	reg = <0x14e20000 0x1000>;
426	interrupts = <0 463 IRQ_TYPE_LEVEL_HIGH>;	426	interrupts = <GIC_SPI 463 IRQ_TYPE_LEVEL_HIGH>;
427	#address-cells = <1>;	427	#address-cells = <1>;
428	#size-cells = <0>;	428	#size-cells = <0>;
429	pinctrl-names = "default";	429	pinctrl-names = "default";
@@ -436,7 +436,7 @@
436	hsi2c_9: hsi2c@13680000 {	436	hsi2c_9: hsi2c@13680000 {
437	compatible = "samsung,exynos7-hsi2c";	437	compatible = "samsung,exynos7-hsi2c";
438	reg = <0x13680000 0x1000>;	438	reg = <0x13680000 0x1000>;
439	interrupts = <0 445 IRQ_TYPE_LEVEL_HIGH>;	439	interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>;
440	#address-cells = <1>;	440	#address-cells = <1>;
441	#size-cells = <0>;	441	#size-cells = <0>;
442	pinctrl-names = "default";	442	pinctrl-names = "default";
@@ -449,7 +449,7 @@
449	hsi2c_10: hsi2c@13690000 {	449	hsi2c_10: hsi2c@13690000 {
450	compatible = "samsung,exynos7-hsi2c";	450	compatible = "samsung,exynos7-hsi2c";
451	reg = <0x13690000 0x1000>;	451	reg = <0x13690000 0x1000>;
452	interrupts = <0 446 IRQ_TYPE_LEVEL_HIGH>;	452	interrupts = <GIC_SPI 446 IRQ_TYPE_LEVEL_HIGH>;
453	#address-cells = <1>;	453	#address-cells = <1>;
454	#size-cells = <0>;	454	#size-cells = <0>;
455	pinctrl-names = "default";	455	pinctrl-names = "default";
@@ -462,7 +462,7 @@
462	hsi2c_11: hsi2c@136a0000 {	462	hsi2c_11: hsi2c@136a0000 {
463	compatible = "samsung,exynos7-hsi2c";	463	compatible = "samsung,exynos7-hsi2c";
464	reg = <0x136a0000 0x1000>;	464	reg = <0x136a0000 0x1000>;
465	interrupts = <0 447 IRQ_TYPE_LEVEL_HIGH>;	465	interrupts = <GIC_SPI 447 IRQ_TYPE_LEVEL_HIGH>;
466	#address-cells = <1>;	466	#address-cells = <1>;
467	#size-cells = <0>;	467	#size-cells = <0>;
468	pinctrl-names = "default";	468	pinctrl-names = "default";
@@ -499,8 +499,8 @@
499	rtc: rtc@10590000 {	499	rtc: rtc@10590000 {
500	compatible = "samsung,s3c6410-rtc";	500	compatible = "samsung,s3c6410-rtc";
501	reg = <0x10590000 0x100>;	501	reg = <0x10590000 0x100>;
502	interrupts = <0 355 IRQ_TYPE_LEVEL_HIGH>,	502	interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>,
503	<0 356 IRQ_TYPE_LEVEL_HIGH>;	503	<GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
504	clocks = <&clock_ccore PCLK_RTC>;	504	clocks = <&clock_ccore PCLK_RTC>;
505	clock-names = "rtc";	505	clock-names = "rtc";
506	status = "disabled";	506	status = "disabled";
@@ -509,7 +509,7 @@
509	watchdog: watchdog@101d0000 {	509	watchdog: watchdog@101d0000 {
510	compatible = "samsung,exynos7-wdt";	510	compatible = "samsung,exynos7-wdt";
511	reg = <0x101d0000 0x100>;	511	reg = <0x101d0000 0x100>;
512	interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>;	512	interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
513	clocks = <&clock_peris PCLK_WDT>;	513	clocks = <&clock_peris PCLK_WDT>;
514	clock-names = "watchdog";	514	clock-names = "watchdog";
515	samsung,syscon-phandle = <&pmu_system_controller>;	515	samsung,syscon-phandle = <&pmu_system_controller>;
@@ -518,7 +518,7 @@
518		518
519	mmc_0: mmc@15740000 {	519	mmc_0: mmc@15740000 {
520	compatible = "samsung,exynos7-dw-mshc-smu";	520	compatible = "samsung,exynos7-dw-mshc-smu";
521	interrupts = <0 201 IRQ_TYPE_LEVEL_HIGH>;	521	interrupts = <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>;
522	#address-cells = <1>;	522	#address-cells = <1>;
523	#size-cells = <0>;	523	#size-cells = <0>;
524	reg = <0x15740000 0x2000>;	524	reg = <0x15740000 0x2000>;
@@ -531,7 +531,7 @@
531		531
532	mmc_1: mmc@15750000 {	532	mmc_1: mmc@15750000 {
533	compatible = "samsung,exynos7-dw-mshc";	533	compatible = "samsung,exynos7-dw-mshc";
534	interrupts = <0 202 IRQ_TYPE_LEVEL_HIGH>;	534	interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>;
535	#address-cells = <1>;	535	#address-cells = <1>;
536	#size-cells = <0>;	536	#size-cells = <0>;
537	reg = <0x15750000 0x2000>;	537	reg = <0x15750000 0x2000>;
@@ -544,7 +544,7 @@
544		544
545	mmc_2: mmc@15560000 {	545	mmc_2: mmc@15560000 {
546	compatible = "samsung,exynos7-dw-mshc-smu";	546	compatible = "samsung,exynos7-dw-mshc-smu";
547	interrupts = <0 216 IRQ_TYPE_LEVEL_HIGH>;	547	interrupts = <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>;
548	#address-cells = <1>;	548	#address-cells = <1>;
549	#size-cells = <0>;	549	#size-cells = <0>;
550	reg = <0x15560000 0x2000>;	550	reg = <0x15560000 0x2000>;
@@ -558,7 +558,7 @@
558	adc: adc@13620000 {	558	adc: adc@13620000 {
559	compatible = "samsung,exynos7-adc";	559	compatible = "samsung,exynos7-adc";
560	reg = <0x13620000 0x100>;	560	reg = <0x13620000 0x100>;
561	interrupts = <0 448 IRQ_TYPE_LEVEL_HIGH>;	561	interrupts = <GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH>;
562	clocks = <&clock_peric0 PCLK_ADCIF>;	562	clocks = <&clock_peric0 PCLK_ADCIF>;
563	clock-names = "adc";	563	clock-names = "adc";
564	#io-channel-cells = <1>;	564	#io-channel-cells = <1>;
@@ -578,7 +578,7 @@
578	tmuctrl_0: tmu@10060000 {	578	tmuctrl_0: tmu@10060000 {
579	compatible = "samsung,exynos7-tmu";	579	compatible = "samsung,exynos7-tmu";
580	reg = <0x10060000 0x200>;	580	reg = <0x10060000 0x200>;
581	interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;	581	interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
582	clocks = <&clock_peris PCLK_TMU>,	582	clocks = <&clock_peris PCLK_TMU>,
583	<&clock_peris SCLK_TMU>;	583	<&clock_peris SCLK_TMU>;
584	clock-names = "tmu_apbif", "tmu_sclk";	584	clock-names = "tmu_apbif", "tmu_sclk";