diff options
author | Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> | 2015-01-24 00:05:50 -0500 |
---|---|---|
committer | Kukjin Kim <kgene@kernel.org> | 2015-01-29 18:38:52 -0500 |
commit | 865e8b76a04d018f23d809ebf735c52105e3adb2 (patch) | |
tree | 17e4a12f8932e69b6c96feabf853e19203fee0b1 | |
parent | 97bf6af1f928216fd6c5a66e8a57bfa95a659672 (diff) |
ARM: EXYNOS: apply S5P_CENTRAL_SEQ_OPTION fix only when necessary
Commit c2dd114d2486 ("ARM: EXYNOS: fix register setup for AFTR mode
code") added S5P_CENTRAL_SEQ_OPTION register setup fix for all
Exynos SoCs to AFTR mode code-path. It turned out that for coupled
cpuidle AFTR mode on Exynos4210 (added by the next patch) applying
this fix causes lockup so enable it in the AFTR mode code-path only
on SoCs that require it (in the suspend code-path it can be always
applied like it was before commit c2dd114d2486 ("ARM: EXYNOS: fix
register setup for AFTR mode code")
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Colin Cross <ccross@google.com>
Cc: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
-rw-r--r-- | arch/arm/mach-exynos/pm.c | 11 | ||||
-rw-r--r-- | arch/arm/mach-exynos/suspend.c | 4 |
2 files changed, 11 insertions, 4 deletions
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c index 86f3ecd88f78..159eb4c9779e 100644 --- a/arch/arm/mach-exynos/pm.c +++ b/arch/arm/mach-exynos/pm.c | |||
@@ -97,10 +97,6 @@ void exynos_pm_central_suspend(void) | |||
97 | tmp = pmu_raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION); | 97 | tmp = pmu_raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION); |
98 | tmp &= ~S5P_CENTRAL_LOWPWR_CFG; | 98 | tmp &= ~S5P_CENTRAL_LOWPWR_CFG; |
99 | pmu_raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION); | 99 | pmu_raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION); |
100 | |||
101 | /* Setting SEQ_OPTION register */ | ||
102 | pmu_raw_writel(S5P_USE_STANDBY_WFI0 | S5P_USE_STANDBY_WFE0, | ||
103 | S5P_CENTRAL_SEQ_OPTION); | ||
104 | } | 100 | } |
105 | 101 | ||
106 | int exynos_pm_central_resume(void) | 102 | int exynos_pm_central_resume(void) |
@@ -164,6 +160,13 @@ void exynos_enter_aftr(void) | |||
164 | 160 | ||
165 | exynos_pm_central_suspend(); | 161 | exynos_pm_central_suspend(); |
166 | 162 | ||
163 | if (of_machine_is_compatible("samsung,exynos4212") || | ||
164 | of_machine_is_compatible("samsung,exynos4412")) { | ||
165 | /* Setting SEQ_OPTION register */ | ||
166 | pmu_raw_writel(S5P_USE_STANDBY_WFI0 | S5P_USE_STANDBY_WFE0, | ||
167 | S5P_CENTRAL_SEQ_OPTION); | ||
168 | } | ||
169 | |||
167 | cpu_suspend(0, exynos_aftr_finisher); | 170 | cpu_suspend(0, exynos_aftr_finisher); |
168 | 171 | ||
169 | if (read_cpuid_part() == ARM_CPU_PART_CORTEX_A9) { | 172 | if (read_cpuid_part() == ARM_CPU_PART_CORTEX_A9) { |
diff --git a/arch/arm/mach-exynos/suspend.c b/arch/arm/mach-exynos/suspend.c index f8e7dcd17055..9c67a15f4a0f 100644 --- a/arch/arm/mach-exynos/suspend.c +++ b/arch/arm/mach-exynos/suspend.c | |||
@@ -282,6 +282,10 @@ static int exynos_pm_suspend(void) | |||
282 | { | 282 | { |
283 | exynos_pm_central_suspend(); | 283 | exynos_pm_central_suspend(); |
284 | 284 | ||
285 | /* Setting SEQ_OPTION register */ | ||
286 | pmu_raw_writel(S5P_USE_STANDBY_WFI0 | S5P_USE_STANDBY_WFE0, | ||
287 | S5P_CENTRAL_SEQ_OPTION); | ||
288 | |||
285 | if (read_cpuid_part() == ARM_CPU_PART_CORTEX_A9) | 289 | if (read_cpuid_part() == ARM_CPU_PART_CORTEX_A9) |
286 | exynos_cpu_save_register(); | 290 | exynos_cpu_save_register(); |
287 | 291 | ||