diff options
author | Rex Zhu <Rex.Zhu@amd.com> | 2018-04-17 05:26:26 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2018-04-19 11:20:10 -0400 |
commit | 84f8508f717268c333de8e472f351d6a7a487e51 (patch) | |
tree | 19125b0475c4bbf16dfbb0a318f506f3479911be | |
parent | d78fd7255881645fc645e23145d469385227170d (diff) |
drm/amd/pp: Fix bug voltage can't be OD separately on VI
Make sure to update the MCLK and SCLK flags when setting the VDDC
flags due to dependencies.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r-- | drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 16 |
1 files changed, 10 insertions, 6 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c index add90675fd2a..26fbeafc3c96 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | |||
@@ -4743,23 +4743,27 @@ static void smu7_check_dpm_table_updated(struct pp_hwmgr *hwmgr) | |||
4743 | 4743 | ||
4744 | for (i=0; i < dep_table->count; i++) { | 4744 | for (i=0; i < dep_table->count; i++) { |
4745 | if (dep_table->entries[i].vddc != odn_dep_table->entries[i].vddc) { | 4745 | if (dep_table->entries[i].vddc != odn_dep_table->entries[i].vddc) { |
4746 | data->need_update_smu7_dpm_table |= DPMTABLE_OD_UPDATE_VDDC; | 4746 | data->need_update_smu7_dpm_table |= DPMTABLE_OD_UPDATE_VDDC | DPMTABLE_OD_UPDATE_MCLK; |
4747 | break; | 4747 | return; |
4748 | } | 4748 | } |
4749 | } | 4749 | } |
4750 | if (i == dep_table->count) | 4750 | if (i == dep_table->count && data->need_update_smu7_dpm_table & DPMTABLE_OD_UPDATE_VDDC) { |
4751 | data->need_update_smu7_dpm_table &= ~DPMTABLE_OD_UPDATE_VDDC; | 4751 | data->need_update_smu7_dpm_table &= ~DPMTABLE_OD_UPDATE_VDDC; |
4752 | data->need_update_smu7_dpm_table |= DPMTABLE_OD_UPDATE_MCLK; | ||
4753 | } | ||
4752 | 4754 | ||
4753 | dep_table = table_info->vdd_dep_on_sclk; | 4755 | dep_table = table_info->vdd_dep_on_sclk; |
4754 | odn_dep_table = (struct phm_ppt_v1_clock_voltage_dependency_table *)&(odn_table->vdd_dependency_on_sclk); | 4756 | odn_dep_table = (struct phm_ppt_v1_clock_voltage_dependency_table *)&(odn_table->vdd_dependency_on_sclk); |
4755 | for (i=0; i < dep_table->count; i++) { | 4757 | for (i=0; i < dep_table->count; i++) { |
4756 | if (dep_table->entries[i].vddc != odn_dep_table->entries[i].vddc) { | 4758 | if (dep_table->entries[i].vddc != odn_dep_table->entries[i].vddc) { |
4757 | data->need_update_smu7_dpm_table |= DPMTABLE_OD_UPDATE_VDDC; | 4759 | data->need_update_smu7_dpm_table |= DPMTABLE_OD_UPDATE_VDDC | DPMTABLE_OD_UPDATE_SCLK; |
4758 | break; | 4760 | return; |
4759 | } | 4761 | } |
4760 | } | 4762 | } |
4761 | if (i == dep_table->count) | 4763 | if (i == dep_table->count && data->need_update_smu7_dpm_table & DPMTABLE_OD_UPDATE_VDDC) { |
4762 | data->need_update_smu7_dpm_table &= ~DPMTABLE_OD_UPDATE_VDDC; | 4764 | data->need_update_smu7_dpm_table &= ~DPMTABLE_OD_UPDATE_VDDC; |
4765 | data->need_update_smu7_dpm_table |= DPMTABLE_OD_UPDATE_SCLK; | ||
4766 | } | ||
4763 | } | 4767 | } |
4764 | 4768 | ||
4765 | static int smu7_odn_edit_dpm_table(struct pp_hwmgr *hwmgr, | 4769 | static int smu7_odn_edit_dpm_table(struct pp_hwmgr *hwmgr, |