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authorJim Mattson <jmattson@google.com>2016-10-04 13:48:38 -0400
committerPaolo Bonzini <pbonzini@redhat.com>2016-11-02 16:32:17 -0400
commit83bafef1a131d1b8743d63658a180948bc880a74 (patch)
tree29aa0d20b068fd42e403fd153e5db7dc5a75cb46
parentcf3215d9394aa115d0b34d1c93512f53e425db97 (diff)
kvm: nVMX: Update MSR load counts on a VMCS switch
When L0 establishes (or removes) an MSR entry in the VM-entry or VM-exit MSR load lists, the change should affect the dormant VMCS as well as the current VMCS. Moreover, the vmcs02 MSR-load addresses should be initialized. Signed-off-by: Jim Mattson <jmattson@google.com> Signed-off-by: Radim Krčmář <rkrcmar@redhat.com>
-rw-r--r--arch/x86/kvm/vmx.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index 6fcc819c945f..7ef5898af46a 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -9968,6 +9968,15 @@ static void prepare_vmcs02(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12)
9968 vmx_set_constant_host_state(vmx); 9968 vmx_set_constant_host_state(vmx);
9969 9969
9970 /* 9970 /*
9971 * Set the MSR load/store lists to match L0's settings.
9972 */
9973 vmcs_write32(VM_EXIT_MSR_STORE_COUNT, 0);
9974 vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, vmx->msr_autoload.nr);
9975 vmcs_write64(VM_EXIT_MSR_LOAD_ADDR, __pa(vmx->msr_autoload.host));
9976 vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT, vmx->msr_autoload.nr);
9977 vmcs_write64(VM_ENTRY_MSR_LOAD_ADDR, __pa(vmx->msr_autoload.guest));
9978
9979 /*
9971 * HOST_RSP is normally set correctly in vmx_vcpu_run() just before 9980 * HOST_RSP is normally set correctly in vmx_vcpu_run() just before
9972 * entry, but only if the current (host) sp changed from the value 9981 * entry, but only if the current (host) sp changed from the value
9973 * we wrote last (vmx->host_rsp). This cache is no longer relevant 9982 * we wrote last (vmx->host_rsp). This cache is no longer relevant
@@ -10799,6 +10808,8 @@ static void nested_vmx_vmexit(struct kvm_vcpu *vcpu, u32 exit_reason,
10799 load_vmcs12_host_state(vcpu, vmcs12); 10808 load_vmcs12_host_state(vcpu, vmcs12);
10800 10809
10801 /* Update any VMCS fields that might have changed while L2 ran */ 10810 /* Update any VMCS fields that might have changed while L2 ran */
10811 vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, vmx->msr_autoload.nr);
10812 vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT, vmx->msr_autoload.nr);
10802 vmcs_write64(TSC_OFFSET, vcpu->arch.tsc_offset); 10813 vmcs_write64(TSC_OFFSET, vcpu->arch.tsc_offset);
10803 if (vmx->hv_deadline_tsc == -1) 10814 if (vmx->hv_deadline_tsc == -1)
10804 vmcs_clear_bits(PIN_BASED_VM_EXEC_CONTROL, 10815 vmcs_clear_bits(PIN_BASED_VM_EXEC_CONTROL,