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authorLinus Torvalds <torvalds@linux-foundation.org>2017-10-26 11:06:35 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2017-10-26 11:06:35 -0400
commit832c6b18f904b96f494d43d6023db68c9f330cf0 (patch)
treed93a89346cce9c115cadf32e3370894b38706537
parent601c5c2ee98313f96ec40b4dcc8d7303afff787c (diff)
parent7555aa766b63f00fea8280883eb7db6834204605 (diff)
Merge tag 'spi-fix-v4.14-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi
Pull spi fixes from Mark Brown: "There are a bunch of device specific fixes (more than I'd like, I've been lax sending these) plus one important core fix for the conversion to use an IDR for bus number allocation which avoids issues with collisions when some but not all of the buses in the system have a fixed bus number specified. The Armada changes are rather large, specificially "spi: armada-3700: Fix padding when sending not 4-byte aligned data", but it's a storage corruption issue and there's things like indentation changes which make it look bigger than it really is. It's been cooking in -next for quite a while now and is part of the reason for the delay" * tag 'spi-fix-v4.14-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: spi: fix IDR collision on systems with both fixed and dynamic SPI bus numbers spi: bcm-qspi: Fix use after free in bcm_qspi_probe() in error path spi: a3700: Return correct value on timeout detection spi: uapi: spidev: add missing ioctl header spi: stm32: Fix logical error in stm32_spi_prepare_mbr() spi: armada-3700: Fix padding when sending not 4-byte aligned data spi: armada-3700: Fix failing commands with quad-SPI
-rw-r--r--drivers/spi/spi-armada-3700.c145
-rw-r--r--drivers/spi/spi-bcm-qspi.c9
-rw-r--r--drivers/spi/spi-stm32.c4
-rw-r--r--drivers/spi/spi.c13
-rw-r--r--include/uapi/linux/spi/spidev.h1
5 files changed, 65 insertions, 107 deletions
diff --git a/drivers/spi/spi-armada-3700.c b/drivers/spi/spi-armada-3700.c
index 6c7d7a460689..568e1c65aa82 100644
--- a/drivers/spi/spi-armada-3700.c
+++ b/drivers/spi/spi-armada-3700.c
@@ -99,11 +99,6 @@
99/* A3700_SPI_IF_TIME_REG */ 99/* A3700_SPI_IF_TIME_REG */
100#define A3700_SPI_CLK_CAPT_EDGE BIT(7) 100#define A3700_SPI_CLK_CAPT_EDGE BIT(7)
101 101
102/* Flags and macros for struct a3700_spi */
103#define A3700_INSTR_CNT 1
104#define A3700_ADDR_CNT 3
105#define A3700_DUMMY_CNT 1
106
107struct a3700_spi { 102struct a3700_spi {
108 struct spi_master *master; 103 struct spi_master *master;
109 void __iomem *base; 104 void __iomem *base;
@@ -117,9 +112,6 @@ struct a3700_spi {
117 u8 byte_len; 112 u8 byte_len;
118 u32 wait_mask; 113 u32 wait_mask;
119 struct completion done; 114 struct completion done;
120 u32 addr_cnt;
121 u32 instr_cnt;
122 size_t hdr_cnt;
123}; 115};
124 116
125static u32 spireg_read(struct a3700_spi *a3700_spi, u32 offset) 117static u32 spireg_read(struct a3700_spi *a3700_spi, u32 offset)
@@ -161,7 +153,7 @@ static void a3700_spi_deactivate_cs(struct a3700_spi *a3700_spi,
161} 153}
162 154
163static int a3700_spi_pin_mode_set(struct a3700_spi *a3700_spi, 155static int a3700_spi_pin_mode_set(struct a3700_spi *a3700_spi,
164 unsigned int pin_mode) 156 unsigned int pin_mode, bool receiving)
165{ 157{
166 u32 val; 158 u32 val;
167 159
@@ -177,6 +169,9 @@ static int a3700_spi_pin_mode_set(struct a3700_spi *a3700_spi,
177 break; 169 break;
178 case SPI_NBITS_QUAD: 170 case SPI_NBITS_QUAD:
179 val |= A3700_SPI_DATA_PIN1; 171 val |= A3700_SPI_DATA_PIN1;
172 /* RX during address reception uses 4-pin */
173 if (receiving)
174 val |= A3700_SPI_ADDR_PIN;
180 break; 175 break;
181 default: 176 default:
182 dev_err(&a3700_spi->master->dev, "wrong pin mode %u", pin_mode); 177 dev_err(&a3700_spi->master->dev, "wrong pin mode %u", pin_mode);
@@ -392,7 +387,8 @@ static bool a3700_spi_wait_completion(struct spi_device *spi)
392 387
393 spireg_write(a3700_spi, A3700_SPI_INT_MASK_REG, 0); 388 spireg_write(a3700_spi, A3700_SPI_INT_MASK_REG, 0);
394 389
395 return true; 390 /* Timeout was reached */
391 return false;
396} 392}
397 393
398static bool a3700_spi_transfer_wait(struct spi_device *spi, 394static bool a3700_spi_transfer_wait(struct spi_device *spi,
@@ -446,59 +442,43 @@ static void a3700_spi_set_cs(struct spi_device *spi, bool enable)
446 442
447static void a3700_spi_header_set(struct a3700_spi *a3700_spi) 443static void a3700_spi_header_set(struct a3700_spi *a3700_spi)
448{ 444{
449 u32 instr_cnt = 0, addr_cnt = 0, dummy_cnt = 0; 445 unsigned int addr_cnt;
450 u32 val = 0; 446 u32 val = 0;
451 447
452 /* Clear the header registers */ 448 /* Clear the header registers */
453 spireg_write(a3700_spi, A3700_SPI_IF_INST_REG, 0); 449 spireg_write(a3700_spi, A3700_SPI_IF_INST_REG, 0);
454 spireg_write(a3700_spi, A3700_SPI_IF_ADDR_REG, 0); 450 spireg_write(a3700_spi, A3700_SPI_IF_ADDR_REG, 0);
455 spireg_write(a3700_spi, A3700_SPI_IF_RMODE_REG, 0); 451 spireg_write(a3700_spi, A3700_SPI_IF_RMODE_REG, 0);
452 spireg_write(a3700_spi, A3700_SPI_IF_HDR_CNT_REG, 0);
456 453
457 /* Set header counters */ 454 /* Set header counters */
458 if (a3700_spi->tx_buf) { 455 if (a3700_spi->tx_buf) {
459 if (a3700_spi->buf_len <= a3700_spi->instr_cnt) { 456 /*
460 instr_cnt = a3700_spi->buf_len; 457 * when tx data is not 4 bytes aligned, there will be unexpected
461 } else if (a3700_spi->buf_len <= (a3700_spi->instr_cnt + 458 * bytes out of SPI output register, since it always shifts out
462 a3700_spi->addr_cnt)) { 459 * as whole 4 bytes. This might cause incorrect transaction with
463 instr_cnt = a3700_spi->instr_cnt; 460 * some devices. To avoid that, use SPI header count feature to
464 addr_cnt = a3700_spi->buf_len - instr_cnt; 461 * transfer up to 3 bytes of data first, and then make the rest
465 } else if (a3700_spi->buf_len <= a3700_spi->hdr_cnt) { 462 * of data 4-byte aligned.
466 instr_cnt = a3700_spi->instr_cnt; 463 */
467 addr_cnt = a3700_spi->addr_cnt; 464 addr_cnt = a3700_spi->buf_len % 4;
468 /* Need to handle the normal write case with 1 byte 465 if (addr_cnt) {
469 * data 466 val = (addr_cnt & A3700_SPI_ADDR_CNT_MASK)
470 */ 467 << A3700_SPI_ADDR_CNT_BIT;
471 if (!a3700_spi->tx_buf[instr_cnt + addr_cnt]) 468 spireg_write(a3700_spi, A3700_SPI_IF_HDR_CNT_REG, val);
472 dummy_cnt = a3700_spi->buf_len - instr_cnt - 469
473 addr_cnt; 470 /* Update the buffer length to be transferred */
471 a3700_spi->buf_len -= addr_cnt;
472
473 /* transfer 1~3 bytes through address count */
474 val = 0;
475 while (addr_cnt--) {
476 val = (val << 8) | a3700_spi->tx_buf[0];
477 a3700_spi->tx_buf++;
478 }
479 spireg_write(a3700_spi, A3700_SPI_IF_ADDR_REG, val);
474 } 480 }
475 val |= ((instr_cnt & A3700_SPI_INSTR_CNT_MASK)
476 << A3700_SPI_INSTR_CNT_BIT);
477 val |= ((addr_cnt & A3700_SPI_ADDR_CNT_MASK)
478 << A3700_SPI_ADDR_CNT_BIT);
479 val |= ((dummy_cnt & A3700_SPI_DUMMY_CNT_MASK)
480 << A3700_SPI_DUMMY_CNT_BIT);
481 } 481 }
482 spireg_write(a3700_spi, A3700_SPI_IF_HDR_CNT_REG, val);
483
484 /* Update the buffer length to be transferred */
485 a3700_spi->buf_len -= (instr_cnt + addr_cnt + dummy_cnt);
486
487 /* Set Instruction */
488 val = 0;
489 while (instr_cnt--) {
490 val = (val << 8) | a3700_spi->tx_buf[0];
491 a3700_spi->tx_buf++;
492 }
493 spireg_write(a3700_spi, A3700_SPI_IF_INST_REG, val);
494
495 /* Set Address */
496 val = 0;
497 while (addr_cnt--) {
498 val = (val << 8) | a3700_spi->tx_buf[0];
499 a3700_spi->tx_buf++;
500 }
501 spireg_write(a3700_spi, A3700_SPI_IF_ADDR_REG, val);
502} 482}
503 483
504static int a3700_is_wfifo_full(struct a3700_spi *a3700_spi) 484static int a3700_is_wfifo_full(struct a3700_spi *a3700_spi)
@@ -512,35 +492,12 @@ static int a3700_is_wfifo_full(struct a3700_spi *a3700_spi)
512static int a3700_spi_fifo_write(struct a3700_spi *a3700_spi) 492static int a3700_spi_fifo_write(struct a3700_spi *a3700_spi)
513{ 493{
514 u32 val; 494 u32 val;
515 int i = 0;
516 495
517 while (!a3700_is_wfifo_full(a3700_spi) && a3700_spi->buf_len) { 496 while (!a3700_is_wfifo_full(a3700_spi) && a3700_spi->buf_len) {
518 val = 0; 497 val = cpu_to_le32(*(u32 *)a3700_spi->tx_buf);
519 if (a3700_spi->buf_len >= 4) { 498 spireg_write(a3700_spi, A3700_SPI_DATA_OUT_REG, val);
520 val = cpu_to_le32(*(u32 *)a3700_spi->tx_buf); 499 a3700_spi->buf_len -= 4;
521 spireg_write(a3700_spi, A3700_SPI_DATA_OUT_REG, val); 500 a3700_spi->tx_buf += 4;
522
523 a3700_spi->buf_len -= 4;
524 a3700_spi->tx_buf += 4;
525 } else {
526 /*
527 * If the remained buffer length is less than 4-bytes,
528 * we should pad the write buffer with all ones. So that
529 * it avoids overwrite the unexpected bytes following
530 * the last one.
531 */
532 val = GENMASK(31, 0);
533 while (a3700_spi->buf_len) {
534 val &= ~(0xff << (8 * i));
535 val |= *a3700_spi->tx_buf++ << (8 * i);
536 i++;
537 a3700_spi->buf_len--;
538
539 spireg_write(a3700_spi, A3700_SPI_DATA_OUT_REG,
540 val);
541 }
542 break;
543 }
544 } 501 }
545 502
546 return 0; 503 return 0;
@@ -645,15 +602,18 @@ static int a3700_spi_transfer_one(struct spi_master *master,
645 a3700_spi->rx_buf = xfer->rx_buf; 602 a3700_spi->rx_buf = xfer->rx_buf;
646 a3700_spi->buf_len = xfer->len; 603 a3700_spi->buf_len = xfer->len;
647 604
648 /* SPI transfer headers */
649 a3700_spi_header_set(a3700_spi);
650
651 if (xfer->tx_buf) 605 if (xfer->tx_buf)
652 nbits = xfer->tx_nbits; 606 nbits = xfer->tx_nbits;
653 else if (xfer->rx_buf) 607 else if (xfer->rx_buf)
654 nbits = xfer->rx_nbits; 608 nbits = xfer->rx_nbits;
655 609
656 a3700_spi_pin_mode_set(a3700_spi, nbits); 610 a3700_spi_pin_mode_set(a3700_spi, nbits, xfer->rx_buf ? true : false);
611
612 /* Flush the FIFOs */
613 a3700_spi_fifo_flush(a3700_spi);
614
615 /* Transfer first bytes of data when buffer is not 4-byte aligned */
616 a3700_spi_header_set(a3700_spi);
657 617
658 if (xfer->rx_buf) { 618 if (xfer->rx_buf) {
659 /* Set read data length */ 619 /* Set read data length */
@@ -733,16 +693,11 @@ static int a3700_spi_transfer_one(struct spi_master *master,
733 dev_err(&spi->dev, "wait wfifo empty timed out\n"); 693 dev_err(&spi->dev, "wait wfifo empty timed out\n");
734 return -ETIMEDOUT; 694 return -ETIMEDOUT;
735 } 695 }
736 } else { 696 }
737 /* 697
738 * If the instruction in SPI_INSTR does not require data 698 if (!a3700_spi_transfer_wait(spi, A3700_SPI_XFER_RDY)) {
739 * to be written to the SPI device, wait until SPI_RDY 699 dev_err(&spi->dev, "wait xfer ready timed out\n");
740 * is 1 for the SPI interface to be in idle. 700 return -ETIMEDOUT;
741 */
742 if (!a3700_spi_transfer_wait(spi, A3700_SPI_XFER_RDY)) {
743 dev_err(&spi->dev, "wait xfer ready timed out\n");
744 return -ETIMEDOUT;
745 }
746 } 701 }
747 702
748 val = spireg_read(a3700_spi, A3700_SPI_IF_CFG_REG); 703 val = spireg_read(a3700_spi, A3700_SPI_IF_CFG_REG);
@@ -834,10 +789,6 @@ static int a3700_spi_probe(struct platform_device *pdev)
834 memset(spi, 0, sizeof(struct a3700_spi)); 789 memset(spi, 0, sizeof(struct a3700_spi));
835 790
836 spi->master = master; 791 spi->master = master;
837 spi->instr_cnt = A3700_INSTR_CNT;
838 spi->addr_cnt = A3700_ADDR_CNT;
839 spi->hdr_cnt = A3700_INSTR_CNT + A3700_ADDR_CNT +
840 A3700_DUMMY_CNT;
841 792
842 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 793 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
843 spi->base = devm_ioremap_resource(dev, res); 794 spi->base = devm_ioremap_resource(dev, res);
diff --git a/drivers/spi/spi-bcm-qspi.c b/drivers/spi/spi-bcm-qspi.c
index 6ef6c44f39f5..a172ab299e80 100644
--- a/drivers/spi/spi-bcm-qspi.c
+++ b/drivers/spi/spi-bcm-qspi.c
@@ -1250,7 +1250,7 @@ int bcm_qspi_probe(struct platform_device *pdev,
1250 goto qspi_probe_err; 1250 goto qspi_probe_err;
1251 } 1251 }
1252 } else { 1252 } else {
1253 goto qspi_probe_err; 1253 goto qspi_resource_err;
1254 } 1254 }
1255 1255
1256 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "bspi"); 1256 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "bspi");
@@ -1272,7 +1272,7 @@ int bcm_qspi_probe(struct platform_device *pdev,
1272 qspi->base[CHIP_SELECT] = devm_ioremap_resource(dev, res); 1272 qspi->base[CHIP_SELECT] = devm_ioremap_resource(dev, res);
1273 if (IS_ERR(qspi->base[CHIP_SELECT])) { 1273 if (IS_ERR(qspi->base[CHIP_SELECT])) {
1274 ret = PTR_ERR(qspi->base[CHIP_SELECT]); 1274 ret = PTR_ERR(qspi->base[CHIP_SELECT]);
1275 goto qspi_probe_err; 1275 goto qspi_resource_err;
1276 } 1276 }
1277 } 1277 }
1278 1278
@@ -1280,7 +1280,7 @@ int bcm_qspi_probe(struct platform_device *pdev,
1280 GFP_KERNEL); 1280 GFP_KERNEL);
1281 if (!qspi->dev_ids) { 1281 if (!qspi->dev_ids) {
1282 ret = -ENOMEM; 1282 ret = -ENOMEM;
1283 goto qspi_probe_err; 1283 goto qspi_resource_err;
1284 } 1284 }
1285 1285
1286 for (val = 0; val < num_irqs; val++) { 1286 for (val = 0; val < num_irqs; val++) {
@@ -1369,8 +1369,9 @@ qspi_reg_err:
1369 bcm_qspi_hw_uninit(qspi); 1369 bcm_qspi_hw_uninit(qspi);
1370 clk_disable_unprepare(qspi->clk); 1370 clk_disable_unprepare(qspi->clk);
1371qspi_probe_err: 1371qspi_probe_err:
1372 spi_master_put(master);
1373 kfree(qspi->dev_ids); 1372 kfree(qspi->dev_ids);
1373qspi_resource_err:
1374 spi_master_put(master);
1374 return ret; 1375 return ret;
1375} 1376}
1376/* probe function to be called by SoC specific platform driver probe */ 1377/* probe function to be called by SoC specific platform driver probe */
diff --git a/drivers/spi/spi-stm32.c b/drivers/spi/spi-stm32.c
index 680cdf549506..ba9743fa2326 100644
--- a/drivers/spi/spi-stm32.c
+++ b/drivers/spi/spi-stm32.c
@@ -263,8 +263,8 @@ static int stm32_spi_prepare_mbr(struct stm32_spi *spi, u32 speed_hz)
263 * no need to check it there. 263 * no need to check it there.
264 * However, we need to ensure the following calculations. 264 * However, we need to ensure the following calculations.
265 */ 265 */
266 if ((div < SPI_MBR_DIV_MIN) && 266 if (div < SPI_MBR_DIV_MIN ||
267 (div > SPI_MBR_DIV_MAX)) 267 div > SPI_MBR_DIV_MAX)
268 return -EINVAL; 268 return -EINVAL;
269 269
270 /* Determine the first power of 2 greater than or equal to div */ 270 /* Determine the first power of 2 greater than or equal to div */
diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
index 6e65524cbfd9..e8b5a5e21b2e 100644
--- a/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
@@ -45,7 +45,6 @@
45 45
46#define CREATE_TRACE_POINTS 46#define CREATE_TRACE_POINTS
47#include <trace/events/spi.h> 47#include <trace/events/spi.h>
48#define SPI_DYN_FIRST_BUS_NUM 0
49 48
50static DEFINE_IDR(spi_master_idr); 49static DEFINE_IDR(spi_master_idr);
51 50
@@ -2086,7 +2085,7 @@ int spi_register_controller(struct spi_controller *ctlr)
2086 struct device *dev = ctlr->dev.parent; 2085 struct device *dev = ctlr->dev.parent;
2087 struct boardinfo *bi; 2086 struct boardinfo *bi;
2088 int status = -ENODEV; 2087 int status = -ENODEV;
2089 int id; 2088 int id, first_dynamic;
2090 2089
2091 if (!dev) 2090 if (!dev)
2092 return -ENODEV; 2091 return -ENODEV;
@@ -2116,9 +2115,15 @@ int spi_register_controller(struct spi_controller *ctlr)
2116 } 2115 }
2117 } 2116 }
2118 if (ctlr->bus_num < 0) { 2117 if (ctlr->bus_num < 0) {
2118 first_dynamic = of_alias_get_highest_id("spi");
2119 if (first_dynamic < 0)
2120 first_dynamic = 0;
2121 else
2122 first_dynamic++;
2123
2119 mutex_lock(&board_lock); 2124 mutex_lock(&board_lock);
2120 id = idr_alloc(&spi_master_idr, ctlr, SPI_DYN_FIRST_BUS_NUM, 0, 2125 id = idr_alloc(&spi_master_idr, ctlr, first_dynamic,
2121 GFP_KERNEL); 2126 0, GFP_KERNEL);
2122 mutex_unlock(&board_lock); 2127 mutex_unlock(&board_lock);
2123 if (WARN(id < 0, "couldn't get idr")) 2128 if (WARN(id < 0, "couldn't get idr"))
2124 return id; 2129 return id;
diff --git a/include/uapi/linux/spi/spidev.h b/include/uapi/linux/spi/spidev.h
index dd5f21e75805..856de39d0b89 100644
--- a/include/uapi/linux/spi/spidev.h
+++ b/include/uapi/linux/spi/spidev.h
@@ -23,6 +23,7 @@
23#define SPIDEV_H 23#define SPIDEV_H
24 24
25#include <linux/types.h> 25#include <linux/types.h>
26#include <linux/ioctl.h>
26 27
27/* User space versions of kernel symbols for SPI clocking modes, 28/* User space versions of kernel symbols for SPI clocking modes,
28 * matching <linux/spi/spi.h> 29 * matching <linux/spi/spi.h>