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authorKen Wang <Qingqing.Wang@amd.com>2016-03-18 03:23:08 -0400
committerAlex Deucher <alexander.deucher@amd.com>2017-03-29 23:53:36 -0400
commit832be4041d4999e008839d12d1efe118da27bd99 (patch)
tree71ca6d33a8ba86ba9e0c8da16a88fd67d5c3ad36
parent7014285ade54bae2fe03aa397aa45846a0cd3e31 (diff)
drm/amdgpu: add 64bit doorbell functions (v2)
Newer asics need 64 bit doorbells. v2: fix comment (Nils) Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu.h4
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_device.c38
2 files changed, 42 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 9c1ce40b33b2..8c36765d3f02 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1521,6 +1521,8 @@ void amdgpu_io_wreg(struct amdgpu_device *adev, u32 reg, u32 v);
1521 1521
1522u32 amdgpu_mm_rdoorbell(struct amdgpu_device *adev, u32 index); 1522u32 amdgpu_mm_rdoorbell(struct amdgpu_device *adev, u32 index);
1523void amdgpu_mm_wdoorbell(struct amdgpu_device *adev, u32 index, u32 v); 1523void amdgpu_mm_wdoorbell(struct amdgpu_device *adev, u32 index, u32 v);
1524u64 amdgpu_mm_rdoorbell64(struct amdgpu_device *adev, u32 index);
1525void amdgpu_mm_wdoorbell64(struct amdgpu_device *adev, u32 index, u64 v);
1524 1526
1525/* 1527/*
1526 * Registers read & write functions. 1528 * Registers read & write functions.
@@ -1575,6 +1577,8 @@ void amdgpu_mm_wdoorbell(struct amdgpu_device *adev, u32 index, u32 v);
1575 1577
1576#define RDOORBELL32(index) amdgpu_mm_rdoorbell(adev, (index)) 1578#define RDOORBELL32(index) amdgpu_mm_rdoorbell(adev, (index))
1577#define WDOORBELL32(index, v) amdgpu_mm_wdoorbell(adev, (index), (v)) 1579#define WDOORBELL32(index, v) amdgpu_mm_wdoorbell(adev, (index), (v))
1580#define RDOORBELL64(index) amdgpu_mm_rdoorbell64(adev, (index))
1581#define WDOORBELL64(index, v) amdgpu_mm_wdoorbell64(adev, (index), (v))
1578 1582
1579#define REG_FIELD_SHIFT(reg, field) reg##__##field##__SHIFT 1583#define REG_FIELD_SHIFT(reg, field) reg##__##field##__SHIFT
1580#define REG_FIELD_MASK(reg, field) reg##__##field##_MASK 1584#define REG_FIELD_MASK(reg, field) reg##__##field##_MASK
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index fcf83178b113..ff0b9920ea79 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -195,6 +195,44 @@ void amdgpu_mm_wdoorbell(struct amdgpu_device *adev, u32 index, u32 v)
195} 195}
196 196
197/** 197/**
198 * amdgpu_mm_rdoorbell64 - read a doorbell Qword
199 *
200 * @adev: amdgpu_device pointer
201 * @index: doorbell index
202 *
203 * Returns the value in the doorbell aperture at the
204 * requested doorbell index (VEGA10+).
205 */
206u64 amdgpu_mm_rdoorbell64(struct amdgpu_device *adev, u32 index)
207{
208 if (index < adev->doorbell.num_doorbells) {
209 return atomic64_read((atomic64_t *)(adev->doorbell.ptr + index));
210 } else {
211 DRM_ERROR("reading beyond doorbell aperture: 0x%08x!\n", index);
212 return 0;
213 }
214}
215
216/**
217 * amdgpu_mm_wdoorbell64 - write a doorbell Qword
218 *
219 * @adev: amdgpu_device pointer
220 * @index: doorbell index
221 * @v: value to write
222 *
223 * Writes @v to the doorbell aperture at the
224 * requested doorbell index (VEGA10+).
225 */
226void amdgpu_mm_wdoorbell64(struct amdgpu_device *adev, u32 index, u64 v)
227{
228 if (index < adev->doorbell.num_doorbells) {
229 atomic64_set((atomic64_t *)(adev->doorbell.ptr + index), v);
230 } else {
231 DRM_ERROR("writing beyond doorbell aperture: 0x%08x!\n", index);
232 }
233}
234
235/**
198 * amdgpu_invalid_rreg - dummy reg read function 236 * amdgpu_invalid_rreg - dummy reg read function
199 * 237 *
200 * @adev: amdgpu device pointer 238 * @adev: amdgpu device pointer