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authorAndi Shyti <andi.shyti@samsung.com>2017-01-06 08:43:47 -0500
committerKrzysztof Kozlowski <krzk@kernel.org>2017-01-06 09:00:12 -0500
commit83089bb9a30df1ecd9a6dab006f7b005232e9c07 (patch)
tree113880a3a7f3ddb3a03e1f6a0b074583956ea248
parent2f3e77392099f0bf617ea72df495867a35a60054 (diff)
arm64: dts: exynos: Make TM2 and TM2E independent from each other
Currently TM2E dts includes TM2 but there are some differences between the two boards and TM2 has some properties that TM2E doesn't have. That's why it's important to keep the two dts files independent and put all the commonalities in a tm2-common.dtsi file. At the current status the only two differences between the two dts files (besides the board name) are ldo31 and ldo38. Signed-off-by: Andi Shyti <andi.shyti@samsung.com> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Diffstat
-rw-r--r--arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi1118
-rw-r--r--arch/arm64/boot/dts/exynos/exynos5433-tm2.dts1106
-rw-r--r--arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts2
3 files changed, 1128 insertions, 1098 deletions
diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi b/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi
new file mode 100644
index 000000000000..cc6701b3bce4
--- /dev/null
+++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi
@@ -0,0 +1,1118 @@
1/*
2 * SAMSUNG Exynos5433 TM2 board device tree source
3 *
4 * Copyright (c) 2016 Samsung Electronics Co., Ltd.
5 *
6 * Common device tree source file for Samsung's TM2 and TM2E boards
7 * which are based on Samsung Exynos5433 SoC.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14/dts-v1/;
15#include "exynos5433.dtsi"
16#include <dt-bindings/clock/samsung,s2mps11.h>
17#include <dt-bindings/gpio/gpio.h>
18#include <dt-bindings/input/input.h>
19#include <dt-bindings/interrupt-controller/irq.h>
20
21/ {
22 aliases {
23 gsc0 = &gsc_0;
24 gsc1 = &gsc_1;
25 gsc2 = &gsc_2;
26 pinctrl0 = &pinctrl_alive;
27 pinctrl1 = &pinctrl_aud;
28 pinctrl2 = &pinctrl_cpif;
29 pinctrl3 = &pinctrl_ese;
30 pinctrl4 = &pinctrl_finger;
31 pinctrl5 = &pinctrl_fsys;
32 pinctrl6 = &pinctrl_imem;
33 pinctrl7 = &pinctrl_nfc;
34 pinctrl8 = &pinctrl_peric;
35 pinctrl9 = &pinctrl_touch;
36 serial0 = &serial_0;
37 serial1 = &serial_1;
38 serial2 = &serial_2;
39 serial3 = &serial_3;
40 spi0 = &spi_0;
41 spi1 = &spi_1;
42 spi2 = &spi_2;
43 spi3 = &spi_3;
44 spi4 = &spi_4;
45 mshc0 = &mshc_0;
46 mshc2 = &mshc_2;
47 };
48
49 chosen {
50 stdout-path = &serial_1;
51 };
52
53 memory@20000000 {
54 device_type = "memory";
55 reg = <0x0 0x20000000 0x0 0xc0000000>;
56 };
57
58 gpio-keys {
59 compatible = "gpio-keys";
60
61 power-key {
62 gpios = <&gpa2 7 GPIO_ACTIVE_LOW>;
63 linux,code = <KEY_POWER>;
64 label = "power key";
65 debounce-interval = <10>;
66 };
67
68 volume-up-key {
69 gpios = <&gpa2 0 GPIO_ACTIVE_LOW>;
70 linux,code = <KEY_VOLUMEUP>;
71 label = "volume-up key";
72 debounce-interval = <10>;
73 };
74
75 volume-down-key {
76 gpios = <&gpa2 1 GPIO_ACTIVE_LOW>;
77 linux,code = <KEY_VOLUMEDOWN>;
78 label = "volume-down key";
79 debounce-interval = <10>;
80 };
81
82 homepage-key {
83 gpios = <&gpa0 3 GPIO_ACTIVE_LOW>;
84 linux,code = <KEY_MENU>;
85 label = "homepage key";
86 debounce-interval = <10>;
87 };
88 };
89
90 i2c_max98504: i2c-gpio-0 {
91 compatible = "i2c-gpio";
92 gpios = <&gpd0 1 GPIO_ACTIVE_HIGH /* SPK_AMP_SDA */
93 &gpd0 0 GPIO_ACTIVE_HIGH /* SPK_AMP_SCL */ >;
94 i2c-gpio,delay-us = <2>;
95 #address-cells = <1>;
96 #size-cells = <0>;
97 status = "okay";
98
99 max98504: max98504@31 {
100 compatible = "maxim,max98504";
101 reg = <0x31>;
102 maxim,rx-path = <1>;
103 maxim,tx-path = <1>;
104 maxim,tx-channel-mask = <3>;
105 maxim,tx-channel-source = <2>;
106 };
107 };
108
109 sound {
110 compatible = "samsung,tm2-audio";
111 audio-codec = <&wm5110>;
112 i2s-controller = <&i2s0>;
113 audio-amplifier = <&max98504>;
114 mic-bias-gpios = <&gpr3 2 GPIO_ACTIVE_HIGH>;
115 model = "wm5110";
116 samsung,audio-routing =
117 /* Headphone */
118 "HP", "HPOUT1L",
119 "HP", "HPOUT1R",
120
121 /* Speaker */
122 "SPK", "SPKOUT",
123 "SPKOUT", "HPOUT2L",
124 "SPKOUT", "HPOUT2R",
125
126 /* Receiver */
127 "RCV", "HPOUT3L",
128 "RCV", "HPOUT3R";
129 status = "okay";
130 };
131};
132
133&adc {
134 vdd-supply = <&ldo3_reg>;
135 status = "okay";
136
137 thermistor-ap {
138 compatible = "murata,ncp03wf104";
139 pullup-uv = <1800000>;
140 pullup-ohm = <100000>;
141 pulldown-ohm = <0>;
142 io-channels = <&adc 0>;
143 };
144
145 thermistor-battery {
146 compatible = "murata,ncp03wf104";
147 pullup-uv = <1800000>;
148 pullup-ohm = <100000>;
149 pulldown-ohm = <0>;
150 io-channels = <&adc 1>;
151 #thermal-sensor-cells = <0>;
152 };
153
154 thermistor-charger {
155 compatible = "murata,ncp03wf104";
156 pullup-uv = <1800000>;
157 pullup-ohm = <100000>;
158 pulldown-ohm = <0>;
159 io-channels = <&adc 2>;
160 };
161};
162
163&bus_g2d_400 {
164 devfreq-events = <&ppmu_event0_d0_general>, <&ppmu_event0_d1_general>;
165 vdd-supply = <&buck4_reg>;
166 exynos,saturation-ratio = <10>;
167 status = "okay";
168};
169
170&bus_g2d_266 {
171 devfreq = <&bus_g2d_400>;
172 status = "okay";
173};
174
175&bus_gscl {
176 devfreq = <&bus_g2d_400>;
177 status = "okay";
178};
179
180&bus_hevc {
181 devfreq = <&bus_g2d_400>;
182 status = "okay";
183};
184
185&bus_jpeg {
186 devfreq = <&bus_g2d_400>;
187 status = "okay";
188};
189
190&bus_mfc {
191 devfreq = <&bus_g2d_400>;
192 status = "okay";
193};
194
195&bus_mscl {
196 devfreq = <&bus_g2d_400>;
197 status = "okay";
198};
199
200&bus_noc0 {
201 devfreq = <&bus_g2d_400>;
202 status = "okay";
203};
204
205&bus_noc1 {
206 devfreq = <&bus_g2d_400>;
207 status = "okay";
208};
209
210&bus_noc2 {
211 devfreq = <&bus_g2d_400>;
212 status = "okay";
213};
214
215&cmu_aud {
216 assigned-clocks = <&cmu_aud CLK_MOUT_AUD_PLL_USER>;
217 assigned-clock-parents = <&cmu_top CLK_FOUT_AUD_PLL>;
218};
219
220&cmu_fsys {
221 assigned-clocks = <&cmu_top CLK_MOUT_SCLK_USBDRD30>,
222 <&cmu_top CLK_MOUT_SCLK_USBHOST30>,
223 <&cmu_fsys CLK_MOUT_SCLK_USBDRD30_USER>,
224 <&cmu_fsys CLK_MOUT_SCLK_USBHOST30_USER>,
225 <&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_USER>,
226 <&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_USER>,
227 <&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_USER>,
228 <&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_USER>,
229 <&cmu_top CLK_DIV_SCLK_USBDRD30>,
230 <&cmu_top CLK_DIV_SCLK_USBHOST30>;
231 assigned-clock-parents = <&cmu_top CLK_MOUT_BUS_PLL_USER>,
232 <&cmu_top CLK_MOUT_BUS_PLL_USER>,
233 <&cmu_top CLK_SCLK_USBDRD30_FSYS>,
234 <&cmu_top CLK_SCLK_USBHOST30_FSYS>,
235 <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_PHY>,
236 <&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_PHY>,
237 <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_PHY>,
238 <&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_PHY>;
239 assigned-clock-rates = <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>,
240 <66700000>, <66700000>;
241};
242
243&cmu_gscl {
244 assigned-clocks = <&cmu_gscl CLK_MOUT_ACLK_GSCL_111_USER>,
245 <&cmu_gscl CLK_MOUT_ACLK_GSCL_333_USER>;
246 assigned-clock-parents = <&cmu_top CLK_ACLK_GSCL_111>,
247 <&cmu_top CLK_ACLK_GSCL_333>;
248};
249
250&cmu_mfc {
251 assigned-clocks = <&cmu_mfc CLK_MOUT_ACLK_MFC_400_USER>;
252 assigned-clock-parents = <&cmu_top CLK_ACLK_MFC_400>;
253};
254
255&cmu_mscl {
256 assigned-clocks = <&cmu_mscl CLK_MOUT_ACLK_MSCL_400_USER>,
257 <&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>,
258 <&cmu_mscl CLK_MOUT_SCLK_JPEG>,
259 <&cmu_top CLK_MOUT_SCLK_JPEG_A>;
260 assigned-clock-parents = <&cmu_top CLK_ACLK_MSCL_400>,
261 <&cmu_top CLK_SCLK_JPEG_MSCL>,
262 <&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>,
263 <&cmu_top CLK_MOUT_BUS_PLL_USER>;
264};
265
266&cpu0 {
267 cpu-supply = <&buck3_reg>;
268};
269
270&cpu4 {
271 cpu-supply = <&buck2_reg>;
272};
273
274&decon {
275 status = "okay";
276
277 i80-if-timings {
278 };
279};
280
281&dsi {
282 status = "okay";
283 vddcore-supply = <&ldo6_reg>;
284 vddio-supply = <&ldo7_reg>;
285 samsung,pll-clock-frequency = <24000000>;
286 pinctrl-names = "default";
287 pinctrl-0 = <&te_irq>;
288
289 ports {
290 #address-cells = <1>;
291 #size-cells = <0>;
292
293 port@1 {
294 reg = <1>;
295
296 dsi_out: endpoint {
297 samsung,burst-clock-frequency = <512000000>;
298 samsung,esc-clock-frequency = <16000000>;
299 };
300 };
301 };
302};
303
304&hsi2c_0 {
305 status = "okay";
306 clock-frequency = <2500000>;
307
308 s2mps13-pmic@66 {
309 compatible = "samsung,s2mps13-pmic";
310 interrupt-parent = <&gpa0>;
311 interrupts = <7 IRQ_TYPE_NONE>;
312 reg = <0x66>;
313 samsung,s2mps11-wrstbi-ground;
314
315 s2mps13_osc: clocks {
316 compatible = "samsung,s2mps13-clk";
317 #clock-cells = <1>;
318 clock-output-names = "s2mps13_ap", "s2mps13_cp",
319 "s2mps13_bt";
320 };
321
322 regulators {
323 ldo1_reg: LDO1 {
324 regulator-name = "VDD_ALIVE_0.9V_AP";
325 regulator-min-microvolt = <900000>;
326 regulator-max-microvolt = <900000>;
327 regulator-always-on;
328 };
329
330 ldo2_reg: LDO2 {
331 regulator-name = "VDDQ_MMC2_2.8V_AP";
332 regulator-min-microvolt = <2800000>;
333 regulator-max-microvolt = <2800000>;
334 regulator-always-on;
335 regulator-state-mem {
336 regulator-off-in-suspend;
337 };
338 };
339
340 ldo3_reg: LDO3 {
341 regulator-name = "VDD1_E_1.8V_AP";
342 regulator-min-microvolt = <1800000>;
343 regulator-max-microvolt = <1800000>;
344 regulator-always-on;
345 };
346
347 ldo4_reg: LDO4 {
348 regulator-name = "VDD10_MIF_PLL_1.0V_AP";
349 regulator-min-microvolt = <1300000>;
350 regulator-max-microvolt = <1300000>;
351 regulator-always-on;
352 regulator-state-mem {
353 regulator-off-in-suspend;
354 };
355 };
356
357 ldo5_reg: LDO5 {
358 regulator-name = "VDD10_DPLL_1.0V_AP";
359 regulator-min-microvolt = <1000000>;
360 regulator-max-microvolt = <1000000>;
361 regulator-always-on;
362 regulator-state-mem {
363 regulator-off-in-suspend;
364 };
365 };
366
367 ldo6_reg: LDO6 {
368 regulator-name = "VDD10_MIPI2L_1.0V_AP";
369 regulator-min-microvolt = <1000000>;
370 regulator-max-microvolt = <1000000>;
371 regulator-state-mem {
372 regulator-off-in-suspend;
373 };
374 };
375
376 ldo7_reg: LDO7 {
377 regulator-name = "VDD18_MIPI2L_1.8V_AP";
378 regulator-min-microvolt = <1800000>;
379 regulator-max-microvolt = <1800000>;
380 };
381
382 ldo8_reg: LDO8 {
383 regulator-name = "VDD18_LLI_1.8V_AP";
384 regulator-min-microvolt = <1800000>;
385 regulator-max-microvolt = <1800000>;
386 regulator-always-on;
387 regulator-state-mem {
388 regulator-off-in-suspend;
389 };
390 };
391
392 ldo9_reg: LDO9 {
393 regulator-name = "VDD18_ABB_ETC_1.8V_AP";
394 regulator-min-microvolt = <1800000>;
395 regulator-max-microvolt = <1800000>;
396 regulator-always-on;
397 regulator-state-mem {
398 regulator-off-in-suspend;
399 };
400 };
401
402 ldo10_reg: LDO10 {
403 regulator-name = "VDD33_USB30_3.0V_AP";
404 regulator-min-microvolt = <3000000>;
405 regulator-max-microvolt = <3000000>;
406 regulator-state-mem {
407 regulator-off-in-suspend;
408 };
409 };
410
411 ldo11_reg: LDO11 {
412 regulator-name = "VDD_INT_M_1.0V_AP";
413 regulator-min-microvolt = <1000000>;
414 regulator-max-microvolt = <1000000>;
415 regulator-always-on;
416 regulator-state-mem {
417 regulator-off-in-suspend;
418 };
419 };
420
421 ldo12_reg: LDO12 {
422 regulator-name = "VDD_KFC_M_1.1V_AP";
423 regulator-min-microvolt = <800000>;
424 regulator-max-microvolt = <1350000>;
425 regulator-always-on;
426 };
427
428 ldo13_reg: LDO13 {
429 regulator-name = "VDD_G3D_M_0.95V_AP";
430 regulator-min-microvolt = <950000>;
431 regulator-max-microvolt = <950000>;
432 regulator-always-on;
433 regulator-state-mem {
434 regulator-off-in-suspend;
435 };
436 };
437
438 ldo14_reg: LDO14 {
439 regulator-name = "VDDQ_M1_LDO_1.2V_AP";
440 regulator-min-microvolt = <1200000>;
441 regulator-max-microvolt = <1200000>;
442 regulator-always-on;
443 regulator-state-mem {
444 regulator-off-in-suspend;
445 };
446 };
447
448 ldo15_reg: LDO15 {
449 regulator-name = "VDDQ_M2_LDO_1.2V_AP";
450 regulator-min-microvolt = <1200000>;
451 regulator-max-microvolt = <1200000>;
452 regulator-always-on;
453 regulator-state-mem {
454 regulator-off-in-suspend;
455 };
456 };
457
458 ldo16_reg: LDO16 {
459 regulator-name = "VDDQ_EFUSE";
460 regulator-min-microvolt = <1400000>;
461 regulator-max-microvolt = <3400000>;
462 regulator-always-on;
463 };
464
465 ldo17_reg: LDO17 {
466 regulator-name = "V_TFLASH_2.8V_AP";
467 regulator-min-microvolt = <2800000>;
468 regulator-max-microvolt = <2800000>;
469 };
470
471 ldo18_reg: LDO18 {
472 regulator-name = "V_CODEC_1.8V_AP";
473 regulator-min-microvolt = <1800000>;
474 regulator-max-microvolt = <1800000>;
475 };
476
477 ldo19_reg: LDO19 {
478 regulator-name = "VDDA_1.8V_COMP";
479 regulator-min-microvolt = <1800000>;
480 regulator-max-microvolt = <1800000>;
481 regulator-always-on;
482 };
483
484 ldo20_reg: LDO20 {
485 regulator-name = "VCC_2.8V_AP";
486 regulator-min-microvolt = <2800000>;
487 regulator-max-microvolt = <2800000>;
488 regulator-always-on;
489 };
490
491 ldo21_reg: LDO21 {
492 regulator-name = "VT_CAM_1.8V";
493 regulator-min-microvolt = <1800000>;
494 regulator-max-microvolt = <1800000>;
495 };
496
497 ldo22_reg: LDO22 {
498 regulator-name = "CAM_IO_1.8V_AP";
499 regulator-min-microvolt = <1800000>;
500 regulator-max-microvolt = <1800000>;
501 };
502
503 ldo23_reg: LDO23 {
504 regulator-name = "CAM_SEN_CORE_1.05V_AP";
505 regulator-min-microvolt = <1050000>;
506 regulator-max-microvolt = <1050000>;
507 };
508
509 ldo24_reg: LDO24 {
510 regulator-name = "VT_CAM_1.2V";
511 regulator-min-microvolt = <1200000>;
512 regulator-max-microvolt = <1200000>;
513 };
514
515 ldo25_reg: LDO25 {
516 regulator-name = "UNUSED_LDO25";
517 regulator-min-microvolt = <2800000>;
518 regulator-max-microvolt = <2800000>;
519 };
520
521 ldo26_reg: LDO26 {
522 regulator-name = "CAM_AF_2.8V_AP";
523 regulator-min-microvolt = <2800000>;
524 regulator-max-microvolt = <2800000>;
525 };
526
527 ldo27_reg: LDO27 {
528 regulator-name = "VCC_3.0V_LCD_AP";
529 regulator-min-microvolt = <3000000>;
530 regulator-max-microvolt = <3000000>;
531 };
532
533 ldo28_reg: LDO28 {
534 regulator-name = "VCC_1.8V_LCD_AP";
535 regulator-min-microvolt = <1800000>;
536 regulator-max-microvolt = <1800000>;
537 };
538
539 ldo29_reg: LDO29 {
540 regulator-name = "VT_CAM_2.8V";
541 regulator-min-microvolt = <3000000>;
542 regulator-max-microvolt = <3000000>;
543 };
544
545 ldo30_reg: LDO30 {
546 regulator-name = "TSP_AVDD_3.3V_AP";
547 regulator-min-microvolt = <3300000>;
548 regulator-max-microvolt = <3300000>;
549 };
550
551 ldo31_reg: LDO31 {
552 /*
553 * LDO31 differs from target to target,
554 * its definition is in the .dts
555 */
556 };
557
558 ldo32_reg: LDO32 {
559 regulator-name = "VTOUCH_1.8V_AP";
560 regulator-min-microvolt = <1800000>;
561 regulator-max-microvolt = <1800000>;
562 };
563
564 ldo33_reg: LDO33 {
565 regulator-name = "VTOUCH_LED_3.3V";
566 regulator-min-microvolt = <2500000>;
567 regulator-max-microvolt = <3300000>;
568 regulator-ramp-delay = <12500>;
569 };
570
571 ldo34_reg: LDO34 {
572 regulator-name = "VCC_1.8V_MHL_AP";
573 regulator-min-microvolt = <1000000>;
574 regulator-max-microvolt = <2100000>;
575 };
576
577 ldo35_reg: LDO35 {
578 regulator-name = "OIS_VM_2.8V";
579 regulator-min-microvolt = <1800000>;
580 regulator-max-microvolt = <2800000>;
581 };
582
583 ldo36_reg: LDO36 {
584 regulator-name = "VSIL_1.0V";
585 regulator-min-microvolt = <1000000>;
586 regulator-max-microvolt = <1000000>;
587 };
588
589 ldo37_reg: LDO37 {
590 regulator-name = "VF_1.8V";
591 regulator-min-microvolt = <1800000>;
592 regulator-max-microvolt = <1800000>;
593 };
594
595 ldo38_reg: LDO38 {
596 /*
597 * LDO38 differs from target to target,
598 * its definition is in the .dts
599 */
600 };
601
602 ldo39_reg: LDO39 {
603 regulator-name = "V_HRM_1.8V";
604 regulator-min-microvolt = <1800000>;
605 regulator-max-microvolt = <1800000>;
606 };
607
608 ldo40_reg: LDO40 {
609 regulator-name = "V_HRM_3.3V";
610 regulator-min-microvolt = <3300000>;
611 regulator-max-microvolt = <3300000>;
612 };
613
614 buck1_reg: BUCK1 {
615 regulator-name = "VDD_MIF_0.9V_AP";
616 regulator-min-microvolt = <600000>;
617 regulator-max-microvolt = <1500000>;
618 regulator-always-on;
619 regulator-state-mem {
620 regulator-off-in-suspend;
621 };
622 };
623
624 buck2_reg: BUCK2 {
625 regulator-name = "VDD_EGL_1.0V_AP";
626 regulator-min-microvolt = <900000>;
627 regulator-max-microvolt = <1300000>;
628 regulator-always-on;
629 regulator-state-mem {
630 regulator-off-in-suspend;
631 };
632 };
633
634 buck3_reg: BUCK3 {
635 regulator-name = "VDD_KFC_1.0V_AP";
636 regulator-min-microvolt = <800000>;
637 regulator-max-microvolt = <1200000>;
638 regulator-always-on;
639 regulator-state-mem {
640 regulator-off-in-suspend;
641 };
642 };
643
644 buck4_reg: BUCK4 {
645 regulator-name = "VDD_INT_0.95V_AP";
646 regulator-min-microvolt = <600000>;
647 regulator-max-microvolt = <1500000>;
648 regulator-always-on;
649 regulator-state-mem {
650 regulator-off-in-suspend;
651 };
652 };
653
654 buck5_reg: BUCK5 {
655 regulator-name = "VDD_DISP_CAM0_0.9V_AP";
656 regulator-min-microvolt = <600000>;
657 regulator-max-microvolt = <1500000>;
658 regulator-always-on;
659 regulator-state-mem {
660 regulator-off-in-suspend;
661 };
662 };
663
664 buck6_reg: BUCK6 {
665 regulator-name = "VDD_G3D_0.9V_AP";
666 regulator-min-microvolt = <600000>;
667 regulator-max-microvolt = <1500000>;
668 regulator-always-on;
669 regulator-state-mem {
670 regulator-off-in-suspend;
671 };
672 };
673
674 buck7_reg: BUCK7 {
675 regulator-name = "VDD_MEM1_1.2V_AP";
676 regulator-min-microvolt = <1200000>;
677 regulator-max-microvolt = <1200000>;
678 regulator-always-on;
679 };
680
681 buck8_reg: BUCK8 {
682 regulator-name = "VDD_LLDO_1.35V_AP";
683 regulator-min-microvolt = <1350000>;
684 regulator-max-microvolt = <3300000>;
685 regulator-always-on;
686 };
687
688 buck9_reg: BUCK9 {
689 regulator-name = "VDD_MLDO_2.0V_AP";
690 regulator-min-microvolt = <1350000>;
691 regulator-max-microvolt = <3300000>;
692 regulator-always-on;
693 };
694
695 buck10_reg: BUCK10 {
696 regulator-name = "vdd_mem2";
697 regulator-min-microvolt = <550000>;
698 regulator-max-microvolt = <1500000>;
699 regulator-always-on;
700 };
701 };
702 };
703};
704
705&hsi2c_8 {
706 status = "okay";
707
708 max77843@66 {
709 compatible = "maxim,max77843";
710 interrupt-parent = <&gpa1>;
711 interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
712 reg = <0x66>;
713
714 muic: max77843-muic {
715 compatible = "maxim,max77843-muic";
716 };
717
718 regulators {
719 compatible = "maxim,max77843-regulator";
720 safeout1_reg: SAFEOUT1 {
721 regulator-name = "SAFEOUT1";
722 regulator-min-microvolt = <3300000>;
723 regulator-max-microvolt = <4950000>;
724 };
725
726 safeout2_reg: SAFEOUT2 {
727 regulator-name = "SAFEOUT2";
728 regulator-min-microvolt = <3300000>;
729 regulator-max-microvolt = <4950000>;
730 };
731
732 charger_reg: CHARGER {
733 regulator-name = "CHARGER";
734 regulator-min-microamp = <100000>;
735 regulator-max-microamp = <3150000>;
736 };
737 };
738
739 haptic: max77843-haptic {
740 compatible = "maxim,max77843-haptic";
741 haptic-supply = <&ldo38_reg>;
742 pwms = <&pwm 0 33670 0>;
743 pwm-names = "haptic";
744 };
745 };
746};
747
748&i2s0 {
749 status = "okay";
750};
751
752&mshc_0 {
753 status = "okay";
754 num-slots = <1>;
755 mmc-hs200-1_8v;
756 mmc-hs400-1_8v;
757 cap-mmc-highspeed;
758 non-removable;
759 card-detect-delay = <200>;
760 samsung,dw-mshc-ciu-div = <3>;
761 samsung,dw-mshc-sdr-timing = <0 4>;
762 samsung,dw-mshc-ddr-timing = <0 2>;
763 samsung,dw-mshc-hs400-timing = <0 3>;
764 samsung,read-strobe-delay = <90>;
765 fifo-depth = <0x80>;
766 pinctrl-names = "default";
767 pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_qrdy &sd0_bus1 &sd0_bus4
768 &sd0_bus8 &sd0_rdqs>;
769 bus-width = <8>;
770 assigned-clocks = <&cmu_top CLK_SCLK_MMC0_FSYS>;
771 assigned-clock-rates = <800000000>;
772};
773
774&mshc_2 {
775 status = "okay";
776 num-slots = <1>;
777 cap-sd-highspeed;
778 disable-wp;
779 cd-gpios = <&gpa2 4 GPIO_ACTIVE_HIGH>;
780 cd-inverted;
781 card-detect-delay = <200>;
782 samsung,dw-mshc-ciu-div = <3>;
783 samsung,dw-mshc-sdr-timing = <0 4>;
784 samsung,dw-mshc-ddr-timing = <0 2>;
785 fifo-depth = <0x80>;
786 pinctrl-names = "default";
787 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus1 &sd2_bus4>;
788 bus-width = <4>;
789};
790
791&ppmu_d0_general {
792 status = "okay";
793 events {
794 ppmu_event0_d0_general: ppmu-event0-d0-general {
795 event-name = "ppmu-event0-d0-general";
796 };
797 };
798};
799
800&ppmu_d1_general {
801 status = "okay";
802 events {
803 ppmu_event0_d1_general: ppmu-event0-d1-general {
804 event-name = "ppmu-event0-d1-general";
805 };
806 };
807};
808
809&pinctrl_alive {
810 pinctrl-names = "default";
811 pinctrl-0 = <&initial_alive>;
812
813 initial_alive: initial-state {
814 PIN(INPUT, gpa0-0, DOWN, FAST_SR1);
815 PIN(INPUT, gpa0-1, NONE, FAST_SR1);
816 PIN(INPUT, gpa0-2, DOWN, FAST_SR1);
817 PIN(INPUT, gpa0-3, NONE, FAST_SR1);
818 PIN(INPUT, gpa0-4, NONE, FAST_SR1);
819 PIN(INPUT, gpa0-5, DOWN, FAST_SR1);
820 PIN(INPUT, gpa0-6, NONE, FAST_SR1);
821 PIN(INPUT, gpa0-7, NONE, FAST_SR1);
822
823 PIN(INPUT, gpa1-0, UP, FAST_SR1);
824 PIN(INPUT, gpa1-1, NONE, FAST_SR1);
825 PIN(INPUT, gpa1-2, NONE, FAST_SR1);
826 PIN(INPUT, gpa1-3, DOWN, FAST_SR1);
827 PIN(INPUT, gpa1-4, DOWN, FAST_SR1);
828 PIN(INPUT, gpa1-5, NONE, FAST_SR1);
829 PIN(INPUT, gpa1-6, NONE, FAST_SR1);
830 PIN(INPUT, gpa1-7, NONE, FAST_SR1);
831
832 PIN(INPUT, gpa2-0, NONE, FAST_SR1);
833 PIN(INPUT, gpa2-1, NONE, FAST_SR1);
834 PIN(INPUT, gpa2-2, NONE, FAST_SR1);
835 PIN(INPUT, gpa2-3, DOWN, FAST_SR1);
836 PIN(INPUT, gpa2-4, NONE, FAST_SR1);
837 PIN(INPUT, gpa2-5, DOWN, FAST_SR1);
838 PIN(INPUT, gpa2-6, DOWN, FAST_SR1);
839 PIN(INPUT, gpa2-7, NONE, FAST_SR1);
840
841 PIN(INPUT, gpa3-0, DOWN, FAST_SR1);
842 PIN(INPUT, gpa3-1, DOWN, FAST_SR1);
843 PIN(INPUT, gpa3-2, NONE, FAST_SR1);
844 PIN(INPUT, gpa3-3, DOWN, FAST_SR1);
845 PIN(INPUT, gpa3-4, NONE, FAST_SR1);
846 PIN(INPUT, gpa3-5, DOWN, FAST_SR1);
847 PIN(INPUT, gpa3-6, DOWN, FAST_SR1);
848 PIN(INPUT, gpa3-7, DOWN, FAST_SR1);
849
850 PIN(INPUT, gpf1-0, NONE, FAST_SR1);
851 PIN(INPUT, gpf1-1, NONE, FAST_SR1);
852 PIN(INPUT, gpf1-2, DOWN, FAST_SR1);
853 PIN(INPUT, gpf1-4, UP, FAST_SR1);
854 PIN(OUTPUT, gpf1-5, NONE, FAST_SR1);
855 PIN(INPUT, gpf1-6, DOWN, FAST_SR1);
856 PIN(INPUT, gpf1-7, DOWN, FAST_SR1);
857
858 PIN(INPUT, gpf2-0, DOWN, FAST_SR1);
859 PIN(INPUT, gpf2-1, DOWN, FAST_SR1);
860 PIN(INPUT, gpf2-2, DOWN, FAST_SR1);
861 PIN(INPUT, gpf2-3, DOWN, FAST_SR1);
862
863 PIN(INPUT, gpf3-0, DOWN, FAST_SR1);
864 PIN(INPUT, gpf3-1, DOWN, FAST_SR1);
865 PIN(INPUT, gpf3-2, NONE, FAST_SR1);
866 PIN(INPUT, gpf3-3, DOWN, FAST_SR1);
867
868 PIN(INPUT, gpf4-0, DOWN, FAST_SR1);
869 PIN(INPUT, gpf4-1, DOWN, FAST_SR1);
870 PIN(INPUT, gpf4-2, DOWN, FAST_SR1);
871 PIN(INPUT, gpf4-3, DOWN, FAST_SR1);
872 PIN(INPUT, gpf4-4, DOWN, FAST_SR1);
873 PIN(INPUT, gpf4-5, DOWN, FAST_SR1);
874 PIN(INPUT, gpf4-6, DOWN, FAST_SR1);
875 PIN(INPUT, gpf4-7, DOWN, FAST_SR1);
876
877 PIN(INPUT, gpf5-0, DOWN, FAST_SR1);
878 PIN(INPUT, gpf5-1, DOWN, FAST_SR1);
879 PIN(INPUT, gpf5-2, DOWN, FAST_SR1);
880 PIN(INPUT, gpf5-3, DOWN, FAST_SR1);
881 PIN(OUTPUT, gpf5-4, NONE, FAST_SR1);
882 PIN(INPUT, gpf5-5, DOWN, FAST_SR1);
883 PIN(INPUT, gpf5-6, DOWN, FAST_SR1);
884 PIN(INPUT, gpf5-7, DOWN, FAST_SR1);
885 };
886
887 te_irq: te_irq {
888 samsung,pins = "gpf1-3";
889 samsung,pin-function = <0xf>;
890 };
891};
892
893&pinctrl_cpif {
894 pinctrl-names = "default";
895 pinctrl-0 = <&initial_cpif>;
896
897 initial_cpif: initial-state {
898 PIN(INPUT, gpv6-0, DOWN, FAST_SR1);
899 PIN(INPUT, gpv6-1, DOWN, FAST_SR1);
900 };
901};
902
903&pinctrl_ese {
904 pinctrl-names = "default";
905 pinctrl-0 = <&initial_ese>;
906
907 initial_ese: initial-state {
908 PIN(INPUT, gpj2-0, DOWN, FAST_SR1);
909 PIN(INPUT, gpj2-1, DOWN, FAST_SR1);
910 PIN(INPUT, gpj2-2, DOWN, FAST_SR1);
911 };
912};
913
914&pinctrl_fsys {
915 pinctrl-names = "default";
916 pinctrl-0 = <&initial_fsys>;
917
918 initial_fsys: initial-state {
919 PIN(INPUT, gpr3-0, NONE, FAST_SR1);
920 PIN(INPUT, gpr3-1, DOWN, FAST_SR1);
921 PIN(INPUT, gpr3-2, DOWN, FAST_SR1);
922 PIN(INPUT, gpr3-3, DOWN, FAST_SR1);
923 PIN(INPUT, gpr3-7, NONE, FAST_SR1);
924 };
925};
926
927&pinctrl_imem {
928 pinctrl-names = "default";
929 pinctrl-0 = <&initial_imem>;
930
931 initial_imem: initial-state {
932 PIN(INPUT, gpf0-0, UP, FAST_SR1);
933 PIN(INPUT, gpf0-1, UP, FAST_SR1);
934 PIN(INPUT, gpf0-2, DOWN, FAST_SR1);
935 PIN(INPUT, gpf0-3, UP, FAST_SR1);
936 PIN(INPUT, gpf0-4, DOWN, FAST_SR1);
937 PIN(INPUT, gpf0-5, NONE, FAST_SR1);
938 PIN(INPUT, gpf0-6, DOWN, FAST_SR1);
939 PIN(INPUT, gpf0-7, UP, FAST_SR1);
940 };
941};
942
943&pinctrl_nfc {
944 pinctrl-names = "default";
945 pinctrl-0 = <&initial_nfc>;
946
947 initial_nfc: initial-state {
948 PIN(INPUT, gpj0-2, DOWN, FAST_SR1);
949 };
950};
951
952&pinctrl_peric {
953 pinctrl-names = "default";
954 pinctrl-0 = <&initial_peric>;
955
956 initial_peric: initial-state {
957 PIN(INPUT, gpv7-0, DOWN, FAST_SR1);
958 PIN(INPUT, gpv7-1, DOWN, FAST_SR1);
959 PIN(INPUT, gpv7-2, NONE, FAST_SR1);
960 PIN(INPUT, gpv7-3, DOWN, FAST_SR1);
961 PIN(INPUT, gpv7-4, DOWN, FAST_SR1);
962 PIN(INPUT, gpv7-5, DOWN, FAST_SR1);
963
964 PIN(INPUT, gpb0-4, DOWN, FAST_SR1);
965
966 PIN(INPUT, gpc0-2, DOWN, FAST_SR1);
967 PIN(INPUT, gpc0-5, DOWN, FAST_SR1);
968 PIN(INPUT, gpc0-7, DOWN, FAST_SR1);
969
970 PIN(INPUT, gpc1-1, DOWN, FAST_SR1);
971
972 PIN(INPUT, gpc3-4, NONE, FAST_SR1);
973 PIN(INPUT, gpc3-5, NONE, FAST_SR1);
974 PIN(INPUT, gpc3-6, NONE, FAST_SR1);
975 PIN(INPUT, gpc3-7, NONE, FAST_SR1);
976
977 PIN(OUTPUT, gpg0-0, NONE, FAST_SR1);
978 PIN(2, gpg0-1, DOWN, FAST_SR1);
979
980 PIN(INPUT, gpd2-5, DOWN, FAST_SR1);
981
982 PIN(INPUT, gpd4-0, NONE, FAST_SR1);
983 PIN(INPUT, gpd4-1, DOWN, FAST_SR1);
984 PIN(INPUT, gpd4-2, DOWN, FAST_SR1);
985 PIN(INPUT, gpd4-3, DOWN, FAST_SR1);
986 PIN(INPUT, gpd4-4, DOWN, FAST_SR1);
987
988 PIN(INPUT, gpd6-3, DOWN, FAST_SR1);
989
990 PIN(INPUT, gpd8-1, UP, FAST_SR1);
991
992 PIN(INPUT, gpg1-0, DOWN, FAST_SR1);
993 PIN(INPUT, gpg1-1, DOWN, FAST_SR1);
994 PIN(INPUT, gpg1-2, DOWN, FAST_SR1);
995 PIN(INPUT, gpg1-3, DOWN, FAST_SR1);
996 PIN(INPUT, gpg1-4, DOWN, FAST_SR1);
997
998 PIN(INPUT, gpg2-0, DOWN, FAST_SR1);
999 PIN(INPUT, gpg2-1, DOWN, FAST_SR1);
1000
1001 PIN(INPUT, gpg3-0, DOWN, FAST_SR1);
1002 PIN(INPUT, gpg3-1, DOWN, FAST_SR1);
1003 PIN(INPUT, gpg3-5, DOWN, FAST_SR1);
1004 PIN(INPUT, gpg3-7, DOWN, FAST_SR1);
1005 };
1006};
1007
1008&pinctrl_touch {
1009 pinctrl-names = "default";
1010 pinctrl-0 = <&initial_touch>;
1011
1012 initial_touch: initial-state {
1013 PIN(INPUT, gpj1-2, DOWN, FAST_SR1);
1014 };
1015};
1016
1017&pwm {
1018 pinctrl-0 = <&pwm0_out>;
1019 pinctrl-names = "default";
1020 status = "okay";
1021};
1022
1023&mic {
1024 status = "okay";
1025
1026 i80-if-timings {
1027 };
1028};
1029
1030&pmu_system_controller {
1031 assigned-clocks = <&pmu_system_controller 0>;
1032 assigned-clock-parents = <&xxti>;
1033};
1034
1035&serial_1 {
1036 status = "okay";
1037};
1038
1039&spi_1 {
1040 cs-gpios = <&gpd6 3 GPIO_ACTIVE_HIGH>;
1041 status = "okay";
1042
1043 wm5110: wm5110-codec@0 {
1044 compatible = "wlf,wm5110";
1045 reg = <0x0>;
1046 spi-max-frequency = <20000000>;
1047 interrupt-parent = <&gpa0>;
1048 interrupts = <4 IRQ_TYPE_NONE>;
1049 clocks = <&pmu_system_controller 0>,
1050 <&s2mps13_osc S2MPS11_CLK_BT>;
1051 clock-names = "mclk1", "mclk2";
1052
1053 gpio-controller;
1054 #gpio-cells = <2>;
1055
1056 wlf,micd-detect-debounce = <300>;
1057 wlf,micd-bias-start-time = <0x1>;
1058 wlf,micd-rate = <0x7>;
1059 wlf,micd-dbtime = <0x1>;
1060 wlf,micd-force-micbias;
1061 wlf,micd-configs = <0x0 1 0>;
1062 wlf,hpdet-channel = <1>;
1063 wlf,gpsw = <0x1>;
1064 wlf,inmode = <2 0 2 0>;
1065
1066 wlf,reset = <&gpc0 7 GPIO_ACTIVE_HIGH>;
1067 wlf,ldoena = <&gpf0 0 GPIO_ACTIVE_HIGH>;
1068
1069 /* core supplies */
1070 AVDD-supply = <&ldo18_reg>;
1071 DBVDD1-supply = <&ldo18_reg>;
1072 CPVDD-supply = <&ldo18_reg>;
1073 DBVDD2-supply = <&ldo18_reg>;
1074 DBVDD3-supply = <&ldo18_reg>;
1075
1076 controller-data {
1077 samsung,spi-feedback-delay = <0>;
1078 };
1079 };
1080};
1081
1082&timer {
1083 clock-frequency = <24000000>;
1084};
1085
1086&tmu_atlas0 {
1087 vtmu-supply = <&ldo3_reg>;
1088 status = "okay";
1089};
1090
1091&tmu_apollo {
1092 vtmu-supply = <&ldo3_reg>;
1093 status = "okay";
1094};
1095
1096&tmu_g3d {
1097 vtmu-supply = <&ldo3_reg>;
1098 status = "okay";
1099};
1100
1101&usbdrd30 {
1102 vdd33-supply = <&ldo10_reg>;
1103 vdd10-supply = <&ldo6_reg>;
1104 status = "okay";
1105};
1106
1107&usbdrd_dwc3_0 {
1108 dr_mode = "otg";
1109};
1110
1111&usbdrd30_phy {
1112 vbus-supply = <&safeout1_reg>;
1113 status = "okay";
1114};
1115
1116&xxti {
1117 clock-frequency = <24000000>;
1118};
diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
index 640e4b9910ae..2449266b268f 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
+++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
@@ -11,1109 +11,21 @@
11 * published by the Free Software Foundation. 11 * published by the Free Software Foundation.
12 */ 12 */
13 13
14/dts-v1/; 14#include "exynos5433-tm2-common.dtsi"
15#include "exynos5433.dtsi"
16#include <dt-bindings/clock/samsung,s2mps11.h>
17#include <dt-bindings/gpio/gpio.h>
18#include <dt-bindings/input/input.h>
19#include <dt-bindings/interrupt-controller/irq.h>
20 15
21/ { 16/ {
22 model = "Samsung TM2 board"; 17 model = "Samsung TM2 board";
23 compatible = "samsung,tm2", "samsung,exynos5433"; 18 compatible = "samsung,tm2", "samsung,exynos5433";
24
25 aliases {
26 gsc0 = &gsc_0;
27 gsc1 = &gsc_1;
28 gsc2 = &gsc_2;
29 pinctrl0 = &pinctrl_alive;
30 pinctrl1 = &pinctrl_aud;
31 pinctrl2 = &pinctrl_cpif;
32 pinctrl3 = &pinctrl_ese;
33 pinctrl4 = &pinctrl_finger;
34 pinctrl5 = &pinctrl_fsys;
35 pinctrl6 = &pinctrl_imem;
36 pinctrl7 = &pinctrl_nfc;
37 pinctrl8 = &pinctrl_peric;
38 pinctrl9 = &pinctrl_touch;
39 serial0 = &serial_0;
40 serial1 = &serial_1;
41 serial2 = &serial_2;
42 serial3 = &serial_3;
43 spi0 = &spi_0;
44 spi1 = &spi_1;
45 spi2 = &spi_2;
46 spi3 = &spi_3;
47 spi4 = &spi_4;
48 mshc0 = &mshc_0;
49 mshc2 = &mshc_2;
50 };
51
52 chosen {
53 stdout-path = &serial_1;
54 };
55
56 memory@20000000 {
57 device_type = "memory";
58 reg = <0x0 0x20000000 0x0 0xc0000000>;
59 };
60
61 gpio-keys {
62 compatible = "gpio-keys";
63
64 power-key {
65 gpios = <&gpa2 7 GPIO_ACTIVE_LOW>;
66 linux,code = <KEY_POWER>;
67 label = "power key";
68 debounce-interval = <10>;
69 };
70
71 volume-up-key {
72 gpios = <&gpa2 0 GPIO_ACTIVE_LOW>;
73 linux,code = <KEY_VOLUMEUP>;
74 label = "volume-up key";
75 debounce-interval = <10>;
76 };
77
78 volume-down-key {
79 gpios = <&gpa2 1 GPIO_ACTIVE_LOW>;
80 linux,code = <KEY_VOLUMEDOWN>;
81 label = "volume-down key";
82 debounce-interval = <10>;
83 };
84
85 homepage-key {
86 gpios = <&gpa0 3 GPIO_ACTIVE_LOW>;
87 linux,code = <KEY_MENU>;
88 label = "homepage key";
89 debounce-interval = <10>;
90 };
91 };
92
93 i2c_max98504: i2c-gpio-0 {
94 compatible = "i2c-gpio";
95 gpios = <&gpd0 1 GPIO_ACTIVE_HIGH /* SPK_AMP_SDA */
96 &gpd0 0 GPIO_ACTIVE_HIGH /* SPK_AMP_SCL */ >;
97 i2c-gpio,delay-us = <2>;
98 #address-cells = <1>;
99 #size-cells = <0>;
100 status = "okay";
101
102 max98504: max98504@31 {
103 compatible = "maxim,max98504";
104 reg = <0x31>;
105 maxim,rx-path = <1>;
106 maxim,tx-path = <1>;
107 maxim,tx-channel-mask = <3>;
108 maxim,tx-channel-source = <2>;
109 };
110 };
111
112 sound {
113 compatible = "samsung,tm2-audio";
114 audio-codec = <&wm5110>;
115 i2s-controller = <&i2s0>;
116 audio-amplifier = <&max98504>;
117 mic-bias-gpios = <&gpr3 2 GPIO_ACTIVE_HIGH>;
118 model = "wm5110";
119 samsung,audio-routing =
120 /* Headphone */
121 "HP", "HPOUT1L",
122 "HP", "HPOUT1R",
123
124 /* Speaker */
125 "SPK", "SPKOUT",
126 "SPKOUT", "HPOUT2L",
127 "SPKOUT", "HPOUT2R",
128
129 /* Receiver */
130 "RCV", "HPOUT3L",
131 "RCV", "HPOUT3R";
132 status = "okay";
133 };
134};
135
136&adc {
137 vdd-supply = <&ldo3_reg>;
138 status = "okay";
139
140 thermistor-ap {
141 compatible = "murata,ncp03wf104";
142 pullup-uv = <1800000>;
143 pullup-ohm = <100000>;
144 pulldown-ohm = <0>;
145 io-channels = <&adc 0>;
146 };
147
148 thermistor-battery {
149 compatible = "murata,ncp03wf104";
150 pullup-uv = <1800000>;
151 pullup-ohm = <100000>;
152 pulldown-ohm = <0>;
153 io-channels = <&adc 1>;
154 #thermal-sensor-cells = <0>;
155 };
156
157 thermistor-charger {
158 compatible = "murata,ncp03wf104";
159 pullup-uv = <1800000>;
160 pullup-ohm = <100000>;
161 pulldown-ohm = <0>;
162 io-channels = <&adc 2>;
163 };
164};
165
166&bus_g2d_400 {
167 devfreq-events = <&ppmu_event0_d0_general>, <&ppmu_event0_d1_general>;
168 vdd-supply = <&buck4_reg>;
169 exynos,saturation-ratio = <10>;
170 status = "okay";
171};
172
173&bus_g2d_266 {
174 devfreq = <&bus_g2d_400>;
175 status = "okay";
176};
177
178&bus_gscl {
179 devfreq = <&bus_g2d_400>;
180 status = "okay";
181};
182
183&bus_hevc {
184 devfreq = <&bus_g2d_400>;
185 status = "okay";
186};
187
188&bus_jpeg {
189 devfreq = <&bus_g2d_400>;
190 status = "okay";
191};
192
193&bus_mfc {
194 devfreq = <&bus_g2d_400>;
195 status = "okay";
196};
197
198&bus_mscl {
199 devfreq = <&bus_g2d_400>;
200 status = "okay";
201};
202
203&bus_noc0 {
204 devfreq = <&bus_g2d_400>;
205 status = "okay";
206};
207
208&bus_noc1 {
209 devfreq = <&bus_g2d_400>;
210 status = "okay";
211};
212
213&bus_noc2 {
214 devfreq = <&bus_g2d_400>;
215 status = "okay";
216};
217
218&cmu_aud {
219 assigned-clocks = <&cmu_aud CLK_MOUT_AUD_PLL_USER>;
220 assigned-clock-parents = <&cmu_top CLK_FOUT_AUD_PLL>;
221};
222
223&cmu_fsys {
224 assigned-clocks = <&cmu_top CLK_MOUT_SCLK_USBDRD30>,
225 <&cmu_top CLK_MOUT_SCLK_USBHOST30>,
226 <&cmu_fsys CLK_MOUT_SCLK_USBDRD30_USER>,
227 <&cmu_fsys CLK_MOUT_SCLK_USBHOST30_USER>,
228 <&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_USER>,
229 <&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_USER>,
230 <&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_USER>,
231 <&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_USER>,
232 <&cmu_top CLK_DIV_SCLK_USBDRD30>,
233 <&cmu_top CLK_DIV_SCLK_USBHOST30>;
234 assigned-clock-parents = <&cmu_top CLK_MOUT_BUS_PLL_USER>,
235 <&cmu_top CLK_MOUT_BUS_PLL_USER>,
236 <&cmu_top CLK_SCLK_USBDRD30_FSYS>,
237 <&cmu_top CLK_SCLK_USBHOST30_FSYS>,
238 <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_PHY>,
239 <&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_PHY>,
240 <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_PHY>,
241 <&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_PHY>;
242 assigned-clock-rates = <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>,
243 <66700000>, <66700000>;
244};
245
246&cmu_gscl {
247 assigned-clocks = <&cmu_gscl CLK_MOUT_ACLK_GSCL_111_USER>,
248 <&cmu_gscl CLK_MOUT_ACLK_GSCL_333_USER>;
249 assigned-clock-parents = <&cmu_top CLK_ACLK_GSCL_111>,
250 <&cmu_top CLK_ACLK_GSCL_333>;
251};
252
253&cmu_mfc {
254 assigned-clocks = <&cmu_mfc CLK_MOUT_ACLK_MFC_400_USER>;
255 assigned-clock-parents = <&cmu_top CLK_ACLK_MFC_400>;
256};
257
258&cmu_mscl {
259 assigned-clocks = <&cmu_mscl CLK_MOUT_ACLK_MSCL_400_USER>,
260 <&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>,
261 <&cmu_mscl CLK_MOUT_SCLK_JPEG>,
262 <&cmu_top CLK_MOUT_SCLK_JPEG_A>;
263 assigned-clock-parents = <&cmu_top CLK_ACLK_MSCL_400>,
264 <&cmu_top CLK_SCLK_JPEG_MSCL>,
265 <&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>,
266 <&cmu_top CLK_MOUT_BUS_PLL_USER>;
267};
268
269&cpu0 {
270 cpu-supply = <&buck3_reg>;
271};
272
273&cpu4 {
274 cpu-supply = <&buck2_reg>;
275};
276
277&decon {
278 status = "okay";
279
280 i80-if-timings {
281 };
282};
283
284&dsi {
285 status = "okay";
286 vddcore-supply = <&ldo6_reg>;
287 vddio-supply = <&ldo7_reg>;
288 samsung,pll-clock-frequency = <24000000>;
289 pinctrl-names = "default";
290 pinctrl-0 = <&te_irq>;
291
292 ports {
293 #address-cells = <1>;
294 #size-cells = <0>;
295
296 port@1 {
297 reg = <1>;
298
299 dsi_out: endpoint {
300 samsung,burst-clock-frequency = <512000000>;
301 samsung,esc-clock-frequency = <16000000>;
302 };
303 };
304 };
305};
306
307&hsi2c_0 {
308 status = "okay";
309 clock-frequency = <2500000>;
310
311 s2mps13-pmic@66 {
312 compatible = "samsung,s2mps13-pmic";
313 interrupt-parent = <&gpa0>;
314 interrupts = <7 IRQ_TYPE_NONE>;
315 reg = <0x66>;
316 samsung,s2mps11-wrstbi-ground;
317
318 s2mps13_osc: clocks {
319 compatible = "samsung,s2mps13-clk";
320 #clock-cells = <1>;
321 clock-output-names = "s2mps13_ap", "s2mps13_cp",
322 "s2mps13_bt";
323 };
324
325 regulators {
326 ldo1_reg: LDO1 {
327 regulator-name = "VDD_ALIVE_0.9V_AP";
328 regulator-min-microvolt = <900000>;
329 regulator-max-microvolt = <900000>;
330 regulator-always-on;
331 };
332
333 ldo2_reg: LDO2 {
334 regulator-name = "VDDQ_MMC2_2.8V_AP";
335 regulator-min-microvolt = <2800000>;
336 regulator-max-microvolt = <2800000>;
337 regulator-always-on;
338 regulator-state-mem {
339 regulator-off-in-suspend;
340 };
341 };
342
343 ldo3_reg: LDO3 {
344 regulator-name = "VDD1_E_1.8V_AP";
345 regulator-min-microvolt = <1800000>;
346 regulator-max-microvolt = <1800000>;
347 regulator-always-on;
348 };
349
350 ldo4_reg: LDO4 {
351 regulator-name = "VDD10_MIF_PLL_1.0V_AP";
352 regulator-min-microvolt = <1300000>;
353 regulator-max-microvolt = <1300000>;
354 regulator-always-on;
355 regulator-state-mem {
356 regulator-off-in-suspend;
357 };
358 };
359
360 ldo5_reg: LDO5 {
361 regulator-name = "VDD10_DPLL_1.0V_AP";
362 regulator-min-microvolt = <1000000>;
363 regulator-max-microvolt = <1000000>;
364 regulator-always-on;
365 regulator-state-mem {
366 regulator-off-in-suspend;
367 };
368 };
369
370 ldo6_reg: LDO6 {
371 regulator-name = "VDD10_MIPI2L_1.0V_AP";
372 regulator-min-microvolt = <1000000>;
373 regulator-max-microvolt = <1000000>;
374 regulator-state-mem {
375 regulator-off-in-suspend;
376 };
377 };
378
379 ldo7_reg: LDO7 {
380 regulator-name = "VDD18_MIPI2L_1.8V_AP";
381 regulator-min-microvolt = <1800000>;
382 regulator-max-microvolt = <1800000>;
383 };
384
385 ldo8_reg: LDO8 {
386 regulator-name = "VDD18_LLI_1.8V_AP";
387 regulator-min-microvolt = <1800000>;
388 regulator-max-microvolt = <1800000>;
389 regulator-always-on;
390 regulator-state-mem {
391 regulator-off-in-suspend;
392 };
393 };
394
395 ldo9_reg: LDO9 {
396 regulator-name = "VDD18_ABB_ETC_1.8V_AP";
397 regulator-min-microvolt = <1800000>;
398 regulator-max-microvolt = <1800000>;
399 regulator-always-on;
400 regulator-state-mem {
401 regulator-off-in-suspend;
402 };
403 };
404
405 ldo10_reg: LDO10 {
406 regulator-name = "VDD33_USB30_3.0V_AP";
407 regulator-min-microvolt = <3000000>;
408 regulator-max-microvolt = <3000000>;
409 regulator-state-mem {
410 regulator-off-in-suspend;
411 };
412 };
413
414 ldo11_reg: LDO11 {
415 regulator-name = "VDD_INT_M_1.0V_AP";
416 regulator-min-microvolt = <1000000>;
417 regulator-max-microvolt = <1000000>;
418 regulator-always-on;
419 regulator-state-mem {
420 regulator-off-in-suspend;
421 };
422 };
423
424 ldo12_reg: LDO12 {
425 regulator-name = "VDD_KFC_M_1.1V_AP";
426 regulator-min-microvolt = <800000>;
427 regulator-max-microvolt = <1350000>;
428 regulator-always-on;
429 };
430
431 ldo13_reg: LDO13 {
432 regulator-name = "VDD_G3D_M_0.95V_AP";
433 regulator-min-microvolt = <950000>;
434 regulator-max-microvolt = <950000>;
435 regulator-always-on;
436 regulator-state-mem {
437 regulator-off-in-suspend;
438 };
439 };
440
441 ldo14_reg: LDO14 {
442 regulator-name = "VDDQ_M1_LDO_1.2V_AP";
443 regulator-min-microvolt = <1200000>;
444 regulator-max-microvolt = <1200000>;
445 regulator-always-on;
446 regulator-state-mem {
447 regulator-off-in-suspend;
448 };
449 };
450
451 ldo15_reg: LDO15 {
452 regulator-name = "VDDQ_M2_LDO_1.2V_AP";
453 regulator-min-microvolt = <1200000>;
454 regulator-max-microvolt = <1200000>;
455 regulator-always-on;
456 regulator-state-mem {
457 regulator-off-in-suspend;
458 };
459 };
460
461 ldo16_reg: LDO16 {
462 regulator-name = "VDDQ_EFUSE";
463 regulator-min-microvolt = <1400000>;
464 regulator-max-microvolt = <3400000>;
465 regulator-always-on;
466 };
467
468 ldo17_reg: LDO17 {
469 regulator-name = "V_TFLASH_2.8V_AP";
470 regulator-min-microvolt = <2800000>;
471 regulator-max-microvolt = <2800000>;
472 };
473
474 ldo18_reg: LDO18 {
475 regulator-name = "V_CODEC_1.8V_AP";
476 regulator-min-microvolt = <1800000>;
477 regulator-max-microvolt = <1800000>;
478 };
479
480 ldo19_reg: LDO19 {
481 regulator-name = "VDDA_1.8V_COMP";
482 regulator-min-microvolt = <1800000>;
483 regulator-max-microvolt = <1800000>;
484 regulator-always-on;
485 };
486
487 ldo20_reg: LDO20 {
488 regulator-name = "VCC_2.8V_AP";
489 regulator-min-microvolt = <2800000>;
490 regulator-max-microvolt = <2800000>;
491 regulator-always-on;
492 };
493
494 ldo21_reg: LDO21 {
495 regulator-name = "VT_CAM_1.8V";
496 regulator-min-microvolt = <1800000>;
497 regulator-max-microvolt = <1800000>;
498 };
499
500 ldo22_reg: LDO22 {
501 regulator-name = "CAM_IO_1.8V_AP";
502 regulator-min-microvolt = <1800000>;
503 regulator-max-microvolt = <1800000>;
504 };
505
506 ldo23_reg: LDO23 {
507 regulator-name = "CAM_SEN_CORE_1.05V_AP";
508 regulator-min-microvolt = <1050000>;
509 regulator-max-microvolt = <1050000>;
510 };
511
512 ldo24_reg: LDO24 {
513 regulator-name = "VT_CAM_1.2V";
514 regulator-min-microvolt = <1200000>;
515 regulator-max-microvolt = <1200000>;
516 };
517
518 ldo25_reg: LDO25 {
519 regulator-name = "UNUSED_LDO25";
520 regulator-min-microvolt = <2800000>;
521 regulator-max-microvolt = <2800000>;
522 };
523
524 ldo26_reg: LDO26 {
525 regulator-name = "CAM_AF_2.8V_AP";
526 regulator-min-microvolt = <2800000>;
527 regulator-max-microvolt = <2800000>;
528 };
529
530 ldo27_reg: LDO27 {
531 regulator-name = "VCC_3.0V_LCD_AP";
532 regulator-min-microvolt = <3000000>;
533 regulator-max-microvolt = <3000000>;
534 };
535
536 ldo28_reg: LDO28 {
537 regulator-name = "VCC_1.8V_LCD_AP";
538 regulator-min-microvolt = <1800000>;
539 regulator-max-microvolt = <1800000>;
540 };
541
542 ldo29_reg: LDO29 {
543 regulator-name = "VT_CAM_2.8V";
544 regulator-min-microvolt = <3000000>;
545 regulator-max-microvolt = <3000000>;
546 };
547
548 ldo30_reg: LDO30 {
549 regulator-name = "TSP_AVDD_3.3V_AP";
550 regulator-min-microvolt = <3300000>;
551 regulator-max-microvolt = <3300000>;
552 };
553
554 ldo31_reg: LDO31 {
555 regulator-name = "TSP_VDD_1.85V_AP";
556 regulator-min-microvolt = <1850000>;
557 regulator-max-microvolt = <1850000>;
558 };
559
560 ldo32_reg: LDO32 {
561 regulator-name = "VTOUCH_1.8V_AP";
562 regulator-min-microvolt = <1800000>;
563 regulator-max-microvolt = <1800000>;
564 };
565
566 ldo33_reg: LDO33 {
567 regulator-name = "VTOUCH_LED_3.3V";
568 regulator-min-microvolt = <2500000>;
569 regulator-max-microvolt = <3300000>;
570 regulator-ramp-delay = <12500>;
571 };
572
573 ldo34_reg: LDO34 {
574 regulator-name = "VCC_1.8V_MHL_AP";
575 regulator-min-microvolt = <1000000>;
576 regulator-max-microvolt = <2100000>;
577 };
578
579 ldo35_reg: LDO35 {
580 regulator-name = "OIS_VM_2.8V";
581 regulator-min-microvolt = <1800000>;
582 regulator-max-microvolt = <2800000>;
583 };
584
585 ldo36_reg: LDO36 {
586 regulator-name = "VSIL_1.0V";
587 regulator-min-microvolt = <1000000>;
588 regulator-max-microvolt = <1000000>;
589 };
590
591 ldo37_reg: LDO37 {
592 regulator-name = "VF_1.8V";
593 regulator-min-microvolt = <1800000>;
594 regulator-max-microvolt = <1800000>;
595 };
596
597 ldo38_reg: LDO38 {
598 regulator-name = "VCC_3.0V_MOTOR_AP";
599 regulator-min-microvolt = <3000000>;
600 regulator-max-microvolt = <3000000>;
601 };
602
603 ldo39_reg: LDO39 {
604 regulator-name = "V_HRM_1.8V";
605 regulator-min-microvolt = <1800000>;
606 regulator-max-microvolt = <1800000>;
607 };
608
609 ldo40_reg: LDO40 {
610 regulator-name = "V_HRM_3.3V";
611 regulator-min-microvolt = <3300000>;
612 regulator-max-microvolt = <3300000>;
613 };
614
615 buck1_reg: BUCK1 {
616 regulator-name = "VDD_MIF_0.9V_AP";
617 regulator-min-microvolt = <600000>;
618 regulator-max-microvolt = <1500000>;
619 regulator-always-on;
620 regulator-state-mem {
621 regulator-off-in-suspend;
622 };
623 };
624
625 buck2_reg: BUCK2 {
626 regulator-name = "VDD_EGL_1.0V_AP";
627 regulator-min-microvolt = <900000>;
628 regulator-max-microvolt = <1300000>;
629 regulator-always-on;
630 regulator-state-mem {
631 regulator-off-in-suspend;
632 };
633 };
634
635 buck3_reg: BUCK3 {
636 regulator-name = "VDD_KFC_1.0V_AP";
637 regulator-min-microvolt = <800000>;
638 regulator-max-microvolt = <1200000>;
639 regulator-always-on;
640 regulator-state-mem {
641 regulator-off-in-suspend;
642 };
643 };
644
645 buck4_reg: BUCK4 {
646 regulator-name = "VDD_INT_0.95V_AP";
647 regulator-min-microvolt = <600000>;
648 regulator-max-microvolt = <1500000>;
649 regulator-always-on;
650 regulator-state-mem {
651 regulator-off-in-suspend;
652 };
653 };
654
655 buck5_reg: BUCK5 {
656 regulator-name = "VDD_DISP_CAM0_0.9V_AP";
657 regulator-min-microvolt = <600000>;
658 regulator-max-microvolt = <1500000>;
659 regulator-always-on;
660 regulator-state-mem {
661 regulator-off-in-suspend;
662 };
663 };
664
665 buck6_reg: BUCK6 {
666 regulator-name = "VDD_G3D_0.9V_AP";
667 regulator-min-microvolt = <600000>;
668 regulator-max-microvolt = <1500000>;
669 regulator-always-on;
670 regulator-state-mem {
671 regulator-off-in-suspend;
672 };
673 };
674
675 buck7_reg: BUCK7 {
676 regulator-name = "VDD_MEM1_1.2V_AP";
677 regulator-min-microvolt = <1200000>;
678 regulator-max-microvolt = <1200000>;
679 regulator-always-on;
680 };
681
682 buck8_reg: BUCK8 {
683 regulator-name = "VDD_LLDO_1.35V_AP";
684 regulator-min-microvolt = <1350000>;
685 regulator-max-microvolt = <3300000>;
686 regulator-always-on;
687 };
688
689 buck9_reg: BUCK9 {
690 regulator-name = "VDD_MLDO_2.0V_AP";
691 regulator-min-microvolt = <1350000>;
692 regulator-max-microvolt = <3300000>;
693 regulator-always-on;
694 };
695
696 buck10_reg: BUCK10 {
697 regulator-name = "vdd_mem2";
698 regulator-min-microvolt = <550000>;
699 regulator-max-microvolt = <1500000>;
700 regulator-always-on;
701 };
702 };
703 };
704};
705
706&hsi2c_8 {
707 status = "okay";
708
709 max77843@66 {
710 compatible = "maxim,max77843";
711 interrupt-parent = <&gpa1>;
712 interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
713 reg = <0x66>;
714
715 muic: max77843-muic {
716 compatible = "maxim,max77843-muic";
717 };
718
719 regulators {
720 compatible = "maxim,max77843-regulator";
721 safeout1_reg: SAFEOUT1 {
722 regulator-name = "SAFEOUT1";
723 regulator-min-microvolt = <3300000>;
724 regulator-max-microvolt = <4950000>;
725 };
726
727 safeout2_reg: SAFEOUT2 {
728 regulator-name = "SAFEOUT2";
729 regulator-min-microvolt = <3300000>;
730 regulator-max-microvolt = <4950000>;
731 };
732
733 charger_reg: CHARGER {
734 regulator-name = "CHARGER";
735 regulator-min-microamp = <100000>;
736 regulator-max-microamp = <3150000>;
737 };
738 };
739
740 haptic: max77843-haptic {
741 compatible = "maxim,max77843-haptic";
742 haptic-supply = <&ldo38_reg>;
743 pwms = <&pwm 0 33670 0>;
744 pwm-names = "haptic";
745 };
746 };
747};
748
749&i2s0 {
750 status = "okay";
751};
752
753&mshc_0 {
754 status = "okay";
755 num-slots = <1>;
756 mmc-hs200-1_8v;
757 mmc-hs400-1_8v;
758 cap-mmc-highspeed;
759 non-removable;
760 card-detect-delay = <200>;
761 samsung,dw-mshc-ciu-div = <3>;
762 samsung,dw-mshc-sdr-timing = <0 4>;
763 samsung,dw-mshc-ddr-timing = <0 2>;
764 samsung,dw-mshc-hs400-timing = <0 3>;
765 samsung,read-strobe-delay = <90>;
766 fifo-depth = <0x80>;
767 pinctrl-names = "default";
768 pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_qrdy &sd0_bus1 &sd0_bus4
769 &sd0_bus8 &sd0_rdqs>;
770 bus-width = <8>;
771 assigned-clocks = <&cmu_top CLK_SCLK_MMC0_FSYS>;
772 assigned-clock-rates = <800000000>;
773};
774
775&mshc_2 {
776 status = "okay";
777 num-slots = <1>;
778 cap-sd-highspeed;
779 disable-wp;
780 cd-gpios = <&gpa2 4 GPIO_ACTIVE_HIGH>;
781 cd-inverted;
782 card-detect-delay = <200>;
783 samsung,dw-mshc-ciu-div = <3>;
784 samsung,dw-mshc-sdr-timing = <0 4>;
785 samsung,dw-mshc-ddr-timing = <0 2>;
786 fifo-depth = <0x80>;
787 pinctrl-names = "default";
788 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus1 &sd2_bus4>;
789 bus-width = <4>;
790};
791
792&ppmu_d0_general {
793 status = "okay";
794 events {
795 ppmu_event0_d0_general: ppmu-event0-d0-general {
796 event-name = "ppmu-event0-d0-general";
797 };
798 };
799};
800
801&ppmu_d1_general {
802 status = "okay";
803 events {
804 ppmu_event0_d1_general: ppmu-event0-d1-general {
805 event-name = "ppmu-event0-d1-general";
806 };
807 };
808};
809
810&pinctrl_alive {
811 pinctrl-names = "default";
812 pinctrl-0 = <&initial_alive>;
813
814 initial_alive: initial-state {
815 PIN(INPUT, gpa0-0, DOWN, FAST_SR1);
816 PIN(INPUT, gpa0-1, NONE, FAST_SR1);
817 PIN(INPUT, gpa0-2, DOWN, FAST_SR1);
818 PIN(INPUT, gpa0-3, NONE, FAST_SR1);
819 PIN(INPUT, gpa0-4, NONE, FAST_SR1);
820 PIN(INPUT, gpa0-5, DOWN, FAST_SR1);
821 PIN(INPUT, gpa0-6, NONE, FAST_SR1);
822 PIN(INPUT, gpa0-7, NONE, FAST_SR1);
823
824 PIN(INPUT, gpa1-0, UP, FAST_SR1);
825 PIN(INPUT, gpa1-1, NONE, FAST_SR1);
826 PIN(INPUT, gpa1-2, NONE, FAST_SR1);
827 PIN(INPUT, gpa1-3, DOWN, FAST_SR1);
828 PIN(INPUT, gpa1-4, DOWN, FAST_SR1);
829 PIN(INPUT, gpa1-5, NONE, FAST_SR1);
830 PIN(INPUT, gpa1-6, NONE, FAST_SR1);
831 PIN(INPUT, gpa1-7, NONE, FAST_SR1);
832
833 PIN(INPUT, gpa2-0, NONE, FAST_SR1);
834 PIN(INPUT, gpa2-1, NONE, FAST_SR1);
835 PIN(INPUT, gpa2-2, NONE, FAST_SR1);
836 PIN(INPUT, gpa2-3, DOWN, FAST_SR1);
837 PIN(INPUT, gpa2-4, NONE, FAST_SR1);
838 PIN(INPUT, gpa2-5, DOWN, FAST_SR1);
839 PIN(INPUT, gpa2-6, DOWN, FAST_SR1);
840 PIN(INPUT, gpa2-7, NONE, FAST_SR1);
841
842 PIN(INPUT, gpa3-0, DOWN, FAST_SR1);
843 PIN(INPUT, gpa3-1, DOWN, FAST_SR1);
844 PIN(INPUT, gpa3-2, NONE, FAST_SR1);
845 PIN(INPUT, gpa3-3, DOWN, FAST_SR1);
846 PIN(INPUT, gpa3-4, NONE, FAST_SR1);
847 PIN(INPUT, gpa3-5, DOWN, FAST_SR1);
848 PIN(INPUT, gpa3-6, DOWN, FAST_SR1);
849 PIN(INPUT, gpa3-7, DOWN, FAST_SR1);
850
851 PIN(INPUT, gpf1-0, NONE, FAST_SR1);
852 PIN(INPUT, gpf1-1, NONE, FAST_SR1);
853 PIN(INPUT, gpf1-2, DOWN, FAST_SR1);
854 PIN(INPUT, gpf1-4, UP, FAST_SR1);
855 PIN(OUTPUT, gpf1-5, NONE, FAST_SR1);
856 PIN(INPUT, gpf1-6, DOWN, FAST_SR1);
857 PIN(INPUT, gpf1-7, DOWN, FAST_SR1);
858
859 PIN(INPUT, gpf2-0, DOWN, FAST_SR1);
860 PIN(INPUT, gpf2-1, DOWN, FAST_SR1);
861 PIN(INPUT, gpf2-2, DOWN, FAST_SR1);
862 PIN(INPUT, gpf2-3, DOWN, FAST_SR1);
863
864 PIN(INPUT, gpf3-0, DOWN, FAST_SR1);
865 PIN(INPUT, gpf3-1, DOWN, FAST_SR1);
866 PIN(INPUT, gpf3-2, NONE, FAST_SR1);
867 PIN(INPUT, gpf3-3, DOWN, FAST_SR1);
868
869 PIN(INPUT, gpf4-0, DOWN, FAST_SR1);
870 PIN(INPUT, gpf4-1, DOWN, FAST_SR1);
871 PIN(INPUT, gpf4-2, DOWN, FAST_SR1);
872 PIN(INPUT, gpf4-3, DOWN, FAST_SR1);
873 PIN(INPUT, gpf4-4, DOWN, FAST_SR1);
874 PIN(INPUT, gpf4-5, DOWN, FAST_SR1);
875 PIN(INPUT, gpf4-6, DOWN, FAST_SR1);
876 PIN(INPUT, gpf4-7, DOWN, FAST_SR1);
877
878 PIN(INPUT, gpf5-0, DOWN, FAST_SR1);
879 PIN(INPUT, gpf5-1, DOWN, FAST_SR1);
880 PIN(INPUT, gpf5-2, DOWN, FAST_SR1);
881 PIN(INPUT, gpf5-3, DOWN, FAST_SR1);
882 PIN(OUTPUT, gpf5-4, NONE, FAST_SR1);
883 PIN(INPUT, gpf5-5, DOWN, FAST_SR1);
884 PIN(INPUT, gpf5-6, DOWN, FAST_SR1);
885 PIN(INPUT, gpf5-7, DOWN, FAST_SR1);
886 };
887
888 te_irq: te_irq {
889 samsung,pins = "gpf1-3";
890 samsung,pin-function = <0xf>;
891 };
892};
893
894&pinctrl_cpif {
895 pinctrl-names = "default";
896 pinctrl-0 = <&initial_cpif>;
897
898 initial_cpif: initial-state {
899 PIN(INPUT, gpv6-0, DOWN, FAST_SR1);
900 PIN(INPUT, gpv6-1, DOWN, FAST_SR1);
901 };
902};
903
904&pinctrl_ese {
905 pinctrl-names = "default";
906 pinctrl-0 = <&initial_ese>;
907
908 initial_ese: initial-state {
909 PIN(INPUT, gpj2-0, DOWN, FAST_SR1);
910 PIN(INPUT, gpj2-1, DOWN, FAST_SR1);
911 PIN(INPUT, gpj2-2, DOWN, FAST_SR1);
912 };
913};
914
915&pinctrl_fsys {
916 pinctrl-names = "default";
917 pinctrl-0 = <&initial_fsys>;
918
919 initial_fsys: initial-state {
920 PIN(INPUT, gpr3-0, NONE, FAST_SR1);
921 PIN(INPUT, gpr3-1, DOWN, FAST_SR1);
922 PIN(INPUT, gpr3-2, DOWN, FAST_SR1);
923 PIN(INPUT, gpr3-3, DOWN, FAST_SR1);
924 PIN(INPUT, gpr3-7, NONE, FAST_SR1);
925 };
926};
927
928&pinctrl_imem {
929 pinctrl-names = "default";
930 pinctrl-0 = <&initial_imem>;
931
932 initial_imem: initial-state {
933 PIN(INPUT, gpf0-0, UP, FAST_SR1);
934 PIN(INPUT, gpf0-1, UP, FAST_SR1);
935 PIN(INPUT, gpf0-2, DOWN, FAST_SR1);
936 PIN(INPUT, gpf0-3, UP, FAST_SR1);
937 PIN(INPUT, gpf0-4, DOWN, FAST_SR1);
938 PIN(INPUT, gpf0-5, NONE, FAST_SR1);
939 PIN(INPUT, gpf0-6, DOWN, FAST_SR1);
940 PIN(INPUT, gpf0-7, UP, FAST_SR1);
941 };
942};
943
944&pinctrl_nfc {
945 pinctrl-names = "default";
946 pinctrl-0 = <&initial_nfc>;
947
948 initial_nfc: initial-state {
949 PIN(INPUT, gpj0-2, DOWN, FAST_SR1);
950 };
951};
952
953&pinctrl_peric {
954 pinctrl-names = "default";
955 pinctrl-0 = <&initial_peric>;
956
957 initial_peric: initial-state {
958 PIN(INPUT, gpv7-0, DOWN, FAST_SR1);
959 PIN(INPUT, gpv7-1, DOWN, FAST_SR1);
960 PIN(INPUT, gpv7-2, NONE, FAST_SR1);
961 PIN(INPUT, gpv7-3, DOWN, FAST_SR1);
962 PIN(INPUT, gpv7-4, DOWN, FAST_SR1);
963 PIN(INPUT, gpv7-5, DOWN, FAST_SR1);
964
965 PIN(INPUT, gpb0-4, DOWN, FAST_SR1);
966
967 PIN(INPUT, gpc0-2, DOWN, FAST_SR1);
968 PIN(INPUT, gpc0-5, DOWN, FAST_SR1);
969 PIN(INPUT, gpc0-7, DOWN, FAST_SR1);
970
971 PIN(INPUT, gpc1-1, DOWN, FAST_SR1);
972
973 PIN(INPUT, gpc3-4, NONE, FAST_SR1);
974 PIN(INPUT, gpc3-5, NONE, FAST_SR1);
975 PIN(INPUT, gpc3-6, NONE, FAST_SR1);
976 PIN(INPUT, gpc3-7, NONE, FAST_SR1);
977
978 PIN(OUTPUT, gpg0-0, NONE, FAST_SR1);
979 PIN(2, gpg0-1, DOWN, FAST_SR1);
980
981 PIN(INPUT, gpd2-5, DOWN, FAST_SR1);
982
983 PIN(INPUT, gpd4-0, NONE, FAST_SR1);
984 PIN(INPUT, gpd4-1, DOWN, FAST_SR1);
985 PIN(INPUT, gpd4-2, DOWN, FAST_SR1);
986 PIN(INPUT, gpd4-3, DOWN, FAST_SR1);
987 PIN(INPUT, gpd4-4, DOWN, FAST_SR1);
988
989 PIN(INPUT, gpd6-3, DOWN, FAST_SR1);
990
991 PIN(INPUT, gpd8-1, UP, FAST_SR1);
992
993 PIN(INPUT, gpg1-0, DOWN, FAST_SR1);
994 PIN(INPUT, gpg1-1, DOWN, FAST_SR1);
995 PIN(INPUT, gpg1-2, DOWN, FAST_SR1);
996 PIN(INPUT, gpg1-3, DOWN, FAST_SR1);
997 PIN(INPUT, gpg1-4, DOWN, FAST_SR1);
998
999 PIN(INPUT, gpg2-0, DOWN, FAST_SR1);
1000 PIN(INPUT, gpg2-1, DOWN, FAST_SR1);
1001
1002 PIN(INPUT, gpg3-0, DOWN, FAST_SR1);
1003 PIN(INPUT, gpg3-1, DOWN, FAST_SR1);
1004 PIN(INPUT, gpg3-5, DOWN, FAST_SR1);
1005 PIN(INPUT, gpg3-7, DOWN, FAST_SR1);
1006 };
1007};
1008
1009&pinctrl_touch {
1010 pinctrl-names = "default";
1011 pinctrl-0 = <&initial_touch>;
1012
1013 initial_touch: initial-state {
1014 PIN(INPUT, gpj1-2, DOWN, FAST_SR1);
1015 };
1016};
1017
1018&pwm {
1019 pinctrl-0 = <&pwm0_out>;
1020 pinctrl-names = "default";
1021 status = "okay";
1022};
1023
1024&mic {
1025 status = "okay";
1026
1027 i80-if-timings {
1028 };
1029};
1030
1031&pmu_system_controller {
1032 assigned-clocks = <&pmu_system_controller 0>;
1033 assigned-clock-parents = <&xxti>;
1034};
1035
1036&serial_1 {
1037 status = "okay";
1038};
1039
1040&spi_1 {
1041 cs-gpios = <&gpd6 3 GPIO_ACTIVE_HIGH>;
1042 status = "okay";
1043
1044 wm5110: wm5110-codec@0 {
1045 compatible = "wlf,wm5110";
1046 reg = <0x0>;
1047 spi-max-frequency = <20000000>;
1048 interrupt-parent = <&gpa0>;
1049 interrupts = <4 IRQ_TYPE_NONE>;
1050 clocks = <&pmu_system_controller 0>,
1051 <&s2mps13_osc S2MPS11_CLK_BT>;
1052 clock-names = "mclk1", "mclk2";
1053
1054 gpio-controller;
1055 #gpio-cells = <2>;
1056
1057 wlf,micd-detect-debounce = <300>;
1058 wlf,micd-bias-start-time = <0x1>;
1059 wlf,micd-rate = <0x7>;
1060 wlf,micd-dbtime = <0x1>;
1061 wlf,micd-force-micbias;
1062 wlf,micd-configs = <0x0 1 0>;
1063 wlf,hpdet-channel = <1>;
1064 wlf,gpsw = <0x1>;
1065 wlf,inmode = <2 0 2 0>;
1066
1067 wlf,reset = <&gpc0 7 GPIO_ACTIVE_HIGH>;
1068 wlf,ldoena = <&gpf0 0 GPIO_ACTIVE_HIGH>;
1069
1070 /* core supplies */
1071 AVDD-supply = <&ldo18_reg>;
1072 DBVDD1-supply = <&ldo18_reg>;
1073 CPVDD-supply = <&ldo18_reg>;
1074 DBVDD2-supply = <&ldo18_reg>;
1075 DBVDD3-supply = <&ldo18_reg>;
1076
1077 controller-data {
1078 samsung,spi-feedback-delay = <0>;
1079 };
1080 };
1081};
1082
1083&timer {
1084 clock-frequency = <24000000>;
1085};
1086
1087&tmu_atlas0 {
1088 vtmu-supply = <&ldo3_reg>;
1089 status = "okay";
1090};
1091
1092&tmu_apollo {
1093 vtmu-supply = <&ldo3_reg>;
1094 status = "okay";
1095};
1096
1097&tmu_g3d {
1098 vtmu-supply = <&ldo3_reg>;
1099 status = "okay";
1100};
1101
1102&usbdrd30 {
1103 vdd33-supply = <&ldo10_reg>;
1104 vdd10-supply = <&ldo6_reg>;
1105 status = "okay";
1106};
1107
1108&usbdrd_dwc3_0 {
1109 dr_mode = "otg";
1110}; 19};
1111 20
1112&usbdrd30_phy { 21&ldo31_reg {
1113 vbus-supply = <&safeout1_reg>; 22 regulator-name = "TSP_VDD_1.85V_AP";
1114 status = "okay"; 23 regulator-min-microvolt = <1850000>;
24 regulator-max-microvolt = <1850000>;
1115}; 25};
1116 26
1117&xxti { 27&ldo38_reg {
1118 clock-frequency = <24000000>; 28 regulator-name = "VCC_3.0V_MOTOR_AP";
29 regulator-min-microvolt = <3000000>;
30 regulator-max-microvolt = <3000000>;
1119}; 31};
diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts b/arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts
index 854c583092d5..2fbf3a860316 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts
+++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts
@@ -11,7 +11,7 @@
11 * published by the Free Software Foundation. 11 * published by the Free Software Foundation.
12 */ 12 */
13 13
14#include "exynos5433-tm2.dts" 14#include "exynos5433-tm2-common.dtsi"
15 15
16/ { 16/ {
17 model = "Samsung TM2E board"; 17 model = "Samsung TM2E board";
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-24 02:33:24 -0400